Commit Graph

5 Commits

Author SHA1 Message Date
Antonio Borneo 360b2c2701 tcl: replace '-ctibase' with '-baseaddr'
Replace the deprecated option '-ctibase' with the generic option
'-baseaddr'.

Change generated with command:
	sed -i 's/-ctibase/-baseaddr/g' $(find tcl/ -type f)

Change-Id: If776934d2ac106532708768bb3a4ec6fcffb0368
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5870
Tested-by: jenkins
2020-11-04 17:37:36 +00:00
Marek Vasut b304971f38 tcl/target: Unify Renesas R-Car JTAG reset config
Both Gen2 and Gen3 used the same init_reset{} implementation,
pull it into common file and include it from both generations.
Moreover, this behavior is SoC specific, not board specific,
so move the common init_reset into target/ directory.

Change-Id: I5489a4bff9a786da8cb7fd7a515b0c9ce9dc16e3
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5400
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-09 05:59:39 +00:00
Marek Vasut d55bcde16c tcl/target: Abort on invalid SoC selection on R-Car Gen3
Instead of printing error message and continue, abort on invalid SoC
selection right away.

Change-Id: I9c7a7111b590c6c49a0826562380b881a162a8dc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5439
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02 15:32:23 +00:00
Marek Vasut af952850b5 tcl/target: Fix V3M/V3H SoC chipname
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the
CHIPNAME and swap the SoCs to keep the list sorted.

Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5140
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20 11:17:05 +01:00
Adam Bass 2f15407107 tcl/target: Add Renesas R-Car Gen3 targets
Add configuration for the Renesas R-Car Generation 3 targets.
These are SoCs with Cortex A57s, A53s, and R7s. All cores
are supported.

Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70
Signed-off-by: Adam Bass <adam.bass@renesas.com>
Reviewed-on: http://openocd.zylin.com/4669
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-01 20:59:13 +01:00