Commit Graph

7660 Commits

Author SHA1 Message Date
Uwe Bonnes 66d29eb6e3 tcl/target/stm32f4x.cfg: Use Workareasize of smallest possible device.
Increase workareasize when it is know we have a larger device.

Change-Id: Ieaee92e7cd25cc201989f14de122349698871412
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3378
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 23:34:29 +01:00
George Ioakimedes aed0d5d730 psoc4: Corrected Silicon IDs
Corrected 2 Silicon IDs that were swapped.
I've tested with a CY8C4125AXI-483 and  confirmed
that the device is recognized correctly now.

Change-Id: I6fcbee33558d8feec9abf6052df3f15523379c48
Signed-off-by: George Ioakimedes <georgeioak@gmail.com>
Reviewed-on: http://openocd.zylin.com/3619
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 14:48:45 +01:00
Tomas Vanek ccb4a913c2 target: check late abort from target in async_algorithm
target_run_flash_async_algorithm() ignored abort from target
(rp set to 0) when raised after all data have been written in fifo.
I could result e.g. in not reported error during flash write.

The change adds rp test after target algorithm has finished.

Change-Id: Iadd93371e4a4602737be10079479285d81ae41b2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3560
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 09:39:01 +01:00
Olaf Lüke 8160cfb7db at91samd: Add Atmel SAMD09 family support
Change-Id: I0ee3bb92aa168ed070863ac09e3c457a4b2e2220
Signed-off-by: Olaf Lüke <olaf@tinkerforge.com>
Reviewed-on: http://openocd.zylin.com/3428
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk>
2016-08-13 09:28:08 +01:00
Uwe Bonnes 20466e5374 tcl/target/stm32l4x.cfg: Reduce adapter speed before reset.
Change-Id: I200286c0b980369f74e8f1e497bc5e565ddb616d
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3366
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 09:26:42 +01:00
Andy Pomfret 4b11548748 rtos: removed chSysInit from detection of ChibiOS (#121)
Using the presence of the 'chSysInit' symbol for detection of
ChibiOS is dangerous because this symbol may not be available
if link-time optimisation is used.

This patch removes this reliance, so the symbols 'ch' and 'ch_debug'
are the only things required for ChibiOS detection.

If 'ch' is present but 'ch_debug' is not, an info message suggests
that Chibios might be present without its registry being enabled.
This message has been reworded a little to make it slightly more
equivocal because the chances of a false positive message are
increased.

Addresses bug #121, "ChibiOS rtos detection fails with LTO enabled".

Change-Id: I5ef224735c06446751adee010ce75be4f30f0403
Signed-off-by: Andy Pomfret <cooperised@gmail.com>
Reviewed-on: http://openocd.zylin.com/3381
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 09:21:23 +01:00
Andreas Färber 02f17f0ba3 kinetis_ke: Switch to standard build variables
Instead of using ARM_ prefixed variables and an "arm" target,
use CROSS_COMPILE, AS, OBJCOPY. This requires to switch from ?= to =
to avoid the host assembler getting invoked.

This allows to handle kinetis_ke subdirectory like fm4 and xmc1xxx.

Change-Id: I7ea0bf119f6c4716f4d6002794004730af49eef4
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3505
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 09:19:43 +01:00
Andreas Färber e499502e98 contrib/loaders: Add umbrella Makefile
Add a Makefile that orchestrates the other loader Makefiles.
It assumes that the clean target can be run without cross toolchain.

at91sam7x does not successfully build and is not really needed either,
therefore left out.

Add an exception to .gitignore for any contrib/loaders Makefile.

Change-Id: I74456b768472f3190a1721bcf41a777bb8daf973
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3504
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 09:17:24 +01:00
Tomas Vanek 306e04e825 psoc4.cfg: fixed typo in message, add a hint
PSoC4 design prevents reset halt/init with standard/low level
SWD adapter if hw reset line configured. Give user hint
to use 'reset_config none' in such case.

Change-Id: I0ca2c46b8575829b0013fd151f2eb63963d66653
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3617
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 09:02:47 +01:00
Andreas Bolsch cd9b9a6364 Cortex-M7 handling.
- FPU detection and FPU register support added for Cortex-M7.
  There is no apparent difference between FPv4 and FPv5_SP but ...

- Autoincrement range for MEM-AP added for Cortex-M7

This patch together with #3526 replaces #3123 except for stm32f7x.cfg.

Change-Id: I5ed5392e3835674160563ff37d67622a7bf2c877
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/3531
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-10 12:02:24 +01:00
Felix Held 5e010127e7 xilinx-xc7: correct Artix7 15T IDCODE
The IDCODE of Artix7 15T in the UG470 is wrong; Artix7 35T and 15T don't have the same IDCODE.
I've tested this on real hardware.

Change-Id: Iac267dc449c23454dd119126749dbeb8267c18ac
Signed-off-by: Felix Held <felix-openocd@felixheld.de>
Reviewed-on: http://openocd.zylin.com/3633
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-08-10 09:42:37 +01:00
Matthias Welwarsky 03942f867a adi_v5_jtag: clear sticky overrun condition in WAIT timeout
If WAIT recovery fails (times out), an ABORT command is issued to the
DAP but under some conditions the SSTICKYORUN bit in CTRL/STAT is not
cleared as well, which renders the DP unusable. This happens when
trying to access e.g. the ROM table of powered-down cores, on many
targets.

Change-Id: Id0a7ba6180069eee562871314f520f938df9718f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3476
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09 14:36:13 +01:00
Matthias Welwarsky 918de0be13 target: add "phys" argument to mem2array, array2mem
Allow using physical addresses with mem2array and array2mem. In order
to minimize the impact on existing scripts, "phys" is added as an
optional 5th parameter to both commands.

This patch also adds "phys" variants to the memwrite/memread commands
in memory.tcl.

Change-Id: Ia6307f9d861789e7f3ccf1f98961d666bf8d85d6
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3387
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09 14:32:12 +01:00
Matthias Welwarsky 6f8cf930bc Fix resume when core state has been modified
Sometimes it is necessary to resume into a different state (ARM/Thumb)
than at debug state entry. According to the documentation this should
be possible with "arm core_state arm|thumb" before the resume command,
however the original code also restores the original CPSR, which
overrides whatever state the core was set to. This seems to work on some
cores (e.g. Cortex-A5) but not on others (e.g. Cortex-A9). Using the "BX"
instruction to set resume PC and core state works on Cortex-A9 and
ARM11, but is not sufficient on Cortex-A5, where an explicit write to
the PC (MOV pc, r0) is required additionally.

Change-Id: Ic03153b4b250fbb8cf6c75f8e329fb34829aa35f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3386
Tested-by: jenkins
Reviewed-by: Alexander Stein <alexanders83@web.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09 14:28:43 +01:00
Andrey Skvortsov 5d5c9bc4ec flash: nor: mdr: fix verification problem with 1986VE1T or 1986VE3T
1986VE1T and 1986VE3T have issue with flash acceleration engine described
in their errata (issue 0007).
After programming flash acceleration engine's buffer contains old data,
and therefore first read data are wrong. Because of this verification after
programming fails always. Recommended workaround for the issue is to flush
flash accelerator's buffer. To do so it's necessary to read at least 64
bytes of flash through accelerator.

Reading bytes through JTAG using default_flash_read doesn't help.
It seems that reading should be done by uC itself.

Change-Id: I18ef464a68ad5c5b16d3933f31ca61f8e2e7cca3
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-on: http://openocd.zylin.com/3509
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-08-02 17:49:18 +01:00
Andreas Färber f19ac83152 Fix usage of timeval_ms()
First, fix the timeval_ms() implementation to not have K&R but ANSI
argument semantics by adding a missing void.

timeval_ms() returns an int64_t, not uint64_t or long long. Consistently
use int64_t for variables and PRI*64 as format string.

While at it, change a few related variables to bool for clarity.

Note that timeval_ms() may return a negative error code, but not a
single caller checks for that.

Change-Id: I27cf83e75b3e9a8913f6c43e98a281bea77aac13
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3499
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-07-19 10:45:16 +01:00
Tomas Vanek f4496b25e3 arm_adi_v5: add dap apreg command for AP register read/write
A developer tool: Direct access to AP registers can be useful
for handling vendor specific AP like Freescale Kinetis MDM or Atmel SMAP.

Change-Id: Ie2c7160fc6b2e398513eb23e1e52cbb52b88d9bd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2777
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-07-17 23:30:09 +01:00
Matthias Welwarsky 7a0473bbb6 tcl: add mrb command to mem_helper.tcl
add "mrb" command to read a byte of memory into a variable

Change-Id: I5ddc9fbcc55958a249548627bd15824df6dc0d61
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3542
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-07-17 22:36:47 +01:00
Steven Stallion 800fe0b885 server: support binding to arbitrary interfaces
Some installations of OpenOCD are used in restricted environments that
do not permit binding to public interfaces.

This patch does not affect the default behavior to listen on all
interfaces, however it does give the option to restrict services by way
of the bindto command.

Change-Id: Id51bd64b376a8c62dd47b08b4d834872925e6af2
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3534
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-07-17 20:55:11 +01:00
Fredrik Hederstierna 12e4a2a220 swd: Add support for connect_assert_srst for SWD.
Today the reset option for connect_assert_srst is not done for SWD.
This patch adds this to SWD and make it possible to connect to targets which might disable JTAG interface when running.

Change-Id: Ib89f7cf59b628e8f0b5fca9dd9e362e383c4b99f
Signed-off-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-on: http://openocd.zylin.com/3018
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-07-04 23:44:02 +01:00
Esben Haabendal 12ff09f7f2 cfi: Add support for strangely endianness broken SoC implementations
This adds the 'data_swap' parameter to the CFI driver, which enables
swapping of data bytes when writing/programming words to the flash.
Note, that this specifically means that bytes are not swapped when
writing command words to the flash chip.  Unless you are using the SAP
in an LS102x chip to program an attached 16-bit NOR flash, you hopefully
do not need this!

Change-Id: I1e6f7169da36f373c880d1756d9c21c9957acc50
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3109
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-06-23 07:39:57 +01:00
Esben Haabendal f906c65fed Support for Freescale LS102x SAP
The SAP in LS102x SoC's from Freescale is able to read and write to all
physical memory locations, independently of CPU cores and DAP.

This implementation is 100% based on reverse-engineering of JTAG
communication with an LS1021A SAP using a JTAG debugger with SAP support.

And as such, this code is for now "works-for-me", pending verification
by other OpenOCD users, or even better, actual information from Freescale
on the SAP interface.

Change-Id: Ibb30945e017894da5c402f9f633fc513bed4e68c
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3096
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-06-23 07:37:36 +01:00
Uwe Bonnes 406f4d1c68 stm32f7x.cfg: Fix expected JTAG id.
Change-Id: Icd21b9ac5f50094262f30db431d8a775a0d263ca
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3512
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-31 16:21:23 +01:00
Marc Schink d4b7cbff88 Make #include guard naming consistent
Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2956
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:55 +01:00
Marc Schink d0e763ac7e Remove FSF address from GPL notices
Also make GPL notices consistent according to:
https://www.gnu.org/licenses/gpl-howto.html

Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3488
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:01 +01:00
Andreas Färber 9728ac3fba armv4_5: Integrate build of checksum code
Add rules to build armv4_5_crc.inc, and convert the code to target
endianness the least intrusive way.

Change-Id: I7452b2c7e679dae14f9cda5f89bc81c16fc12cad
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3473
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-05-22 15:51:15 +01:00
Andreas Färber 18f7a2d072 armv4_5: Integrate build of erase check code
Add rules to build armv4_5_erase_check.inc, and convert the code to
target endianness the least intrusive way.

Drop an unused word from the assembler sources to make the ARM bytecode
fully match that of armv4_5.c and to not break ARMv4 assumptions.

This completes the build rules for contrib/loaders/erase_check directory.

Change-Id: I36be7a944e26142088195fa3fb072d4e577bf328
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3135
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:50:49 +01:00
Andreas Färber e0ba93d018 armv7m: Integrate build of checksum code
Add rules to build armv7m_crc.inc and include it via preprocessor.

Change-Id: I4482c7acb8454de28bdf210d9f06c0720ada490a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3474
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:49:51 +01:00
Andreas Färber 1eb19b8de5 armv4_5: Improve arm_checksum_memory() error handling
Clean up the working area in case writing fails.
Change the error handling paradigm to avoid duplication.

Change-Id: Ie3f95f992a98a1325428e4032a1c17346d4c9977
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3472
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:49:17 +01:00
Andreas Färber fcaf7e0cfe armv4_5: Improve arm_blank_check_memory() error handling
Clean up the working area in case writing fails.
Change the error handling paradigm to avoid duplication.

Change-Id: I95bb12fbe7c80b594e178468bcd4f6387c682c93
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3471
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:48:44 +01:00
Andreas Färber 08cdb58f05 tcl/target: Add PSoC 5LP config
Tested with CY8CKIT-059 and soldered-on J5 connector.

Change-Id: I687786179f2df354321a18d26330c60908461e0b
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3410
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:47:34 +01:00
Tim Newsome e54983c10f Fix comment that limits num_bits to 32.
Andreas Fritiofson says "If any adapter driver does not work with
arbitrary lengths of individual fields, it's a bug."
https://sourceforge.net/p/openocd/mailman/message/35091945/

Note also that lengths of at least 96 bits are already in use, eg. in
mips_ejtag_add_scan_96().

Change-Id: I62a150adc75c0ef78827683ca8d0a8e90310a982
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/3491
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 00:53:32 +01:00
Andreas Färber ccfcca4a0c xmc4500: Disable SRST for SDRAM App Kit
Just like observed with the General App Kit earlier, it now started to
fail halting:

  SWD IDCODE 0x2ba01477
  TARGET: xmc4500.cpu - Not halted
  in procedure 'reset'
  in procedure 'ocd_bouncer'

  SWD IDCODE 0x2ba01477
  Halt timed out, wake up GDB.

Rely on the target's default sysresetreq behavior to allow flashing to
work seemlessly again.

Change-Id: Ib9ce5f2c0ab99dca6d0fc74435fe26a58437fae5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3416
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-21 22:07:39 +01:00
Paul Fertser 7fd8e21628 configure.ac: support MSYS with newer config.guess
Upstream commit
http://git.savannah.gnu.org/gitweb/?p=config.git;a=commitdiff;h=f4ebd3ed097771a729b68e688236aea665e7c1f3
makes both i386 and amd64 MSYS (and MSYS2) systems be detected as
*-pc-msys .

With this patch OpenOCD builds without any additional tweaks on MSYS2
with the latest config.guess.

Change-Id: I1ae4154f76125a84078926b425fa989904639ce0
Reported-by: "Stevens, Kelly E. M." <Kelly.Stevens@gtri.gatech.edu>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3468
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-21 21:51:27 +01:00
Andreas Färber a7a1b93004 lpcspifi: Fix SWD support for LPC43xx
When using SWD rather than JTAG transport, the lpcspifi driver complains:

  Error: Device ID 0x0 is not known as SPIFI capable
  Error: auto_probe failed

This is because target's JTAG tap->idcode is zero for SWD.

Drop this check completely and hardcode the addresses for now. Neither
the JTAG TAPID nor the SWD IDCODE are unique enough to detect the exact
chip model and thereby its memory map.

Change-Id: Ic230e3e989a3e1f1a5b3bae68bdb34e5ef55d392
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3089
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:42:19 +01:00
Andreas Färber 679ae2a98d tcl/target: Add config for TI MSP432P4xx
Tested with TI MSP-EXP432P401R LaunchPad, via both on-board XDS110-ET (swd)
and external J-Link (jtag).

Change-Id: Ic0caa8516a155754b1c88a04acc8d3c511d9a5f7
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3485
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:40:44 +01:00
Marc Schink ca916d6118 board/efm32: Disable SRST
The current configuration leads to the following error when trying to
program the target:

  SWD IDCODE 0x2ba01477
  timed out while waiting for target halted
  TARGET: efm32.cpu - Not halted
  in procedure 'program'
  in procedure 'reset' called at file "embedded:startup.tcl", line 478
  in procedure 'ocd_bouncer'

Use the default reset handling of the target (SYSRESETREQ) to reset the
system rather than SRST to fix the problem.

Tested on EFM32GG, EFM32TG and EZR32WG STK.

Change-Id: I788c41baf08b20814cbe0934b563424c4bc144b8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3420
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:38:58 +01:00
Andreas Färber 0c8ec7c826 Fix spelling of ARM Cortex
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn
or CortexXn. Further it's Cortex-M0+, not M0plus.

Cf. http://www.arm.com/products/processors/index.php

Consistently write it the official way, so that it stops propagating.
Originally spotted in the documentation, it mainly affects code comments
but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output.

Found via:

  git grep -i "Cortex "
  git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu"
  git grep -i "CortexM"

Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3483
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-20 21:38:03 +01:00
Ivo Manca f630fac2e7 nand: change use_raw to boolean
Change type of use_raw to boolean. This parameter was already
assigned a boolean variable (in COMMAND_PARSE_ENABLE) and used
as a boolean.

Change-Id: I22f8308246cb25ec9ec2395599e406160410a2a8
Signed-off-by: Ivo Manca <pinkel@gmail.com>
Reviewed-on: http://openocd.zylin.com/3496
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:36:39 +01:00
Ivo Manca 7c0832ef7e nand: fix return value
Return ERROR_NAND_DEVICE_NOT_PROBED to prevent calling functions
from segfaulting when nand device has not yet been probed (ie nand
verify)

Change-Id: Ibc4da0aad00e6cc6c83008882b054d981453dc36
Signed-off-by: Ivo Manca <pinkel@gmail.com>
Reviewed-on: http://openocd.zylin.com/3495
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:35:44 +01:00
Samuel Martin 0849dd71b1 tcl: add STM32F429I-DISC1 board config
Both the STM32F429I-DISC{O,1} boards are equipped with the same MCU, but
differ by the debugging chip:
- the STM32F429I-DISCO uses the ST-LINK/V2 chip;
- the STM32F429I-DISC1 uses the ST-LINK/V2-B chip (which matches the USB
  VID/PID set in stlink-v2-1.cfg).

Change-Id: I07d637f72d26cf5d714472638da974eb6ca02325
Signed-off-by: Samuel Martin <s.martin49@gmail.com>
Reviewed-on: http://openocd.zylin.com/3492
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:29:04 +01:00
Andreas Fritiofson 8f26fa3c0f cortex_a: Rename APB-AP to CPU in memory contexts
Memory accesses are not made through the APB-AP, they are made through
the CPU (which happens to be controlled over the APB-AP). Rename all
irrelevant uses of the APB-AP term. And fix the long standing typo in
the function names...

Change-Id: Ide466fb2728930968bdba698f0dd9012cc9dbdf9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3216
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:17:03 +01:00
Uwe Bonnes c0f0d62298 stm32l1/Cat.3: Devices have only one bank.
Change-Id: I02ce243c228ea20be6d5f01fee705a671747ebad
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3490
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-20 21:14:47 +01:00
Uwe Bonnes 44a6362b20 stm32l4x.cfg: Fix RCC_CR address.
Change-Id: I7a63d24a495e28bc01b5e6603f15b88e075878b8
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3489
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-20 21:13:52 +01:00
Andreas Färber 89bf96ffe6 kinetis: Fix typo in variable names
It's security, not securtiy.

Change-Id: Idb10d7e0a1ca47d2d93b496d12cd4ec7ad116f22
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3487
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-17 23:10:57 +01:00
Andreas Färber 426d9f8785 arm_adi_v5: Add part number for TI MSP432P401R
According to the MSP432P4xx Family TRM (SLAU356A) Figure 4-7,
0x9AF is the part number for MSP432P401xx devices.

Verified on TI MSP-EXP432P401R LaunchPad.

Change-Id: I22b57c42f2a0dc8263fab6b480cf8c169c7dc295
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3486
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17 22:47:56 +01:00
Andreas Färber 21e6357010 arm_adi_v5: Add part numbers for Infineon XMC4000 family
This was found on multiple XMC4500:

	Valid ROM table present
		Component base address 0xe00ff000
		Peripheral ID 0x00001c11db
		Designer is 0x0c1, Infineon (Siemens)
		Part is 0x1db, Unrecognized
		Component class is 0x1, ROM table
		MEMTYPE system memory present on bus

On multiple XMC4700 and an XMC4800 this was found instead:

	Valid ROM table present
		Component base address 0xe00ff000
		Peripheral ID 0x00001c11df
		Designer is 0x0c1, Infineon (Siemens)
		Part is 0x1df, Unrecognized
		Component class is 0x1, ROM table
		MEMTYPE system memory present on bus

Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively.

Change-Id: If369a6d16524004ba439b878f090a313a9f3a760
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3482
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17 22:39:27 +01:00
Andreas Färber 2b2f67118a arm_adi_v5: Add part number for Infineon XMC1000 family
Not documented in the Reference Manuals but found on multiple XMC1100/1202:

	Valid ROM table present
		Component base address 0xf0000000
		Peripheral ID 0x00001c11ed
		Designer is 0x0c1, Infineon (Siemens)
		Part is 0x1ed, Unrecognized
		Component class is 0x1, ROM table
		MEMTYPE system memory present on bus

Name it "XMC1000 ROM", since it didn't differ between XMC1100 and XMC1200.

Change-Id: I98a5a524c0d0836f395400fbac24fd496b2ec141
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3481
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17 22:31:12 +01:00
Alexander Kurz 17ec0b1044 jtag ulink: dont compile function when not required
ulink_calculate_frequency() is used exclusively when
_DEBUG_JTAG_IO_ is set, no need to compile this
function if it is not used.
Declaring it static in the same commit.

Change-Id: I243ffdf69a1dc3bee6d16e4bb8d78396b6ea5144
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3241
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-17 22:30:32 +01:00
Alexander Kurz 20f7a084dd udev: add rule for original Keil ULink (version 1)
The original ULINK adapter has been introduced by Keil in 2002 and got
replaced in 2008 by the incompatible ULINK2. It is not listed on their
website any more. For information about it, browse archive.org
for http://www.keil.com/ulink1/ or http://www.keil.com/ulink/

Change-Id: Ie52d381580acab53ddb40499594dbdc2d27ef1b6
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3371
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-17 22:28:49 +01:00