This updates the board configuration for the SAM9-L9260 board with the
configuration for the on-board NAND and dataflash. Included are commands
for configuring the AT91SAM9 NAND flash driver.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's less accepting of signed char ... insisting that e.g. tolower()
not receive one as a parameter.
It's probably good to phase out such usage, given the number of bugs
that lurk in the vicinity (assumptions that char is unsigned), so fix
these even though such usage is actually legal.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Misc:
- Introduce some "struct reg" temporaries, for clarity
- Shorten lines
- Add some missing whitespace
- Clean up comments
- Add notes about some fault handling issues
- Most of these errata workarounds are for *OLD* chip revisions
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
And add my copyright. MPCore is untested, but it's the
only other ARM11 core to care about.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Command "reset halt" checks if PC properly resets, issueing warning:
"PC was not 0. Does this target need srst_pulls_trst?".
Checking PC against 0 is not always correct.
Removed PC value check, as suggested by Øyvind Harboe.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: U-PROPRIET-28D9DF\PROPRIETAIRE <PROPRIETAIRE@propriet-28d9df.(none)>
This creates the TCL interface for configuring an AT91SAM9 NAND flash
controller and implements the necessary functions to correctly work with
a NAND flash device connected to the chip. This includes updates to the
driver list and the Makefile.am to support building the driver and also
houses the documentation update in openocd.texi.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In conjunction with manual register setup, this lets the ETM trigger
cause entry to debug state. It should make it easier to test and
bugfix the ETM code, by enabling non-trace usage and isolating bugs
specific to thef ETM support. (One current issue being that trace
data collection using the ETB doesn't yet behave.)
For example, many ARM9 cores with an ETM should be able to implement
four more (simple) breakpoints and two more (simple) watchpoints than
the EmbeddedICE supports. Or, they should be able to support complex
breakpoints, incorporating ETM sequencer, counters, and/or subroutine
entry/exit criteria int criteria used to trigger debug entry.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Change handling of the CYCLE_ACCURATE, BRANCH_OUTPUT, and
TRACE_* flags; also the CONTEXTID size values.
- Convert to symbols matching the actual register bits, instead of
some random *other* bits (and then correcting that abuse).
- Get rid of a now-needless enum.
- Keep those values in etm->control, and remove etm->tracemode.
These values all affect the trace data that's recorded by a trace
pod or in the ETB. I modified the file format used to dump ETB
data; since it's fairly clear nobody can use this mechanism now,
this can't cause anyone trouble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide better comments for the ETM_CTRL bits; use the correct bit
for half/full clock mode; and define a few more of the bits available
from the earliest ETM versions.
The new bit defintions use ETM_CTRL_* names to match their register
(instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching
to docs, they are defined with bitshifting not pre-computed masks.
Stop abusing typdefs for ETM_CTRL values; such values are not limited
to the enumerated set of individual bit values.
Rename etm->portmode to etm->control ... and start morphing it into a
single generic shadow of ETM_CTRL. Eventually etm->tracemode should
vanish, so we can just write etm->control to ETM_CTRL.
Restore an "if" that somehow got dropped.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This command was misplaced; it's not generic to all traceport drivers,
only the ETB supports this kind of configuration. So move it, and
update the relevant documentation.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Much to my surprise, I observed a "flash erase_address ..."
command erasing data which I said should not be erased.
The issue turns out to be generic NOR flash code which was
silently, and rather dangerously, morphing partial-sector
references into unrequested whole-sector ones.
This patch removes that low-level morphing. If desired, it
can and should be done in higher level code. (We might need
to fix some stuff in the GDB server code.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's currently allocating a big buffer but writing it out in
units of sizeof(host's pointer) ... sub-optimal.
Plus fix a couple minor coding style goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Word count == size/4; cope. And increase buf_min so it's large
enough to cover the overhead in my tests.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We can actually do the right thing if the MMU is off; save
the error message for the phys-but-MMU-enabled path, which
is what isn't yet supported.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Try to right-size the SRAM buffers, by not:
- using them for very small writes
- giving up when a large buffer isn't available
- allocating buffers much larger than their data
Also don't:
- bother loading the code unless we allocate the writebuffer too
- be so verbose with messaging:
* be more concise
* reduce importance (e.g. DEBUG not WARNING)
* remove duplication
The minimum buffer size is something of a guess. It's eight
times smaller than before, almost the same size as the code
being downloaded. It probably deserves some tuning.
Also, note an erratum affecting flash protection on some chips;
and narrow many over-wide lines affected by the above changes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Refactored the write page raw function into two new functions
for writing data to a NAND device and then another function to
finish up a write to a NAND device. This includes some new
updates to introduce more error checking to existing code.
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Added a new function to encapsulate reading a page of data from
a NAND device using either the read_block_data function of a NAND
controller or to use direct reading of data from the NAND device.
This also adds some performance enhancements and uses the read_data
function if the read_block_data function fails safely (because it
can't allocate a buffer in the working area).
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak the "scan_chain" output by removing column separators. Also
remove the "current instruction" state ... which changes constantly.
Now its style resembles the "targets" output, and can even fit on
one line in standard terminals and in the PDF docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Someday revisit various issues: Tempest parts support writing
more than one word at a time; for some target firmware it might
be necessary to save and restore flash IRQ configuration. (The
safest policy is likely to always reset after flash updates.)
Plus swap some undesirable TAB characters with SPACE.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix potential memory leak: make sure the per-bank data
structures are only allocated in probe(), and that calling
probe() multiple times is a NOP. Use it for auto_probe().
Require probe() to have done its thing: don't make access
routines cope with it not having been called. Shrink a
bunch of failure paths; and in some cases, correct them.
Don't needlessly insist on a halted target for probe().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in reading and discarding a status value when fetching
part description data. Or having that needless "#if 0" code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously "reading" clock info (and part info) also, as a side
effect, wrote the flash timing register. Instead, be more safe:
"reading" should only read. Write paths still refresh timing,
coping with changes the application code may have made.
Also rename the routine which sets flash timing, indicating what
it's really doing; it's got nothing to do with a "mode".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
By exhausting data on input, the performance will be more
consistent + the code more clearly distinguishes between
polling and processing. A test showed gdb packet load
performance go from ~1550kByte/s to 1650kBytes/s + being
more stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove more remnants of the old "jtag_device" syntax.
Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.
Remove various non-supported "-variant" target options; they're not
needed often at all.
Flag some of the board files as needing to have and use target files
for the TAP and target declarations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
That syntax has been obsolete forever and is now gone; remove a few
remaining references. Shows how seldom this stuff gets used.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach ARM11 how to use:
- the new "reset-assert" event
- vector catch to implement "reset halt"
- use SRST more like other cores do
- ... including leaving post-SRST delays up to config scripts
This gives OMAP2420 the ability to reset, and doesn't seem to
cause new iMX31 problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Dean Glazeski
David Brownell
Antonio Borneo
Oyvind Harboe
Spencer Oliver
mkdorg@users.sourceforge.net