Merge pull request #840 from aap-sc/aap-sc/resume_on_bp
fix bp handling during resume
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commit
fc52bfefc8
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@ -1733,23 +1733,23 @@ static int resume_prep(struct target *target, int current,
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target_addr_t address, int handle_breakpoints, int debug_execution)
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target_addr_t address, int handle_breakpoints, int debug_execution)
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{
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{
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RISCV_INFO(r);
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RISCV_INFO(r);
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LOG_TARGET_DEBUG(target, "target->state=%d", target->state);
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LOG_TARGET_DEBUG(target, "target->state=%d, current=%s, address=0x%"
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TARGET_PRIxADDR ", handle_breakpoints=%s, debug_exec=%s",
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target->state,
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current ? "true" : "false",
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address,
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handle_breakpoints ? "true" : "false",
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debug_execution ? "true" : "false");
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if (!current && riscv_set_register(target, GDB_REGNO_PC, address) != ERROR_OK)
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if (!current && riscv_set_register(target, GDB_REGNO_PC, address) != ERROR_OK)
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return ERROR_FAIL;
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return ERROR_FAIL;
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if (target->debug_reason == DBG_REASON_WATCHPOINT) {
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if (handle_breakpoints) {
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/* To be able to run off a trigger, disable all the triggers, step, and
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/* To be able to run off a trigger, we perform a step operation and then
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* then resume as usual. */
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* resume. If handle_breakpoints is true then step temporarily disables
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riscv_reg_t trigger_state[RISCV_MAX_HWBPS] = {0};
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* pending breakpoints so we can safely perform the step. */
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if (old_or_new_riscv_step(target, current, address, handle_breakpoints) != ERROR_OK)
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if (disable_triggers(target, trigger_state) != ERROR_OK)
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return ERROR_FAIL;
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if (old_or_new_riscv_step(target, true, 0, false) != ERROR_OK)
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return ERROR_FAIL;
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if (enable_triggers(target, trigger_state) != ERROR_OK)
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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@ -1857,9 +1857,16 @@ static int riscv_resume(
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return result;
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return result;
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}
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}
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static int riscv_target_resume(struct target *target, int current, target_addr_t address,
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static int riscv_target_resume(struct target *target, int current,
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int handle_breakpoints, int debug_execution)
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target_addr_t address, int handle_breakpoints, int debug_execution)
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{
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{
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LOG_TARGET_DEBUG(target, "target->state=%d, current=%s, address=0x%"
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TARGET_PRIxADDR ", handle_breakpoints=%s, debug_exec=%s",
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target->state,
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current ? "true" : "false",
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address,
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handle_breakpoints ? "true" : "false",
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debug_execution ? "true" : "false");
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return riscv_resume(target, current, address, handle_breakpoints,
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return riscv_resume(target, current, address, handle_breakpoints,
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debug_execution, false);
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debug_execution, false);
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}
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}
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