Update encoding.h again. (#713)
Now we get the license comment on the first line, which is required. Change-Id: I54414db3c89ee6027e159ce9348459bc923b8595 Signed-off-by: Tim Newsome <tim@sifive.com> Signed-off-by: Tim Newsome <tim@sifive.com>
This commit is contained in:
Tim Newsome
GitHub
parent
52177592f9
commit
fb523552d2
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@ -1,9 +1,9 @@
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/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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/*
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* This file is auto-generated by running 'make' in
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* https://github.com/riscv/riscv-opcodes (d2bbcb8)
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*/
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/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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* This file is auto-generated by running 'make' in
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* https://github.com/riscv/riscv-opcodes (8ab2df7)
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*/
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#ifndef RISCV_CSR_ENCODING_H
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#define RISCV_CSR_ENCODING_H
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@ -139,6 +139,7 @@
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#define MIP_VSEIP (1 << IRQ_VS_EXT)
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#define MIP_MEIP (1 << IRQ_M_EXT)
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#define MIP_SGEIP (1 << IRQ_S_GEXT)
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#define MIP_LCOFIP (1 << IRQ_LCOF)
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#define MIP_S_MASK (MIP_SSIP | MIP_STIP | MIP_SEIP)
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#define MIP_VS_MASK (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP)
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@ -159,6 +160,30 @@
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#define MENVCFGH_PBMTE 0x40000000
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#define MENVCFGH_STCE 0x80000000
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#define MSTATEEN0_CS 0x00000001
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#define MSTATEEN0_FCSR 0x00000002
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#define MSTATEEN0_HCONTEXT 0x0200000000000000
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#define MSTATEEN0_HENVCFG 0x4000000000000000
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#define MSTATEEN_HSTATEEN 0x8000000000000000
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#define MSTATEEN0H_HCONTEXT 0x02000000
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#define MSTATEEN0H_HENVCFG 0x40000000
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#define MSTATEENH_HSTATEEN 0x80000000
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#define MHPMEVENT_VUINH 0x0400000000000000
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#define MHPMEVENT_VSINH 0x0800000000000000
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#define MHPMEVENT_UINH 0x1000000000000000
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#define MHPMEVENT_SINH 0x2000000000000000
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#define MHPMEVENT_MINH 0x4000000000000000
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#define MHPMEVENT_OF 0x8000000000000000
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#define MHPMEVENTH_VUINH 0x04000000
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#define MHPMEVENTH_VSINH 0x08000000
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#define MHPMEVENTH_UINH 0x10000000
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#define MHPMEVENTH_SINH 0x20000000
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#define MHPMEVENTH_MINH 0x40000000
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#define MHPMEVENTH_OF 0x80000000
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#define HENVCFG_FIOM 0x00000001
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#define HENVCFG_CBIE 0x00000030
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#define HENVCFG_CBCFE 0x00000040
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@ -169,11 +194,24 @@
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#define HENVCFGH_PBMTE 0x40000000
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#define HENVCFGH_STCE 0x80000000
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#define HSTATEEN0_CS 0x00000001
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#define HSTATEEN0_FCSR 0x00000002
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#define HSTATEEN0_SCONTEXT 0x0200000000000000
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#define HSTATEEN0_SENVCFG 0x4000000000000000
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#define HSTATEEN_SSTATEEN 0x8000000000000000
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#define HSTATEEN0H_SCONTEXT 0x02000000
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#define HSTATEEN0H_SENVCFG 0x40000000
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#define HSTATEENH_SSTATEEN 0x80000000
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#define SENVCFG_FIOM 0x00000001
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#define SENVCFG_CBIE 0x00000030
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#define SENVCFG_CBCFE 0x00000040
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#define SENVCFG_CBZE 0x00000080
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#define SSTATEEN0_CS 0x00000001
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#define SSTATEEN0_FCSR 0x00000002
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#define MSECCFG_MML 0x00000001
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#define MSECCFG_MMWP 0x00000002
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#define MSECCFG_RLB 0x00000004
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@ -239,7 +277,7 @@
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#define IRQ_M_EXT 11
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#define IRQ_S_GEXT 12
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#define IRQ_COP 12
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#define IRQ_HOST 13
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#define IRQ_LCOF 13
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/* page table entry (PTE) fields */
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#define PTE_V 0x001 /* Valid */
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@ -326,8 +364,12 @@
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#define MASK_ADD8 0xfe00707f
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#define MATCH_ADD_UW 0x800003b
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#define MASK_ADD_UW 0xfe00707f
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#define MATCH_ADDD 0x7b
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#define MASK_ADDD 0xfe00707f
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#define MATCH_ADDI 0x13
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#define MASK_ADDI 0x707f
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#define MATCH_ADDID 0x5b
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#define MASK_ADDID 0x707f
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#define MATCH_ADDIW 0x1b
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#define MASK_ADDIW 0x707f
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#define MATCH_ADDW 0x3b
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@ -504,6 +546,10 @@
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#define MASK_C_LDSP 0xe003
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#define MATCH_C_LI 0x4001
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#define MASK_C_LI 0xe003
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#define MATCH_C_LQ 0x2000
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#define MASK_C_LQ 0xe003
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#define MATCH_C_LQSP 0x2002
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#define MASK_C_LQSP 0xe003
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#define MATCH_C_LUI 0x6001
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#define MASK_C_LUI 0xe003
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#define MATCH_C_LW 0x4000
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@ -522,6 +568,10 @@
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#define MASK_C_SDSP 0xe003
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#define MATCH_C_SLLI 0x2
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#define MASK_C_SLLI 0xe003
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#define MATCH_C_SQ 0xa000
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#define MASK_C_SQ 0xe003
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#define MATCH_C_SQSP 0xa002
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#define MASK_C_SQSP 0xe003
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#define MATCH_C_SRAI 0x8401
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#define MASK_C_SRAI 0xec03
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#define MATCH_C_SRLI 0x8001
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@ -1186,10 +1236,14 @@
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#define MASK_LBU 0x707f
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#define MATCH_LD 0x3003
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#define MASK_LD 0x707f
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#define MATCH_LDU 0x7003
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#define MASK_LDU 0x707f
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#define MATCH_LH 0x1003
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#define MASK_LH 0x707f
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#define MATCH_LHU 0x5003
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#define MASK_LHU 0x707f
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#define MATCH_LQ 0x300f
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#define MASK_LQ 0x707f
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#define MATCH_LR_D 0x1000302f
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#define MASK_LR_D 0xf9f0707f
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#define MATCH_LR_W 0x1000202f
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@ -1422,8 +1476,10 @@
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#define MASK_SLL32 0xfe00707f
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#define MATCH_SLL8 0x5c000077
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#define MASK_SLL8 0xfe00707f
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#define MATCH_SLLD 0x107b
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#define MASK_SLLD 0xfe00707f
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#define MATCH_SLLI 0x1013
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#define MASK_SLLI 0xfc00707f
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#define MASK_SLLI 0xf800707f
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#define MATCH_SLLI16 0x74000077
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#define MASK_SLLI16 0xff00707f
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#define MATCH_SLLI32 0x74002077
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@ -1432,6 +1488,8 @@
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#define MASK_SLLI8 0xff80707f
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#define MATCH_SLLI_UW 0x800101b
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#define MASK_SLLI_UW 0xfc00707f
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#define MATCH_SLLID 0x105b
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#define MASK_SLLID 0xfc00707f
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#define MATCH_SLLIW 0x101b
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#define MASK_SLLIW 0xfe00707f
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#define MATCH_SLLW 0x103b
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@ -1544,6 +1602,8 @@
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#define MASK_SMXDS 0xfe00707f
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#define MATCH_SMXDS32 0x78002077
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#define MASK_SMXDS32 0xfe00707f
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#define MATCH_SQ 0x4023
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#define MASK_SQ 0x707f
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#define MATCH_SRA 0x40005033
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#define MASK_SRA 0xfe00707f
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#define MATCH_SRA16 0x50000077
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@ -1560,8 +1620,10 @@
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#define MASK_SRA8_U 0xfe00707f
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#define MATCH_SRA_U 0x24001077
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#define MASK_SRA_U 0xfe00707f
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#define MATCH_SRAD 0x4000507b
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#define MASK_SRAD 0xfe00707f
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#define MATCH_SRAI 0x40005013
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#define MASK_SRAI 0xfc00707f
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#define MASK_SRAI 0xf800707f
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#define MATCH_SRAI16 0x70000077
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#define MASK_SRAI16 0xff00707f
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#define MATCH_SRAI16_U 0x71000077
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@ -1576,6 +1638,8 @@
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#define MASK_SRAI8_U 0xff80707f
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#define MATCH_SRAI_U 0xd4001077
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#define MASK_SRAI_U 0xfc00707f
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#define MATCH_SRAID 0x4000505b
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#define MASK_SRAID 0xfc00707f
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#define MATCH_SRAIW 0x4000501b
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#define MASK_SRAIW 0xfe00707f
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#define MATCH_SRAIW_U 0x34001077
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@ -1598,8 +1662,10 @@
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#define MASK_SRL8 0xfe00707f
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#define MATCH_SRL8_U 0x6a000077
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#define MASK_SRL8_U 0xfe00707f
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#define MATCH_SRLD 0x507b
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#define MASK_SRLD 0xfe00707f
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#define MATCH_SRLI 0x5013
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#define MASK_SRLI 0xfc00707f
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#define MASK_SRLI 0xf800707f
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#define MATCH_SRLI16 0x72000077
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#define MASK_SRLI16 0xff00707f
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#define MATCH_SRLI16_U 0x73000077
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@ -1612,6 +1678,8 @@
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#define MASK_SRLI8 0xff80707f
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#define MATCH_SRLI8_U 0x7a800077
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#define MASK_SRLI8_U 0xff80707f
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#define MATCH_SRLID 0x505b
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#define MASK_SRLID 0xfc00707f
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#define MATCH_SRLIW 0x501b
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#define MASK_SRLIW 0xfe00707f
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#define MATCH_SRLW 0x503b
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@ -1642,6 +1710,8 @@
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#define MASK_SUB64 0xfe00707f
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#define MATCH_SUB8 0x4a000077
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#define MASK_SUB8 0xfe00707f
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#define MATCH_SUBD 0x4000007b
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#define MASK_SUBD 0xfe00707f
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#define MATCH_SUBW 0x4000003b
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#define MASK_SUBW 0xfe00707f
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#define MATCH_SUNPKD810 0xac800077
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@ -3224,7 +3294,9 @@ DECLARE_INSN(add32, MATCH_ADD32, MASK_ADD32)
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DECLARE_INSN(add64, MATCH_ADD64, MASK_ADD64)
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DECLARE_INSN(add8, MATCH_ADD8, MASK_ADD8)
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DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW)
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DECLARE_INSN(addd, MATCH_ADDD, MASK_ADDD)
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DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
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DECLARE_INSN(addid, MATCH_ADDID, MASK_ADDID)
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DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
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DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
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DECLARE_INSN(aes32dsi, MATCH_AES32DSI, MASK_AES32DSI)
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@ -3313,6 +3385,8 @@ DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
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DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
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DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
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DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
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DECLARE_INSN(c_lq, MATCH_C_LQ, MASK_C_LQ)
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DECLARE_INSN(c_lqsp, MATCH_C_LQSP, MASK_C_LQSP)
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DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
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DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
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DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
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@ -3322,6 +3396,8 @@ DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR)
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DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
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DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP)
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DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
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DECLARE_INSN(c_sq, MATCH_C_SQ, MASK_C_SQ)
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DECLARE_INSN(c_sqsp, MATCH_C_SQSP, MASK_C_SQSP)
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DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
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DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
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DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB)
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@ -3654,8 +3730,10 @@ DECLARE_INSN(kwmmul_u, MATCH_KWMMUL_U, MASK_KWMMUL_U)
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DECLARE_INSN(lb, MATCH_LB, MASK_LB)
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DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
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DECLARE_INSN(ld, MATCH_LD, MASK_LD)
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DECLARE_INSN(ldu, MATCH_LDU, MASK_LDU)
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DECLARE_INSN(lh, MATCH_LH, MASK_LH)
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DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
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DECLARE_INSN(lq, MATCH_LQ, MASK_LQ)
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DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
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DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
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DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
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@ -3772,11 +3850,13 @@ DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
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DECLARE_INSN(sll16, MATCH_SLL16, MASK_SLL16)
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DECLARE_INSN(sll32, MATCH_SLL32, MASK_SLL32)
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DECLARE_INSN(sll8, MATCH_SLL8, MASK_SLL8)
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DECLARE_INSN(slld, MATCH_SLLD, MASK_SLLD)
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DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
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DECLARE_INSN(slli16, MATCH_SLLI16, MASK_SLLI16)
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DECLARE_INSN(slli32, MATCH_SLLI32, MASK_SLLI32)
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DECLARE_INSN(slli8, MATCH_SLLI8, MASK_SLLI8)
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DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW)
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DECLARE_INSN(sllid, MATCH_SLLID, MASK_SLLID)
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DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
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DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
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DECLARE_INSN(slo, MATCH_SLO, MASK_SLO)
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@ -3833,6 +3913,7 @@ DECLARE_INSN(smulx16, MATCH_SMULX16, MASK_SMULX16)
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DECLARE_INSN(smulx8, MATCH_SMULX8, MASK_SMULX8)
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DECLARE_INSN(smxds, MATCH_SMXDS, MASK_SMXDS)
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DECLARE_INSN(smxds32, MATCH_SMXDS32, MASK_SMXDS32)
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DECLARE_INSN(sq, MATCH_SQ, MASK_SQ)
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DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
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DECLARE_INSN(sra16, MATCH_SRA16, MASK_SRA16)
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DECLARE_INSN(sra16_u, MATCH_SRA16_U, MASK_SRA16_U)
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@ -3841,6 +3922,7 @@ DECLARE_INSN(sra32_u, MATCH_SRA32_U, MASK_SRA32_U)
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DECLARE_INSN(sra8, MATCH_SRA8, MASK_SRA8)
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DECLARE_INSN(sra8_u, MATCH_SRA8_U, MASK_SRA8_U)
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DECLARE_INSN(sra_u, MATCH_SRA_U, MASK_SRA_U)
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DECLARE_INSN(srad, MATCH_SRAD, MASK_SRAD)
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DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
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DECLARE_INSN(srai16, MATCH_SRAI16, MASK_SRAI16)
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DECLARE_INSN(srai16_u, MATCH_SRAI16_U, MASK_SRAI16_U)
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@ -3849,6 +3931,7 @@ DECLARE_INSN(srai32_u, MATCH_SRAI32_U, MASK_SRAI32_U)
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DECLARE_INSN(srai8, MATCH_SRAI8, MASK_SRAI8)
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DECLARE_INSN(srai8_u, MATCH_SRAI8_U, MASK_SRAI8_U)
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DECLARE_INSN(srai_u, MATCH_SRAI_U, MASK_SRAI_U)
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DECLARE_INSN(sraid, MATCH_SRAID, MASK_SRAID)
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DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
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DECLARE_INSN(sraiw_u, MATCH_SRAIW_U, MASK_SRAIW_U)
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DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
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@ -3860,6 +3943,7 @@ DECLARE_INSN(srl32, MATCH_SRL32, MASK_SRL32)
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DECLARE_INSN(srl32_u, MATCH_SRL32_U, MASK_SRL32_U)
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DECLARE_INSN(srl8, MATCH_SRL8, MASK_SRL8)
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DECLARE_INSN(srl8_u, MATCH_SRL8_U, MASK_SRL8_U)
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DECLARE_INSN(srld, MATCH_SRLD, MASK_SRLD)
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DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
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DECLARE_INSN(srli16, MATCH_SRLI16, MASK_SRLI16)
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DECLARE_INSN(srli16_u, MATCH_SRLI16_U, MASK_SRLI16_U)
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@ -3867,6 +3951,7 @@ DECLARE_INSN(srli32, MATCH_SRLI32, MASK_SRLI32)
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DECLARE_INSN(srli32_u, MATCH_SRLI32_U, MASK_SRLI32_U)
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DECLARE_INSN(srli8, MATCH_SRLI8, MASK_SRLI8)
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DECLARE_INSN(srli8_u, MATCH_SRLI8_U, MASK_SRLI8_U)
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DECLARE_INSN(srlid, MATCH_SRLID, MASK_SRLID)
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DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
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DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
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DECLARE_INSN(sro, MATCH_SRO, MASK_SRO)
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@ -3882,6 +3967,7 @@ DECLARE_INSN(sub16, MATCH_SUB16, MASK_SUB16)
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DECLARE_INSN(sub32, MATCH_SUB32, MASK_SUB32)
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||||
DECLARE_INSN(sub64, MATCH_SUB64, MASK_SUB64)
|
||||
DECLARE_INSN(sub8, MATCH_SUB8, MASK_SUB8)
|
||||
DECLARE_INSN(subd, MATCH_SUBD, MASK_SUBD)
|
||||
DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
|
||||
DECLARE_INSN(sunpkd810, MATCH_SUNPKD810, MASK_SUNPKD810)
|
||||
DECLARE_INSN(sunpkd820, MATCH_SUNPKD820, MASK_SUNPKD820)
|
||||
|
|
|
|||
Loading…
Reference in New Issue