Merge pull request #1227 from fk-sc/fk-sc/type-safe-enum
target/riscv: make mem_access_result_t enum type safe
This commit is contained in:
commit
fa7e2351c8
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@ -3131,7 +3131,7 @@ static int read_sbcs_nonbusy(struct target *target, uint32_t *sbcs)
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}
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}
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/* TODO: return mem_access_result_t */
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/* TODO: return struct mem_access_result */
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static int modify_privilege_for_virt2phys_mode(struct target *target, riscv_reg_t *mstatus, riscv_reg_t *mstatus_old,
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riscv_reg_t *dcsr, riscv_reg_t *dcsr_old)
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{
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@ -3458,13 +3458,13 @@ static void log_mem_access_result(struct target *target, bool success, riscv_mem
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LOG_TARGET_DEBUG(target, "%s", msg);
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}
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typedef enum {
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enum mem_access_result_type {
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MEM_ACCESS_RESULT_TYPE_OK,
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MEM_ACCESS_RESULT_TYPE_DISABLED,
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MEM_ACCESS_RESULT_TYPE_SKIPPED,
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MEM_ACCESS_RESULT_TYPE_FAILED,
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MEM_ACCESS_RESULT_TYPE_ENUM_SIZE,
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} mem_access_result_type_t;
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};
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#define LIST_OF_MEM_ACCESS_RESULTS \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_OK, OK, "ok") \
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@ -3490,50 +3490,101 @@ typedef enum {
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SKIPPED, "skipped (dm target select failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED, \
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SKIPPED, "skipped (fence execution failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_SYSBUS_ACCESS_FAILED, \
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SKIPPED, "skipped (sysbus access failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_REG_SAVE_FAILED, \
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SKIPPED, "skipped (register save failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_UNKNOWN_SYSBUS_VERSION, \
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SKIPPED, "skipped (unknown sysbus version)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_PROGRAM_WRITE_FAILED, \
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SKIPPED, "skipped (program write failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED, \
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SKIPPED, "skipped (progbuf fill failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_WRITE_ABSTRACT_ARG_FAILED, \
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SKIPPED, "skipped (abstract command argument write failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_PRIV_MOD_FAILED, \
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SKIPPED, "skipped (privilege modification failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED, FAILED, "failed") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_DM_ACCESS_FAILED, \
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FAILED, "failed (DM register access failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PRIV_MOD_FAILED, \
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FAILED, "failed (privilege modification failed)")
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FAILED, "failed (privilege modification failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_REG_READ_FAILED, \
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FAILED, "failed (register read failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PROGBUF_STARTUP_FAILED, \
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FAILED, "failed (progbuf startup failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PROGBUF_INNER_FAILED, \
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FAILED, "failed (progbuf inner failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PROGBUF_TEARDOWN_FAILED, \
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FAILED, "failed (progbuf teardown failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_EXECUTE_ABSTRACT_FAILED, \
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FAILED, "failed (execute abstract failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_NO_FORWARD_PROGRESS, \
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FAILED, "failed (no forward progress)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_FENCE_EXEC_FAILED, \
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FAILED, "failed (fence execution failed)") \
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#define MEM_ACCESS_RESULT_HANDLER(name, kind, msg) name,
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typedef enum {
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enum mem_access_result_enum {
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LIST_OF_MEM_ACCESS_RESULTS
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} mem_access_result_t;
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};
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#undef MEM_ACCESS_RESULT_HANDLER
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bool is_mem_access_failed(mem_access_result_t status)
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/* Structure is intentionally used to contain the memory access result,
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for type safety - to avoid implicit conversions to integers. */
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struct mem_access_result {
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enum mem_access_result_enum value;
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};
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bool is_mem_access_ok(struct mem_access_result status)
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{
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#define MEM_ACCESS_RESULT_HANDLER(name, kind, msg) \
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case name: return MEM_ACCESS_RESULT_TYPE_##kind \
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== MEM_ACCESS_RESULT_TYPE_OK;
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switch (status.value) {
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LIST_OF_MEM_ACCESS_RESULTS
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}
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#undef MEM_ACCESS_RESULT_HANDLER
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LOG_ERROR("Unknown memory access status: %d", status.value);
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assert(false && "Unknown memory access status");
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return false;
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}
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bool is_mem_access_failed(struct mem_access_result status)
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{
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#define MEM_ACCESS_RESULT_HANDLER(name, kind, msg) \
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case name: return MEM_ACCESS_RESULT_TYPE_##kind \
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== MEM_ACCESS_RESULT_TYPE_FAILED;
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switch (status) {
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switch (status.value) {
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LIST_OF_MEM_ACCESS_RESULTS
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}
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#undef MEM_ACCESS_RESULT_HANDLER
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LOG_ERROR("Unknown memory access status: %d", status);
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LOG_ERROR("Unknown memory access status: %d", status.value);
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assert(false && "Unknown memory access status");
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return true;
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}
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bool is_mem_access_skipped(mem_access_result_t status)
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bool is_mem_access_skipped(struct mem_access_result status)
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{
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#define MEM_ACCESS_RESULT_HANDLER(name, kind, msg) \
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case name: return MEM_ACCESS_RESULT_TYPE_##kind \
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== MEM_ACCESS_RESULT_TYPE_SKIPPED;
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switch (status) {
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switch (status.value) {
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LIST_OF_MEM_ACCESS_RESULTS
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}
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#undef MEM_ACCESS_RESULT_HANDLER
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LOG_ERROR("Unknown memory access status: %d", status);
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LOG_ERROR("Unknown memory access status: %d", status.value);
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assert(false && "Unknown memory access status");
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return true;
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}
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const char *mem_access_result_to_str(mem_access_result_t status)
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const char *mem_access_result_to_str(struct mem_access_result status)
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{
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#define MEM_ACCESS_RESULT_HANDLER(name, kind, msg) \
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[name] = msg,
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@ -3542,11 +3593,17 @@ const char *mem_access_result_to_str(mem_access_result_t status)
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};
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#undef MEM_ACCESS_RESULT_HANDLER
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assert(status < ARRAY_SIZE(table));
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return table[status];
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assert(status.value < ARRAY_SIZE(table));
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return table[status.value];
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}
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static mem_access_result_t mem_should_skip_progbuf(struct target *target,
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static struct mem_access_result mem_access_result(enum mem_access_result_enum value)
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{
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struct mem_access_result result = {.value = value};
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return result;
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}
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static struct mem_access_result mem_should_skip_progbuf(struct target *target,
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const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_valid(args));
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@ -3556,40 +3613,40 @@ static mem_access_result_t mem_should_skip_progbuf(struct target *target,
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if (!has_sufficient_progbuf(target, 1)) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf "
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"- progbuf not present", access_type);
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return MEM_ACCESS_SKIPPED_PROGBUF_NOT_PRESENT;
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return mem_access_result(MEM_ACCESS_SKIPPED_PROGBUF_NOT_PRESENT);
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}
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if (!has_sufficient_progbuf(target, 3)) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
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"insufficient progbuf size.", access_type);
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return MEM_ACCESS_SKIPPED_PROGBUF_INSUFFICIENT;
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return mem_access_result(MEM_ACCESS_SKIPPED_PROGBUF_INSUFFICIENT);
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}
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if (target->state != TARGET_HALTED) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
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"target not halted.", access_type);
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return MEM_ACCESS_SKIPPED_TARGET_NOT_HALTED;
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return mem_access_result(MEM_ACCESS_SKIPPED_TARGET_NOT_HALTED);
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}
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if (riscv_xlen(target) < args.size * 8) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
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"XLEN (%d) is too short for %d-bit memory args.",
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access_type, riscv_xlen(target), args.size * 8);
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return MEM_ACCESS_SKIPPED_XLEN_TOO_SHORT;
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return mem_access_result(MEM_ACCESS_SKIPPED_XLEN_TOO_SHORT);
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}
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if (args.size > 8) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
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"unsupported size.", access_type);
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return MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE;
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return mem_access_result(MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE);
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}
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if ((sizeof(args.address) * 8 > riscv_xlen(target))
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&& (args.address >> riscv_xlen(target))) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
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"progbuf only supports %u-bit address.", access_type, riscv_xlen(target));
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return MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS;
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return mem_access_result(MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS);
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}
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return MEM_ACCESS_OK;
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return mem_access_result(MEM_ACCESS_OK);
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}
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static mem_access_result_t
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static struct mem_access_result
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mem_should_skip_sysbus(struct target *target, const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_valid(args));
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@ -3601,14 +3658,14 @@ mem_should_skip_sysbus(struct target *target, const riscv_mem_access_args_t args
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if (!sba_supports_access(target, args.size)) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - "
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"unsupported size.", access_type);
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return MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE;
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return mem_access_result(MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE);
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}
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unsigned int sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
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if ((sizeof(args.address) * 8 > sbasize)
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&& (args.address >> sbasize)) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - "
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"sba only supports %u-bit address.", access_type, sbasize);
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return MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS;
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return mem_access_result(MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS);
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}
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if (is_read && args.increment != args.size
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&& (get_field(info->sbcs, DM_SBCS_SBVERSION) == 0
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@ -3616,13 +3673,13 @@ mem_should_skip_sysbus(struct target *target, const riscv_mem_access_args_t args
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LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - "
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"sba %ss only support (size == increment) or also "
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"size==0 for sba v1.", access_type, access_type);
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return MEM_ACCESS_SKIPPED_UNSUPPORTED_INCREMENT_SIZE;
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return mem_access_result(MEM_ACCESS_SKIPPED_UNSUPPORTED_INCREMENT_SIZE);
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}
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return MEM_ACCESS_OK;
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return mem_access_result(MEM_ACCESS_OK);
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}
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static mem_access_result_t
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static struct mem_access_result
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mem_should_skip_abstract(struct target *target, const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_valid(args));
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@ -3634,22 +3691,22 @@ mem_should_skip_abstract(struct target *target, const riscv_mem_access_args_t ar
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read/write_abstract_arg() to work on two 64b values. */
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LOG_TARGET_DEBUG(target, "Skipping mem %s via abstract access - "
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"unsupported size: %d bits", access_type, args.size * 8);
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return MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE;
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return mem_access_result(MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE);
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}
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if ((sizeof(args.address) * 8 > riscv_xlen(target))
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&& (args.address >> riscv_xlen(target))) {
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LOG_TARGET_DEBUG(target, "Skipping mem %s via abstract access - "
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"abstract access only supports %u-bit address.",
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access_type, riscv_xlen(target));
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return MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS;
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return mem_access_result(MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS);
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}
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if (is_read && args.size != args.increment) {
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LOG_TARGET_ERROR(target, "Skipping mem %s via abstract access - "
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"abstract command %ss only support (size == increment).",
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access_type, access_type);
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return MEM_ACCESS_SKIPPED_UNSUPPORTED_INCREMENT_SIZE;
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return mem_access_result(MEM_ACCESS_SKIPPED_UNSUPPORTED_INCREMENT_SIZE);
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}
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return MEM_ACCESS_OK;
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return mem_access_result(MEM_ACCESS_OK);
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}
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/*
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@ -3657,7 +3714,7 @@ mem_should_skip_abstract(struct target *target, const riscv_mem_access_args_t ar
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* supported are 1, 2, and 4 bytes despite the spec's support of 8 and 16 byte
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* aamsize fields in the memory access abstract command.
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*/
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static mem_access_result_t
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static struct mem_access_result
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read_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_read(args));
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@ -3685,7 +3742,7 @@ read_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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result = write_abstract_arg(target, 1, args.address + c * args.size, riscv_xlen(target));
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if (result != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Failed to write arg1.");
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
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}
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}
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@ -3701,7 +3758,7 @@ read_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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riscv_reg_t new_address;
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result = read_abstract_arg(target, &new_address, 1, riscv_xlen(target));
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if (result != ERROR_OK)
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
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if (new_address == args.address + args.size) {
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LOG_TARGET_DEBUG(target, "aampostincrement is supported on this target.");
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@ -3725,13 +3782,13 @@ read_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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* (1) Only the 1st access can result in a 'skip'
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* (2) Analyze cmderr value */
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if (result != ERROR_OK)
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return MEM_ACCESS_SKIPPED_ABSTRACT_ACCESS_CMDERR;
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return mem_access_result(MEM_ACCESS_SKIPPED_ABSTRACT_ACCESS_CMDERR);
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/* Copy arg0 to buffer (rounded width up to nearest 32) */
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riscv_reg_t value;
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result = read_abstract_arg(target, &value, 0, width32);
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if (result != ERROR_OK)
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
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buf_set_u64(p, 0, 8 * args.size, value);
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if (info->has_aampostincrement == YNM_YES)
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@ -3739,7 +3796,7 @@ read_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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p += args.size;
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}
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return MEM_ACCESS_OK;
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return mem_access_result(MEM_ACCESS_OK);
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}
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/*
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@ -3747,7 +3804,7 @@ read_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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* sizes supported are 1, 2, and 4 bytes despite the spec's support of 8 and 16
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* byte aamsize fields in the memory access abstract command.
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*/
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static mem_access_result_t
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static struct mem_access_result
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write_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_write(args));
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@ -3771,7 +3828,7 @@ write_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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result = write_abstract_arg(target, 0, value, riscv_xlen(target));
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if (result != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Failed to write arg0.");
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
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}
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/* Update the address if it is the first time or aampostincrement is not supported by the target. */
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@ -3780,7 +3837,7 @@ write_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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result = write_abstract_arg(target, 1, args.address + c * args.size, riscv_xlen(target));
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if (result != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Failed to write arg1.");
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
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}
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}
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@ -3796,7 +3853,7 @@ write_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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riscv_reg_t new_address;
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result = read_abstract_arg(target, &new_address, 1, riscv_xlen(target));
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if (result != ERROR_OK)
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
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if (new_address == args.address + args.size) {
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LOG_TARGET_DEBUG(target, "aampostincrement is supported on this target.");
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@ -3820,14 +3877,14 @@ write_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
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* (1) Only the 1st access can result in a 'skip'
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* (2) Analyze cmderr value */
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if (result != ERROR_OK)
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return MEM_ACCESS_SKIPPED_ABSTRACT_ACCESS_CMDERR;
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return mem_access_result(MEM_ACCESS_SKIPPED_ABSTRACT_ACCESS_CMDERR);
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|
||||
if (info->has_aampostincrement == YNM_YES)
|
||||
updateaddr = false;
|
||||
p += args.size;
|
||||
}
|
||||
|
||||
return MEM_ACCESS_OK;
|
||||
return mem_access_result(MEM_ACCESS_OK);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -4203,7 +4260,7 @@ static int read_word_from_dm_data_regs(struct target *target,
|
|||
return result;
|
||||
}
|
||||
|
||||
static int read_word_from_s1(struct target *target,
|
||||
static struct mem_access_result read_word_from_s1(struct target *target,
|
||||
const riscv_mem_access_args_t args, uint32_t index)
|
||||
{
|
||||
assert(riscv_mem_access_is_read(args));
|
||||
|
@ -4211,9 +4268,9 @@ static int read_word_from_s1(struct target *target,
|
|||
uint64_t value;
|
||||
|
||||
if (register_read_direct(target, &value, GDB_REGNO_S1) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_REG_READ_FAILED);
|
||||
set_buffer_and_log_read(args, index, value);
|
||||
return ERROR_OK;
|
||||
return mem_access_result(MEM_ACCESS_OK);
|
||||
}
|
||||
|
||||
static int read_memory_progbuf_inner_fill_progbuf(struct target *target,
|
||||
|
@ -4256,18 +4313,19 @@ static int read_memory_progbuf_inner_fill_progbuf(struct target *target,
|
|||
* re-read the data only if `abstract command busy` or `DMI busy`
|
||||
* is encountered in the process.
|
||||
*/
|
||||
static int read_memory_progbuf_inner(struct target *target, const riscv_mem_access_args_t args)
|
||||
static struct mem_access_result
|
||||
read_memory_progbuf_inner(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_read(args));
|
||||
assert(args.count > 1 && "If count == 1, read_memory_progbuf_inner_one must be called");
|
||||
|
||||
if (read_memory_progbuf_inner_fill_progbuf(target, args.increment, args.size) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (read_memory_progbuf_inner_fill_progbuf(target,
|
||||
args.increment, args.size) != ERROR_OK)
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED);
|
||||
|
||||
if (read_memory_progbuf_inner_startup(target, args.address,
|
||||
args.increment, /*index*/ 0)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
args.increment, /*index*/ 0) != ERROR_OK)
|
||||
return mem_access_result(MEM_ACCESS_FAILED_PROGBUF_STARTUP_FAILED);
|
||||
/* The program in program buffer is executed twice during
|
||||
* read_memory_progbuf_inner_startup().
|
||||
* Here:
|
||||
|
@ -4285,13 +4343,13 @@ static int read_memory_progbuf_inner(struct target *target, const riscv_mem_acce
|
|||
if (read_memory_progbuf_inner_try_to_read(target, args, &elements_read,
|
||||
index, loop_count) != ERROR_OK) {
|
||||
dm_write(target, DM_ABSTRACTAUTO, 0);
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_PROGBUF_INNER_FAILED);
|
||||
}
|
||||
if (elements_read == 0) {
|
||||
if (read_memory_progbuf_inner_ensure_forward_progress(target, args,
|
||||
index) != ERROR_OK) {
|
||||
dm_write(target, DM_ABSTRACTAUTO, 0);
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_NO_FORWARD_PROGRESS);
|
||||
}
|
||||
elements_read = 1;
|
||||
}
|
||||
|
@ -4299,12 +4357,12 @@ static int read_memory_progbuf_inner(struct target *target, const riscv_mem_acce
|
|||
assert(index <= loop_count);
|
||||
}
|
||||
if (dm_write(target, DM_ABSTRACTAUTO, 0) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
|
||||
|
||||
/* Read the penultimate word. */
|
||||
if (read_word_from_dm_data_regs(target, args, args.count - 2)
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (read_word_from_dm_data_regs(target,
|
||||
args, args.count - 2) != ERROR_OK)
|
||||
return mem_access_result(MEM_ACCESS_FAILED_DM_ACCESS_FAILED);
|
||||
/* Read the last word. */
|
||||
return read_word_from_s1(target, args, args.count - 1);
|
||||
}
|
||||
|
@ -4313,33 +4371,35 @@ static int read_memory_progbuf_inner(struct target *target, const riscv_mem_acce
|
|||
* Only need to save/restore one GPR to read a single word, and the progbuf
|
||||
* program doesn't need to increment.
|
||||
*/
|
||||
static int read_memory_progbuf_inner_one(struct target *target, const riscv_mem_access_args_t args)
|
||||
static struct mem_access_result
|
||||
read_memory_progbuf_inner_one(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_read(args));
|
||||
|
||||
if (riscv013_reg_save(target, GDB_REGNO_S1) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_REG_SAVE_FAILED);
|
||||
|
||||
struct riscv_program program;
|
||||
|
||||
riscv_program_init(&program, target);
|
||||
if (riscv_program_load(&program, GDB_REGNO_S1, GDB_REGNO_S1, 0, args.size) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (riscv_program_ebreak(&program) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (riscv_program_load(&program, GDB_REGNO_S1, GDB_REGNO_S1,
|
||||
/* offset = */ 0, args.size) != ERROR_OK
|
||||
|| riscv_program_ebreak(&program) != ERROR_OK)
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED);
|
||||
|
||||
if (riscv_program_write(&program) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_PROGRAM_WRITE_FAILED);
|
||||
|
||||
/* Write address to S1, and execute buffer. */
|
||||
if (write_abstract_arg(target, 0, args.address, riscv_xlen(target))
|
||||
!= ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (write_abstract_arg(target, /* index = */ 0,
|
||||
args.address, riscv_xlen(target)) != ERROR_OK)
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_WRITE_ABSTRACT_ARG_FAILED);
|
||||
uint32_t command = riscv013_access_register_command(target, GDB_REGNO_S1,
|
||||
riscv_xlen(target), AC_ACCESS_REGISTER_WRITE |
|
||||
AC_ACCESS_REGISTER_TRANSFER | AC_ACCESS_REGISTER_POSTEXEC);
|
||||
uint32_t cmderr;
|
||||
if (riscv013_execute_abstract_command(target, command, &cmderr) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_EXECUTE_ABSTRACT_FAILED);
|
||||
|
||||
return read_word_from_s1(target, args, 0);
|
||||
}
|
||||
|
@ -4347,7 +4407,7 @@ static int read_memory_progbuf_inner_one(struct target *target, const riscv_mem_
|
|||
/**
|
||||
* Read the requested memory, silently handling memory access errors.
|
||||
*/
|
||||
static mem_access_result_t
|
||||
static struct mem_access_result
|
||||
read_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_read(args));
|
||||
|
@ -4356,23 +4416,21 @@ read_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
|
|||
memset(args.read_buffer, 0, args.count * args.size);
|
||||
|
||||
if (execute_autofence(target) != ERROR_OK)
|
||||
return MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED;
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED);
|
||||
|
||||
int res = (args.count == 1) ?
|
||||
return (args.count == 1) ?
|
||||
read_memory_progbuf_inner_one(target, args) :
|
||||
read_memory_progbuf_inner(target, args);
|
||||
|
||||
return res == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
|
||||
}
|
||||
|
||||
static mem_access_result_t
|
||||
static struct mem_access_result
|
||||
write_memory_progbuf(struct target *target, const riscv_mem_access_args_t args);
|
||||
|
||||
static mem_access_result_t
|
||||
static struct mem_access_result
|
||||
access_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
mem_access_result_t skip_reason = mem_should_skip_progbuf(target, args);
|
||||
if (skip_reason != MEM_ACCESS_OK)
|
||||
struct mem_access_result skip_reason = mem_should_skip_progbuf(target, args);
|
||||
if (!is_mem_access_ok(skip_reason))
|
||||
return skip_reason;
|
||||
|
||||
const bool is_read = riscv_mem_access_is_read(args);
|
||||
|
@ -4382,7 +4440,7 @@ access_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
|
|||
args.size, args.address);
|
||||
|
||||
if (dm013_select_target(target) != ERROR_OK)
|
||||
return MEM_ACCESS_SKIPPED_TARGET_SELECT_FAILED;
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_TARGET_SELECT_FAILED);
|
||||
|
||||
riscv_reg_t mstatus = 0;
|
||||
riscv_reg_t mstatus_old = 0;
|
||||
|
@ -4390,15 +4448,15 @@ access_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
|
|||
riscv_reg_t dcsr_old = 0;
|
||||
if (modify_privilege_for_virt2phys_mode(target,
|
||||
&mstatus, &mstatus_old, &dcsr, &dcsr_old) != ERROR_OK)
|
||||
return MEM_ACCESS_FAILED_PRIV_MOD_FAILED;
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_PRIV_MOD_FAILED);
|
||||
|
||||
mem_access_result_t result = is_read ?
|
||||
struct mem_access_result result = is_read ?
|
||||
read_memory_progbuf(target, args) :
|
||||
write_memory_progbuf(target, args);
|
||||
|
||||
if (restore_privilege_from_virt2phys_mode(target,
|
||||
mstatus, mstatus_old, dcsr, dcsr_old) != ERROR_OK)
|
||||
return MEM_ACCESS_FAILED;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_PRIV_MOD_FAILED);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
@ -4408,39 +4466,41 @@ write_memory_bus_v0(struct target *target, const riscv_mem_access_args_t args);
|
|||
static int
|
||||
write_memory_bus_v1(struct target *target, const riscv_mem_access_args_t args);
|
||||
|
||||
static mem_access_result_t
|
||||
static struct mem_access_result
|
||||
access_memory_sysbus(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_valid(args));
|
||||
|
||||
mem_access_result_t skip_reason = mem_should_skip_sysbus(target, args);
|
||||
if (skip_reason != MEM_ACCESS_OK)
|
||||
struct mem_access_result skip_reason = mem_should_skip_sysbus(target, args);
|
||||
if (!is_mem_access_ok(skip_reason))
|
||||
return skip_reason;
|
||||
|
||||
RISCV013_INFO(info);
|
||||
int ret = ERROR_FAIL;
|
||||
const bool is_read = riscv_mem_access_is_read(args);
|
||||
const uint64_t sbver = get_field(info->sbcs, DM_SBCS_SBVERSION);
|
||||
if (sbver == 0)
|
||||
if (sbver == 0) {
|
||||
ret = is_read ? read_memory_bus_v0(target, args) :
|
||||
write_memory_bus_v0(target, args);
|
||||
else if (sbver == 1)
|
||||
} else if (sbver == 1) {
|
||||
ret = is_read ? read_memory_bus_v1(target, args) :
|
||||
write_memory_bus_v1(target, args);
|
||||
else
|
||||
LOG_TARGET_ERROR(target,
|
||||
"Unknown system bus version: %" PRIu64, sbver);
|
||||
} else {
|
||||
LOG_TARGET_ERROR(target, "Unknown system bus version: %" PRIu64, sbver);
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_UNKNOWN_SYSBUS_VERSION);
|
||||
}
|
||||
|
||||
return (ret == ERROR_OK) ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
|
||||
return mem_access_result(ret == ERROR_OK ?
|
||||
MEM_ACCESS_OK : MEM_ACCESS_SKIPPED_SYSBUS_ACCESS_FAILED);
|
||||
}
|
||||
|
||||
static mem_access_result_t
|
||||
static struct mem_access_result
|
||||
access_memory_abstract(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_valid(args));
|
||||
|
||||
mem_access_result_t skip_reason = mem_should_skip_abstract(target, args);
|
||||
if (skip_reason != MEM_ACCESS_OK)
|
||||
struct mem_access_result skip_reason = mem_should_skip_abstract(target, args);
|
||||
if (!is_mem_access_ok(skip_reason))
|
||||
return skip_reason;
|
||||
|
||||
const bool is_read = riscv_mem_access_is_read(args);
|
||||
|
@ -4449,10 +4509,8 @@ access_memory_abstract(struct target *target, const riscv_mem_access_args_t args
|
|||
TARGET_PRIxADDR, access_type, args.count,
|
||||
args.size, args.address);
|
||||
|
||||
int result = is_read ? read_memory_abstract(target, args) :
|
||||
return is_read ? read_memory_abstract(target, args) :
|
||||
write_memory_abstract(target, args);
|
||||
|
||||
return result == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -4473,10 +4531,10 @@ riscv013_access_memory(struct target *target, const riscv_mem_access_args_t args
|
|||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mem_access_result_t skip_reason[] = {
|
||||
[RISCV_MEM_ACCESS_PROGBUF] = MEM_ACCESS_DISABLED,
|
||||
[RISCV_MEM_ACCESS_SYSBUS] = MEM_ACCESS_DISABLED,
|
||||
[RISCV_MEM_ACCESS_ABSTRACT] = MEM_ACCESS_DISABLED,
|
||||
struct mem_access_result skip_reason[] = {
|
||||
[RISCV_MEM_ACCESS_PROGBUF] = mem_access_result(MEM_ACCESS_DISABLED),
|
||||
[RISCV_MEM_ACCESS_SYSBUS] = mem_access_result(MEM_ACCESS_DISABLED),
|
||||
[RISCV_MEM_ACCESS_ABSTRACT] = mem_access_result(MEM_ACCESS_DISABLED),
|
||||
};
|
||||
|
||||
RISCV_INFO(r);
|
||||
|
@ -4501,7 +4559,7 @@ riscv013_access_memory(struct target *target, const riscv_mem_access_args_t args
|
|||
if (is_mem_access_failed(skip_reason[method]))
|
||||
goto failure;
|
||||
|
||||
const bool success = (skip_reason[method] == MEM_ACCESS_OK);
|
||||
const bool success = is_mem_access_ok(skip_reason[method]);
|
||||
log_mem_access_result(target, success, method, is_read);
|
||||
if (success)
|
||||
return ERROR_OK;
|
||||
|
@ -4913,16 +4971,19 @@ static int write_memory_progbuf_fill_progbuf(struct target *target, uint32_t siz
|
|||
return riscv_program_write(&program);
|
||||
}
|
||||
|
||||
static int write_memory_progbuf_inner(struct target *target, const riscv_mem_access_args_t args)
|
||||
static struct mem_access_result
|
||||
write_memory_progbuf_inner(struct target *target,
|
||||
const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_write(args));
|
||||
|
||||
if (write_memory_progbuf_fill_progbuf(target, args.size) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED);
|
||||
|
||||
target_addr_t addr_on_target = args.address;
|
||||
if (write_memory_progbuf_startup(target, &addr_on_target, args.write_buffer, args.size) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (write_memory_progbuf_startup(target, &addr_on_target,
|
||||
args.write_buffer, args.size) != ERROR_OK)
|
||||
return mem_access_result(MEM_ACCESS_FAILED_PROGBUF_STARTUP_FAILED);
|
||||
|
||||
const target_addr_t end_addr = args.address + (target_addr_t)args.size * args.count;
|
||||
|
||||
|
@ -4932,7 +4993,7 @@ static int write_memory_progbuf_inner(struct target *target, const riscv_mem_acc
|
|||
if (write_memory_progbuf_try_to_write(target, &next_addr_on_target,
|
||||
end_addr, args.size, curr_buff) != ERROR_OK) {
|
||||
write_memory_progbuf_teardown(target);
|
||||
return ERROR_FAIL;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_PROGBUF_INNER_FAILED);
|
||||
}
|
||||
/* write_memory_progbuf_try_to_write() ensures that at least one item
|
||||
* gets successfully written even when busy condition is encountered.
|
||||
|
@ -4941,20 +5002,22 @@ static int write_memory_progbuf_inner(struct target *target, const riscv_mem_acc
|
|||
assert(next_addr_on_target - args.address <= (target_addr_t)args.size * args.count);
|
||||
}
|
||||
|
||||
return write_memory_progbuf_teardown(target);
|
||||
return write_memory_progbuf_teardown(target) == ERROR_OK ?
|
||||
mem_access_result(MEM_ACCESS_OK) :
|
||||
mem_access_result(MEM_ACCESS_FAILED_PROGBUF_TEARDOWN_FAILED);
|
||||
}
|
||||
|
||||
static mem_access_result_t
|
||||
static struct mem_access_result
|
||||
write_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
|
||||
{
|
||||
assert(riscv_mem_access_is_write(args));
|
||||
|
||||
int result = write_memory_progbuf_inner(target, args);
|
||||
struct mem_access_result result = write_memory_progbuf_inner(target, args);
|
||||
|
||||
if (execute_autofence(target) != ERROR_OK)
|
||||
return MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED;
|
||||
return mem_access_result(MEM_ACCESS_FAILED_FENCE_EXEC_FAILED);
|
||||
|
||||
return result == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
|
||||
return result;
|
||||
}
|
||||
|
||||
static bool riscv013_get_impebreak(const struct target *target)
|
||||
|
|
Loading…
Reference in New Issue