interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

stellaris: avoid chip writes 

Previously "reading" clock info (and part info) also, as a side
effect, wrote the flash timing register.  Instead, be more safe:
"reading" should only read.  Write paths still refresh timing,
coping with changes the application code may have made.

Also rename the routine which sets flash timing, indicating what
it's really doing; it's got nothing to do with a "mode".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2009-12-16 14:17:31 -08:00
parent 47998a55e0
commit f85dc92d2a
1 changed files with 10 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/flash/nor/stellaris.c
View File

@ -345,8 +345,8 @@ static uint32_t stellaris_get_flash_status(struct flash_bank *bank)
return fmc; return fmc;
} }
/* Setup the timimg registers */ /* Set the flash timimg register to match current clocking */
static void stellaris_set_flash_mode(struct flash_bank *bank,int mode) static void stellaris_set_flash_timing(struct flash_bank *bank)
{ {
struct stellaris_flash_bank *stellaris_info = bank->driver_priv; struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
struct target *target = bank->target; struct target *target = bank->target;
@ -471,9 +471,6 @@ static void stellaris_read_clock_info(struct flash_bank *bank)
stellaris_info->mck_freq = mainfreq/(1 + sysdiv); stellaris_info->mck_freq = mainfreq/(1 + sysdiv);
else else
stellaris_info->mck_freq = mainfreq; stellaris_info->mck_freq = mainfreq;
/* Forget old flash timing */
stellaris_set_flash_mode(bank, 0);
} }
#if 0 #if 0
@ -714,9 +711,9 @@ static int stellaris_erase(struct flash_bank *bank, int first, int last)
return stellaris_mass_erase(bank); return stellaris_mass_erase(bank);
} }
/* Configure the flash controller timing */ /* Refresh flash controller timing */
stellaris_read_clock_info(bank); stellaris_read_clock_info(bank);
stellaris_set_flash_mode(bank,0); stellaris_set_flash_timing(bank);
/* Clear and disable flash programming interrupts */ /* Clear and disable flash programming interrupts */
target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_CIM, 0);
@ -791,9 +788,9 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
/* Configure the flash controller timing */ /* Refresh flash controller timing */
stellaris_read_clock_info(bank); stellaris_read_clock_info(bank);
stellaris_set_flash_mode(bank, 0); stellaris_set_flash_timing(bank);
/* convert from pages to lockregions */ /* convert from pages to lockregions */
first /= 2; first /= 2;
@ -1011,9 +1008,9 @@ static int stellaris_write(struct flash_bank *bank, uint8_t *buffer, uint32_t of
if (offset + count > bank->size) if (offset + count > bank->size)
return ERROR_FLASH_DST_OUT_OF_BANK; return ERROR_FLASH_DST_OUT_OF_BANK;
/* Configure the flash controller timing */ /* Refresh flash controller timing */
stellaris_read_clock_info(bank); stellaris_read_clock_info(bank);
stellaris_set_flash_mode(bank, 0); stellaris_set_flash_timing(bank);
/* Clear and disable flash programming interrupts */ /* Clear and disable flash programming interrupts */
target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_CIM, 0);
@ -1156,9 +1153,9 @@ static int stellaris_mass_erase(struct flash_bank *bank)
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
/* Configure the flash controller timing */ /* Refresh flash controller timing */
stellaris_read_clock_info(bank); stellaris_read_clock_info(bank);
stellaris_set_flash_mode(bank, 0); stellaris_set_flash_timing(bank);
/* Clear and disable flash programming interrupts */ /* Clear and disable flash programming interrupts */
target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_CIM, 0);