interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

have "reg" command print cache names too 

When dumping over 100 registers (as on most ARM9 + ETM cores),
aid readability by splitting them into logical groups.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2009-10-22 12:05:04 -07:00
parent 344bed2f7e
commit f593ff0a3d
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/target/target.c
View File

@ -1823,6 +1823,8 @@ static int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char
{ {
int i; int i;
command_print(cmd_ctx, "===== %s", cache->name);
for (i = 0, reg = cache->reg_list; for (i = 0, reg = cache->reg_list;
i < cache->num_regs; i < cache->num_regs;
i++, reg++, count++) i++, reg++, count++)