From f4f8b59f620725ca437c4d8aab571538f2278e13 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Fri, 12 Nov 2021 11:29:00 -0800 Subject: [PATCH] Properly save/restore vtype.ill (#661) Change-Id: I2478be8a849ceb4f637bbcfb774099217c509dfd Signed-off-by: Tim Newsome --- src/target/riscv/opcodes.h | 6 ++++++ src/target/riscv/riscv-013.c | 18 +++++++++++------- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/src/target/riscv/opcodes.h b/src/target/riscv/opcodes.h index 8faa154ba..992196f47 100644 --- a/src/target/riscv/opcodes.h +++ b/src/target/riscv/opcodes.h @@ -312,6 +312,12 @@ static uint32_t vsetvli(unsigned int dest, unsigned int src, uint16_t imm) return (bits(imm, 10, 0) << 20) | inst_rs1(src) | inst_rd(dest) | MATCH_VSETVLI; } +static uint32_t vsetvl(unsigned int rd, unsigned int rs1, unsigned int rs2) __attribute__((unused)); +static uint32_t vsetvl(unsigned int rd, unsigned int rs1, unsigned int rs2) +{ + return inst_rd(rd) | inst_rs1(rs1) | inst_rs2(rs2) | MATCH_VSETVL; +} + static uint32_t vmv_x_s(unsigned int rd, unsigned int vs2) __attribute__((unused)); static uint32_t vmv_x_s(unsigned int rd, unsigned int vs2) { diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index c6b823aa8..631334bdf 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1341,24 +1341,28 @@ static int register_write_direct(struct target *target, unsigned number, return ERROR_FAIL; } - } else if (number == GDB_REGNO_VTYPE) { - riscv_program_insert(&program, csrr(S0, CSR_VL)); - riscv_program_insert(&program, vsetvli(ZERO, S0, value)); - } else { if (number >= GDB_REGNO_FPR0 && number <= GDB_REGNO_FPR31) { if (riscv_supports_extension(target, 'D')) riscv_program_insert(&program, fmv_d_x(number - GDB_REGNO_FPR0, S0)); else riscv_program_insert(&program, fmv_w_x(number - GDB_REGNO_FPR0, S0)); + } else if (number == GDB_REGNO_VTYPE) { + if (riscv_save_register(target, GDB_REGNO_S1) != ERROR_OK) + return ERROR_FAIL; + if (riscv_program_insert(&program, csrr(S1, CSR_VL)) != ERROR_OK) + return ERROR_FAIL; + if (riscv_program_insert(&program, vsetvl(ZERO, S1, S0)) != ERROR_OK) + return ERROR_FAIL; } else if (number == GDB_REGNO_VL) { /* "The XLEN-bit-wide read-only vl CSR can only be updated by the * vsetvli and vsetvl instructions, and the fault-only-rst vector * load instruction variants." */ - riscv_reg_t vtype; - if (register_read_direct(target, &vtype, GDB_REGNO_VTYPE) != ERROR_OK) + if (riscv_save_register(target, GDB_REGNO_S1) != ERROR_OK) return ERROR_FAIL; - if (riscv_program_insert(&program, vsetvli(ZERO, S0, vtype)) != ERROR_OK) + if (riscv_program_insert(&program, csrr(S1, CSR_VTYPE)) != ERROR_OK) + return ERROR_FAIL; + if (riscv_program_insert(&program, vsetvl(ZERO, S0, S1)) != ERROR_OK) return ERROR_FAIL; } else if (number >= GDB_REGNO_CSR0 && number <= GDB_REGNO_CSR4095) { riscv_program_csrw(&program, S0, number);