Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it. Remove the trans_mode change as it is done in the mem_ap_read_atomic_u32 function.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2633 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -259,14 +259,13 @@ int cortex_a8_dap_read_coreregister_u32(target_t *target,
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{
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int retval = ERROR_OK;
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uint8_t reg = regnum&0xFF;
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uint32_t dscr;
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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swjdp->trans_mode = TRANS_MODE_COMPOSITE;
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if (reg > 16)
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return retval;
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@ -286,10 +285,16 @@ int cortex_a8_dap_read_coreregister_u32(target_t *target,
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cortex_a8_exec_opcode(target, ARMV4_5_MCR(14, 0, 0, 0, 5, 0));
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}
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/* Read DCCTX */
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/* Read DTRRTX */
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do
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{
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retval = mem_ap_read_atomic_u32(swjdp,
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OMAP3530_DEBUG_BASE + CPUDBG_DSCR, &dscr);
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}
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while ((dscr & (1 << 29)) == 0); /* Wait for DTRRXfull */
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retval = mem_ap_read_atomic_u32(swjdp,
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OMAP3530_DEBUG_BASE + CPUDBG_DTRTX, value);
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// retval = mem_ap_read_u32(swjdp, OMAP3530_DEBUG_BASE + CPUDBG_DTRTX, value);
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return retval;
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}
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