mips_ejtag: remove memory protection bit before DM
Change-Id: Id1564ae063cea4f056b350436d52df5381ca9608 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1341 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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@ -28,6 +28,7 @@
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#include "mips32.h"
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#include "mips_ejtag.h"
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#include "mips32_dmaacc.h"
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void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
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{
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@ -237,11 +238,41 @@ exit:
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return ctx.retval;
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}
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/*
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* Disable memory protection for 0xFF20.0000–0xFF3F.FFFF
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* It is needed by EJTAG 1.5-2.0, especially for BMIPS CPUs
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* For example bcm7401 and others. At leas on some
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* CPUs, DebugMode wont start if this bit is not removed.
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*/
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static int disable_dcr_mp(struct mips_ejtag *ejtag_info)
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{
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uint32_t dcr;
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int retval;
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retval = mips32_dmaacc_read_mem(ejtag_info, EJTAG_DCR, 4, 1, &dcr);
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if (retval != ERROR_OK)
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goto error;
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dcr &= ~EJTAG_DCR_MP;
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retval = mips32_dmaacc_write_mem(ejtag_info, EJTAG_DCR, 4, 1, &dcr);
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if (retval != ERROR_OK)
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goto error;
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return ERROR_OK;
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error:
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LOG_ERROR("Failed to remove DCR MPbit!");
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return retval;
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}
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int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
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{
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uint32_t ejtag_ctrl;
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
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if (ejtag_info->ejtag_version == EJTAG_VERSION_20) {
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if (disable_dcr_mp(ejtag_info) != ERROR_OK)
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goto error;
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}
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/* set debug break bit */
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ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
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mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
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@ -250,12 +281,13 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
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ejtag_ctrl = ejtag_info->ejtag_ctrl;
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mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
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LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
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if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) {
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LOG_ERROR("Failed to enter Debug Mode!");
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return ERROR_FAIL;
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}
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if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
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goto error;
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return ERROR_OK;
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error:
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LOG_ERROR("Failed to enter Debug Mode!");
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return ERROR_FAIL;
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}
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int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
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@ -110,6 +110,7 @@
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#define EJTAG_DCR_DB (1 << 17)
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#define EJTAG_DCR_IB (1 << 16)
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#define EJTAG_DCR_INTE (1 << 4)
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#define EJTAG_DCR_MP (1 << 2)
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/* breakpoint support */
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#define EJTAG_IBS 0xFF301000
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