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mips_ejtag: remove memory protection bit before DM 

Change-Id: Id1564ae063cea4f056b350436d52df5381ca9608
Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net>
Reviewed-on: http://openocd.zylin.com/1341
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Oleksij Rempel 2013-04-15 07:58:40 +02:00 committed by Spencer Oliver
parent e3042a86ed
commit f12ec221ab
2 changed files with 37 additions and 4 deletions
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40
src/target/mips_ejtag.c
View File

@ -28,6 +28,7 @@
#include "mips32.h" #include "mips32.h"
#include "mips_ejtag.h" #include "mips_ejtag.h"
#include "mips32_dmaacc.h"
void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr) void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
{ {
@ -237,11 +238,41 @@ exit:
return ctx.retval; return ctx.retval;
} }
/*
* Disable memory protection for 0xFF20.0000–0xFF3F.FFFF
* It is needed by EJTAG 1.5-2.0, especially for BMIPS CPUs
* For example bcm7401 and others. At leas on some
* CPUs, DebugMode wont start if this bit is not removed.
*/
static int disable_dcr_mp(struct mips_ejtag *ejtag_info)
{
uint32_t dcr;
int retval;
retval = mips32_dmaacc_read_mem(ejtag_info, EJTAG_DCR, 4, 1, &dcr);
if (retval != ERROR_OK)
goto error;
dcr &= ~EJTAG_DCR_MP;
retval = mips32_dmaacc_write_mem(ejtag_info, EJTAG_DCR, 4, 1, &dcr);
if (retval != ERROR_OK)
goto error;
return ERROR_OK;
error:
LOG_ERROR("Failed to remove DCR MPbit!");
return retval;
}
int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
{ {
uint32_t ejtag_ctrl; uint32_t ejtag_ctrl;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
if (ejtag_info->ejtag_version == EJTAG_VERSION_20) {
if (disable_dcr_mp(ejtag_info) != ERROR_OK)
goto error;
}
/* set debug break bit */ /* set debug break bit */
ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK; ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
@ -250,12 +281,13 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
ejtag_ctrl = ejtag_info->ejtag_ctrl; ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl); LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) { if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
LOG_ERROR("Failed to enter Debug Mode!"); goto error;
return ERROR_FAIL;
}
return ERROR_OK; return ERROR_OK;
error:
LOG_ERROR("Failed to enter Debug Mode!");
return ERROR_FAIL;
} }
int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info) int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)

1
src/target/mips_ejtag.h
View File

@ -110,6 +110,7 @@
#define EJTAG_DCR_DB (1 << 17) #define EJTAG_DCR_DB (1 << 17)
#define EJTAG_DCR_IB (1 << 16) #define EJTAG_DCR_IB (1 << 16)
#define EJTAG_DCR_INTE (1 << 4) #define EJTAG_DCR_INTE (1 << 4)
#define EJTAG_DCR_MP (1 << 2)
/* breakpoint support */ /* breakpoint support */
#define EJTAG_IBS 0xFF301000 #define EJTAG_IBS 0xFF301000