manual: fix all overfull and underfull hboxes
Change-Id: Id84f16de5a3d1907e196d13007a312593bb6670a Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2769 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
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Paul Fertser
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98861c54be
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ee5ecb8a29
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@ -471,7 +471,7 @@ SWD and not JTAG, thus not supported.
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@itemize @bullet
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@item @b{Raisonance RLink}
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@* Link: @url{http://www.mcu-raisonance.com/~rlink-debugger-programmer__microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html}
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@* Link: @url{http://www.mcu-raisonance.com/~rlink-debugger-programmer__@/microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html}
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@item @b{STM32 Primer}
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@* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
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@item @b{STM32 Primer2}
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@ -4014,14 +4014,14 @@ not a CPU type. It is based on the ARMv5 architecture.
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@item @code{openrisc} -- this is an OpenRISC 1000 core.
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The current implementation supports three JTAG TAP cores:
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@itemize @minus
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@item @code{OpenCores TAP} (See: @emph{http://opencores.org/project,jtag})
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@item @code{Altera Virtual JTAG TAP} (See: @emph{http://www.altera.com/literature/ug/ug_virtualjtag.pdf})
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@item @code{Xilinx BSCAN_* virtual JTAG interface} (See: @emph{http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/spartan6_hdl.pdf})
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@item @code{OpenCores TAP} (See: @url{http://opencores.org/project,jtag})
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@item @code{Altera Virtual JTAG TAP} (See: @url{http://www.altera.com/literature/ug/ug_virtualjtag.pdf})
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@item @code{Xilinx BSCAN_* virtual JTAG interface} (See: @url{http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/spartan6_hdl.pdf})
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@end itemize
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And two debug interfaces cores:
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@itemize @minus
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@item @code{Advanced debug interface} (See: @emph{http://opencores.org/project,adv_debug_sys})
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@item @code{SoC Debug Interface} (See: @emph{http://opencores.org/project,dbg_interface})
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@item @code{Advanced debug interface} (See: @url{http://opencores.org/project,adv_debug_sys})
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@item @code{SoC Debug Interface} (See: @url{http://opencores.org/project,dbg_interface})
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@end itemize
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@end itemize
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@end deffn
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@ -4345,7 +4345,8 @@ proc my_attach_proc @{ @} @{
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mychip.cpu configure -event gdb-attach my_attach_proc
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mychip.cpu configure -event gdb-attach @{
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echo "Reset..."
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# To make flash probe and gdb load to flash work we need a reset init.
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# To make flash probe and gdb load to flash work
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# we need a reset init.
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reset init
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@}
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@end example
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@ -5430,7 +5431,8 @@ The @var{str7x} driver defines one mandatory parameter, @var{variant},
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which is either @code{STR71x}, @code{STR73x} or @code{STR75x}.
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@example
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flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
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flash bank $_FLASHNAME str7x \
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0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
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@end example
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@deffn Command {str7x disable_jtag} bank
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@ -5676,7 +5678,8 @@ based controllers. A known limitation is that the Info memory can't be
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read or verified as it's not memory mapped.
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@example
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flash bank <name> mdr <base> <size> 0 0 <target#> @var{type} @var{page_count} @var{sec_count}
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flash bank <name> mdr <base> <size> \
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0 0 <target#> @var{type} @var{page_count} @var{sec_count}
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@end example
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@itemize @bullet
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@ -5688,9 +5691,11 @@ flash bank <name> mdr <base> <size> 0 0 <target#> @var{type} @var{page_count} @v
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Example usage:
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@example
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if @{ [info exists IMEMORY] && [string equal $IMEMORY true] @} @{
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flash bank $@{_CHIPNAME@}_info.flash mdr 0x00000000 0x01000 0 0 $_TARGETNAME 1 1 4
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flash bank $@{_CHIPNAME@}_info.flash mdr 0x00000000 0x01000 \
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0 0 $_TARGETNAME 1 1 4
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@} else @{
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flash bank $_CHIPNAME.flash mdr 0x00000000 0x20000 0 0 $_TARGETNAME 0 32 4
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flash bank $_CHIPNAME.flash mdr 0x00000000 0x20000 \
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0 0 $_TARGETNAME 0 32 4
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@}
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@end example
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@end deffn
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@ -6638,7 +6643,8 @@ In addition the following arguments may be specifed:
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proc load_image_bin @{fname foffset address length @} @{
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# Load data from fname filename at foffset offset to
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# target at address. Load at most length bytes.
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load_image $fname [expr $address - $foffset] bin $address $length
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load_image $fname [expr $address - $foffset] bin \
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$address $length
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@}
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@end example
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@end deffn
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@ -7563,9 +7569,13 @@ $ stty -F /dev/ttyUSB1 38400
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(FT2232H's base frequency is 60MHz, spd_cust allows to alias 38400
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baud with our custom divisor to get 12MHz)
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@item @code{itmdump -f /dev/ttyUSB1 -d1}
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@item @code{openocd -f interface/stlink-v2-1.cfg -c "transport select
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hla_swd" -f target/stm32l1.cfg -c "tpiu config external uart off
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24000000 12000000"}
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@item OpenOCD invocation line:
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@example
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openocd -f interface/stlink-v2-1.cfg \
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-c "transport select hla_swd" \
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-f target/stm32l1.cfg \
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-c "tpiu config external uart off 24000000 12000000"
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@end example
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@end enumerate
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@end deffn
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@ -8442,9 +8452,11 @@ Cyg_Thread::thread_list, Cyg_Scheduler_Base::current_thread.
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@item ThreadX symbols
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_tx_thread_current_ptr, _tx_thread_created_ptr, _tx_thread_created_count.
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@item FreeRTOS symbols
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@raggedright
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pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2,
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pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList,
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uxCurrentNumberOfTasks, uxTopUsedPriority.
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@end raggedright
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@item linux symbols
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init_task.
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@item ChibiOS symbols
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