interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Move non-arm target overview from source tree to doxygen manual. 

git-svn-id: svn://svn.berlios.de/openocd/trunk@1853 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch 2009-05-20 08:43:18 +00:00
parent 2cca6fcb8b
commit ed294121ef
2 changed files with 16 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
doc/manual/target.txt
View File

@ -23,12 +23,6 @@ This section needs to describe OpenOCD's ARM target support.
*/
/** @page targetnotarm OpenOCD Non-ARM Targets
This section needs to describe OpenOCD's non-ARM target support.
*/
/** @page targetregister OpenOCD Target Register API
This section needs to describe OpenOCD's Target Register API, as

37
src/non-arm-targets.txt → doc/manual/target/notarm.txt
View File

@ -1,15 +1,9 @@
Some outstanding issues w.r.t. non-ARM32 targets
================================================
This file describes outstanding issues w.r.t.
non-ARM32 targets.
/** @page targetnotarm OpenOCD Non-ARM Targets
Ideas & patches welcome!
This page describes outstanding issues w.r.t. non-ARM targets.
@section targetnotarmflash Flash drivers
Flash drivers
-------------
The flash drivers contain ARM32 code that is used
to execute code on the target.
@ -26,23 +20,22 @@ compile the target flash drivers. Perhaps
using automake?
eCos has CFI driver that could probably be compiled
for all targets. The trick is to figure out a
way to make the compiled flash drivers work
on all target memory maps + sort out all the
little details
32 vs. 64 bit
-------------
@section targetnotarm32v64 32 vs. 64 bit
Currently OpenOCD only supports 32 bit targets.
Adding 64 bit support would be nice but there
hasn't been any call for it in the openocd development
mailing list
target support
--------------
@section targetnotarmsupport Target Support
target.h is relatively CPU agnostic and
the intention is to move in the direction of less
instruction set specific.
@ -53,8 +46,8 @@ An example is FPGA programming support via JTAG,
but also flash chips can be programmed directly
using JTAG.
non-JTAG physical layer
-----------------------
@section targetnotarmphy non-JTAG physical layer
JTAG is not the only physical protocol used to talk to
CPUs.
@ -64,13 +57,15 @@ The actual physical layer is a relatively modest part
of the total OpenOCD system.
PowerPC
-------
@section targetnotarmppc PowerPC
there exists open source implementations of powerpc
target manipulation, but there hasn't been a lot
of activity in the mailing list.
MIPS
----
@section targetnotarmmips MIPS
Currently OpenOCD has a MIPS target defined. This is the
first non-ARM example of a CPU target
first non-ARM example of a CPU target
*/