target: use 'ULL' suffix for long constants
On 32 bit hosts, gcc should consider constants without suffix as 32 bits values. Use the suffix 'ULL' to guarantee it is a 64 bit. Detected through 'sparse' tool. Change-Id: I205ca986968fef9a536f87492d1f6c80e41829f3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7601 Tested-by: jenkins
This commit is contained in:
Antonio Borneo
parent
314f4c665f
commit
ea62f8e22a
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@ -588,7 +588,7 @@ static int aarch64_restore_one(struct target *target, int current,
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resume_pc &= 0xFFFFFFFC;
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break;
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case ARM_STATE_AARCH64:
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resume_pc &= 0xFFFFFFFFFFFFFFFC;
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resume_pc &= 0xFFFFFFFFFFFFFFFCULL;
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break;
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case ARM_STATE_THUMB:
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case ARM_STATE_THUMB_EE:
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@ -1248,7 +1248,7 @@ static int aarch64_set_breakpoint(struct target *target,
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| (byte_addr_select << 5)
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| (3 << 1) | 1;
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brp_list[brp_i].used = 1;
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brp_list[brp_i].value = breakpoint->address & 0xFFFFFFFFFFFFFFFC;
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brp_list[brp_i].value = breakpoint->address & 0xFFFFFFFFFFFFFFFCULL;
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brp_list[brp_i].control = control;
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bpt_value = brp_list[brp_i].value;
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@ -1300,28 +1300,28 @@ static int aarch64_set_breakpoint(struct target *target,
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buf_set_u32(code, 0, 32, opcode);
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retval = target_read_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length, 1,
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breakpoint->orig_instr);
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if (retval != ERROR_OK)
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return retval;
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length);
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retval = target_write_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length, 1, code);
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if (retval != ERROR_OK)
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return retval;
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length);
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armv8_cache_i_inner_inval_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length);
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breakpoint->is_set = true;
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@ -1453,7 +1453,7 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin
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| (iva_byte_addr_select << 5)
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| (3 << 1) | 1;
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brp_list[brp_2].used = 1;
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brp_list[brp_2].value = breakpoint->address & 0xFFFFFFFFFFFFFFFC;
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brp_list[brp_2].value = breakpoint->address & 0xFFFFFFFFFFFFFFFCULL;
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brp_list[brp_2].control = control_iva;
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retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base
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+ CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_2].brpn,
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@ -1577,29 +1577,29 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
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/* restore original instruction (kept in target endianness) */
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length);
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if (breakpoint->length == 4) {
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retval = target_write_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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4, 1, breakpoint->orig_instr);
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if (retval != ERROR_OK)
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return retval;
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} else {
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retval = target_write_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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2, 1, breakpoint->orig_instr);
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if (retval != ERROR_OK)
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return retval;
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}
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length);
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armv8_cache_i_inner_inval_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFEULL,
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breakpoint->length);
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}
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breakpoint->is_set = false;
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@ -236,7 +236,7 @@ static int armv8_read_ttbcr(struct target *target)
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armv8->pa_size = armv8_pa_size((ttbcr_64 >> 32) & 7);
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armv8->page_size = (ttbcr_64 >> 14) & 3;
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armv8->armv8_mmu.ttbr1_used = (((ttbcr_64 >> 16) & 0x3F) != 0) ? 1 : 0;
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armv8->armv8_mmu.ttbr0_mask = 0x0000FFFFFFFFFFFF;
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armv8->armv8_mmu.ttbr0_mask = 0x0000FFFFFFFFFFFFULL;
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retval += dpm->instr_read_data_r0_64(dpm,
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ARMV8_MRS(SYSTEM_TTBR0_EL1 | (armv8->armv8_mmu.ttbr1_used), 0),
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&armv8->ttbr_base);
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@ -73,26 +73,26 @@ static const struct {
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const char *feature;
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} regs[] = {
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/* general purpose registers */
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{ EAX, "eax", 0x000000D01D660000, 0, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ ECX, "ecx", 0x000000501D660000, 1, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EDX, "edx", 0x000000901D660000, 2, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EBX, "ebx", 0x000000101D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ ESP, "esp", 0x000000E01D660000, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
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{ EBP, "ebp", 0x000000601D660000, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
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{ ESI, "esi", 0x000000A01D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EDI, "edi", 0x000000201D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EAX, "eax", 0x000000D01D660000ULL, 0, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ ECX, "ecx", 0x000000501D660000ULL, 1, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EDX, "edx", 0x000000901D660000ULL, 2, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EBX, "ebx", 0x000000101D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ ESP, "esp", 0x000000E01D660000ULL, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
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{ EBP, "ebp", 0x000000601D660000ULL, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
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{ ESI, "esi", 0x000000A01D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EDI, "edi", 0x000000201D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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/* instruction pointer & flags */
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{ EIP, "eip", 0x000000C01D660000, 3, 32, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.i386.core" },
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{ EFLAGS, "eflags", 0x000000401D660000, 4, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ EIP, "eip", 0x000000C01D660000ULL, 3, 32, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.i386.core" },
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{ EFLAGS, "eflags", 0x000000401D660000ULL, 4, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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/* segment registers */
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{ CS, "cs", 0x000000281D660000, 5, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ SS, "ss", 0x000000C81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ DS, "ds", 0x000000481D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ ES, "es", 0x000000A81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ FS, "fs", 0x000000881D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ GS, "gs", 0x000000081D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ CS, "cs", 0x000000281D660000ULL, 5, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ SS, "ss", 0x000000C81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ DS, "ds", 0x000000481D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ ES, "es", 0x000000A81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ FS, "fs", 0x000000881D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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{ GS, "gs", 0x000000081D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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/* floating point unit registers - not accessible via JTAG - here to satisfy GDB */
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{ ST0, "st0", 0x0, NOT_AVAIL_REG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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@ -113,56 +113,56 @@ static const struct {
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{ FOP, "fop", 0x0, NOT_AVAIL_REG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
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/* control registers */
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{ CR0, "cr0", 0x000000001D660000, 6, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR2, "cr2", 0x000000BC1D660000, 7, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR3, "cr3", 0x000000801D660000, 8, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR4, "cr4", 0x0000002C1D660000, 9, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR0, "cr0", 0x000000001D660000ULL, 6, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR2, "cr2", 0x000000BC1D660000ULL, 7, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR3, "cr3", 0x000000801D660000ULL, 8, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CR4, "cr4", 0x0000002C1D660000ULL, 9, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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/* debug registers */
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{ DR0, "dr0", 0x0000007C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR1, "dr1", 0x000000FC1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR2, "dr2", 0x000000021D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR3, "dr3", 0x000000821D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR6, "dr6", 0x000000301D660000, 10, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR7, "dr7", 0x000000B01D660000, 11, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR0, "dr0", 0x0000007C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR1, "dr1", 0x000000FC1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR2, "dr2", 0x000000021D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR3, "dr3", 0x000000821D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR6, "dr6", 0x000000301D660000ULL, 10, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DR7, "dr7", 0x000000B01D660000ULL, 11, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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/* descriptor tables */
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{ IDTB, "idtbase", 0x000000581D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ IDTL, "idtlimit", 0x000000D81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ IDTAR, "idtar", 0x000000981D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GDTB, "gdtbase", 0x000000B81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GDTL, "gdtlimit", 0x000000781D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GDTAR, "gdtar", 0x000000381D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ TR, "tr", 0x000000701D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTR, "ldtr", 0x000000F01D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTB, "ldbase", 0x000000041D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTL, "ldlimit", 0x000000841D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTAR, "ldtar", 0x000000F81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ IDTB, "idtbase", 0x000000581D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ IDTL, "idtlimit", 0x000000D81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ IDTAR, "idtar", 0x000000981D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GDTB, "gdtbase", 0x000000B81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GDTL, "gdtlimit", 0x000000781D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GDTAR, "gdtar", 0x000000381D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ TR, "tr", 0x000000701D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTR, "ldtr", 0x000000F01D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTB, "ldbase", 0x000000041D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTL, "ldlimit", 0x000000841D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ LDTAR, "ldtar", 0x000000F81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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/* segment registers */
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{ CSB, "csbase", 0x000000F41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CSL, "cslimit", 0x0000000C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ CSAR, "csar", 0x000000741D660000, 12, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DSB, "dsbase", 0x000000941D660000, 13, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DSL, "dslimit", 0x000000541D660000, 14, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ DSAR, "dsar", 0x000000141D660000, 15, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ ESB, "esbase", 0x0000004C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ ESL, "eslimit", 0x000000CC1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ ESAR, "esar", 0x0000008C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ FSB, "fsbase", 0x000000641D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ FSL, "fslimit", 0x000000E41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ FSAR, "fsar", 0x000000A41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GSB, "gsbase", 0x000000C41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GSL, "gslimit", 0x000000241D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ GSAR, "gsar", 0x000000441D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ SSB, "ssbase", 0x000000341D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ SSL, "sslimit", 0x000000B41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ SSAR, "ssar", 0x000000D41D660000, 16, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ TSSB, "tssbase", 0x000000E81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ TSSL, "tsslimit", 0x000000181D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
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{ TSSAR, "tssar", 0x000000681D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ CSB, "csbase", 0x000000F41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ CSL, "cslimit", 0x0000000C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ CSAR, "csar", 0x000000741D660000ULL, 12, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ DSB, "dsbase", 0x000000941D660000ULL, 13, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ DSL, "dslimit", 0x000000541D660000ULL, 14, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ DSAR, "dsar", 0x000000141D660000ULL, 15, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ ESB, "esbase", 0x0000004C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ ESL, "eslimit", 0x000000CC1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ ESAR, "esar", 0x0000008C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ FSB, "fsbase", 0x000000641D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ FSL, "fslimit", 0x000000E41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ FSAR, "fsar", 0x000000A41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ GSB, "gsbase", 0x000000C41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ GSL, "gslimit", 0x000000241D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ GSAR, "gsar", 0x000000441D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ SSB, "ssbase", 0x000000341D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ SSL, "sslimit", 0x000000B41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ SSAR, "ssar", 0x000000D41D660000ULL, 16, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ TSSB, "tssbase", 0x000000E81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ TSSL, "tsslimit", 0x000000181D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ TSSAR, "tssar", 0x000000681D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
/* probemode control register */
|
||||
{ PMCR, "pmcr", 0x000000421D660000, 17, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
{ PMCR, "pmcr", 0x000000421D660000ULL, 17, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
|
||||
};
|
||||
|
||||
static const struct {
|
||||
|
|
@ -171,36 +171,36 @@ static const struct {
|
|||
uint64_t op;
|
||||
} instructions[] = {
|
||||
/* memory read/write */
|
||||
{ MEMRDB32, "MEMRDB32", 0x0909090909090851 },
|
||||
{ MEMRDB16, "MEMRDB16", 0x09090909090851E6 },
|
||||
{ MEMRDH32, "MEMRDH32", 0x090909090908D166 },
|
||||
{ MEMRDH16, "MEMRDH16", 0x090909090908D1E6 },
|
||||
{ MEMRDW32, "MEMRDW32", 0x09090909090908D1 },
|
||||
{ MEMRDW16, "MEMRDW16", 0x0909090908D1E666 },
|
||||
{ MEMWRB32, "MEMWRB32", 0x0909090909090811 },
|
||||
{ MEMWRB16, "MEMWRB16", 0x09090909090811E6 },
|
||||
{ MEMWRH32, "MEMWRH32", 0x0909090909089166 },
|
||||
{ MEMWRH16, "MEMWRH16", 0x09090909090891E6 },
|
||||
{ MEMWRW32, "MEMWRW32", 0x0909090909090891 },
|
||||
{ MEMWRW16, "MEMWRW16", 0x090909090891E666 },
|
||||
{ MEMRDB32, "MEMRDB32", 0x0909090909090851ULL },
|
||||
{ MEMRDB16, "MEMRDB16", 0x09090909090851E6ULL },
|
||||
{ MEMRDH32, "MEMRDH32", 0x090909090908D166ULL },
|
||||
{ MEMRDH16, "MEMRDH16", 0x090909090908D1E6ULL },
|
||||
{ MEMRDW32, "MEMRDW32", 0x09090909090908D1ULL },
|
||||
{ MEMRDW16, "MEMRDW16", 0x0909090908D1E666ULL },
|
||||
{ MEMWRB32, "MEMWRB32", 0x0909090909090811ULL },
|
||||
{ MEMWRB16, "MEMWRB16", 0x09090909090811E6ULL },
|
||||
{ MEMWRH32, "MEMWRH32", 0x0909090909089166ULL },
|
||||
{ MEMWRH16, "MEMWRH16", 0x09090909090891E6ULL },
|
||||
{ MEMWRW32, "MEMWRW32", 0x0909090909090891ULL },
|
||||
{ MEMWRW16, "MEMWRW16", 0x090909090891E666ULL },
|
||||
/* IO read/write */
|
||||
{ IORDB32, "IORDB32", 0x0909090909090937 },
|
||||
{ IORDB16, "IORDB16", 0x09090909090937E6 },
|
||||
{ IORDH32, "IORDH32", 0x090909090909B766 },
|
||||
{ IORDH16, "IORDH16", 0x090909090909B7E6 },
|
||||
{ IORDW32, "IORDW32", 0x09090909090909B7 },
|
||||
{ IORDW16, "IORDW16", 0x0909090909B7E666 },
|
||||
{ IOWRB32, "IOWRB32", 0x0909090909090977 },
|
||||
{ IOWRB16, "IOWRB16", 0x09090909090977E6 },
|
||||
{ IOWRH32, "IOWRH32", 0x090909090909F766 },
|
||||
{ IOWRH16, "IOWRH16", 0x090909090909F7E6 },
|
||||
{ IOWRW32, "IOWRW32", 0x09090909090909F7 },
|
||||
{ IOWRW16, "IOWRW16", 0x0909090909F7E666 },
|
||||
{ IORDB32, "IORDB32", 0x0909090909090937ULL },
|
||||
{ IORDB16, "IORDB16", 0x09090909090937E6ULL },
|
||||
{ IORDH32, "IORDH32", 0x090909090909B766ULL },
|
||||
{ IORDH16, "IORDH16", 0x090909090909B7E6ULL },
|
||||
{ IORDW32, "IORDW32", 0x09090909090909B7ULL },
|
||||
{ IORDW16, "IORDW16", 0x0909090909B7E666ULL },
|
||||
{ IOWRB32, "IOWRB32", 0x0909090909090977ULL },
|
||||
{ IOWRB16, "IOWRB16", 0x09090909090977E6ULL },
|
||||
{ IOWRH32, "IOWRH32", 0x090909090909F766ULL },
|
||||
{ IOWRH16, "IOWRH16", 0x090909090909F7E6ULL },
|
||||
{ IOWRW32, "IOWRW32", 0x09090909090909F7ULL },
|
||||
{ IOWRW16, "IOWRW16", 0x0909090909F7E666ULL },
|
||||
/* lakemont1 core shadow ram access opcodes */
|
||||
{ SRAMACCESS, "SRAMACCESS", 0x0000000E9D660000 },
|
||||
{ SRAM2PDR, "SRAM2PDR", 0x4CF0000000000000 },
|
||||
{ PDR2SRAM, "PDR2SRAM", 0x0CF0000000000000 },
|
||||
{ WBINVD, "WBINVD", 0x09090909090990F0 },
|
||||
{ SRAMACCESS, "SRAMACCESS", 0x0000000E9D660000ULL },
|
||||
{ SRAM2PDR, "SRAM2PDR", 0x4CF0000000000000ULL },
|
||||
{ PDR2SRAM, "PDR2SRAM", 0x0CF0000000000000ULL },
|
||||
{ WBINVD, "WBINVD", 0x09090909090990F0ULL },
|
||||
};
|
||||
|
||||
bool check_not_halted(const struct target *t)
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
#undef LOWER16
|
||||
#define UPPER16(v) ((uint32_t)((v >> 16) & 0xFFFF))
|
||||
#define LOWER16(v) ((uint32_t)(v & 0xFFFF))
|
||||
#define MIPS64_PRACC_FASTDATA_AREA 0xffffffffFF200000
|
||||
#define MIPS64_PRACC_FASTDATA_AREA 0xffffffffFF200000ull
|
||||
#define MIPS64_PRACC_FASTDATA_SIZE 16
|
||||
#define MIPS64_FASTDATA_HANDLER_SIZE 0x80
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue