Michael Bruck: fix warnings.
git-svn-id: svn://svn.berlios.de/openocd/trunk@440 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -282,7 +282,6 @@ enum arm11_regcache_ids
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ARM11_RC_WDTR,
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ARM11_RC_RDTR,
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ARM11_RC_MAX,
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};
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@ -562,7 +561,7 @@ void arm11_leave_debug_state(arm11_common_t * arm11)
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/* MRC p14,0,r?,c0,c5,0 */
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arm11_run_instr_data_to_core1(arm11, 0xee100e15 | (i << 12), R(RX + i));
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// DEBUG("RESTORE R%d %08x", i, R(RX + i));
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// DEBUG("RESTORE R" ZU " %08x", i, R(RX + i));
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}}
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arm11_run_instr_data_finish(arm11);
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@ -788,7 +787,7 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
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if (!current)
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R(PC) = address;
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INFO("RESUME PC %08x", R(PC));
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INFO("RESUME PC %08x%s", R(PC), !current ? "!" : "");
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/* clear breakpoints/watchpoints and VCR*/
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arm11_sc7_clear_vbw(arm11);
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@ -827,7 +826,7 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
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arm11_sc7_run(arm11, brp, asizeof(brp));
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DEBUG("Add BP %zd at %08x", brp_num, bp->address);
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DEBUG("Add BP " ZU " at %08x", brp_num, bp->address);
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brp_num++;
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}
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@ -885,7 +884,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
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if (!current)
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R(PC) = address;
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INFO("STEP PC %08x", R(PC));
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INFO("STEP PC %08x%s", R(PC), !current ? "!" : "");
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/** \todo TODO: Thumb not supported here */
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@ -1518,7 +1517,7 @@ void arm11_build_reg_cache(target_t *target)
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ARM11_REGCACHE_COUNT != asizeof(arm11_reg_defs) ||
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ARM11_REGCACHE_COUNT != ARM11_RC_MAX)
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{
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ERROR("arm11->reg_values inconsistent (%d %zd %zd %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX);
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ERROR("arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX);
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exit(-1);
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}
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@ -33,6 +33,18 @@
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type * variable = calloc(1, sizeof(type) * items)
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/* Don't know exactly when %zu was added to glibc (CVS says in 1998).
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Assume for now that its between GCC versions 3.x.x and 4.x.x .
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MinGW's GCC 3.4.5 comes with a glibc that doesn't support it.
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*/
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#if __GNUC__ > 3
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#define ZU "%zu"
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#else
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#define ZU "%u"
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#endif
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#define ARM11_REGCACHE_MODEREGS 0
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#define ARM11_REGCACHE_FREGS 0
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@ -521,7 +521,7 @@ void arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32
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}}
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if (error_count)
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ERROR("Transfer errors %d", error_count);
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ERROR("Transfer errors " ZU, error_count);
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}
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@ -739,6 +739,8 @@ void arm11_sc7_clear_vbw(arm11_common_t * arm11)
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}
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(pos++)->address = ARM11_SC7_VCR;
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arm11_sc7_run(arm11, clear_bw, asizeof(clear_bw));
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}
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/** Write VCR register
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