at91sam9: factorise cpu support
all at91sam9 are nearly the same except sram and soc name Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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@ -9,13 +9,9 @@
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#
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#
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# source [find target/...cfg]
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# source [find target/...cfg]
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# Define basic characteristics for the CPU. The AT91SAM9G20 processor is a subtle variant of
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source [find target/at91sam9g20.cfg]
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# the AT91SAM9260 and shares the same tap ID as it.
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set _CHIPNAME at91sam9g20
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set _FLASHTYPE nandflash_cs3
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set _FLASHTYPE nandflash_cs3
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set _ENDIAN little
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set _CPUTAPID 0x0792603f
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# Set reset type. Note that the AT91SAM9G20-EK board has the trst signal disconnected. Therefore
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# Set reset type. Note that the AT91SAM9G20-EK board has the trst signal disconnected. Therefore
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# the reset needs to be configured for "srst_only". If for some reason, a zero-ohm jumper is
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# the reset needs to be configured for "srst_only". If for some reason, a zero-ohm jumper is
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@ -23,31 +19,9 @@ set _CPUTAPID 0x0792603f
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reset_config srst_only
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reset_config srst_only
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# Set up the CPU and generate a new jtag tap for AT91SAM9G20.
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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# Use caution changing the delays listed below. These seem to be
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# affected by the board and type of JTAG adapter. A value of 200 ms seems
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# to work reliably for the configuration listed in the file header above.
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adapter_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
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jtag_rclk 5
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The
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# AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
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# Both areas are 16 kB long.
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#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1
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# If you don't want to execute built-in boot rom code (and there are good reasons at times not to do that) in the
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# If you don't want to execute built-in boot rom code (and there are good reasons at times not to do that) in the
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# AT91SAM9 family, the microcontroller is a lump on a log without initialization. Because this family has
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# AT91SAM9 family, the microcontroller is a lump on a log without initialization. Because this family has
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# some powerful features, we want to have a special function that handles "reset init". To do this we declare
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# some powerful features, we want to have a special function that handles "reset init". To do this we declare
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@ -0,0 +1,39 @@
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######################################
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# Target: Atmel AT91SAM9
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######################################
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if { [info exists AT91_CHIPNAME] } {
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set _CHIPNAME $AT91_CHIPNAME
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} else {
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error "you must specify a chip name"
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0x0792603f
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}
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reset_config trst_and_srst separate trst_push_pull srst_open_drain
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#
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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adapter_nsrst_delay 300
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jtag_ntrst_delay 200
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jtag_rclk 3
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######################
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# Target configuration
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######################
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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@ -3,42 +3,12 @@
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######################################
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######################################
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if { [info exists CHIPNAME] } {
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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set AT91_CHIPNAME $CHIPNAME
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} else {
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} else {
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set _CHIPNAME at91sam9260
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set AT91_CHIPNAME at91sam9260
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}
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}
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if { [info exists ENDIAN] } {
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source [find target/at91sam9.cfg]
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0x0792603f
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}
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reset_config trst_and_srst separate trst_push_pull srst_open_drain
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#
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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adapter_nsrst_delay 300
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jtag_ntrst_delay 200
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jtag_rclk 3
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######################
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# Target configuration
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######################
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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# Internal sram1 memory
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# Internal sram1 memory
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
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@ -1,48 +1,16 @@
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jtag_rclk 4
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######################################
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######################################
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# Target: Atmel AT91SAM9260
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# Target: Atmel AT91SAM9260
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######################################
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######################################
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if { [info exists CHIPNAME] } {
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source [find target/at91sam9261.cfg]
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME at91sam9260
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0x0792603f
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}
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reset_config trst_and_srst
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reset_config trst_and_srst
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jtag_rclk 4
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adapter_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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######################
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# Target configuration
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######################
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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# Internal sram1 memory
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
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scan_chain
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scan_chain
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$_TARGETNAME configure -event reset-start {
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$_TARGETNAME configure -event reset-start {
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# at reset chip runs at 32khz
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# at reset chip runs at 32khz
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@ -0,0 +1,22 @@
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######################################
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# Target: Atmel AT91SAM9G20
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######################################
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if { [info exists CHIPNAME] } {
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set AT91_CHIPNAME $CHIPNAME
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} else {
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set AT91_CHIPNAME at91sam9g20
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}
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source [find target/at91sam9.cfg]
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# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
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jtag_rclk 5
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# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The
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# AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
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# Both areas are 16 kB long.
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#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1
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@ -3,42 +3,12 @@
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######################################
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######################################
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if { [info exists CHIPNAME] } {
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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set AT91_CHIPNAME $CHIPNAME
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} else {
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} else {
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set _CHIPNAME at91sam9rl
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set AT91_CHIPNAME at91sam9rl
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}
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}
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if { [info exists ENDIAN] } {
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source [find target/at91sam9.cfg]
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0x0792603f
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}
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reset_config trst_and_srst separate trst_push_pull srst_open_drain
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#
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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adapter_nsrst_delay 300
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jtag_ntrst_delay 200
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jtag_rclk 3
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######################
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# Target configuration
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######################
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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# Internal sram1 memory
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# Internal sram1 memory
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x10000 -work-area-backup 1
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$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x10000 -work-area-backup 1
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