stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
Default values for .first_bank_size_kb and .has_dual_banks fields described in stm32lx_parts[] do not fully describe the real device memory layouts. Basing on: STM32L0x1 RM0377 STM32L0x2 RM0376 STM32L0x3 RM0367 STM32Lxxxx RM0038 correct values for memory layouts were selected: id = 0x447 STM32L0xx (Cat.5) <- dual bank flash for size 192 or 128 KBytes, single bank for 64 KBytes id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + / High Density) <- only one size of the bank, default values are correct id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank, but size of the bank can be different For that reason .part_info field in struct stm32lx_flash_bank is a dynamic field with fields copied from stm32lx_parts[] and overwriten to correct values for specific chips and memory sizes. Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147 Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com> Reviewed-on: http://openocd.zylin.com/4074 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This commit is contained in:
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ca9dcc86d7
commit
e916bcda64
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@ -105,6 +105,7 @@ static int stm32lx_lock(struct flash_bank *bank);
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static int stm32lx_unlock(struct flash_bank *bank);
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static int stm32lx_unlock(struct flash_bank *bank);
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static int stm32lx_mass_erase(struct flash_bank *bank);
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static int stm32lx_mass_erase(struct flash_bank *bank);
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static int stm32lx_wait_until_bsy_clear_timeout(struct flash_bank *bank, int timeout);
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static int stm32lx_wait_until_bsy_clear_timeout(struct flash_bank *bank, int timeout);
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static int stm32lx_update_part_info(struct flash_bank *bank, uint16_t flash_size_in_kb);
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struct stm32lx_rev {
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struct stm32lx_rev {
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uint16_t rev;
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uint16_t rev;
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@ -132,7 +133,7 @@ struct stm32lx_flash_bank {
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uint32_t user_bank_size;
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uint32_t user_bank_size;
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uint32_t flash_base;
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uint32_t flash_base;
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const struct stm32lx_part_info *part_info;
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struct stm32lx_part_info part_info;
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};
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};
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static const struct stm32lx_rev stm32_416_revs[] = {
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static const struct stm32lx_rev stm32_416_revs[] = {
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@ -245,7 +246,7 @@ static const struct stm32lx_part_info stm32lx_parts[] = {
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.page_size = 256,
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.page_size = 256,
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.pages_per_sector = 16,
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.pages_per_sector = 16,
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.max_flash_size_kb = 512,
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.max_flash_size_kb = 512,
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.first_bank_size_kb = 256,
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.first_bank_size_kb = 0, /* determined in runtime */
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.has_dual_banks = true,
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.has_dual_banks = true,
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.flash_base = 0x40023C00,
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.flash_base = 0x40023C00,
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.fsize_base = 0x1FF800CC,
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.fsize_base = 0x1FF800CC,
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@ -258,8 +259,8 @@ static const struct stm32lx_part_info stm32lx_parts[] = {
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.page_size = 128,
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.page_size = 128,
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.pages_per_sector = 32,
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.pages_per_sector = 32,
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.max_flash_size_kb = 192,
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.max_flash_size_kb = 192,
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.first_bank_size_kb = 128,
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.first_bank_size_kb = 0, /* determined in runtime */
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.has_dual_banks = true,
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.has_dual_banks = false, /* determined in runtime */
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.flash_base = 0x40022000,
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.flash_base = 0x40022000,
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.fsize_base = 0x1FF8007C,
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.fsize_base = 0x1FF8007C,
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},
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},
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@ -436,7 +437,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff
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struct target *target = bank->target;
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struct target *target = bank->target;
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
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uint32_t hp_nb = stm32lx_info->part_info.page_size / 2;
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uint32_t buffer_size = 16384;
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uint32_t buffer_size = 16384;
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struct working_area *write_algorithm;
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struct working_area *write_algorithm;
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struct working_area *source;
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struct working_area *source;
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@ -483,7 +484,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff
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else
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else
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buffer_size /= 2;
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buffer_size /= 2;
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if (buffer_size <= stm32lx_info->part_info->page_size) {
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if (buffer_size <= stm32lx_info->part_info.page_size) {
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/* we already allocated the writing code, but failed to get a
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/* we already allocated the writing code, but failed to get a
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* buffer, free the algorithm */
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* buffer, free the algorithm */
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target_free_working_area(target, write_algorithm);
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target_free_working_area(target, write_algorithm);
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@ -617,7 +618,7 @@ static int stm32lx_write(struct flash_bank *bank, const uint8_t *buffer,
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struct target *target = bank->target;
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struct target *target = bank->target;
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
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uint32_t hp_nb = stm32lx_info->part_info.page_size / 2;
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uint32_t halfpages_number;
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uint32_t halfpages_number;
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uint32_t bytes_remaining = 0;
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uint32_t bytes_remaining = 0;
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uint32_t address = bank->base + offset;
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uint32_t address = bank->base + offset;
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@ -747,9 +748,9 @@ static int stm32lx_probe(struct flash_bank *bank)
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uint32_t device_id;
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uint32_t device_id;
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uint32_t base_address = FLASH_BANK0_ADDRESS;
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uint32_t base_address = FLASH_BANK0_ADDRESS;
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uint32_t second_bank_base;
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uint32_t second_bank_base;
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unsigned int n;
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stm32lx_info->probed = 0;
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stm32lx_info->probed = 0;
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stm32lx_info->part_info = NULL;
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int retval = stm32lx_read_id_code(bank->target, &device_id);
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int retval = stm32lx_read_id_code(bank->target, &device_id);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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@ -759,22 +760,24 @@ static int stm32lx_probe(struct flash_bank *bank)
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LOG_DEBUG("device id = 0x%08" PRIx32 "", device_id);
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LOG_DEBUG("device id = 0x%08" PRIx32 "", device_id);
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for (unsigned int n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
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for (n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
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if ((device_id & 0xfff) == stm32lx_parts[n].id)
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if ((device_id & 0xfff) == stm32lx_parts[n].id) {
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stm32lx_info->part_info = &stm32lx_parts[n];
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stm32lx_info->part_info = stm32lx_parts[n];
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break;
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}
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}
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}
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if (!stm32lx_info->part_info) {
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if (n == ARRAY_SIZE(stm32lx_parts)) {
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LOG_WARNING("Cannot identify target as a STM32L family.");
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LOG_WARNING("Cannot identify target as a STM32L family.");
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return ERROR_FAIL;
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return ERROR_FAIL;
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} else {
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} else {
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LOG_INFO("Device: %s", stm32lx_info->part_info->device_str);
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LOG_INFO("Device: %s", stm32lx_info->part_info.device_str);
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}
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}
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stm32lx_info->flash_base = stm32lx_info->part_info->flash_base;
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stm32lx_info->flash_base = stm32lx_info->part_info.flash_base;
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/* Get the flash size from target. */
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/* Get the flash size from target. */
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retval = target_read_u16(target, stm32lx_info->part_info->fsize_base,
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retval = target_read_u16(target, stm32lx_info->part_info.fsize_base,
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&flash_size_in_kb);
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&flash_size_in_kb);
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/* 0x436 devices report their flash size as a 0 or 1 code indicating 384K
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/* 0x436 devices report their flash size as a 0 or 1 code indicating 384K
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@ -791,29 +794,34 @@ static int stm32lx_probe(struct flash_bank *bank)
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* default to max target family */
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* default to max target family */
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if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
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if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
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LOG_WARNING("STM32L flash size failed, probe inaccurate - assuming %dk flash",
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LOG_WARNING("STM32L flash size failed, probe inaccurate - assuming %dk flash",
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stm32lx_info->part_info->max_flash_size_kb);
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stm32lx_info->part_info.max_flash_size_kb);
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flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
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flash_size_in_kb = stm32lx_info->part_info.max_flash_size_kb;
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} else if (flash_size_in_kb > stm32lx_info->part_info->max_flash_size_kb) {
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} else if (flash_size_in_kb > stm32lx_info->part_info.max_flash_size_kb) {
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LOG_WARNING("STM32L probed flash size assumed incorrect since FLASH_SIZE=%dk > %dk, - assuming %dk flash",
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LOG_WARNING("STM32L probed flash size assumed incorrect since FLASH_SIZE=%dk > %dk, - assuming %dk flash",
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flash_size_in_kb, stm32lx_info->part_info->max_flash_size_kb,
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flash_size_in_kb, stm32lx_info->part_info.max_flash_size_kb,
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stm32lx_info->part_info->max_flash_size_kb);
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stm32lx_info->part_info.max_flash_size_kb);
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flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
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flash_size_in_kb = stm32lx_info->part_info.max_flash_size_kb;
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}
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}
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if (stm32lx_info->part_info->has_dual_banks) {
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/* Overwrite default dual-bank configuration */
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retval = stm32lx_update_part_info(bank, flash_size_in_kb);
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if (retval != ERROR_OK)
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return ERROR_FAIL;
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if (stm32lx_info->part_info.has_dual_banks) {
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/* Use the configured base address to determine if this is the first or second flash bank.
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/* Use the configured base address to determine if this is the first or second flash bank.
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* Verify that the base address is reasonably correct and determine the flash bank size
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* Verify that the base address is reasonably correct and determine the flash bank size
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*/
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*/
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second_bank_base = base_address +
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second_bank_base = base_address +
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stm32lx_info->part_info->first_bank_size_kb * 1024;
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stm32lx_info->part_info.first_bank_size_kb * 1024;
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if (bank->base == second_bank_base || !bank->base) {
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if (bank->base == second_bank_base || !bank->base) {
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/* This is the second bank */
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/* This is the second bank */
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base_address = second_bank_base;
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base_address = second_bank_base;
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flash_size_in_kb = flash_size_in_kb -
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flash_size_in_kb = flash_size_in_kb -
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stm32lx_info->part_info->first_bank_size_kb;
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stm32lx_info->part_info.first_bank_size_kb;
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} else if (bank->base == base_address) {
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} else if (bank->base == base_address) {
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/* This is the first bank */
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/* This is the first bank */
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flash_size_in_kb = stm32lx_info->part_info->first_bank_size_kb;
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flash_size_in_kb = stm32lx_info->part_info.first_bank_size_kb;
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} else {
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} else {
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LOG_WARNING("STM32L flash bank base address config is incorrect."
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LOG_WARNING("STM32L flash bank base address config is incorrect."
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" 0x%" PRIx32 " but should rather be 0x%" PRIx32 " or 0x%" PRIx32,
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" 0x%" PRIx32 " but should rather be 0x%" PRIx32 " or 0x%" PRIx32,
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@ -876,6 +884,9 @@ static int stm32lx_auto_probe(struct flash_bank *bank)
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static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
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static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
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{
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{
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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const struct stm32lx_part_info *info = &stm32lx_info->part_info;
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uint16_t rev_id = stm32lx_info->idcode >> 16;
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const char *rev_str = NULL;
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if (!stm32lx_info->probed) {
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if (!stm32lx_info->probed) {
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int retval = stm32lx_probe(bank);
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int retval = stm32lx_probe(bank);
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@ -886,32 +897,21 @@ static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
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}
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}
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}
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}
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const struct stm32lx_part_info *info = stm32lx_info->part_info;
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for (unsigned int i = 0; i < info->num_revs; i++)
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if (rev_id == info->revs[i].rev)
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rev_str = info->revs[i].str;
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if (info) {
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if (rev_str != NULL) {
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const char *rev_str = NULL;
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snprintf(buf, buf_size,
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uint16_t rev_id = stm32lx_info->idcode >> 16;
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"%s - Rev: %s",
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info->device_str, rev_str);
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for (unsigned int i = 0; i < info->num_revs; i++)
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if (rev_id == info->revs[i].rev)
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rev_str = info->revs[i].str;
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if (rev_str != NULL) {
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snprintf(buf, buf_size,
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"%s - Rev: %s",
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stm32lx_info->part_info->device_str, rev_str);
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} else {
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snprintf(buf, buf_size,
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"%s - Rev: unknown (0x%04x)",
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stm32lx_info->part_info->device_str, rev_id);
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}
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return ERROR_OK;
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} else {
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} else {
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snprintf(buf, buf_size, "Cannot identify target as a STM32Lx");
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snprintf(buf, buf_size,
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"%s - Rev: unknown (0x%04x)",
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return ERROR_FAIL;
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info->device_str, rev_id);
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}
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}
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return ERROR_OK;
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}
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}
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static const struct command_registration stm32lx_exec_command_handlers[] = {
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static const struct command_registration stm32lx_exec_command_handlers[] = {
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@ -1120,7 +1120,7 @@ static int stm32lx_erase_sector(struct flash_bank *bank, int sector)
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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for (int page = 0; page < (int)stm32lx_info->part_info->pages_per_sector;
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for (int page = 0; page < (int)stm32lx_info->part_info.pages_per_sector;
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page++) {
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page++) {
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reg32 = FLASH_PECR__PROG | FLASH_PECR__ERASE;
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reg32 = FLASH_PECR__PROG | FLASH_PECR__ERASE;
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retval = target_write_u32(target,
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retval = target_write_u32(target,
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@ -1133,7 +1133,7 @@ static int stm32lx_erase_sector(struct flash_bank *bank, int sector)
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return retval;
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return retval;
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uint32_t addr = bank->base + bank->sectors[sector].offset + (page
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uint32_t addr = bank->base + bank->sectors[sector].offset + (page
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* stm32lx_info->part_info->page_size);
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* stm32lx_info->part_info.page_size);
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retval = target_write_u32(target, addr, 0x0);
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retval = target_write_u32(target, addr, 0x0);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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@ -1357,3 +1357,22 @@ static int stm32lx_mass_erase(struct flash_bank *bank)
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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static int stm32lx_update_part_info(struct flash_bank *bank, uint16_t flash_size_in_kb)
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{
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struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
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switch (stm32lx_info->part_info.id) {
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case 0x447: /* STM32L0xx (Cat.5) devices */
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if (flash_size_in_kb == 192 || flash_size_in_kb == 128) {
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stm32lx_info->part_info.first_bank_size_kb = flash_size_in_kb / 2;
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stm32lx_info->part_info.has_dual_banks = true;
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}
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break;
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case 0x437: /* STM32L1xx (Cat.5/Cat.6) */
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stm32lx_info->part_info.first_bank_size_kb = flash_size_in_kb / 2;
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break;
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}
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return ERROR_OK;
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}
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