flash/nor/stm32l4x: fix minor errors in flash write/async algo
Fix comment of tested errors in asm src. List all relevant errors in FLASH_ERROR mask: FLASH_PROGERR was missing and any trial to re-program already programmed double word ended up in the error bit held uncleared and flash write permanetly repeating the error message until reset. Lock the bank also after unsuccesfull write_block run. Set async target algo block size to size of double word. Remove warning in case of write_block success. In case of error use LOG_ERROR instead of warning. Change-Id: Ibf6d5e306a4c2eaa43de67d636b4902c737f02f3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5360 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
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@ -71,7 +71,7 @@ busy:
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ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
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tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
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bne busy /* wait more... */
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tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/
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tst r6, #0xfa /* PGSERR | SIZERR | PGAERR | WRPERR | PROGERR | OPERR */
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bne error /* fail... */
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cmp r5, r1 /* wrap rp at end of buffer */
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@ -106,7 +106,7 @@
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#define FLASH_PROGERR (1 << 3) /* Programming error */
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#define FLASH_OPERR (1 << 1) /* Operation error */
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#define FLASH_EOP (1 << 0) /* End of operation */
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#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGSERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_OPERR)
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#define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR)
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/* register unlock keys */
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#define KEY1 0x45670123
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@ -577,7 +577,7 @@ static int stm32l4_protect(struct flash_bank *bank, int set, int first, int last
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return ret;
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}
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/* Count is in halfwords */
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/* Count is in double-words */
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static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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uint32_t offset, uint32_t count)
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{
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@ -630,15 +630,15 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
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init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */
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init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (double word-64bit) */
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init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* flash base */
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init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* flash regs base */
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buf_set_u32(reg_params[0].value, 0, 32, source->address);
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buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
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buf_set_u32(reg_params[2].value, 0, 32, address);
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buf_set_u32(reg_params[3].value, 0, 32, count / 4);
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buf_set_u32(reg_params[3].value, 0, 32, count);
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buf_set_u32(reg_params[4].value, 0, 32, stm32l4_info->part_info->flash_regs_base);
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retval = target_run_flash_async_algorithm(target, buffer, count, 2,
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retval = target_run_flash_async_algorithm(target, buffer, count, 8,
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0, NULL,
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5, reg_params,
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source->address, source->size,
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@ -676,7 +676,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer,
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uint32_t offset, uint32_t count)
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{
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int retval;
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int retval, retval2;
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if (bank->target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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@ -692,14 +692,15 @@ static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer,
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if (retval != ERROR_OK)
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return retval;
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retval = stm32l4_write_block(bank, buffer, offset, count / 2);
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retval = stm32l4_write_block(bank, buffer, offset, count / 8);
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retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
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if (retval != ERROR_OK) {
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LOG_WARNING("block write failed");
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LOG_ERROR("block write failed");
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return retval;
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}
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LOG_WARNING("block write succeeded");
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return stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
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return retval2;
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}
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static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
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