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ARM: ARMV4_5_COMMON_MAGIC --> ARM_COMMON_MAGIC 

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2009-12-04 19:46:44 -08:00
parent 87589043fa
commit e51b9a4ac7
12 changed files with 19 additions and 19 deletions
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4
src/flash/arm_nandio.c
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@ -136,7 +136,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
return retval; return retval;
/* set up algorithm and parameters */ /* set up algorithm and parameters */
algo.common_magic = ARMV4_5_COMMON_MAGIC; algo.common_magic = ARM_COMMON_MAGIC;
algo.core_mode = ARM_MODE_SVC; algo.core_mode = ARM_MODE_SVC;
algo.core_state = ARM_STATE_ARM; algo.core_state = ARM_STATE_ARM;
@ -212,7 +212,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
target_buf = nand->copy_area->address + sizeof(code); target_buf = nand->copy_area->address + sizeof(code);
/* set up algorithm and parameters */ /* set up algorithm and parameters */
algo.common_magic = ARMV4_5_COMMON_MAGIC; algo.common_magic = ARM_COMMON_MAGIC;
algo.core_mode = ARM_MODE_SVC; algo.core_mode = ARM_MODE_SVC;
algo.core_state = ARM_STATE_ARM; algo.core_state = ARM_STATE_ARM;

2
src/flash/nor/aduc702x.c
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@ -241,7 +241,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
} }
} }
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

4
src/flash/nor/cfi.c
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@ -1085,7 +1085,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3
cfi_intel_clear_status_register(bank); cfi_intel_clear_status_register(bank);
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;
@ -1408,7 +1408,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui
0xeafffffe /* b 8204 <sp_8_done> */ 0xeafffffe /* b 8204 <sp_8_done> */
}; };
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

2
src/flash/nor/ecos.c
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@ -210,7 +210,7 @@ static int runCode(struct ecosflash_flash_bank *info,
struct reg_param reg_params[3]; struct reg_param reg_params[3];
struct armv4_5_algorithm armv4_5_info; struct armv4_5_algorithm armv4_5_info;
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

2
src/flash/nor/lpc2000.c
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@ -292,7 +292,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, int code, uint32_t param_ta
break; break;
case lpc2000_v1: case lpc2000_v1:
case lpc2000_v2: case lpc2000_v2:
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;
iap_entry_point = 0x7ffffff1; iap_entry_point = 0x7ffffff1;

2
src/flash/nor/lpc2900.c
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@ -1423,7 +1423,7 @@ static int lpc2900_write(struct flash_bank *bank, uint8_t *buffer,
buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time); buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
/* Execute algorithm, assume breakpoint for last instruction */ /* Execute algorithm, assume breakpoint for last instruction */
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

2
src/flash/nor/str7x.c
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@ -371,7 +371,7 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
} }
} }
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

2
src/flash/nor/str9x.c
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@ -408,7 +408,7 @@ static int str9x_write_block(struct flash_bank *bank,
} }
} }
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

2
src/target/arm7_9_common.c
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@ -2696,7 +2696,7 @@ int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t c
struct armv4_5_algorithm armv4_5_info; struct armv4_5_algorithm armv4_5_info;
struct reg_param reg_params[1]; struct reg_param reg_params[1];
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;

10
src/target/armv4_5.c
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@ -585,7 +585,7 @@ int armv4_5_arch_state(struct target *target)
{ {
struct arm *armv4_5 = target_to_arm(target); struct arm *armv4_5 = target_to_arm(target);
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) if (armv4_5->common_magic != ARM_COMMON_MAGIC)
{ {
LOG_ERROR("BUG: called for a non-ARM target"); LOG_ERROR("BUG: called for a non-ARM target");
return ERROR_FAIL; return ERROR_FAIL;
@ -1047,7 +1047,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
LOG_DEBUG("Running algorithm"); LOG_DEBUG("Running algorithm");
if (armv4_5_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC) if (armv4_5_algorithm_info->common_magic != ARM_COMMON_MAGIC)
{ {
LOG_ERROR("current target isn't an ARMV4/5 target"); LOG_ERROR("current target isn't an ARMV4/5 target");
return ERROR_TARGET_INVALID; return ERROR_TARGET_INVALID;
@ -1273,7 +1273,7 @@ int arm_checksum_memory(struct target *target,
return retval; return retval;
} }
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;
@ -1350,7 +1350,7 @@ int arm_blank_check_memory(struct target *target,
return retval; return retval;
} }
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM; armv4_5_info.core_state = ARM_STATE_ARM;
@ -1424,7 +1424,7 @@ int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5)
target->arch_info = armv4_5; target->arch_info = armv4_5;
armv4_5->target = target; armv4_5->target = target;
armv4_5->common_magic = ARMV4_5_COMMON_MAGIC; armv4_5->common_magic = ARM_COMMON_MAGIC;
arm_set_cpsr(armv4_5, ARM_MODE_USR); arm_set_cpsr(armv4_5, ARM_MODE_USR);
/* core_type may be overridden by subtype logic */ /* core_type may be overridden by subtype logic */

4
src/target/armv4_5.h
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@ -67,7 +67,7 @@ extern const int armv4_5_core_reg_map[8][17];
/* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */ /* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */
enum { ARMV4_5_CPSR = 31, }; enum { ARMV4_5_CPSR = 31, };
#define ARMV4_5_COMMON_MAGIC 0x0A450A45 #define ARM_COMMON_MAGIC 0x0A450A45
/** /**
* Represents a generic ARM core, with standard application registers. * Represents a generic ARM core, with standard application registers.
@ -149,7 +149,7 @@ static inline struct arm *target_to_arm(struct target *target)
static inline bool is_arm(struct arm *arm) static inline bool is_arm(struct arm *arm)
{ {
return arm && arm->common_magic == ARMV4_5_COMMON_MAGIC; return arm && arm->common_magic == ARM_COMMON_MAGIC;
} }
struct armv4_5_algorithm struct armv4_5_algorithm

2
src/target/xscale.c
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@ -857,7 +857,7 @@ static int xscale_arch_state(struct target *target)
"", "\n(processor reset)", "\n(trace buffer full)" "", "\n(processor reset)", "\n(trace buffer full)"
}; };
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) if (armv4_5->common_magic != ARM_COMMON_MAGIC)
{ {
LOG_ERROR("BUG: called for a non-ARMv4/5 target"); LOG_ERROR("BUG: called for a non-ARMv4/5 target");
return ERROR_INVALID_ARGUMENTS; return ERROR_INVALID_ARGUMENTS;