interesting
/
riscv-openocd
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Merge pull request #7 from sifive/temp_verify_blank_check 

riscv: implement skeletons for Memory Blank Check and CRC.
This commit is contained in:
Tim Newsome 2016-12-08 13:19:00 -08:00 committed by GitHub
parent c1da323144 4a0d3fb035
commit e31dd225fa
1 changed files with 30 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
src/target/riscv/riscv.c
View File

@ -2748,6 +2748,33 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
return ERROR_OK; return ERROR_OK;
} }
/* Should run code on the target to perform CRC of
memory. Not yet implemented.
*/
int riscv_checksum_memory(struct target *target,
uint32_t address, uint32_t count,
uint32_t* checksum) {
*checksum = 0xFFFFFFFF;
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
/* Should run code on the target to check whether a memory
block holds all-ones (because this is generally called on
NOR flash which is 1 when "blank")
Not yet implemented.
*/
int riscv_blank_check_memory(struct target * target,
uint32_t address,
uint32_t count,
uint32_t * blank) {
*blank = 0;
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
struct target_type riscv_target = struct target_type riscv_target =
{ {
.name = "riscv", .name = "riscv",
@ -2769,6 +2796,9 @@ struct target_type riscv_target =
.read_memory = riscv_read_memory, .read_memory = riscv_read_memory,
.write_memory = riscv_write_memory, .write_memory = riscv_write_memory,
.blank_check_memory = riscv_blank_check_memory,
.checksum_memory = riscv_checksum_memory,
.get_gdb_reg_list = riscv_get_gdb_reg_list, .get_gdb_reg_list = riscv_get_gdb_reg_list,
.add_breakpoint = riscv_add_breakpoint, .add_breakpoint = riscv_add_breakpoint,