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retired reset run_and_init/halt 

git-svn-id: svn://svn.berlios.de/openocd/trunk@877 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2008-07-28 06:08:05 +00:00
parent 9244c600b0
commit e2b6de3d66
38 changed files with 350 additions and 505 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
doc/openocd.texi
View File

@ -540,11 +540,6 @@ Event is one of the following:
@option{pre_resume} or @option{gdb_program_config}.
@option{post_reset} and @option{reset} will produce the same results.
@item @b{run_and_halt_time} <@var{target#}> <@var{time_in_ms}>
@cindex run_and_halt_time
The amount of time the debugger should wait after releasing reset before it asserts
a debug request. This is used by the @option{run_and_halt} and @option{run_and_init}
reset modes.
@item @b{working_area} <@var{target#}> <@var{address}> <@var{size}>
<@var{backup}|@var{nobackup}>
@cindex working_area
@ -795,8 +790,7 @@ OpenOCD will wait 5 seconds for the target to resume.
@cindex step
Single-step the target at its current code position, or at an optional address.
@item @b{reset} [@option{run}|@option{halt}|@option{init}|@option{run_and_halt}
|@option{run_and_init}]
@item @b{reset} [@option{run}|@option{halt}|@option{init}]
@cindex reset
Perform a hard-reset. The optional parameter specifies what should happen after the reset.
@ -812,15 +806,7 @@ Immediately halt the target (works only with certain configurations).
@cindex reset init
Immediately halt the target, and execute the reset script (works only with certain
configurations)
@item @b{run_and_halt}
@cindex reset run_and_halt
Let the target run for a certain amount of time, then request a halt.
@item @b{run_and_init}
@cindex reset run_and_init
Let the target run for a certain amount of time, then request a halt. Execute the
reset script once the target enters debug mode.
@end itemize
The runtime can be set using the @option{run_and_halt_time} command.
@end itemize
@subsection Memory access commands

151
src/target/target.c
View File

@ -55,7 +55,6 @@ int cli_target_callback_event_handler(struct target_s *target, enum target_event
int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_targets_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_run_and_halt_time_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_working_area_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@ -220,31 +219,6 @@ target_t* get_current_target(command_context_t *cmd_ctx)
return target;
}
/* Process target initialization, when target entered debug out of reset
* the handler is unregistered at the end of this function, so it's only called once
*/
int target_init_handler(struct target_s *target, enum target_event event, void *priv)
{
struct command_context_s *cmd_ctx = priv;
if (event == TARGET_EVENT_HALTED)
{
target_unregister_event_callback(target_init_handler, priv);
target_invoke_script(cmd_ctx, target, "post_reset");
jtag_execute_queue();
}
return ERROR_OK;
}
int target_run_and_halt_handler(void *priv)
{
target_t *target = priv;
target_halt(target);
return ERROR_OK;
}
int target_poll(struct target_s *target)
{
@ -343,31 +317,10 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
target = targets;
while (target)
{
switch (reset_mode)
if (reset_mode!=RESET_RUN)
{
case RESET_RUN:
/* nothing to do if target just wants to be run */
break;
case RESET_RUN_AND_HALT:
/* schedule halt */
target_register_timer_callback(target_run_and_halt_handler, target->run_and_halt_time, 0, target);
break;
case RESET_RUN_AND_INIT:
/* schedule halt */
target_register_timer_callback(target_run_and_halt_handler, target->run_and_halt_time, 0, target);
target_register_event_callback(target_init_handler, cmd_ctx);
break;
case RESET_HALT:
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
target_halt(target);
break;
case RESET_INIT:
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
target_halt(target);
target_register_event_callback(target_init_handler, cmd_ctx);
break;
default:
LOG_ERROR("BUG: unknown target->reset_mode");
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
target_halt(target);
}
target = target->next;
}
@ -408,60 +361,19 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
LOG_DEBUG("Waiting for halted stated as appropriate");
/* Wait for reset to complete, maximum 5 seconds. */
gettimeofday(&timeout, NULL);
timeval_add_time(&timeout, 5, 0);
for(;;)
if ((reset_mode == RESET_HALT) || (reset_mode == RESET_INIT))
{
gettimeofday(&now, NULL);
target_call_timer_callbacks_now();
target = targets;
while (target)
/* Wait for reset to complete, maximum 5 seconds. */
if (((retval=target_wait_state(target, TARGET_HALTED, 5000)))==ERROR_OK)
{
LOG_DEBUG("Polling target");
target_poll(target);
if ((reset_mode == RESET_RUN_AND_INIT) ||
(reset_mode == RESET_RUN_AND_HALT) ||
(reset_mode == RESET_HALT) ||
(reset_mode == RESET_INIT))
{
if (target->state != TARGET_HALTED)
{
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec)))
{
LOG_USER("Timed out waiting for halt after reset");
goto done;
}
/* this will send alive messages on e.g. GDB remote protocol. */
usleep(500*1000);
LOG_USER_N("%s", ""); /* avoid warning about zero length formatting message*/
goto again;
}
}
target = target->next;
if (reset_mode == RESET_INIT)
target_invoke_script(cmd_ctx, target, "post_reset");
}
/* All targets we're waiting for are halted */
break;
again:;
}
done:
/* We want any events to be processed before the prompt */
target_call_timer_callbacks_now();
/* if we timed out we need to unregister these handlers */
target = targets;
while (target)
{
target_unregister_timer_callback(target_run_and_halt_handler, target);
target = target->next;
}
target_unregister_event_callback(target_init_handler, cmd_ctx);
return retval;
}
@ -932,7 +844,6 @@ int target_register_commands(struct command_context_s *cmd_ctx)
{
register_command(cmd_ctx, NULL, "target", handle_target_command, COMMAND_CONFIG, "target <cpu> [reset_init default - DEPRECATED] <chainpos> <endianness> <variant> [cpu type specifc args]");
register_command(cmd_ctx, NULL, "targets", handle_targets_command, COMMAND_EXEC, NULL);
register_command(cmd_ctx, NULL, "run_and_halt_time", handle_run_and_halt_time_command, COMMAND_CONFIG, "<target> <run time ms>");
register_command(cmd_ctx, NULL, "working_area", handle_working_area_command, COMMAND_ANY, "working_area <target#> <address> <size> <'backup'|'nobackup'> [virtual address]");
register_command(cmd_ctx, NULL, "virt2phys", handle_virt2phys_command, COMMAND_ANY, "virt2phys <virtual address>");
register_command(cmd_ctx, NULL, "profile", handle_profile_command, COMMAND_EXEC, "PRELIMINARY! - profile <seconds> <gmon.out>");
@ -1307,7 +1218,7 @@ int target_register_user_commands(struct command_context_s *cmd_ctx)
register_command(cmd_ctx, NULL, "halt", handle_halt_command, COMMAND_EXEC, "halt target");
register_command(cmd_ctx, NULL, "resume", handle_resume_command, COMMAND_EXEC, "resume target [addr]");
register_command(cmd_ctx, NULL, "step", handle_step_command, COMMAND_EXEC, "step one instruction from current PC or [addr]");
register_command(cmd_ctx, NULL, "reset", handle_reset_command, COMMAND_EXEC, "reset target [run|halt|init|run_and_halt|run_and_init]");
register_command(cmd_ctx, NULL, "reset", handle_reset_command, COMMAND_EXEC, "reset target [run|halt|init]");
register_command(cmd_ctx, NULL, "soft_reset_halt", handle_soft_reset_halt_command, COMMAND_EXEC, "halt the target and do a soft reset");
register_command(cmd_ctx, NULL, "mdw", handle_md_command, COMMAND_EXEC, "display memory words <addr> [count]");
@ -1445,7 +1356,6 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
args--;
argc++;
}
(*last_target_p)->run_and_halt_time = 1000; /* default 1s */
(*last_target_p)->working_area = 0x0;
(*last_target_p)->working_area_size = 0x0;
@ -1498,26 +1408,6 @@ int target_invoke_script(struct command_context_s *cmd_ctx, target_t *target, ch
get_num_by_target(target), name);
}
int handle_run_and_halt_time_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target = NULL;
if (argc < 2)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
target = get_target_by_num(strtoul(args[0], NULL, 0));
if (!target)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
target->run_and_halt_time = strtoul(args[1], NULL, 0);
return ERROR_OK;
}
int handle_working_area_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target = NULL;
@ -1777,7 +1667,7 @@ int target_wait_state(target_t *target, enum target_state state, int ms)
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec)))
{
LOG_ERROR("timed out while waiting for target %s", target_state_strings[state]);
break;
return ERROR_FAIL;
}
}
@ -1815,8 +1705,6 @@ int handle_reset_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
target_t *target = get_current_target(cmd_ctx);
enum target_reset_mode reset_mode = RESET_RUN;
LOG_DEBUG("-");
if (argc >= 1)
{
if (strcmp("run", args[0]) == 0)
@ -1825,26 +1713,9 @@ int handle_reset_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
reset_mode = RESET_HALT;
else if (strcmp("init", args[0]) == 0)
reset_mode = RESET_INIT;
else if (strcmp("run_and_halt", args[0]) == 0)
{
reset_mode = RESET_RUN_AND_HALT;
if (argc >= 2)
{
target->run_and_halt_time = strtoul(args[1], NULL, 0);
}
}
else if (strcmp("run_and_init", args[0]) == 0)
{
reset_mode = RESET_RUN_AND_INIT;
if (argc >= 2)
{
target->run_and_halt_time = strtoul(args[1], NULL, 0);
}
}
else
{
command_print(cmd_ctx, "usage: reset ['run', 'halt', 'init', 'run_and_halt', 'run_and_init]");
return ERROR_OK;
return ERROR_COMMAND_SYNTAX_ERROR;
}
}

3
src/target/target.h
View File

@ -62,8 +62,6 @@ enum target_reset_mode
RESET_RUN = 0, /* reset and let target run */
RESET_HALT = 1, /* reset and halt target out of reset */
RESET_INIT = 2, /* reset and halt target out of reset, then run init script */
RESET_RUN_AND_HALT = 3, /* reset and let target run, halt after n milliseconds */
RESET_RUN_AND_INIT = 4, /* reset and let target run, halt after n milliseconds, then run init script */
};
enum target_debug_reason
@ -202,7 +200,6 @@ typedef struct target_s
{
target_type_t *type; /* target type definition (name, access functions) */
int reset_halt; /* attempt resetting the CPU into the halted mode? */
int run_and_halt_time; /* how long the target should run after a run_and_halt reset */
u32 working_area; /* working area (initialized RAM). Evaluated
upon first allocation from virtual/physical address. */
u32 working_area_virt; /* virtual address */

2
src/target/target/at91r40008.cfg
View File

@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/at91r40008_reset.script

2
src/target/target/at91sam9260.cfg
View File

@ -18,7 +18,7 @@ jtag_ntrst_delay 0
target arm926ejs little 0 arm926ejs
target_script 0 reset event/at91sam9260_reset.script
run_and_halt_time 0 30
#working area <target#> <address> <size> <backup|nobackup>
working_area 0 0x00300000 0x1000 backup

2
src/target/target/at91sam9260minimal.cfg
View File

@ -16,5 +16,5 @@ jtag_ntrst_delay 200
#target <type> <endianess> <reset mode> <JTAG pos> <variant>
target arm926ejs little 0 arm926ejs
run_and_halt_time 0 30

2
src/target/target/eir-sam7se512.cfg
View File

@ -6,7 +6,7 @@ reset_config srst_only srst_pulls_trst
jtag_device 4 0x1 0xf 0xe
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/eir-sam7se512_reset.script

2
src/target/target/hammer.cfg
View File

@ -18,7 +18,7 @@ arm7_9 dcc_downloads enable
target_script 0 reset event/hammer_reset.script
working_area 0 0x30800000 0x20000 nobackup
run_and_halt_time 0 1000
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]

2
src/target/target/ipx42x.cfg
View File

@ -6,4 +6,4 @@ reset_config srst_only srst_pulls_trst
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 7 0x1 0x7f 0x7e
target xscale big 0 IXP42x
run_and_halt_time 0 30

2
src/target/target/lpc2129.cfg
View File

@ -5,7 +5,7 @@ reset_config trst_and_srst srst_pulls_trst
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum

2
src/target/target/lpc2148.cfg
View File

@ -16,7 +16,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
target_script 0 reset event/lpc2148_reset.script

2
src/target/target/lpc2294.cfg
View File

@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup

2
src/target/target/mx31.cfg
View File

@ -12,5 +12,5 @@ jtag_device 5 0x1 0x0 0x1e
#target <type> <endianess> <reset mode>
target arm11 little 1
run_and_halt_time 0 0

2
src/target/target/netx500.cfg
View File

@ -7,4 +7,4 @@ jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 100
jtag_ntrst_delay 100
target arm926ejs little 0 arm926ejs
run_and_halt_time 0 500

2
src/target/target/nslu2.cfg
View File

@ -7,7 +7,7 @@ jtag_device 7 0x1 0x7f 0x7e
# target configuration
target xscale big 0 ixp42x
run_and_halt_time 0 30
# maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off

2
src/target/target/omap5912.cfg
View File

@ -12,7 +12,7 @@ jtag_device 8 0x0 0x0 0x0
target arm926ejs little 1 arm926ejs
target_script 0 reset event/omap5912_reset.script
run_and_halt_time 0 30
# omap5912 lcd frame buffer as working area
working_area 0 0x20000000 0x3e800 nobackup

2
src/target/target/pic32mx.cfg
View File

@ -11,7 +11,7 @@ jtag_device 5 0x1 0x1 0x1e
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target mips_m4k little 0
run_and_halt_time 0 30
working_area 0 0xa0000000 16384 nobackup

2
src/target/target/pxa255.cfg
View File

@ -3,7 +3,7 @@ jtag_nsrst_delay 200
jtag_ntrst_delay 200
target xscale little 0 pxa255
reset_config trst_and_srst
run_and_halt_time 0 30
target_script 0 reset event/pxa255_reset.script

2
src/target/target/pxa270.cfg
View File

@ -14,7 +14,7 @@ target xscale little 0 pxa27x
# maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off
working_area 0 0x5c000000 0x10000 nobackup
run_and_halt_time 0 30
#flash bank <driver> <base> <size> <chip_width> <bus_width>
# works for P30 flash
flash bank cfi 0x00000000 0x1000000 2 4 0

2
src/target/target/sam7s256.cfg
View File

@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/sam7s256_reset.script

2
src/target/target/sam7x256.cfg
View File

@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/sam7x256_reset.script

2
src/target/target/stm32.cfg
View File

@ -17,7 +17,7 @@ jtag_device 5 0x1 0x1 0x1e
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target cortex_m3 little 0
run_and_halt_time 0 30
working_area 0 0x20000000 16384 nobackup

2
src/target/target/stm32stick.cfg
View File

@ -18,7 +18,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target cortex_m3 little 0
run_and_halt_time 0 30
working_area 0 0x20000000 16384 nobackup

2
src/target/target/str710.cfg
View File

@ -17,7 +17,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 gdb_program_config event/str710_program.script

2
src/target/target/str730.cfg
View File

@ -24,7 +24,7 @@ jtag_ntrst_delay 500
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 gdb_program_config event/str730_program.script

2
src/target/target/str750.cfg
View File

@ -25,7 +25,7 @@ jtag_ntrst_delay 500
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 gdb_program_config event/str750_program.script

2
src/target/target/str912.cfg
View File

@ -37,7 +37,7 @@ jtag_device 5 0x1 0x1 0x1e
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm966e little 1 arm966e
run_and_halt_time 0 30
working_area 0 0x50000000 16384 nobackup

2
src/target/target/str9comstick.cfg
View File

@ -13,7 +13,7 @@ jtag_device 8 0x1 0x1 0xfe
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e
target arm966e little 1 arm966e
run_and_halt_time 0 30
working_area 0 0x50000000 16384 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str9x 0x00000000 0x00080000 0 0 0

2
src/target/target/wi-9c.cfg
View File

@ -18,7 +18,7 @@ jtag_ntrst_delay 0
target arm926ejs big 0 arm926ejs
target_script 0 reset event/wi-9c_reset.script
run_and_halt_time 0 30
#working area <target#> <address> <size> <backup|nobackup>
working_area 0 0x00000000 0x1000 backup

1
src/target/target/xba_revA3.cfg
View File

@ -12,7 +12,6 @@ jtag_device 7 0x1 0x7f 0x7e
target xscale big 0 ixp42x
target_script 0 reset event/xba_revA3.script
run_and_halt_time 0 100
flash bank cfi 0x50000000 0x400000 2 2 0
working_area 0 0x20010000 0x8060 nobackup

3
testing/examples/AT91R40008Test/prj/at91r40008_turtle.cfg
View File

@ -28,8 +28,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi
target_script 0 reset .\prj\at91r40008_reset.script

3
testing/examples/LPC2148Test/prj/lpc2148_jtagkey.cfg
View File

@ -26,8 +26,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi-s_r4
working_area 0 0x40000000 0x4000 nobackup

3
testing/examples/LPC2294Test/prj/lpc2294_jtagkey.cfg
View File

@ -26,8 +26,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi-s_r4
working_area 0 0x40000000 0x4000 nobackup

3
testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg
View File

@ -29,8 +29,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi
target_script 0 reset .\prj\sam7s256_reset.script

3
testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg
View File

@ -29,8 +29,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi
target_script 0 reset .\prj\sam7x256_reset.script

3
testing/examples/STR710JtagSpeed/prj/str710_jtagkey.cfg
View File

@ -26,8 +26,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi
working_area 0 0x2000C000 0x4000 nobackup

3
testing/examples/STR710Test/prj/str710_jtagkey.cfg
View File

@ -26,8 +26,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
target arm7tdmi little 0 arm7tdmi
target_script 0 gdb_program_config .\prj\str710_program.script

3
testing/examples/STR912Test/prj/str912_jtagkey.cfg
View File

@ -31,8 +31,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm966e little reset_halt 1 arm966e
run_and_halt_time 0 30
target arm966e little 1 arm966e
target_script 0 gdb_program_config .\prj\str912_program.script