From e284aa066e8ce11bc3a2d1f5fcdf5fd6c1f8d2f4 Mon Sep 17 00:00:00 2001 From: Mark Zhuang Date: Mon, 3 Apr 2023 23:40:14 +0800 Subject: [PATCH] target/riscv: set some csr size to 32 Change-Id: I4703b7b8ad492b14dc8d188ebb8f645c568fd515 Signed-off-by: Mark Zhuang --- src/target/riscv/riscv.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 7d2f976e0..626b287be 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -5352,18 +5352,27 @@ int riscv_init_registers(struct target *target) } switch (csr_number) { + case CSR_DCSR: + case CSR_MVENDORID: + case CSR_MCOUNTINHIBIT: + r->size = 32; + break; + case CSR_FCSR: + r->size = 32; + /* fall through */ case CSR_FFLAGS: case CSR_FRM: - case CSR_FCSR: r->exist = riscv_supports_extension(target, 'F'); r->group = "float"; r->feature = &feature_fpu; break; + case CSR_SCOUNTEREN: + r->size = 32; + /* fall through */ case CSR_SSTATUS: case CSR_STVEC: case CSR_SIP: case CSR_SIE: - case CSR_SCOUNTEREN: case CSR_SSCRATCH: case CSR_SEPC: case CSR_SCAUSE: @@ -5458,6 +5467,7 @@ int riscv_init_registers(struct target *target) r->exist = (info->vlenb > 0); break; case CSR_MCOUNTEREN: + r->size = 32; r->exist = riscv_supports_extension(target, 'U'); break;