- jtag_khz/speed are now single parameter only. These are used
from pre/post_reset event scripts. Adding the second parameter was a mistake seen in retrospect. this gives precise control in post_reset for *when* the post reset speed is set. The pre_reset event was added *after* the second parameter to jtag_khz/speed - the target implementations no longer gets involved in the reset mode scheme. Either they reset a target into a halted mode or not. target_process_reset() detects if the reset halt failed or not. - tcl target event names are now target_N_name. Mainly internal at this early stage, but best to get the naming right now. - added hardcoded reset modes from gdb_server.c. I don't know precisely what these defaults should be or if it should be made configurable. Perhaps some hardcoded defaults will do for now and it can be made configurable later. - bugfix in cortex_m3.c for reset_run_and_xxx? - issue syntax error upon obsolete argument in target command instead of printing message that will surely drown in the log git-svn-id: svn://svn.berlios.de/openocd/trunk@849 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe
parent
c1ee650a9a
commit
dfbb9f3e89
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@ -346,6 +346,7 @@ int run_command(command_context_t *context, command_t *c, char *words[], int num
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if (!((context->mode == COMMAND_CONFIG) || (c->mode == COMMAND_ANY) || (c->mode == context->mode) ))
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{
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/* Config commands can not run after the config stage */
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LOG_ERROR("Illegal mode for command");
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return ERROR_FAIL;
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}
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@ -93,20 +93,6 @@ proc help {args} {
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add_help_text help "Tcl implementation of help command"
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#a bit of backwards compatibility
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proc ocd_throw {cmd} {
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set ocd_output ""
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eval $cmd
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return $ocd_output
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}
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#a bit of backwards compatibility
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proc openocd {cmd} {
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set ocd_output ""
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eval $cmd
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return $ocd_output
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}
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# If a fn is unknown to Tcl, we try to execute it as an OpenOCD command
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#
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# We also support two level commands. "flash banks" is translated to
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@ -130,10 +116,13 @@ proc target_script {target_num eventname scriptname} {
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}
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# This is the script we invoke
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proc "target_[set eventname]_[set target_num]" {} "script $scriptname"
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proc "target_[set target_num]_[set eventname]" {} "script $scriptname"
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}
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add_help_text target_script "<target#> <event=reset/pre_reset/post_halt/pre_resume/gdb_program_config> <script_file>"
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# Try flipping / and \ to find file if the filename does not
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# match the precise spelling
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proc find {filename} {
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@ -162,5 +151,4 @@ proc script {filename} {
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add_help_text script "<filename> - filename of OpenOCD script (tcl) to run"
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add_help_text target_script "<target#> <event=reset/pre_reset/post_halt/pre_resume/gdb_program_config> <script_file>"
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@ -140,7 +140,7 @@ int jtag_ntrst_delay = 0; /* default to no nTRST delay */
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jtag_event_callback_t *jtag_event_callbacks;
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/* speed in kHz*/
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static int speed1 = 0, speed2 = 0;
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static int speed_khz = 0;
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/* flag if the kHz speed was defined */
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static int hasKHz = 0;
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@ -240,7 +240,7 @@ jtag_interface_t *jtag = NULL;
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/* configuration */
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jtag_interface_t *jtag_interface = NULL;
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int jtag_speed = 0;
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int jtag_speed_post_reset = 0;
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/* forward declarations */
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@ -1467,7 +1467,7 @@ int jtag_register_commands(struct command_context_s *cmd_ctx)
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register_command(cmd_ctx, NULL, "interface", handle_interface_command,
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COMMAND_CONFIG, NULL);
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register_command(cmd_ctx, NULL, "jtag_speed", handle_jtag_speed_command,
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COMMAND_ANY, "set jtag speed (if supported) <reset speed> [<post reset speed, default value is reset speed>]");
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COMMAND_ANY, "set jtag speed (if supported)");
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register_command(cmd_ctx, NULL, "jtag_khz", handle_jtag_khz_command,
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COMMAND_ANY, "same as jtag_speed, except it takes maximum khz as arguments. 0 KHz = RTCK.");
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register_command(cmd_ctx, NULL, "jtag_device", handle_jtag_device_command,
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@ -1510,9 +1510,7 @@ int jtag_interface_init(struct command_context_s *cmd_ctx)
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}
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if(hasKHz)
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{
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/*stay on "reset speed"*/
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jtag_interface->khz(speed1, &jtag_speed);
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jtag_interface->khz(speed2, &jtag_speed_post_reset);
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jtag_interface->khz(speed_khz, &jtag_speed);
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hasKHz = 0;
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}
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@ -1849,79 +1847,67 @@ int handle_jtag_ntrst_delay_command(struct command_context_s *cmd_ctx, char *cmd
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int handle_jtag_speed_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
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{
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int cur_speed = 0;
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int retval=ERROR_OK;
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if (argc != 0)
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if (argc == 1)
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{
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if ((argc<1) || (argc>2))
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return ERROR_COMMAND_SYNTAX_ERROR;
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LOG_DEBUG("handle jtag speed");
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if (argc >= 1)
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cur_speed = jtag_speed = jtag_speed_post_reset = strtoul(args[0], NULL, 0);
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if (argc == 2)
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cur_speed = jtag_speed_post_reset = strtoul(args[1], NULL, 0);
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int cur_speed = 0;
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cur_speed = jtag_speed = strtoul(args[0], NULL, 0);
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/* this command can be called during CONFIG,
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* in which case jtag isn't initialized */
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if (jtag)
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{
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jtag->speed_div(jtag_speed, &speed1);
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jtag->speed_div(jtag_speed_post_reset, &speed2);
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jtag->speed(cur_speed);
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retval=jtag->speed(cur_speed);
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}
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}
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command_print(cmd_ctx, "jtag_speed: %d, %d", jtag_speed, jtag_speed_post_reset);
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} else if (argc == 0)
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{
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} else
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{
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retval=ERROR_COMMAND_SYNTAX_ERROR;
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}
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command_print(cmd_ctx, "jtag_speed: %d", jtag_speed);
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return ERROR_OK;
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return retval;
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}
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int handle_jtag_khz_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
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{
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int retval=ERROR_OK;
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LOG_DEBUG("handle jtag khz");
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if (argc>2)
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return ERROR_COMMAND_SYNTAX_ERROR;
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if(argc != 0)
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if(argc == 1)
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{
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if (argc >= 1)
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speed1 = speed2 = strtoul(args[0], NULL, 0);
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if (argc == 2)
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speed2 = strtoul(args[1], NULL, 0);
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speed_khz = strtoul(args[0], NULL, 0);
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if (jtag != NULL)
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{
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int cur_speed = 0;
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LOG_DEBUG("have interface set up");
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int speed_div1, speed_div2;
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if (jtag->khz(speed1, &speed_div1)!=ERROR_OK)
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int speed_div1;
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if ((retval=jtag->khz(speed_khz, &speed_div1))!=ERROR_OK)
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{
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speed1 = speed2 = 0;
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return ERROR_OK;
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}
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if (jtag->khz(speed2, &speed_div2)!=ERROR_OK)
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{
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speed1 = speed2 = 0;
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return ERROR_OK;
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speed_khz = 0;
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return retval;
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}
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if (argc >= 1)
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cur_speed = jtag_speed = jtag_speed_post_reset = speed_div1;
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if (argc == 2)
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cur_speed = jtag_speed_post_reset = speed_div2;
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cur_speed = jtag_speed = speed_div1;
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jtag->speed(cur_speed);
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retval=jtag->speed(cur_speed);
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} else
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{
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hasKHz = 1;
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}
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} else if (argc==0)
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{
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} else
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{
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retval=ERROR_COMMAND_SYNTAX_ERROR;
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}
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command_print(cmd_ctx, "jtag_khz: %d, %d", speed1, speed2);
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return ERROR_OK;
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command_print(cmd_ctx, "jtag_khz: %d", speed_khz);
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return retval;
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}
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int handle_endstate_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
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@ -1807,7 +1807,8 @@ int gdb_detach(connection_t *connection, target_t *target)
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break;
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case GDB_DETACH_RESET:
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target_process_reset(connection->cmd_ctx);
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/* FIX?? make this configurable?? */
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target_process_reset(connection->cmd_ctx, RESET_HALT);
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break;
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case GDB_DETACH_HALT:
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@ -1949,7 +1950,8 @@ int gdb_input_inner(connection_t *connection)
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break;
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case 'R':
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/* handle extended restart packet */
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target_process_reset(connection->cmd_ctx);
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/* fix?? make this configurable? */
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target_process_reset(connection->cmd_ctx, RESET_HALT);
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break;
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default:
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/* ignore unkown packets */
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@ -28,7 +28,7 @@ nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script
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event/omap5912_reset.script interface/jtagkey-tiny.cfg interface/jtagkey.cfg interface/str9-comstick.cfg \
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target/epc9301.cfg target/ipx42x.cfg target/lpc2129.cfg target/netx500.cfg \
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target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg \
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target/str730.cfg target/stm32stick.cfg event/str912_reset.script event/str710_program.script \
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target/str730.cfg target/stm32stick.cfg event/str710_program.script \
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target/lm3s811.cfg interface/luminary.cfg interface/luminary-libftdi.cfg interface/luminary-lm3s811.cfg \
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interface/stm32-stick.cfg interface/calao-usb-a9260-c01.cfg interface/calao-usb-a9260-c02.cfg \
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interface/calao-usb-a9260.cfg target/at91sam9260minimal.cfg event/lpc2148_reset.script \
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@ -704,7 +704,7 @@ int arm7_9_poll(target_t *target)
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int check_pc=0;
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if (target->state == TARGET_RESET)
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{
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if ((target->reset_mode == RESET_HALT) || (target->reset_mode == RESET_INIT))
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if (target->reset_halt)
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{
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if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
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{
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@ -772,7 +772,7 @@ int arm7_9_assert_reset(target_t *target)
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return ERROR_FAIL;
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}
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if ((target->reset_mode == RESET_HALT) || (target->reset_mode == RESET_INIT))
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if (target->reset_halt)
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{
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/*
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* Some targets do not support communication while SRST is asserted. We need to
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@ -691,7 +691,7 @@ int cortex_m3_assert_reset(target_t *target)
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ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
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if (target->reset_mode == RESET_RUN)
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if (!target->reset_halt)
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{
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/* Set/Clear C_MASKINTS in a separate operation */
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if (cortex_m3->dcb_dhcsr & C_MASKINTS)
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@ -5,13 +5,19 @@
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#
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# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
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#
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mww 0xfffffd44 0x00008000 # disable watchdog
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mww 0xfffffd08 0xa5000001 # enable user reset
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mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
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# disable watchdog
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mww 0xfffffd44 0x00008000
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# enable user reset
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mww 0xfffffd08 0xa5000001
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# CKGR_MOR : enable the main oscillator
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mww 0xfffffc20 0x00000601
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sleep 10
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mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
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# CKGR_PLLR: 96.1097 MHz
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mww 0xfffffc2c 0x00481c0e
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sleep 10
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mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
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# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
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mww 0xfffffc30 0x00000007
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sleep 10
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mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
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# MC_FMR: flash mode (FWS=1,FMCN=60)
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mww 0xffffff60 0x003c0100
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sleep 100
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@ -5,13 +5,19 @@
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#
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# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
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#
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mww 0xfffffd44 0x00008000 # disable watchdog
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mww 0xfffffd08 0xa5000001 # enable user reset
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mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
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# disable watchdog
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mww 0xfffffd44 0x00008000
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# enable user reset
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mww 0xfffffd08 0xa5000001
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# CKGR_MOR : enable the main oscillator
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mww 0xfffffc20 0x00000601
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sleep 10
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mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
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# CKGR_PLLR: 96.1097 MHz
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mww 0xfffffc2c 0x00481c0e
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sleep 10
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mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
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# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
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mww 0xfffffc30 0x00000007
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sleep 10
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mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
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# MC_FMR: flash mode (FWS=1,FMCN=60)
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mww 0xffffff60 0x003c0100
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sleep 100
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|
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@ -1,5 +0,0 @@
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# -- Enable 96K RAM */
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mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled
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str9x flash_config 0 4 2 0 0x80000
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flash protect 0 0 7 off
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@ -284,14 +284,12 @@ int target_resume(struct target_s *target, int current, u32 address, int handle_
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return retval;
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}
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int target_process_reset(struct command_context_s *cmd_ctx)
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int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode)
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{
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int retval = ERROR_OK;
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target_t *target;
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struct timeval timeout, now;
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jtag->speed(jtag_speed);
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target = targets;
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while (target)
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{
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|
@ -318,30 +316,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
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return retval;
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keep_alive(); /* we might be running on a very slow JTAG clk */
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|
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/* prepare reset_halt where necessary */
|
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target = targets;
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while (target)
|
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{
|
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
|
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{
|
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switch (target->reset_mode)
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{
|
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case RESET_HALT:
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command_print(cmd_ctx, "nSRST pulls nTRST, falling back to \"reset run_and_halt\"");
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target->reset_mode = RESET_RUN_AND_HALT;
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break;
|
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case RESET_INIT:
|
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command_print(cmd_ctx, "nSRST pulls nTRST, falling back to \"reset run_and_init\"");
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target->reset_mode = RESET_RUN_AND_INIT;
|
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break;
|
||||
default:
|
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break;
|
||||
}
|
||||
}
|
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target = target->next;
|
||||
}
|
||||
|
||||
|
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target = targets;
|
||||
while (target)
|
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{
|
||||
|
|
@ -349,6 +324,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
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* have to drop working areas
|
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*/
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target_free_all_working_areas_restore(target, 0);
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target->reset_halt=((reset_mode==RESET_HALT)||(reset_mode==RESET_INIT));
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target->type->assert_reset(target);
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target = target->next;
|
||||
}
|
||||
|
|
@ -362,7 +338,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
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target = targets;
|
||||
while (target)
|
||||
{
|
||||
switch (target->reset_mode)
|
||||
switch (reset_mode)
|
||||
{
|
||||
case RESET_RUN:
|
||||
/* nothing to do if target just wants to be run */
|
||||
|
|
@ -377,10 +353,12 @@ int target_process_reset(struct command_context_s *cmd_ctx)
|
|||
target_register_event_callback(target_init_handler, cmd_ctx);
|
||||
break;
|
||||
case RESET_HALT:
|
||||
target_halt(target);
|
||||
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
|
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target_halt(target);
|
||||
break;
|
||||
case RESET_INIT:
|
||||
target_halt(target);
|
||||
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
|
||||
target_halt(target);
|
||||
target_register_event_callback(target_init_handler, cmd_ctx);
|
||||
break;
|
||||
default:
|
||||
|
|
@ -399,6 +377,14 @@ int target_process_reset(struct command_context_s *cmd_ctx)
|
|||
while (target)
|
||||
{
|
||||
target->type->deassert_reset(target);
|
||||
/* We can fail to bring the target into the halted state */
|
||||
target_poll(target);
|
||||
if (target->reset_halt&&((target->state != TARGET_HALTED)))
|
||||
{
|
||||
LOG_WARNING("Failed to reset target into halted mode - issuing halt");
|
||||
target->type->halt(target);
|
||||
}
|
||||
|
||||
target = target->next;
|
||||
}
|
||||
|
||||
|
|
@ -415,12 +401,6 @@ int target_process_reset(struct command_context_s *cmd_ctx)
|
|||
return retval;
|
||||
}
|
||||
|
||||
/* post reset scripts can be quite long, increase speed now. If post
|
||||
* reset scripts needs a different speed, they can set the speed to
|
||||
* whatever they need.
|
||||
*/
|
||||
jtag->speed(jtag_speed_post_reset);
|
||||
|
||||
LOG_DEBUG("Waiting for halted stated as approperiate");
|
||||
|
||||
/* Wait for reset to complete, maximum 5 seconds. */
|
||||
|
|
@ -437,10 +417,10 @@ int target_process_reset(struct command_context_s *cmd_ctx)
|
|||
{
|
||||
LOG_DEBUG("Polling target");
|
||||
target_poll(target);
|
||||
if ((target->reset_mode == RESET_RUN_AND_INIT) ||
|
||||
(target->reset_mode == RESET_RUN_AND_HALT) ||
|
||||
(target->reset_mode == RESET_HALT) ||
|
||||
(target->reset_mode == RESET_INIT))
|
||||
if ((reset_mode == RESET_RUN_AND_INIT) ||
|
||||
(reset_mode == RESET_RUN_AND_HALT) ||
|
||||
(reset_mode == RESET_HALT) ||
|
||||
(reset_mode == RESET_INIT))
|
||||
{
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
|
|
@ -477,7 +457,6 @@ int target_process_reset(struct command_context_s *cmd_ctx)
|
|||
}
|
||||
target_unregister_event_callback(target_init_handler, cmd_ctx);
|
||||
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
|
@ -1420,23 +1399,28 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
|
|||
|
||||
if (strcmp(args[2], "reset_halt") == 0)
|
||||
{
|
||||
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
|
||||
LOG_WARNING("reset_mode argument is obsolete.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
else if (strcmp(args[2], "reset_run") == 0)
|
||||
{
|
||||
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
|
||||
LOG_WARNING("reset_mode argument is obsolete.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
else if (strcmp(args[2], "reset_init") == 0)
|
||||
{
|
||||
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
|
||||
LOG_WARNING("reset_mode argument is obsolete.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
else if (strcmp(args[2], "run_and_halt") == 0)
|
||||
{
|
||||
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
|
||||
LOG_WARNING("reset_mode argument is obsolete.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
else if (strcmp(args[2], "run_and_init") == 0)
|
||||
{
|
||||
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
|
||||
LOG_WARNING("reset_mode argument is obsolete.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -1492,9 +1476,9 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
|
|||
|
||||
int target_invoke_script(struct command_context_s *cmd_ctx, target_t *target, char *name)
|
||||
{
|
||||
return command_run_linef(cmd_ctx, " if {[catch {info body target_%s_%d} t]==0} {target_%s_%d}",
|
||||
name, get_num_by_target(target),
|
||||
name, get_num_by_target(target));
|
||||
return command_run_linef(cmd_ctx, " if {[catch {info body target_%d_%s} t]==0} {target_%d_%s}",
|
||||
get_num_by_target(target), name,
|
||||
get_num_by_target(target), name);
|
||||
}
|
||||
|
||||
int handle_run_and_halt_time_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
|
|
@ -1848,11 +1832,8 @@ int handle_reset_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
|
|||
}
|
||||
}
|
||||
|
||||
/* temporarily modify mode of current reset target */
|
||||
target->reset_mode = reset_mode;
|
||||
|
||||
/* reset *all* targets */
|
||||
target_process_reset(cmd_ctx);
|
||||
target_process_reset(cmd_ctx, reset_mode);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -198,7 +198,7 @@ typedef struct target_type_s
|
|||
typedef struct target_s
|
||||
{
|
||||
target_type_t *type; /* target type definition (name, access functions) */
|
||||
enum target_reset_mode reset_mode; /* what to do after a reset */
|
||||
int reset_halt; /* attempt resetting the CPU into the halted mode? */
|
||||
int run_and_halt_time; /* how long the target should run after a run_and_halt reset */
|
||||
u32 working_area; /* working area (initialized RAM). Evaluated
|
||||
upon first allocation from virtual/physical address. */
|
||||
|
|
@ -252,7 +252,7 @@ extern int target_register_user_commands(struct command_context_s *cmd_ctx);
|
|||
extern int target_init(struct command_context_s *cmd_ctx);
|
||||
extern int target_examine(struct command_context_s *cmd_ctx);
|
||||
extern int handle_target(void *priv);
|
||||
extern int target_process_reset(struct command_context_s *cmd_ctx);
|
||||
extern int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode);
|
||||
|
||||
extern int target_register_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv);
|
||||
extern int target_unregister_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,11 @@
|
|||
#start slow, speed up after reset
|
||||
jtag_khz 10, 6000
|
||||
jtag_khz 10
|
||||
proc target_0_pre_reset {} {
|
||||
jtag_khz 10
|
||||
}
|
||||
proc target_0_post_reset {} {
|
||||
jtag_khz 6000
|
||||
}
|
||||
|
||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
|
@ -15,6 +21,7 @@ run_and_halt_time 0 30
|
|||
|
||||
target_script 0 gdb_program_config event/str710_program.script
|
||||
|
||||
|
||||
working_area 0 0x2000C000 0x4000 nobackup
|
||||
|
||||
#flash bank str7x <base> <size> 0 0 <target#> <variant>
|
||||
|
|
|
|||
|
|
@ -1,6 +1,14 @@
|
|||
#STR730 CPU
|
||||
|
||||
jtag_khz 10, 3000
|
||||
|
||||
jtag_khz 3000
|
||||
proc target_0_pre_reset {} {
|
||||
jtag_khz 10
|
||||
}
|
||||
proc target_0_post_reset {} {
|
||||
jtag_khz 3000
|
||||
}
|
||||
|
||||
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
#reset_config trst_and_srst srst_pulls_trst
|
||||
|
|
|
|||
|
|
@ -1,7 +1,13 @@
|
|||
#STR750 CPU
|
||||
|
||||
# jtag speed
|
||||
jtag_khz 10, 3000
|
||||
jtag_khz 10
|
||||
proc target_0_pre_reset {} {
|
||||
jtag_khz 10
|
||||
}
|
||||
proc target_0_post_reset {} {
|
||||
jtag_khz 3000
|
||||
}
|
||||
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
#reset_config trst_and_srst srst_pulls_trst
|
||||
|
|
@ -15,9 +21,6 @@ jtag_device 4 0x1 0xf 0xe
|
|||
jtag_nsrst_delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
#target configuration
|
||||
daemon_startup reset
|
||||
|
||||
#target <type> <startup mode>
|
||||
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
|
||||
target arm7tdmi little 0 arm7tdmi
|
||||
|
|
|
|||
|
|
@ -1,7 +1,26 @@
|
|||
# script for str9
|
||||
|
||||
# jtag speed
|
||||
jtag_khz 16 3000
|
||||
# jtag speed. We need to stick to 16kHz until we've finished reset.
|
||||
|
||||
jtag_khz 16
|
||||
proc target_0_pre_reset {} {
|
||||
jtag_khz 16
|
||||
}
|
||||
|
||||
proc target_0_post_reset {} {
|
||||
# We can increase speed now that we know the target is halted.
|
||||
jtag_khz 3000
|
||||
|
||||
# -- Enable 96K RAM
|
||||
# PFQBC enabled / DTCM & AHB wait-states disabled
|
||||
mww 0x5C002034 0x0191
|
||||
|
||||
str9x flash_config 0 4 2 0 0x80000
|
||||
flash protect 0 0 7 off
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
jtag_nsrst_delay 100
|
||||
jtag_ntrst_delay 100
|
||||
|
|
@ -20,7 +39,6 @@ jtag_device 5 0x1 0x1 0x1e
|
|||
target arm966e little 1 arm966e
|
||||
run_and_halt_time 0 30
|
||||
|
||||
target_script 0 reset event/str912_reset.script
|
||||
|
||||
working_area 0 0x50000000 16384 nobackup
|
||||
|
||||
|
|
|
|||
|
|
@ -17,9 +17,9 @@ jtag_device 4 0x1 0xf 0xe
|
|||
target arm7tdmi little 0 arm7tdmi-s_r4
|
||||
|
||||
# at CPU CLK <32kHz this must be disabled
|
||||
arm7 fast_memory_access enable
|
||||
arm7_9 fast_memory_access enable
|
||||
arm7_9 dcc_downloads enable
|
||||
|
||||
arm7_9 sw_bkpts enable
|
||||
|
||||
flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
|
||||
target_script 0 reset event/zy1000_reset.script
|
||||
|
|
|
|||
|
|
@ -1699,7 +1699,7 @@ int xscale_deassert_reset(target_t *target)
|
|||
xscale_write_dcsr(target, 0, 1);
|
||||
target->state = TARGET_RUNNING;
|
||||
|
||||
if ((target->reset_mode != RESET_HALT) && (target->reset_mode != RESET_INIT))
|
||||
if (!target->reset_halt)
|
||||
{
|
||||
jtag_add_sleep(10000);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue