- added more TARGET_HALTED checks for the read/write_memory handlers
- added new commands arm11 mrc and arm11 mcr to generate these instructions during debug Thanks Michael Bruck git-svn-id: svn://svn.berlios.de/openocd/trunk@477 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak
parent
21bc69bc37
commit
ddd987502a
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@ -5,7 +5,6 @@ else
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OOCD_TRACE_FILES =
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endif
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CFLAGS += -Wall
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INCLUDES = -I$(top_srcdir)/src/gdb -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag -I$(top_srcdir)/src/xsvf $(all_includes)
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METASOURCES = AUTO
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AM_CPPFLAGS = -DPKGLIBDIR=\"$(pkglibdir)\" @CPPFLAGS@
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@ -511,8 +511,6 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
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}
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arm11_run_instr_data_finish(arm11);
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arm11_dump_reg_changes(arm11);
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@ -1044,7 +1042,7 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
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if (target->state != TARGET_HALTED)
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{
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ERROR("Target not halted");
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WARNING("target was not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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@ -1083,6 +1081,12 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
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FNC_INFO;
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if (target->state != TARGET_HALTED)
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{
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WARNING("target was not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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DEBUG("ADDR %08x SIZE %08x COUNT %08x", address, size, count);
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arm11_common_t * arm11 = target->arch_info;
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@ -1152,6 +1156,12 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
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{
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FNC_INFO;
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if (target->state != TARGET_HALTED)
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{
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WARNING("target was not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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DEBUG("ADDR %08x SIZE %08x COUNT %08x", address, size, count);
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arm11_common_t * arm11 = target->arch_info;
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@ -1252,6 +1262,12 @@ int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8
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{
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FNC_INFO;
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if (target->state != TARGET_HALTED)
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{
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WARNING("target was not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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return arm11_write_memory(target, address, 4, count, buffer);
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}
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@ -1462,6 +1478,7 @@ int arm11_get_reg(reg_t *reg)
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if (target->state != TARGET_HALTED)
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{
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WARNING("target was not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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@ -1626,6 +1643,129 @@ int arm11_handle_vcr(struct command_context_s *cmd_ctx, char *cmd, char **args,
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return ERROR_OK;
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}
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const u32 arm11_coproc_instruction_limits[] =
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{
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15, /* coprocessor */
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7, /* opcode 1 */
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15, /* CRn */
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15, /* CRm */
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7, /* opcode 2 */
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0xFFFFFFFF, /* value */
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};
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const char arm11_mrc_syntax[] = "Syntax: mrc <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2>. All parameters are numbers only.";
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const char arm11_mcr_syntax[] = "Syntax: mcr <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2> <32bit value to write>. All parameters are numbers only.";
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arm11_common_t * arm11_find_target(const char * arg)
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{
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size_t jtag_target = strtoul(arg, NULL, 0);
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{target_t * t;
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for (t = targets; t; t = t->next)
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{
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if (t->type != &arm11_target)
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continue;
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arm11_common_t * arm11 = t->arch_info;
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if (arm11->jtag_info.chain_pos != jtag_target)
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continue;
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return arm11;
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}}
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return 0;
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}
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int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, bool read)
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{
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if (argc != (read ? 6 : 7))
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{
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ERROR("Invalid number of arguments. %s", read ? arm11_mrc_syntax : arm11_mcr_syntax);
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return -1;
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}
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arm11_common_t * arm11 = arm11_find_target(args[0]);
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if (!arm11)
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{
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ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device. %s",
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read ? arm11_mrc_syntax : arm11_mcr_syntax);
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return -1;
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}
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if (arm11->target->state != TARGET_HALTED)
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{
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WARNING("target was not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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u32 values[6];
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{size_t i;
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for (i = 0; i < (read ? 5 : 6); i++)
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{
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values[i] = strtoul(args[i + 1], NULL, 0);
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if (values[i] > arm11_coproc_instruction_limits[i])
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{
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ERROR("Parameter %d out of bounds (%d max). %s",
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i + 2, arm11_coproc_instruction_limits[i],
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read ? arm11_mrc_syntax : arm11_mcr_syntax);
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return -1;
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}
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}}
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u32 instr = 0xEE000010 |
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(values[0] << 8) |
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(values[1] << 21) |
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(values[2] << 16) |
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(values[3] << 0) |
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(values[4] << 5);
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if (read)
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instr |= 0x00100000;
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arm11_run_instr_data_prepare(arm11);
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if (read)
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{
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u32 result;
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arm11_run_instr_data_from_core_via_r0(arm11, instr, &result);
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INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08x (%d)",
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values[0], values[1], values[2], values[3], values[4], result, result);
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}
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else
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{
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arm11_run_instr_data_to_core_via_r0(arm11, instr, values[5]);
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INFO("MRC p%d, %d, R0 (#0x%08x), c%d, c%d, %d",
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values[0], values[1],
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values[5],
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values[2], values[3], values[4]);
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}
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arm11_run_instr_data_finish(arm11);
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return ERROR_OK;
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}
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int arm11_handle_mrc(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
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{
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return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, true);
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}
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int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
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{
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return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false);
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}
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int arm11_register_commands(struct command_context_s *cmd_ctx)
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{
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@ -1647,6 +1787,12 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
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RC_FINAL( "vcr", "Control (Interrupt) Vector Catch Register",
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arm11_handle_vcr)
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RC_FINAL( "mrc", "Read Coprocessor register",
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arm11_handle_mrc)
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RC_FINAL( "mcr", "Write Coprocessor register",
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arm11_handle_mcr)
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)
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return ERROR_OK;
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