first jtag_check_value_mask usage. tested by using "arm7_9 fast_memory_access enable" & "mdw 0 0x10"
git-svn-id: svn://svn.berlios.de/openocd/trunk@1664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -1417,6 +1417,18 @@ void jtag_set_check_value(scan_field_t *field, u8 *value, u8 *mask, struct inval
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void jtag_check_value_mask(scan_field_t *field, u8 *value, u8 *mask)
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{
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if (field->in_value==NULL)
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{
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LOG_ERROR("remember to fill in in_value for jtag_check_value_mask() to work!");
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return;
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}
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if (value==NULL)
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{
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/* no checking to do */
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return;
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}
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jtag_execute_queue_noclear();
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int retval=jtag_check_value_inner(field->in_value, field, value, mask);
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@ -251,39 +251,26 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
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fields[0].tap = ice_reg->jtag_info->tap;
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fields[0].num_bits = 32;
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fields[0].out_value = reg->value;
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fields[0].in_value = NULL;
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fields[0].in_handler = NULL;
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fields[1].tap = ice_reg->jtag_info->tap;
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fields[1].num_bits = 5;
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fields[1].out_value = field1_out;
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buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
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fields[1].in_value = NULL;
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fields[1].in_handler = NULL;
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fields[2].tap = ice_reg->jtag_info->tap;
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fields[2].num_bits = 1;
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fields[2].out_value = field2_out;
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buf_set_u32(fields[2].out_value, 0, 1, 0);
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fields[2].in_value = NULL;
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fields[2].in_handler = NULL;
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jtag_add_dr_scan(3, fields, TAP_INVALID);
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fields[0].in_value = reg->value;
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jtag_set_check_value(fields+0, check_value, check_mask, NULL);
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/* when reading the DCC data register, leaving the address field set to
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* EICE_COMMS_DATA would read the register twice
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@ -293,6 +280,8 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
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jtag_add_dr_scan(3, fields, TAP_INVALID);
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jtag_check_value_mask(fields+0, check_value, check_mask);
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return ERROR_OK;
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}
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