cortex_m: use the new enum ARMV7M_REGSEL_name
Register xPSR is indexed directly with its value 16 or with the incorrect enum ARMV7M_xPSR. Replace them with the new enum ARMV7M_REGSEL_xPSR. Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5873 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
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@ -153,7 +153,7 @@ static int sromalgo_prepare(struct target *target)
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/* Restore THUMB bit in xPSR register */
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/* Restore THUMB bit in xPSR register */
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const struct armv7m_common *cm = target_to_armv7m(target);
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const struct armv7m_common *cm = target_to_armv7m(target);
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hr = cm->store_core_reg_u32(target, ARMV7M_xPSR, 0x01000000);
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hr = cm->store_core_reg_u32(target, ARMV7M_REGSEL_xPSR, 0x01000000);
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if (hr != ERROR_OK)
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if (hr != ERROR_OK)
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return hr;
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return hr;
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@ -530,7 +530,7 @@ static int cortex_m_debug_entry(struct target *target)
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/* For IT instructions xPSR must be reloaded on resume and clear on debug exec */
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/* For IT instructions xPSR must be reloaded on resume and clear on debug exec */
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if (xPSR & 0xf00) {
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if (xPSR & 0xf00) {
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r->dirty = r->valid;
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r->dirty = r->valid;
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cortex_m_store_core_reg_u32(target, 16, xPSR & ~0xff);
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cortex_m_store_core_reg_u32(target, ARMV7M_REGSEL_xPSR, xPSR & ~0xff);
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}
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}
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/* Are we in an exception handler */
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/* Are we in an exception handler */
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