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riscv-openocd
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During polling, check which trigger has `hit` set. 

Change-Id: If226810ed930e5d7a2bab277a9f5b0f3ded86ffa
This commit is contained in:
Tim Newsome 2022-04-27 13:00:47 -07:00
parent 68e41dc1c8
commit d67a5bf064
1 changed files with 4 additions and 0 deletions
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4
src/target/riscv/riscv.c
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@ -1252,11 +1252,15 @@ int riscv_flush_registers(struct target *target)
/* Convert: RISC-V hart's halt reason --> OpenOCD's generic debug reason */
int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
{
RISCV_INFO(r);
r->trigger_hit = -1;
switch (halt_reason) {
case RISCV_HALT_BREAKPOINT:
target->debug_reason = DBG_REASON_BREAKPOINT;
break;
case RISCV_HALT_TRIGGER:
if (riscv_hit_trigger_hit_bit(target, &r->trigger_hit) != ERROR_OK)
return ERROR_FAIL;
target->debug_reason = DBG_REASON_WATCHPOINT;
break;
case RISCV_HALT_INTERRUPT: