ETM: start support for ETMv2+
ARM11 and newer cores include updated ETM modules. Recognize their version codes and some key config differences. Sanity checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1). This still handles only scan chain 6, with at most 128 registers. Newer cores (mostly, Cortex) will need to use the DAP instead. Note that the newer ETM modules don't quite fit the quirky config model of the older ones ... having more port widths is easy, but the modes aren't the same. That still needs to change. Fix a curious bug ... how did the register cache NOT get saved?? Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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David Brownell
parent
26849ad60d
commit
d47764ff71
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@ -5295,11 +5295,23 @@ Several of the parameters must reflect the trace port capabilities,
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which are a function of silicon capabilties (exposed later
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using @command{etm info}) and of what hardware is connected to
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that port (such as an external pod, or ETB).
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The @var{width} must be either 4, 8, or 16.
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The @var{mode} must be @option{normal}, @option{multiplexted},
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or @option{demultiplexted}.
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The @var{width} must be either 4, 8, or 16,
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except with ETMv3.0 and newer modules which may also
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support 1, 2, 24, 32, 48, and 64 bit widths.
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(With those versions, @command{etm info} also shows whether
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the selected port width and mode are supported.)
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The @var{mode} must be @option{normal}, @option{multiplexed},
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or @option{demultiplexed}.
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The @var{clocking} must be @option{half} or @option{full}.
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@quotation Warning
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With ETMv3.0 and newer, the bits set with the @var{mode} and
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@var{clocking} parameters both control the mode.
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This modified mode does not map to the values supported by
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previous ETM modules, so this syntax is subject to change.
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@end quotation
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@quotation Note
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You can see the ETM registers using the @command{reg} command.
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Not all possible registers are present in every ETM.
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132
src/target/etm.c
132
src/target/etm.c
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@ -72,11 +72,15 @@ struct etm_reg_info {
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* provide definitions for some previously-unused bits.
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*/
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/* basic registers that are always there given the right ETM version */
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/* core registers used to version/configure the ETM */
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static const struct etm_reg_info etm_core[] = {
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/* NOTE: we "know" ETM_CONFIG is listed first */
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/* NOTE: we "know" the order here ... */
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{ ETM_CONFIG, 32, RO, 0x10, "ETM_config", },
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{ ETM_ID, 32, RO, 0x20, "ETM_id", },
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};
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/* basic registers that are always there given the right ETM version */
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static const struct etm_reg_info etm_basic[] = {
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/* ETM Trace Registers */
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{ ETM_CTRL, 32, RW, 0x10, "ETM_ctrl", },
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{ ETM_TRIG_EVENT, 17, WO, 0x10, "ETM_trig_event", },
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@ -99,7 +103,10 @@ static const struct etm_reg_info etm_core[] = {
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/* REVISIT exclude VIEWDATA_CTRL2 when it's not there */
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{ 0x78, 12, WO, 0x20, "ETM_sync_freq", },
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{ 0x79, 32, RO, 0x20, "ETM_id", },
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{ 0x7a, 22, RO, 0x31, "ETM_config_code_ext", },
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{ 0x7b, 32, WO, 0x31, "ETM_ext_input_select", },
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{ 0x7c, 32, WO, 0x34, "ETM_trace_start_stop", },
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{ 0x7d, 8, WO, 0x34, "ETM_behavior_control", },
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};
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static const struct etm_reg_info etm_fifofull[] = {
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@ -310,10 +317,19 @@ reg_cache_t *etm_build_reg_cache(target_t *target,
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bcd_vers = 0x20;
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LOG_WARNING("ETMv2+ support is incomplete");
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/* REVISIT read ID register, distinguish ETMv3.3 etc;
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/* REVISIT more registers may exist; they may now be
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* readable; more register bits have defined meanings;
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* don't presume trace start/stop support is present;
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* and include any context ID comparator registers.
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*/
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etm_reg_add(0x20, jtag_info, reg_cache, arch_info,
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etm_core + 1, 1);
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etm_get_reg(reg_list + 1);
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etm_ctx->id = buf_get_u32(
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(void *)&arch_info[1].value, 0, 32);
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LOG_DEBUG("ETM ID: %08x", (unsigned) etm_ctx->id);
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bcd_vers = 0x10 + (((etm_ctx->id) >> 4) & 0xff);
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} else {
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switch (config >> 28) {
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case 7:
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@ -343,7 +359,7 @@ reg_cache_t *etm_build_reg_cache(target_t *target,
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LOG_INFO("ETM v%d.%d", bcd_vers >> 4, bcd_vers & 0xf);
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etm_reg_add(bcd_vers, jtag_info, reg_cache, arch_info,
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etm_core + 1, ARRAY_SIZE(etm_core) - 1);
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etm_basic, ARRAY_SIZE(etm_basic));
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/* address and data comparators; counters; outputs */
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etm_reg_add(bcd_vers, jtag_info, reg_cache, arch_info,
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@ -391,7 +407,7 @@ reg_cache_t *etm_build_reg_cache(target_t *target,
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etb->reg_cache = reg_cache->next;
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}
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etm_ctx->reg_cache = reg_cache;
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return reg_cache;
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}
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@ -424,9 +440,13 @@ int etm_setup(target_t *target)
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/* clear the ETM powerdown bit (0) */
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etm_ctrl_value &= ~0x1;
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/* configure port width (6:4), mode (17:16) and clocking (13) */
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etm_ctrl_value = (etm_ctrl_value &
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~ETM_PORT_WIDTH_MASK & ~ETM_PORT_MODE_MASK & ~ETM_PORT_CLOCK_MASK)
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/* configure port width (21,6:4), mode (13,17:16) and
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* for older modules clocking (13)
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*/
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etm_ctrl_value = (etm_ctrl_value
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& ~ETM_PORT_WIDTH_MASK
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& ~ETM_PORT_MODE_MASK
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& ~ETM_PORT_CLOCK_MASK)
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| etm_ctx->portmode;
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buf_set_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size, etm_ctrl_value);
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@ -435,6 +455,10 @@ int etm_setup(target_t *target)
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if ((retval = jtag_execute_queue()) != ERROR_OK)
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return retval;
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/* REVISIT for ETMv3.0 and later, read ETM_sys_config to
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* verify that those width and mode settings are OK ...
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*/
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if ((retval = etm_ctx->capture_driver->init(etm_ctx)) != ERROR_OK)
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{
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LOG_ERROR("ETM capture driver initialization failed");
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@ -1373,10 +1397,23 @@ static int handle_etm_config_command(struct command_context_s *cmd_ctx,
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return ERROR_FAIL;
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}
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/* FIXME for ETMv3.0 and above -- and we don't yet know what ETM
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* version we'll be using!! -- so we can't know how to validate
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* params yet. "etm config" should likely be *AFTER* hookup...
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*
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* - Many more widths might be supported ... and we can easily
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* check whether our setting "took".
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*
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* - The "clock" and "mode" bits are interpreted differently.
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* See ARM IHI 0014O table 2-17 for the old behavior, and
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* table 2-18 for the new. With ETB it's best to specify
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* "normal full" ...
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*/
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uint8_t port_width;
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COMMAND_PARSE_NUMBER(u8, args[1], port_width);
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switch (port_width)
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{
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/* before ETMv3.0 */
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case 4:
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portmode |= ETM_PORT_4BIT;
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break;
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@ -1386,8 +1423,28 @@ static int handle_etm_config_command(struct command_context_s *cmd_ctx,
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case 16:
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portmode |= ETM_PORT_16BIT;
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break;
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/* ETMv3.0 and later*/
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case 24:
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portmode |= ETM_PORT_24BIT;
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break;
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case 32:
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portmode |= ETM_PORT_32BIT;
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break;
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case 48:
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portmode |= ETM_PORT_48BIT;
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break;
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case 64:
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portmode |= ETM_PORT_64BIT;
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break;
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case 1:
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portmode |= ETM_PORT_1BIT;
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break;
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case 2:
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portmode |= ETM_PORT_2BIT;
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break;
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default:
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command_print(cmd_ctx, "unsupported ETM port width '%s', must be 4, 8 or 16", args[1]);
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command_print(cmd_ctx,
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"unsupported ETM port width '%s'", args[1]);
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return ERROR_FAIL;
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}
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@ -1473,6 +1530,7 @@ static int handle_etm_info_command(struct command_context_s *cmd_ctx,
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etm_context_t *etm;
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reg_t *etm_sys_config_reg;
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int max_port_size;
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uint32_t config;
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target = get_current_target(cmd_ctx);
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arm = target_to_arm(target);
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@ -1511,6 +1569,9 @@ static int handle_etm_info_command(struct command_context_s *cmd_ctx,
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command_print(cmd_ctx, "protocol version: %i",
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(int) (etm->config >> 28) & 0x07);
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else {
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command_print(cmd_ctx,
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"coprocessor and memory access %ssupported",
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(etm->config & (1 << 26)) ? "" : "not ");
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command_print(cmd_ctx, "trace start/stop %spresent",
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(etm->config & (1 << 26)) ? "" : "not ");
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command_print(cmd_ctx, "number of context comparators: %i",
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@ -1523,9 +1584,16 @@ static int handle_etm_info_command(struct command_context_s *cmd_ctx,
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return ERROR_OK;
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etm_get_reg(etm_sys_config_reg);
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config = buf_get_u32(etm_sys_config_reg->value, 0, 32);
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switch (buf_get_u32(etm_sys_config_reg->value, 0, 3))
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LOG_DEBUG("ETM SYS CONFIG %08x", (unsigned) config);
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max_port_size = config & 0x7;
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if (etm->bcd_vers >= 0x30)
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max_port_size |= (config >> 6) & 0x08;
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switch (max_port_size)
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{
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/* before ETMv3.0 */
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case 0:
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max_port_size = 4;
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break;
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@ -1535,24 +1603,54 @@ static int handle_etm_info_command(struct command_context_s *cmd_ctx,
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case 2:
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max_port_size = 16;
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break;
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/* ETMv3.0 and later*/
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case 3:
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max_port_size = 24;
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break;
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case 4:
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max_port_size = 32;
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break;
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case 5:
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max_port_size = 48;
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break;
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case 6:
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max_port_size = 64;
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break;
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case 8:
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max_port_size = 1;
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break;
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case 9:
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max_port_size = 2;
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break;
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default:
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LOG_ERROR("Illegal max_port_size");
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return ERROR_FAIL;
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}
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command_print(cmd_ctx, "max. port size: %i", max_port_size);
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if (etm->bcd_vers < 0x30) {
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command_print(cmd_ctx, "half-rate clocking %ssupported",
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(buf_get_u32(etm_sys_config_reg->value, 3, 1) == 1) ? "" : "not ");
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(config & (1 << 3)) ? "" : "not ");
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command_print(cmd_ctx, "full-rate clocking %ssupported",
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(buf_get_u32(etm_sys_config_reg->value, 4, 1) == 1) ? "" : "not ");
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(config & (1 << 4)) ? "" : "not ");
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command_print(cmd_ctx, "normal trace format %ssupported",
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(buf_get_u32(etm_sys_config_reg->value, 5, 1) == 1) ? "" : "not ");
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(config & (1 << 5)) ? "" : "not ");
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command_print(cmd_ctx, "multiplex trace format %ssupported",
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(buf_get_u32(etm_sys_config_reg->value, 6, 1) == 1) ? "" : "not ");
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(config & (1 << 6)) ? "" : "not ");
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command_print(cmd_ctx, "demultiplex trace format %ssupported",
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(buf_get_u32(etm_sys_config_reg->value, 7, 1) == 1) ? "" : "not ");
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(config & (1 << 7)) ? "" : "not ");
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} else {
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/* REVISIT show which size and format are selected ... */
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command_print(cmd_ctx, "current port size %ssupported",
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(config & (1 << 10)) ? "" : "not ");
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command_print(cmd_ctx, "current trace format %ssupported",
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(config & (1 << 11)) ? "" : "not ");
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}
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if (etm->bcd_vers >= 0x21)
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command_print(cmd_ctx, "fetch comparisons %ssupported",
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(config & (1 << 17)) ? "not " : "");
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command_print(cmd_ctx, "FIFO full %ssupported",
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(buf_get_u32(etm_sys_config_reg->value, 8, 1) == 1) ? "" : "not ");
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(config & (1 << 8)) ? "" : "not ");
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return ERROR_OK;
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}
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@ -68,6 +68,7 @@ enum
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/* N task contexts */
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ETM_CONTEXTID_COMPARATOR_VALUE = 0x6c,
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ETM_CONTEXTID_COMPARATOR_MASK = 0x6f,
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ETM_ID = 0x79,
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};
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typedef struct etm_reg_s
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@ -83,7 +84,13 @@ typedef enum
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ETM_PORT_4BIT = 0x00,
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ETM_PORT_8BIT = 0x10,
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ETM_PORT_16BIT = 0x20,
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ETM_PORT_WIDTH_MASK = 0x70,
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ETM_PORT_24BIT = 0x30,
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ETM_PORT_32BIT = 0x40,
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ETM_PORT_48BIT = 0x50,
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ETM_PORT_64BIT = 0x60,
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ETM_PORT_1BIT = 0x00 | (1 << 21),
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ETM_PORT_2BIT = 0x10 | (1 << 21),
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ETM_PORT_WIDTH_MASK = 0x70 | (1 << 21),
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/* Port modes */
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ETM_PORT_NORMAL = 0x00000,
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ETM_PORT_MUXED = 0x10000,
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@ -166,6 +173,7 @@ typedef struct etm
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bool ptr_ok; /* whether last_ptr is valid */
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uint8_t bcd_vers; /* e.g. 0x13 == ETMv1.3 */
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uint32_t config; /* cache of ETM_CONFIG value */
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uint32_t id; /* cache of ETM_ID value, or 0 */
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uint32_t current_pc; /* current program counter */
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uint32_t last_branch; /* last branch address output */
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uint32_t last_branch_reason; /* type of last branch encountered */
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