interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

David Brownell <david-b@pacbell.net>: 

Dump SP on poll, and show whether it's MSP or PSP.

Thread mode can use either stack pointer, so this is
part of the state that's not yet displayed.

Shrink some lines.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2555 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2009-07-21 20:19:02 +00:00
parent 4da019edeb
commit d460a7cd6c
1 changed files with 10 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
src/target/armv7m.c
View File

@ -478,14 +478,21 @@ int armv7m_arch_state(struct target_s *target)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info; armv7m_common_t *armv7m = target->arch_info;
uint32_t ctrl, sp;
ctrl = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32);
sp = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_R13].value, 0, 32);
LOG_USER("target halted due to %s, current mode: %s %s\n" LOG_USER("target halted due to %s, current mode: %s %s\n"
"xPSR: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32, "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32,
Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name, Jim_Nvp_value2name_simple(nvp_target_debug_reason,
target->debug_reason)->name,
armv7m_mode_strings[armv7m->core_mode], armv7m_mode_strings[armv7m->core_mode],
armv7m_exception_string(armv7m->exception_number), armv7m_exception_string(armv7m->exception_number),
buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32), buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32),
buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32)); buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32),
(ctrl & 0x02) ? 'p' : 'm',
sp);
return ERROR_OK; return ERROR_OK;
} }