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DOCS: update flash bank examples 

- include the $_FLASHNAME in all flash bank examples.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This commit is contained in:
Spencer Oliver 2010-03-18 09:18:53 +00:00
parent ae1c64706a
commit d37ed9094a
1 changed files with 21 additions and 21 deletions
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42
doc/openocd.texi
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@ -4180,8 +4180,8 @@ To configure two adjacent banks of 16 MBytes each, both sixteen bits (two bytes)
wide on a sixteen bit bus: wide on a sixteen bit bus:
@example @example
flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME flash bank $_FLASHNAME cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME flash bank $_FLASHNAME cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
@end example @end example
To configure one bank of 32 MBytes To configure one bank of 32 MBytes
@ -4189,7 +4189,7 @@ built from two sixteen bit (two byte) wide parts wired in parallel
to create a thirty-two bit (four byte) bus with doubled throughput: to create a thirty-two bit (four byte) bus with doubled throughput:
@example @example
flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
@end example @end example
@c "cfi part_id" disabled @c "cfi part_id" disabled
@ -4205,7 +4205,7 @@ The setup command only requires the @var{target} argument
since all devices in this family have the same memory layout. since all devices in this family have the same memory layout.
@example @example
flash bank aduc702x 0 0 0 0 $_TARGETNAME flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
@end example @end example
@end deffn @end deffn
@ -4226,9 +4226,9 @@ the following fixed locations:
@example @example
# Flash bank 0 - all chips # Flash bank 0 - all chips
flash bank at91sam3 0x00080000 0 1 1 $_TARGETNAME flash bank $_FLASHNAME at91sam3 0x00080000 0 1 1 $_TARGETNAME
# Flash bank 1 - only 256K chips # Flash bank 1 - only 256K chips
flash bank at91sam3 0x00100000 0 1 1 $_TARGETNAME flash bank $_FLASHNAME at91sam3 0x00100000 0 1 1 $_TARGETNAME
@end example @end example
Internally, the AT91SAM3 flash memory is organized as follows. Internally, the AT91SAM3 flash memory is organized as follows.
@ -4280,7 +4280,7 @@ recognizes a number of these chips using the chip identification
register, and autoconfigures itself. register, and autoconfigures itself.
@example @example
flash bank at91sam7 0 0 0 0 $_TARGETNAME flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME
@end example @end example
For chips which are not recognized by the controller driver, you must For chips which are not recognized by the controller driver, you must
@ -4367,7 +4367,7 @@ with most tool chains @command{verify_image} will fail.
LPC flashes don't require the chip and bus width to be specified. LPC flashes don't require the chip and bus width to be specified.
@example @example
flash bank lpc2000 0x0 0x7d000 0 0 $_TARGETNAME \ flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 $_TARGETNAME \
lpc2000_v2 14765 calc_checksum lpc2000_v2 14765 calc_checksum
@end example @end example
@ -4385,7 +4385,7 @@ the programming clock rate in Hz.
LPC flashes don't require the chip and bus width to be specified. LPC flashes don't require the chip and bus width to be specified.
@example @example
flash bank lpc288x 0 0 0 0 $_TARGETNAME 12000000 flash bank $_FLASHNAME lpc288x 0 0 0 0 $_TARGETNAME 12000000
@end example @end example
@end deffn @end deffn
@ -4418,7 +4418,7 @@ and not by the standard @code{flash protect} command.
Example for a 125 MHz clock frequency: Example for a 125 MHz clock frequency:
@example @example
flash bank lpc2900 0 0 0 0 $_TARGETNAME 125000 flash bank $_FLASHNAME lpc2900 0 0 0 0 $_TARGETNAME 125000
@end example @end example
Some @code{lpc2900}-specific commands are defined. In the following command list, Some @code{lpc2900}-specific commands are defined. In the following command list,
@ -4516,7 +4516,7 @@ lpc2900 secure_jtag 0
@emph{No idea what this is, other than using some arm7/arm9 core.} @emph{No idea what this is, other than using some arm7/arm9 core.}
@example @example
flash bank ocl 0 0 0 0 $_TARGETNAME flash bank $_FLASHNAME ocl 0 0 0 0 $_TARGETNAME
@end example @end example
@end deffn @end deffn
@ -4525,8 +4525,8 @@ The PIC32MX microcontrollers are based on the MIPS 4K cores,
and integrate flash memory. and integrate flash memory.
@example @example
flash bank pix32mx 0x1fc00000 0 0 0 $_TARGETNAME flash bank $_FLASHNAME pix32mx 0x1fc00000 0 0 0 $_TARGETNAME
flash bank pix32mx 0x1d000000 0 0 0 $_TARGETNAME flash bank $_FLASHNAME pix32mx 0x1d000000 0 0 0 $_TARGETNAME
@end example @end example
@comment numerous *disabled* commands are defined: @comment numerous *disabled* commands are defined:
@ -4555,7 +4555,7 @@ That seems pointless since the same effect can be had using the
standard @command{flash erase_address} command.} standard @command{flash erase_address} command.}
@example @example
flash bank stellaris 0 0 0 0 $_TARGETNAME flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
@end example @end example
@end deffn @end deffn
@ -4581,7 +4581,7 @@ The driver automatically recognizes a number of these chips using
the chip identification register, and autoconfigures itself. the chip identification register, and autoconfigures itself.
@example @example
flash bank stm32x 0 0 0 0 $_TARGETNAME flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
@end example @end example
Some stm32x-specific commands Some stm32x-specific commands
@ -4619,7 +4619,7 @@ The @var{str7x} driver defines one mandatory parameter, @var{variant},
which is either @code{STR71x}, @code{STR73x} or @code{STR75x}. which is either @code{STR71x}, @code{STR73x} or @code{STR75x}.
@example @example
flash bank str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
@end example @end example
@deffn Command {str7x disable_jtag} bank @deffn Command {str7x disable_jtag} bank
@ -4635,7 +4635,7 @@ The str9 needs the flash controller to be configured using
the @command{str9x flash_config} command prior to Flash programming. the @command{str9x flash_config} command prior to Flash programming.
@example @example
flash bank str9x 0x40000000 0x00040000 0 0 $_TARGETNAME flash bank $_FLASHNAME str9x 0x40000000 0x00040000 0 0 $_TARGETNAME
str9x flash_config 0 4 2 0 0x80000 str9x flash_config 0 4 2 0 0x80000
@end example @end example
@ -4785,13 +4785,13 @@ Currently, the mflash driver supports s3c2440 and pxa270.
Example for s3c2440 mflash where @var{RST pin} is GPIO B1: Example for s3c2440 mflash where @var{RST pin} is GPIO B1:
@example @example
mflash bank s3c2440 0x10000000 1b 0 mflash bank $_FLASHNAME s3c2440 0x10000000 1b 0
@end example @end example
Example for pxa270 mflash where @var{RST pin} is GPIO 43: Example for pxa270 mflash where @var{RST pin} is GPIO 43:
@example @example
mflash bank pxa270 0x08000000 43 0 mflash bank $_FLASHNAME pxa270 0x08000000 43 0
@end example @end example
@end deffn @end deffn
@ -7406,8 +7406,8 @@ has closed the connection to OpenOCD. This might be a GDB issue.
@item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
are described, there is a parameter for specifying the clock frequency are described, there is a parameter for specifying the clock frequency
for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000 for LPC2000 internal flash devices (e.g. @option{flash bank $_FLASHNAME lpc2000
0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14746 calc_checksum}), which must be
specified in kilohertz. However, I do have a quartz crystal of a specified in kilohertz. However, I do have a quartz crystal of a
frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz, frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
i.e. 14,745.600 kHz). Is it possible to specify real numbers for the i.e. 14,745.600 kHz). Is it possible to specify real numbers for the