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jtag: Avoid extra SRSTn resets when connecting 

Previously the jtag_add_reset(1, 0) caused the processor to be released,
and if SRSTn existed then it would then be reset again two lines later.

Change-Id: I58b7a12607f46f83caa7ed3b3cebc4195eb51ef6
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2398
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Evan Hunter 2014-11-21 17:42:23 +00:00 committed by Spencer Oliver
parent d12fa18bd9
commit d25b43b163
1 changed files with 2 additions and 1 deletions
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3
src/jtag/core.c
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@ -1552,11 +1552,12 @@ int jtag_init_reset(struct command_context *cmd_ctx)
* REVISIT once Tcl code can read the reset_config modes, this won't * REVISIT once Tcl code can read the reset_config modes, this won't
* need to be a C routine at all... * need to be a C routine at all...
*/ */
jtag_add_reset(1, 0); /* TAP_RESET, using TMS+TCK or TRST */
if (jtag_reset_config & RESET_HAS_SRST) { if (jtag_reset_config & RESET_HAS_SRST) {
jtag_add_reset(1, 1); jtag_add_reset(1, 1);
if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
jtag_add_reset(0, 1); jtag_add_reset(0, 1);
} else {
jtag_add_reset(1, 0); /* TAP_RESET, using TMS+TCK or TRST */
} }
/* some targets enable us to connect with srst asserted */ /* some targets enable us to connect with srst asserted */