diff --git a/.github/workflows/snapshot.yml b/.github/workflows/snapshot.yml new file mode 100644 index 000000000..2b73f9c8c --- /dev/null +++ b/.github/workflows/snapshot.yml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Copyright (C) 2020 by Tarek BOUCHKATI + +on: push + +name: OpenOCD Snapshot + +jobs: + package: + runs-on: [ubuntu-18.04] + env: + DL_DIR: ../downloads + BUILD_DIR: ../build + steps: + - name: Install needed packages + run: sudo apt-get install autotools-dev autoconf automake libtool pkg-config cmake texinfo texlive g++-mingw-w64-i686 + - uses: actions/checkout@v1 + - run: ./bootstrap + - name: Prepare libusb1 + env: + LIBUSB1_VER: 1.0.23 + run: | + mkdir -p $DL_DIR && cd $DL_DIR + wget "https://github.com/libusb/libusb/releases/download/v${LIBUSB1_VER}/libusb-${LIBUSB1_VER}.tar.bz2" + tar -xjf libusb-${LIBUSB1_VER}.tar.bz2 + echo "::set-env name=LIBUSB1_SRC::$PWD/libusb-${LIBUSB1_VER}" + - name: Prepare hidapi + env: + HIDAPI_VER: 0.9.0 + run: | + mkdir -p $DL_DIR && cd $DL_DIR + wget "https://github.com/libusb/hidapi/archive/hidapi-${HIDAPI_VER}.tar.gz" + tar -xzf hidapi-${HIDAPI_VER}.tar.gz + cd hidapi-hidapi-${HIDAPI_VER} + ./bootstrap + echo "::set-env name=HIDAPI_SRC::$PWD" + - name: Prepare libftdi + env: + LIBFTDI_VER: 1.4 + run: | + mkdir -p $DL_DIR && cd $DL_DIR + wget "http://www.intra2net.com/en/developer/libftdi/download/libftdi1-${LIBFTDI_VER}.tar.bz2" + tar -xjf libftdi1-${LIBFTDI_VER}.tar.bz2 + echo "::set-env name=LIBFTDI_SRC::$PWD/libftdi1-${LIBFTDI_VER}" + - name: Package OpenOCD for windows + env: + MAKE_JOBS: 2 + HOST: i686-w64-mingw32 + LIBUSB1_CONFIG: --enable-shared --enable-static + HIDAPI_CONFIG: --enable-shared --disable-static --disable-testgui + LIBFTDI_CONFIG: "-DCMAKE_TOOLCHAIN_FILE='${{ env.LIBFTDI_SRC }}/cmake/Toolchain-i686-w64-mingw32.cmake' -DBUILD_TESTS:BOOL=off -DFTDIPP:BOOL=off -DPYTHON_BINDINGS:BOOL=off -DEXAMPLES:BOOL=off -DDOCUMENTATION:BOOL=off -DFTDI_EEPROM:BOOL=off" + run: | + # set snapshot tag + OPENOCD_TAG="`git tag --points-at HEAD`" + [ -z $OPENOCD_TAG ] && OPENOCD_TAG="`git rev-parse --short HEAD`" + # set env and call cross-build.sh + export OPENOCD_TAG=$OPENOCD_TAG + export OPENOCD_SRC=$PWD + export OPENOCD_CONFIG="" + mkdir -p $BUILD_DIR && cd $BUILD_DIR + bash $OPENOCD_SRC/contrib/cross-build.sh $HOST + # add missing dlls + cd $HOST-root/usr + cp `$HOST-gcc --print-file-name=libwinpthread-1.dll` ./bin/ + cp `$HOST-gcc --print-file-name=libgcc_s_sjlj-1.dll` ./bin/ + # prepare the artifact + ARTIFACT="openocd-${OPENOCD_TAG}-${HOST}.tar.gz" + tar -czf $ARTIFACT * + echo "::set-env name=ARTIFACT_NAME::$ARTIFACT" + echo "::set-env name=ARTIFACT_PATH::$PWD/$ARTIFACT" + - name: Publish OpenOCD packaged for windows + uses: actions/upload-artifact@v1 + with: + name: ${{ env.ARTIFACT_NAME }} + path: ${{ env.ARTIFACT_PATH }} + - name: Get the upload URL for a release + id: get_release + if: startsWith(github.ref, 'refs/tags/') + uses: bruceadams/get-release@v1.2.0 + env: + GITHUB_TOKEN: ${{ github.token }} + - name: Release OpenOCD packaged for windows + if: startsWith(github.ref, 'refs/tags/') + uses: actions/upload-release-asset@v1 + env: + GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} + with: + upload_url: ${{ steps.get_release.outputs.upload_url }} + asset_path: ${{ env.ARTIFACT_PATH }} + asset_name: ${{ env.ARTIFACT_NAME }} + asset_content_type: application/gzip diff --git a/README b/README index 981489b64..6e6f95015 100644 --- a/README +++ b/README @@ -284,11 +284,15 @@ libraries that OpenOCD depends on. Alternatively, you can specify *_CFLAGS and *_LIBS environment variables directly, see "./configure --help" for the details. +For a more or less complete script that does all this for you, see + + contrib/cross-build.sh + Parallel Port Dongles --------------------- If you want to access the parallel port using the PPDEV interface you -have to specify both --enable-parport AND --enable-parport-ppdev, since the +have to specify both --enable-parport AND --enable-parport-ppdev, since the later option is an option to the parport driver. The same is true for the --enable-parport-giveio option, you have to diff --git a/bootstrap b/bootstrap index ad5e7bdd2..e81ba4d02 100755 --- a/bootstrap +++ b/bootstrap @@ -24,11 +24,12 @@ fi # bootstrap the autotools ( set -x -aclocal +aclocal --warnings=all +# Apparently, not all versions of libtoolize support option --warnings=all . ${libtoolize} --automake --copy -autoconf -autoheader -automake --gnu --add-missing --copy +autoconf --warnings=all +autoheader --warnings=all +automake --warnings=all --gnu --add-missing --copy ) if [ -n "$SKIP_SUBMODULE" ]; then diff --git a/configure.ac b/configure.ac index 351ee731c..97c573af2 100644 --- a/configure.ac +++ b/configure.ac @@ -22,7 +22,7 @@ AH_BOTTOM([ #include ]) -AC_LANG_C +AC_LANG([C]) AC_PROG_CC AC_PROG_CC_C99 AM_PROG_CC_C_O @@ -34,7 +34,7 @@ m4_defun([_LT_AC_LANG_CXX_CONFIG], [:]) m4_defun([_LT_AC_LANG_F77_CONFIG], [:]) m4_defun([_LT_AC_LANG_GCJ_CONFIG], [:]) AC_DISABLE_SHARED -AC_PROG_LIBTOOL +LT_INIT AC_SUBST([LIBTOOL_DEPS]) dnl configure checks required for Jim files (these are obsolete w/ C99) @@ -128,7 +128,8 @@ m4_define([USB0_ADAPTERS], [[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]]]) m4_define([HIDAPI_ADAPTERS], - [[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP]]]) + [[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP]], + [[nulink], [Nu-Link Programmer], [HLADAPTER_NULINK]]]) m4_define([HIDAPI_USB1_ADAPTERS], [[[kitprog], [Cypress KitProg Programmer], [KITPROG]]]) @@ -138,6 +139,9 @@ m4_define([LIBFTDI_ADAPTERS], [[presto], [ASIX Presto Adapter], [PRESTO]], [[openjtag], [OpenJTAG Adapter], [OPENJTAG]]]) +m4_define([LIBGPIOD_ADAPTERS], + [[[linuxgpiod], [Linux GPIO bitbang through libgpiod], [LINUXGPIOD]]]) + m4_define([LIBJAYLINK_ADAPTERS], [[[jlink], [SEGGER J-Link Programmer], [JLINK]]]) @@ -242,6 +246,7 @@ AC_ARG_ADAPTERS([ HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS, + LIBGPIOD_ADAPTERS, LIBJAYLINK_ADAPTERS ],[auto]) @@ -263,6 +268,10 @@ AC_ARG_ENABLE([jtag_vpi], AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]), [build_jtag_vpi=$enableval], [build_jtag_vpi=no]) +AC_ARG_ENABLE([jtag_dpi], + AS_HELP_STRING([--enable-jtag_dpi], [Enable building support for JTAG DPI]), + [build_jtag_dpi=$enableval], [build_jtag_dpi=no]) + AC_ARG_ENABLE([amtjtagaccel], AS_HELP_STRING([--enable-amtjtagaccel], [Enable building the Amontec JTAG-Accelerator driver]), [build_amtjtagaccel=$enableval], [build_amtjtagaccel=no]) @@ -336,6 +345,10 @@ AS_CASE([$host_os], AC_MSG_ERROR([sysfsgpio is only available on linux]) ]) + AS_IF([test "x$enable_linuxgpiod" = "xyes"], [ + AC_MSG_ERROR([linuxgpiod is only available on linux]) + ]) + AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [ AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux]) ]) @@ -561,6 +574,13 @@ AS_IF([test "x$build_jtag_vpi" = "xyes"], [ AC_DEFINE([BUILD_JTAG_VPI], [0], [0 if you don't want JTAG VPI.]) ]) +AS_IF([test "x$build_jtag_dpi" = "xyes"], [ + AC_DEFINE([BUILD_JTAG_DPI], [1], [1 if you want JTAG DPI.]) +], [ + AC_DEFINE([BUILD_JTAG_DPI], [0], [0 if you don't want JTAG DPI.]) +]) + + AS_IF([test "x$build_amtjtagaccel" = "xyes"], [ AC_DEFINE([BUILD_AMTJTAGACCEL], [1], [1 if you want the Amontec JTAG-Accelerator driver.]) ], [ @@ -631,6 +651,15 @@ PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [ PKG_CHECK_MODULES([LIBUSB0], [libusb], [use_libusb0=yes], [use_libusb0=no]) +PKG_CHECK_MODULES([CAPSTONE], [capstone], [have_capstone=yes], + [have_capstone=no]) + +AS_IF([test "x$have_capstone" = "xyes"], [ + AC_DEFINE([HAVE_CAPSTONE], [1], [1 if you have captone disassembly framework.]) +], [ + AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have captone disassembly framework.]) +]) + for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do PKG_CHECK_MODULES([HIDAPI],[$hidapi_lib],[ use_hidapi=yes @@ -644,6 +673,8 @@ PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [use_libftdi=yes], [ PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no]) ]) +PKG_CHECK_MODULES([LIBGPIOD], [libgpiod], [use_libgpiod=yes], [use_libgpiod=no]) + PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2], [use_libjaylink=yes], [use_libjaylink=no]) @@ -673,6 +704,7 @@ PROCESS_ADAPTERS([USB0_ADAPTERS], ["x$use_libusb0" = "xyes"], [libusb-0.1]) PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi]) PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x]) PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi]) +PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod]) PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2]) AS_IF([test "x$build_openjtag" = "xyes"], [ @@ -682,12 +714,20 @@ AS_IF([test "x$build_openjtag" = "xyes"], [ ]) ]) -AS_IF([test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno"], [ +AS_IF([test "x$enable_linuxgpiod" != "xno"], [ + build_bitbang=yes +]) + +AS_IF([test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno" -o "x$enable_nulink" != "xno"], [ AC_DEFINE([BUILD_HLADAPTER], [1], [1 if you want the High Level JTAG driver.]) + AM_CONDITIONAL([HLADAPTER], [true]) ], [ AC_DEFINE([BUILD_HLADAPTER], [0], [0 if you want the High Level JTAG driver.]) + AM_CONDITIONAL([HLADAPTER], [false]) ]) -AM_CONDITIONAL([HLADAPTER], [test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno"]) +AM_CONDITIONAL([HLADAPTER_STLINK], [test "x$enable_stlink" != "xno"]) +AM_CONDITIONAL([HLADAPTER_ICDI], [test "x$enable_ti_icdi" != "xno"]) +AM_CONDITIONAL([HLADAPTER_NULINK], [test "x$enable_nulink" != "xno"]) AS_IF([test "x$enable_jlink" != "xno"], [ AS_IF([test "x$use_internal_libjaylink" = "xyes"], [ @@ -718,6 +758,7 @@ AM_CONDITIONAL([BCM2835GPIO], [test "x$build_bcm2835gpio" = "xyes"]) AM_CONDITIONAL([IMX_GPIO], [test "x$build_imx_gpio" = "xyes"]) AM_CONDITIONAL([BITBANG], [test "x$build_bitbang" = "xyes"]) AM_CONDITIONAL([JTAG_VPI], [test "x$build_jtag_vpi" = "xyes" -o "x$build_jtag_vpi" = "xyes"]) +AM_CONDITIONAL([JTAG_DPI], [test "x$build_jtag_dpi" = "xyes" -o "x$build_jtag_dpi" = "xyes"]) AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x$enable_usb_blaster_2" != "xno"]) AM_CONDITIONAL([AMTJTAGACCEL], [test "x$build_amtjtagaccel" = "xyes"]) AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"]) @@ -734,9 +775,11 @@ AM_CONDITIONAL([IS_WIN32], [test "x$is_win32" = "xyes"]) AM_CONDITIONAL([IS_DARWIN], [test "x$is_darwin" = "xyes"]) AM_CONDITIONAL([BITQ], [test "x$build_bitq" = "xyes"]) AM_CONDITIONAL([USE_LIBFTDI], [test "x$use_libftdi" = "xyes"]) +AM_CONDITIONAL([USE_LIBGPIOD], [test "x$use_libgpiod" = "xyes"]) AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"]) AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"]) AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"]) +AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$have_capstone" = "xyes"]) AM_CONDITIONAL([MINIDRIVER], [test "x$build_minidriver" = "xyes"]) AM_CONDITIONAL([MINIDRIVER_DUMMY], [test "x$build_minidriver_dummy" = "xyes"]) @@ -805,6 +848,7 @@ echo OpenOCD configuration summary echo -------------------------------------------------- m4_foreach([adapter], [USB1_ADAPTERS, USB0_ADAPTERS, HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS, + LIBGPIOD_ADAPTERS, LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS], [s=m4_format(["%-40s"], ADAPTER_DESC([adapter])) AS_CASE([$ADAPTER_VAR([adapter])], diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules index 617346d1c..53f97dd83 100644 --- a/contrib/60-openocd.rules +++ b/contrib/60-openocd.rules @@ -3,6 +3,9 @@ # with the command "udevadm control --reload" ACTION!="add|change", GOTO="openocd_rules_end" + +SUBSYSTEM=="gpio", MODE="0660", GROUP="plugdev", TAG+="uaccess" + SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end" # Please keep this list sorted by VID:PID @@ -52,6 +55,13 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="660", GROUP="plugdev", # Amontec JTAGkey and JTAGkey-tiny ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="660", GROUP="plugdev", TAG+="uaccess" +# Nuvoton NuLink +ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511b", MODE="660", GROUP="plugdev", TAG+="uaccess" +ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511c", MODE="660", GROUP="plugdev", TAG+="uaccess" +ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511d", MODE="660", GROUP="plugdev", TAG+="uaccess" +ATTRS{idVendor}=="0416", ATTRS{idProduct}=="5200", MODE="660", GROUP="plugdev", TAG+="uaccess" +ATTRS{idVendor}=="0416", ATTRS{idProduct}=="5201", MODE="660", GROUP="plugdev", TAG+="uaccess" + # TI ICDI ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="660", GROUP="plugdev", TAG+="uaccess" diff --git a/contrib/coresight-trace.txt b/contrib/coresight-trace.txt index c093c205a..517119b6f 100644 --- a/contrib/coresight-trace.txt +++ b/contrib/coresight-trace.txt @@ -62,7 +62,7 @@ Clearly some of that data would be valuable for interactive debugging. +In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now +expect any such graphics to come from postprocessing. - measurments for RTOS event timings should also be easy to collect. + measurements for RTOS event timings should also be easy to collect. +Examples include context and message switch times, as well as times for application interactions. + diff --git a/contrib/cross-build.sh b/contrib/cross-build.sh index 74ab0f4f5..0ef0a2d55 100755 --- a/contrib/cross-build.sh +++ b/contrib/cross-build.sh @@ -15,15 +15,15 @@ # # This script is probably more useful as a reference than as a complete build # tool but for some configurations it may be usable as-is. It only cross- -# builds libusb-1.0 from source, but the script can be extended to build other -# prerequisities in a similar manner. +# builds libusb-1.0, hidapi and libftdi from source, but the script can be +# extended to build other prerequisites in a similar manner. # # Usage: # export LIBUSB1_SRC=/path/to/libusb-1.0 # export HIDAPI_SRC=/path/to/hidapi # export OPENOCD_CONFIG="--enable-..." # cd /work/dir -# /path/to/openocd/contrib/cross-build.sh +# .../path/to/openocd/contrib/cross-build.sh # # For static linking, a workaround is to # export LIBUSB1_CONFIG="--enable-static --disable-shared" @@ -36,17 +36,20 @@ WORK_DIR=$PWD ## Source code paths, customize as necessary : ${OPENOCD_SRC:="`dirname "$0"`/.."} -: ${LIBUSB1_SRC:=/path/to/libusb} +: ${LIBUSB1_SRC:=/path/to/libusb1} : ${HIDAPI_SRC:=/path/to/hidapi} +: ${LIBFTDI_SRC:=/path/to/libftdi} OPENOCD_SRC=`readlink -m $OPENOCD_SRC` LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC` HIDAPI_SRC=`readlink -m $HIDAPI_SRC` +LIBFTDI_SRC=`readlink -m $LIBFTDI_SRC` HOST_TRIPLET=$1 BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build LIBUSB1_BUILD_DIR=$BUILD_DIR/libusb1 HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi +LIBFTDI_BUILD_DIR=$BUILD_DIR/libftdi OPENOCD_BUILD_DIR=$BUILD_DIR/openocd ## Root of host file tree @@ -55,8 +58,12 @@ SYSROOT=$WORK_DIR/$HOST_TRIPLET-root ## Install location within host file tree : ${PREFIX=/usr} +## Make parallel jobs +: ${MAKE_JOBS:=1} + ## OpenOCD-only install dir for packaging -PACKAGE_DIR=$WORK_DIR/openocd_`git --git-dir=$OPENOCD_SRC/.git describe`_$HOST_TRIPLET +: ${OPENOCD_TAG:=`git --git-dir=$OPENOCD_SRC/.git describe --tags`} +PACKAGE_DIR=$WORK_DIR/openocd_${OPENOCD_TAG}_${HOST_TRIPLET} ####### @@ -86,13 +93,15 @@ rm -rf $SYSROOT $BUILD_DIR mkdir -p $SYSROOT # libusb-1.0 build & install into sysroot -mkdir -p $LIBUSB1_BUILD_DIR -cd $LIBUSB1_BUILD_DIR -$LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \ ---with-sysroot=$SYSROOT --prefix=$PREFIX \ -$LIBUSB1_CONFIG -make -make install DESTDIR=$SYSROOT +if [ -d $LIBUSB1_SRC ] ; then + mkdir -p $LIBUSB1_BUILD_DIR + cd $LIBUSB1_BUILD_DIR + $LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \ + --with-sysroot=$SYSROOT --prefix=$PREFIX \ + $LIBUSB1_CONFIG + make -j $MAKE_JOBS + make install DESTDIR=$SYSROOT +fi # hidapi build & install into sysroot if [ -d $HIDAPI_SRC ] ; then @@ -101,7 +110,22 @@ if [ -d $HIDAPI_SRC ] ; then $HIDAPI_SRC/configure --build=`$HIDAPI_SRC/config.guess` --host=$HOST_TRIPLET \ --with-sysroot=$SYSROOT --prefix=$PREFIX \ $HIDAPI_CONFIG - make + make -j $MAKE_JOBS + make install DESTDIR=$SYSROOT +fi + +# libftdi build & install into sysroot +if [ -d $LIBFTDI_SRC ] ; then + mkdir -p $LIBFTDI_BUILD_DIR + cd $LIBFTDI_BUILD_DIR + # libftdi requires libusb1 static libraries, granted by: + # export LIBUSB1_CONFIG="--enable-static ..." + cmake $LIBFTDI_CONFIG \ + -DLIBUSB_INCLUDE_DIR=${SYSROOT}${PREFIX}/include/libusb-1.0 \ + -DLIBUSB_LIBRARIES=${SYSROOT}${PREFIX}/lib/libusb-1.0.a \ + -DCMAKE_INSTALL_PREFIX=${PREFIX} \ + -DPKG_CONFIG_EXECUTABLE=`which pkg-config` \ + $LIBFTDI_SRC make install DESTDIR=$SYSROOT fi @@ -111,9 +135,10 @@ cd $OPENOCD_BUILD_DIR $OPENOCD_SRC/configure --build=`$OPENOCD_SRC/config.guess` --host=$HOST_TRIPLET \ --with-sysroot=$SYSROOT --prefix=$PREFIX \ $OPENOCD_CONFIG -make -make install DESTDIR=$SYSROOT +make -j $MAKE_JOBS +make install-strip DESTDIR=$SYSROOT # Separate OpenOCD install w/o dependencies. OpenOCD will have to be linked # statically or have dependencies packaged/installed separately. -make install DESTDIR=$PACKAGE_DIR +make install-strip DESTDIR=$PACKAGE_DIR + diff --git a/contrib/itmdump.c b/contrib/itmdump.c index 896389416..24aa34f32 100644 --- a/contrib/itmdump.c +++ b/contrib/itmdump.c @@ -325,7 +325,7 @@ static void show_timestamp(FILE *f, int c) delayed = true; break; case 0xf: - label = ", packet and timetamp delayed"; + label = ", packet and timestamp delayed"; delayed = true; break; } diff --git a/contrib/loaders/flash/at91sam7x/crt.s b/contrib/loaders/flash/at91sam7x/crt.s index 2e434bbe7..94ed66d73 100644 --- a/contrib/loaders/flash/at91sam7x/crt.s +++ b/contrib/loaders/flash/at91sam7x/crt.s @@ -46,7 +46,7 @@ ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */ ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */ ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */ - ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */ + ARM_MODE_SYS = 0x1F /* System Running in Privileged Operating Mode */ ARM_MODE_MASK = 0x1F I_BIT = 0x80 /* disable IRQ when I bit is set */ diff --git a/contrib/loaders/flash/at91sam7x/dcc.c b/contrib/loaders/flash/at91sam7x/dcc.c index 04a7f7a4d..a5c32e7e6 100644 --- a/contrib/loaders/flash/at91sam7x/dcc.c +++ b/contrib/loaders/flash/at91sam7x/dcc.c @@ -39,7 +39,7 @@ int dcc_wr(uint32 data) do { asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :); - /* operation controled by master, cancel operation + /* operation controlled by master, cancel operation upon reception of data for immediate response */ if (dcc_reg&1) return -1; } while (dcc_reg&2); diff --git a/contrib/loaders/flash/at91sam7x/main.c b/contrib/loaders/flash/at91sam7x/main.c index 831e03f14..47c944082 100644 --- a/contrib/loaders/flash/at91sam7x/main.c +++ b/contrib/loaders/flash/at91sam7x/main.c @@ -101,5 +101,5 @@ int main (void) } } - return(0); /* we shall never get here, just to supress compiler warning */ + return 0; /* we shall never get here, just to suppress compiler warning */ } diff --git a/contrib/loaders/flash/at91sam7x/ocl.h b/contrib/loaders/flash/at91sam7x/ocl.h index ef30c33f4..bd8a5f7a0 100644 --- a/contrib/loaders/flash/at91sam7x/ocl.h +++ b/contrib/loaders/flash/at91sam7x/ocl.h @@ -21,7 +21,7 @@ /* command/response mask */ #define OCL_CMD_MASK 0xFFFF0000L -/* commads */ +/* commands */ #define OCL_FLASH_BLOCK 0x0CFB0000L #define OCL_ERASE_BLOCK 0x0CEB0000L #define OCL_ERASE_ALL 0x0CEA0000L diff --git a/contrib/loaders/flash/cc26xx/flash.h b/contrib/loaders/flash/cc26xx/flash.h index ec1c24fc5..dd0a3745a 100644 --- a/contrib/loaders/flash/cc26xx/flash.h +++ b/contrib/loaders/flash/cc26xx/flash.h @@ -108,7 +108,7 @@ extern "C" /****************************************************************************** * -* Define for the clock frequencey input to the flash module in number of MHz +* Define for the clock frequency input to the flash module in number of MHz * ******************************************************************************/ #define FLASH_MODULE_CLK_FREQ 48 @@ -279,7 +279,7 @@ static inline uint32_t flash_check_fsm_for_ready(void) * This function will erase the specified flash sector. The function will * not return until the flash sector has been erased or an error condition * occurred. If flash top sector is erased the function will program the -* the device security data bytes with default values. The device security +* device security data bytes with default values. The device security * data located in the customer configuration area of the flash top sector, * must have valid values at all times. These values affect the configuration * of the device during boot. @@ -305,7 +305,7 @@ extern uint32_t flash_sector_erase(uint32_t sector_address); * * This function will erase all unprotected flash sectors. The function will * not return until the flash sectors has been erased or an error condition -* occurred. Since the flash top sector is erased the function will program the +* occurred. Since the flash top sector is erased the function will program * the device security data bytes with default values. The device security * data located in the customer configuration area of the flash top sector, * must have valid values at all times. These values affect the configuration diff --git a/contrib/loaders/flash/cc26xx/startup.c b/contrib/loaders/flash/cc26xx/startup.c index 70fd83650..53d8ea8c7 100644 --- a/contrib/loaders/flash/cc26xx/startup.c +++ b/contrib/loaders/flash/cc26xx/startup.c @@ -52,7 +52,7 @@ const uint32_t stack_pntr = (uint32_t)stack + sizeof(stack); /****************************************************************************** * -* The following are constructs created by the linker indicating where the +* The following are constructs created by the linker indicating where * the "bss" and "ebss" segments reside in memory. * ******************************************************************************/ diff --git a/contrib/loaders/flash/mrvlqspi_write.S b/contrib/loaders/flash/mrvlqspi_write.S index 064192c9c..e1088e38d 100644 --- a/contrib/loaders/flash/mrvlqspi_write.S +++ b/contrib/loaders/flash/mrvlqspi_write.S @@ -81,7 +81,7 @@ find_next_page_boundary: /* If we have not reached the next page boundary after the target address, keep going */ bls find_next_page_boundary write_enable: - /* Flush read/write fifo's */ + /* Flush read/write fifos */ bl flush_fifo /* Instruction byte 1 */ @@ -134,7 +134,7 @@ write_wait: bl stop_tx /* Otherwise, end the command and keep going w/ the next page */ add r10, r4 /* Move up the end-of-page address by the page size*/ check_flash_busy: /* Wait for the flash to finish the previous page write */ - /* Flush read/write fifo's */ + /* Flush read/write fifos */ bl flush_fifo /* Instruction byte 1 */ movs r8, #0x1 diff --git a/contrib/loaders/flash/msp432/driverlib.c b/contrib/loaders/flash/msp432/driverlib.c index a4f541619..ac6dfd454 100644 --- a/contrib/loaders/flash/msp432/driverlib.c +++ b/contrib/loaders/flash/msp432/driverlib.c @@ -367,7 +367,7 @@ bool pcm_shutdown_device(uint32_t shutdown_mode) uint32_t shutdown_mode_bits = (shutdown_mode == PCM_LPM45) ? PCM_CTL0_LPMR_12 : PCM_CTL0_LPMR_10; - /* If a power transition is occuring, return false */ + /* If a power transition is occurring, return false */ if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) return false; diff --git a/contrib/loaders/flash/msp432/startup_msp432e4.c b/contrib/loaders/flash/msp432/startup_msp432e4.c index 8adce8356..494da46e7 100644 --- a/contrib/loaders/flash/msp432/startup_msp432e4.c +++ b/contrib/loaders/flash/msp432/startup_msp432e4.c @@ -71,9 +71,9 @@ void (* const intr_vectors[])(void) __attribute__((section(".intvecs"))) = { }; /* - * The following are constructs created by the linker, indicating where the - * the "data" and "bss" segments reside in memory. The initializers for the - * for the "data" segment resides immediately following the "text" segment. + * The following are constructs created by the linker, indicating where + * the "data" and "bss" segments reside in memory. The initializers for + * the "data" segment resides immediately following the "text" segment. */ extern uint32_t __bss_start__; extern uint32_t __bss_end__; diff --git a/contrib/loaders/flash/msp432/startup_msp432p4.c b/contrib/loaders/flash/msp432/startup_msp432p4.c index ed7ea10a9..09103b0e4 100644 --- a/contrib/loaders/flash/msp432/startup_msp432p4.c +++ b/contrib/loaders/flash/msp432/startup_msp432p4.c @@ -71,9 +71,9 @@ void (* const intr_vectors[])(void) __attribute__((section(".intvecs"))) = { }; /* - * The following are constructs created by the linker, indicating where the - * the "data" and "bss" segments reside in memory. The initializers for the - * for the "data" segment resides immediately following the "text" segment. + * The following are constructs created by the linker, indicating where + * the "data" and "bss" segments reside in memory. The initializers for + * the "data" segment resides immediately following the "text" segment. */ extern uint32_t __bss_start__; extern uint32_t __bss_end__; diff --git a/contrib/loaders/flash/stm32/stm32h7x.S b/contrib/loaders/flash/stm32/stm32h7x.S index 99e416753..8ef42a4cf 100644 --- a/contrib/loaders/flash/stm32/stm32h7x.S +++ b/contrib/loaders/flash/stm32/stm32h7x.S @@ -25,7 +25,7 @@ * Code limitations: * The workarea must have size multiple of 4 bytes, since R/W * operations are all at 32 bits. - * The workarea must be big enough to contain rp, wp and data, thus the minumum + * The workarea must be big enough to contain rp, wp and data, thus the minimum * workarea size is: min_wa_size = sizeof(rp, wp, data) = 4 + 4 + sizeof(data). * - for 0x450 devices: sizeof(data) = 32 bytes, thus min_wa_size = 40 bytes. * - for 0x480 devices: sizeof(data) = 16 bytes, thus min_wa_size = 24 bytes. @@ -78,7 +78,7 @@ wait_fifo: str r7, [r5, #STM32_FLASH_CR_OFFSET] mov r8, #4 - udiv r8, r4, r8 /* number of words is size of write word devided by 4*/ + udiv r8, r4, r8 /* number of words is size of write word divided by 4*/ write_flash: dsb ldr r7, [r6], #0x04 /* read one word from src, increment ptr */ diff --git a/contrib/loaders/flash/str7x.s b/contrib/loaders/flash/str7x.s index a163ee674..cd19013be 100644 --- a/contrib/loaders/flash/str7x.s +++ b/contrib/loaders/flash/str7x.s @@ -51,7 +51,7 @@ busy: tsteq r4, #0x100 /* write protection set */ bne exit add r1, r1, #0x8 /* next 8 bytes */ - subs r3, r3, #1 /* decremment dword count */ + subs r3, r3, #1 /* decrement dword count */ bne write exit: b exit diff --git a/contrib/loaders/flash/str9x.s b/contrib/loaders/flash/str9x.s index 4daac7731..279b17503 100644 --- a/contrib/loaders/flash/str9x.s +++ b/contrib/loaders/flash/str9x.s @@ -48,7 +48,7 @@ busy: strh r5, [r4, #0] tst r3, #0x12 bne exit - subs r2, r2, #1 /* decremment word count */ + subs r2, r2, #1 /* decrement word count */ bne write exit: bkpt #0 diff --git a/contrib/rpc_examples/ocd_rpc_example.py b/contrib/rpc_examples/ocd_rpc_example.py index 9d17e7695..3470d848b 100755 --- a/contrib/rpc_examples/ocd_rpc_example.py +++ b/contrib/rpc_examples/ocd_rpc_example.py @@ -125,7 +125,7 @@ if __name__ == "__main__": show(ocd.send("capture { echo \"echo says hi!\" }")[:-1]) show(ocd.send("capture \"halt\"")[:-1]) - # Read the first few words at the RAM region (put starting adress of RAM + # Read the first few words at the RAM region (put starting address of RAM # region into 'addr') addr = 0x10000000 diff --git a/doc/manual/release.txt b/doc/manual/release.txt index 44de4464f..d1a6c6250 100644 --- a/doc/manual/release.txt +++ b/doc/manual/release.txt @@ -82,7 +82,7 @@ number will be zero (z = 0). For a major releases, the minor version will @a also be zero (y = 0, z = 0). After these required numeric components, release version strings -may contain tags such as as -rc1 or -rc2. +may contain tags such as -rc1 or -rc2. These 'rc' tags indicate "release candidate" versions of the package. Like major/minor/micro numbers, these are updated as part of the release process. diff --git a/doc/manual/server.txt b/doc/manual/server.txt index 50fcac75e..8041c3df3 100644 --- a/doc/manual/server.txt +++ b/doc/manual/server.txt @@ -23,7 +23,7 @@ In early 2008, Oyvind Harboe and Duane Ellis had talked about how to create a reasonable GUI for OpenOCD - something that is non-invasive, simple to use and maintain, and does not tie OpenOCD to many other packages. It would be wrong to "spider web" requirements into other -external external packages. That makes it difficult for developers to +external packages. That makes it difficult for developers to write new code and creates a support nightmare. In many ways, people had talked about the need for some type of @@ -67,7 +67,7 @@ write scripts internally to help things, or we can write "C" code that interfaces well with TCL. From there, the developers wanted to create an external front-end that -would be @a very usable and that that @a any language could utilize, +would be @a very usable and that @a any language could utilize, allowing simple front-ends to be (a) cross-platform (b) language agnostic, and (c) easy to develop and use. diff --git a/doc/manual/style.txt b/doc/manual/style.txt index e654be9c3..7191a4b0e 100644 --- a/doc/manual/style.txt +++ b/doc/manual/style.txt @@ -52,7 +52,7 @@ OpenOCD project. -# remove it entirely (git can retrieve the old version), or -# use an @c \#if/\#endif block. -Finally, try to avoid lines of code that are longer than than 72-80 columns: +Finally, try to avoid lines of code that are longer than 72-80 columns: - long lines frequently indicate other style problems: - insufficient use of static functions, macros, or temporary variables diff --git a/doc/manual/target/mips.txt b/doc/manual/target/mips.txt index 25978a3d5..24124e8c9 100644 --- a/doc/manual/target/mips.txt +++ b/doc/manual/target/mips.txt @@ -393,15 +393,15 @@ for (i = 0; i < count; i++) } @endcode -Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds in executing the handler. However, since handler is in a assembly loop, +Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds to execute the handler. However, since the handler is in an assembly loop, CPU comes to next instruction which also fetches data from FASTDATA area. So it stalls. -Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues until all the data has been filled. +Then OpenOCD fills the data again, from its (OpenOCD's) loop. And this game continues until all the data has been filled. After the last data has been given to CPU it sees that it reached the end address, so it proceeds with next instruction. However, this instruction do not point into dmseg, so CPU executes bunch of handler instructions (all prologue) and in the end jumps to MIPS32_PRACC_TEXT address. -On it's side, OpenOCD checks in CPU has jumped back to MIPS32_PRACC_TEXT, which is the confirmation that it correctly executed all the rest of the handler in RAM, -and that is not stuck somewhere in the RAM, or stalling on some access in dmseg - that would be an error : +On its side, OpenOCD checks in CPU has jumped back to MIPS32_PRACC_TEXT, which is the confirmation that it correctly executed all the rest of the handler in RAM, +and that is not stuck somewhere in the RAM, or stalling on some access in dmesg - that would be an error: @code address = 0; diff --git a/doc/openocd.texi b/doc/openocd.texi index 927cedfae..3a8804de7 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -505,6 +505,12 @@ Texas Instruments has an adapter called @b{ICDI}. It is not to be confused with the FTDI based adapters that were originally fitted to their evaluation boards. This is the adapter fitted to the Stellaris LaunchPad. +@section USB Nuvoton Nu-Link +Nuvoton has an adapter called @b{Nu-Link}. +It is available either as stand-alone dongle and embedded on development boards. +It supports SWD, serial port bridge and mass storage for firmware update. +Both Nu-Link v1 and v2 are supported. + @section USB CMSIS-DAP based ARM has released a interface standard called CMSIS-DAP that simplifies connecting debuggers to ARM Cortex based targets @url{http://www.keil.com/support/man/docs/dapdebug/dapdebug_introduction.htm}. @@ -609,8 +615,14 @@ produced, PDF schematics are easily found and it is easy to make. @* A JTAG driver acting as a client for the JTAG VPI server interface. @* Link: @url{http://github.com/fjullien/jtag_vpi} +@item @b{jtag_dpi} +@* A JTAG driver acting as a client for the SystemVerilog Direct Programming +Interface (DPI) for JTAG devices. DPI allows OpenOCD to connect to the JTAG +interface of a hardware model written in SystemVerilog, for example, on an +emulation model of target hardware. + @item @b{xlnx_pcie_xvc} -@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG interface. +@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface. @end itemize @@ -712,8 +724,11 @@ Configuration files and scripts are searched for in @item the current directory, @item any search dir specified on the command line using the @option{-s} option, @item any search dir specified using the @command{add_script_search_dir} command, -@item @file{$HOME/.openocd} (not on Windows), @item a directory in the @env{OPENOCD_SCRIPTS} environment variable (if set), +@item @file{%APPDATA%/OpenOCD} (only on Windows), +@item @file{$HOME/Library/Preferences/org.openocd} (only on Darwin), +@item @file{$XDG_CONFIG_HOME/openocd} (@env{$XDG_CONFIG_HOME} defaults to @file{$HOME/.config}), +@item @file{$HOME/.openocd}, @item the site wide script library @file{$pkgdatadir/site} and @item the OpenOCD-supplied script library @file{$pkgdatadir/scripts}. @end enumerate @@ -1020,7 +1035,7 @@ will help support users of any board using that chip. @end quotation @item -You may may need to write some C code. +You may need to write some C code. It may be as simple as supporting a new FT2232 or parport based adapter; a bit more involved, like a NAND or NOR flash controller driver; or a big piece of work like supporting @@ -3064,7 +3079,8 @@ This is a driver that supports multiple High Level Adapters. This type of adapter does not expose some of the lower level api's that OpenOCD would normally use to access the target. -Currently supported adapters include the STMicroelectronics ST-LINK and TI ICDI. +Currently supported adapters include the STMicroelectronics ST-LINK, TI ICDI +and Nuvoton Nu-Link. ST-LINK firmware version >= V2.J21.S4 recommended due to issues with earlier versions of firmware where serial number is reset after first use. Suggest using ST firmware update utility to upgrade ST-LINK firmware even if current @@ -3078,7 +3094,7 @@ Currently Not Supported. Specifies the serial number of the adapter. @end deffn -@deffn {Config Command} {hla_layout} (@option{stlink}|@option{icdi}) +@deffn {Config Command} {hla_layout} (@option{stlink}|@option{icdi}|@option{nulink}) Specifies the adapter layout to use. @end deffn @@ -3149,7 +3165,7 @@ version). @deffn {Interface Driver} {xlnx_pcie_xvc} This driver supports the Xilinx Virtual Cable (XVC) over PCI Express. It is commonly found in Xilinx based PCI Express designs. It allows debugging -fabric based JTAG devices such as Cortex-M1/M3 microcontrollers. Access to this is +fabric based JTAG/SWD devices such as Cortex-M1/M3 microcontrollers. Access to this is exposed via extended capability registers in the PCI Express configuration space. For more information see Xilinx PG245 (Section on From_PCIE_to_JTAG mode). @@ -3228,6 +3244,22 @@ This value is only used with the standard variant. @end deffn @end deffn + +@deffn {Interface Driver} {jtag_dpi} +SystemVerilog Direct Programming Interface (DPI) compatible driver for +JTAG devices in emulation. The driver acts as a client for the SystemVerilog +DPI server interface. + +@deffn {Config Command} {jtag_dpi_set_port} port +Specifies the TCP/IP port number of the SystemVerilog DPI server interface. +@end deffn + +@deffn {Config Command} {jtag_dpi_set_address} address +Specifies the TCP/IP address of the SystemVerilog DPI server interface. +@end deffn +@end deffn + + @section Transport Configuration @cindex Transport As noted earlier, depending on the version of OpenOCD you use, @@ -4637,7 +4669,8 @@ The value should normally correspond to a static mapping for the @item @code{-rtos} @var{rtos_type} -- enable rtos support for target, @var{rtos_type} can be one of @option{auto}, @option{eCos}, @option{ThreadX}, @option{FreeRTOS}, @option{linux}, @option{ChibiOS}, -@option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx} +@option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx}, +@option{RIOT} @xref{gdbrtossupport,,RTOS Support}. @item @code{-defer-examine} -- skip target examination at initial JTAG chain @@ -5661,7 +5694,7 @@ at91samd bootloader 16384 @deffn Command {at91samd dsu_reset_deassert} This command releases internal reset held by DSU and prepares reset vector catch in case of reset halt. -Command is used internally in event event reset-deassert-post. +Command is used internally in event reset-deassert-post. @end deffn @deffn Command {at91samd nvmuserrow} @@ -5768,7 +5801,7 @@ The AT91SAM4L driver adds some additional commands: @deffn Command {at91sam4l smap_reset_deassert} This command releases internal reset held by SMAP and prepares reset vector catch in case of reset halt. -Command is used internally in event event reset-deassert-post. +Command is used internally in event reset-deassert-post. @end deffn @end deffn @@ -5809,7 +5842,7 @@ processor to be halted. @deffn Command {atsame5 dsu_reset_deassert} This command releases internal reset held by DSU and prepares reset vector catch in case of reset halt. -Command is used internally in event event reset-deassert-post. +Command is used internally in event reset-deassert-post. @end deffn @deffn Command {atsame5 userpage} @@ -8392,7 +8425,7 @@ and any buffered trace data is invalidated. @itemize @item @var{type} ... describing how data accesses are traced, -when they pass any ViewData filtering that that was set up. +when they pass any ViewData filtering that was set up. The value is one of @option{none} (save nothing), @option{data} (save data), @@ -8740,7 +8773,7 @@ and any other core-specific commands that may be available. @deffn Command {arm7_9 dbgrq} [@option{enable}|@option{disable}] Displays the value of the flag controlling use of the -the EmbeddedIce DBGRQ signal to force entry into debug mode, +EmbeddedIce DBGRQ signal to force entry into debug mode, instead of breakpoints. If a boolean parameter is provided, first assigns that flag. @@ -9341,6 +9374,12 @@ target code relies on. In a configuration file, the command would typically be c However, normally it is not necessary to use the command at all. @end deffn +@deffn Command {aarch64 disassemble} address [count] +@cindex disassemble +Disassembles @var{count} instructions starting at @var{address}. +If @var{count} is not specified, a single instruction is disassembled. +@end deffn + @deffn Command {aarch64 smp} [on|off] Display, enable or disable SMP handling mode. The state of SMP handling influences the way targets in an SMP group are handled by the run control. With SMP handling enabled, issuing halt or resume to one core will trigger @@ -10430,18 +10469,31 @@ OpenOCD can communicate with GDB in two ways: @item A socket (TCP/IP) connection is typically started as follows: @example -target remote localhost:3333 +target extended-remote localhost:3333 @end example This would cause GDB to connect to the gdbserver on the local pc using port 3333. -It is also possible to use the GDB extended remote protocol as follows: +The extended remote protocol is a super-set of the remote protocol and should +be the preferred choice. More details are available in GDB documentation +@url{https://sourceware.org/gdb/onlinedocs/gdb/Connecting.html} + +To speed-up typing, any GDB command can be abbreviated, including the extended +remote command above that becomes: @example -target extended-remote localhost:3333 +tar ext :3333 @end example + +@b{Note:} If any backward compatibility issue requires using the old remote +protocol in place of the extended remote one, the former protocol is still +available through the command: +@example +target remote localhost:3333 +@end example + @item A pipe connection is typically started as follows: @example -target remote | openocd -c "gdb_port pipe; log_output openocd.log" +target extended-remote | openocd -c "gdb_port pipe; log_output openocd.log" @end example This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout). Using this method has the advantage of GDB starting/stopping OpenOCD for the debug @@ -10463,7 +10515,7 @@ Most programs would be written into flash (address 0) and run from there. @example $ arm-none-eabi-gdb example.elf -(gdb) target remote localhost:3333 +(gdb) target extended-remote localhost:3333 Remote debugging using localhost:3333 ... (gdb) monitor reset halt @@ -10598,7 +10650,7 @@ set remote interrupt-on-connect off If you switched gdb_memory_map off, you may want to setup GDB memory map manually or issue @command{set mem inaccessible-by-default off} -Now you can issue GDB command @command{target remote ...} and inspect memory +Now you can issue GDB command @command{target extended-remote ...} and inspect memory of a running target. Do not use GDB commands @command{continue}, @command{step} or @command{next} as they synchronize GDB with your target and GDB would require stopping the target to get the prompt back. @@ -10636,6 +10688,7 @@ Currently supported rtos's include: @item @option{mqx} @item @option{uCOS-III} @item @option{nuttx} +@item @option{RIOT} @item @option{hwthread} (This is not an actual RTOS. @xref{usingopenocdsmpwithgdb,,Using OpenOCD SMP with GDB}.) @end itemize @@ -10672,6 +10725,8 @@ _mqx_kernel_data, MQX_init_struct. OSRunning, OSTCBCurPtr, OSTaskDbgListPtr, OSTaskQty @item nuttx symbols g_readytorun, g_tasklisttable +@item RIOT symbols +sched_threads, sched_num_threads, sched_active_pid, max_threads, _tcb_name_offset @end table For most RTOS supported the above symbols will be exported by default. However for diff --git a/src/flash/nand/driver.h b/src/flash/nand/driver.h index 2182a7727..690ee91ec 100644 --- a/src/flash/nand/driver.h +++ b/src/flash/nand/driver.h @@ -94,7 +94,7 @@ typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void *); * Walk the list of drivers, encapsulating the data structure type. * Application state/context can be passed through the @c x pointer. * @param f The callback function to invoke for each function. - * @param x For use as private data storate, passed directly to @c f. + * @param x For use as private data storage, passed directly to @c f. * @returns ERROR_OK if successful, or the non-zero return value of @c f. * This allows a walker to terminate the loop early. */ diff --git a/src/flash/nand/fileio.c b/src/flash/nand/fileio.c index f65f957bf..fee401292 100644 --- a/src/flash/nand/fileio.c +++ b/src/flash/nand/fileio.c @@ -99,14 +99,11 @@ int nand_fileio_cleanup(struct nand_fileio_state *state) if (state->file_opened) fileio_close(state->fileio); - if (state->oob) { - free(state->oob); - state->oob = NULL; - } - if (state->page) { - free(state->page); - state->page = NULL; - } + free(state->oob); + state->oob = NULL; + + free(state->page); + state->page = NULL; return ERROR_OK; } int nand_fileio_finish(struct nand_fileio_state *state) @@ -206,7 +203,7 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s) } else if (s->oob_format & NAND_OOB_SW_ECC_KW) { /* * In this case eccpos is not used as - * the ECC data is always stored contigously + * the ECC data is always stored contiguously * at the end of the OOB area. It consists * of 10 bytes per 512-byte data block. */ diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c index 389c18ac4..97bd7a351 100644 --- a/src/flash/nand/lpc3180.c +++ b/src/flash/nand/lpc3180.c @@ -232,7 +232,7 @@ static int lpc3180_init(struct nand_device *nand) /* FLASHCLK_CTRL = 0x05 (enable clock for SLC flash controller) */ target_write_u32(target, 0x400040c8, 0x05); - /* after reset set other registers of SLC so reset calling is here at the begining*/ + /* after reset set other registers of SLC so reset calling is here at the beginning */ lpc3180_reset(nand); /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c index 058d9a50e..d516522f3 100644 --- a/src/flash/nand/lpc32xx.c +++ b/src/flash/nand/lpc32xx.c @@ -42,7 +42,7 @@ extern int nand_correct_data(struct nand_device *nand, u_char *dat, * read/write data to the SLC controller. * - DMA descriptors will be put at start of working area, * - Hardware generated ECC will be stored at ECC_OFFS - * - OOB wil be read/written from/to SPARE_OFFS + * - OOB will be read/written from/to SPARE_OFFS * - Actual page data will be read from/to DATA_OFFS * There are unused holes between the used areas. */ @@ -317,7 +317,7 @@ static int lpc32xx_init(struct nand_device *nand) } /* after reset set other registers of SLC, - * so reset calling is here at the begining + * so reset calling is here at the beginning */ retval = lpc32xx_reset(nand); if (ERROR_OK != retval) @@ -769,7 +769,7 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size, * 2. Copy generated ECC data from Register to Spare Area * 3. X'fer next 256 bytes of data from Memory to Flash. * 4. Copy generated ECC data from Register to Spare Area. - * 5. X'fer 16 byets of Spare area from Memory to Flash. + * 5. X'fer 16 bytes of Spare area from Memory to Flash. * Read Operation Sequence for Small Block NAND * ---------------------------------------------------------- * 1. X'fer 256 bytes of data from Flash to Memory. @@ -779,13 +779,13 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size, * 5. X'fer 16 bytes of Spare area from Flash to Memory. * Write Operation Sequence for Large Block NAND * ---------------------------------------------------------- - * 1. Steps(1-4) of Write Operations repeate for four times + * 1. Steps(1-4) of Write Operations repeated for four times * which generates 16 DMA descriptors to X'fer 2048 bytes of * data & 32 bytes of ECC data. * 2. X'fer 64 bytes of Spare area from Memory to Flash. * Read Operation Sequence for Large Block NAND * ---------------------------------------------------------- - * 1. Steps(1-4) of Read Operations repeate for four times + * 1. Steps(1-4) of Read Operations repeated for four times * which generates 16 DMA descriptors to X'fer 2048 bytes of * data & 32 bytes of ECC data. * 2. X'fer 64 bytes of Spare area from Flash to Memory. @@ -842,7 +842,7 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size, * 2. Copy generated ECC data from Register to Spare Area * 3. X'fer next 256 bytes of data from Memory to Flash. * 4. Copy generated ECC data from Register to Spare Area. - * 5. X'fer 16 byets of Spare area from Memory to Flash. + * 5. X'fer 16 bytes of Spare area from Memory to Flash. * Read Operation Sequence for Small Block NAND * ---------------------------------------------------------- * 1. X'fer 256 bytes of data from Flash to Memory. @@ -852,13 +852,13 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size, * 5. X'fer 16 bytes of Spare area from Flash to Memory. * Write Operation Sequence for Large Block NAND * ---------------------------------------------------------- - * 1. Steps(1-4) of Write Operations repeate for four times + * 1. Steps(1-4) of Write Operations repeated for four times * which generates 16 DMA descriptors to X'fer 2048 bytes of * data & 32 bytes of ECC data. * 2. X'fer 64 bytes of Spare area from Memory to Flash. * Read Operation Sequence for Large Block NAND * ---------------------------------------------------------- - * 1. Steps(1-4) of Read Operations repeate for four times + * 1. Steps(1-4) of Read Operations repeated for four times * which generates 16 DMA descriptors to X'fer 2048 bytes of * data & 32 bytes of ECC data. * 2. X'fer 64 bytes of Spare area from Flash to Memory. @@ -1044,7 +1044,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, target_mem_base = pworking_area->address; /* - * Skip writting page which has all 0xFF data as this will + * Skip writing page which has all 0xFF data as this will * generate 0x0 value. */ if (data && !oob) { @@ -1102,7 +1102,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, return retval; } - /* Write first decriptor to DMA controller */ + /* Write first descriptor to DMA controller */ retval = target_write_memory(target, 0x31000100, 4, sizeof(dmac_ll_t) / 4, (uint8_t *)dmalist); @@ -1159,7 +1159,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, return retval; } - /* Write OOB decriptor to DMA controller */ + /* Write OOB descriptor to DMA controller */ retval = target_write_memory(target, 0x31000100, 4, sizeof(dmac_ll_t) / 4, (uint8_t *)(&dmalist[nll-1])); @@ -1487,7 +1487,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, return retval; } - /* Write first decriptor to DMA controller */ + /* Write first descriptor to DMA controller */ retval = target_write_memory(target, 0x31000100, 4, sizeof(dmac_ll_t) / 4, (uint8_t *)dmalist); if (ERROR_OK != retval) { diff --git a/src/flash/nand/mx3.c b/src/flash/nand/mx3.c index da141b742..b9f5ff1b9 100644 --- a/src/flash/nand/mx3.c +++ b/src/flash/nand/mx3.c @@ -40,7 +40,7 @@ get_next_halfword_from_sram_buffer() not tested static const char target_not_halted_err_msg[] = "target must be halted to use mx3 NAND flash controller"; static const char data_block_size_err_msg[] = - "minimal granularity is one half-word, %" PRId32 " is incorrect"; + "minimal granularity is one half-word, %" PRIu32 " is incorrect"; static const char sram_buffer_bounds_err_msg[] = "trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")"; static const char get_status_register_err_msg[] = "can't get NAND status"; @@ -149,7 +149,7 @@ static int imx31_init(struct nand_device *nand) uint32_t gpr_register_content; target_read_u32(target, MX3_GPR, &gpr_register_content); if (gpr_register_content & 0x00000060) { - LOG_ERROR("pins mode overrided by GPR"); + LOG_ERROR("pins mode overridden by GPR"); return ERROR_FAIL; } } @@ -414,10 +414,10 @@ static int imx31_write_page(struct nand_device *nand, uint32_t page, if (oob) { if (mx3_nf_info->flags.hw_ecc_enabled) { /* - * part of spare block will be overrided by hardware + * part of spare block will be overridden by hardware * ECC generator */ - LOG_DEBUG("part of spare block will be overrided by hardware ECC generator"); + LOG_DEBUG("part of spare block will be overridden by hardware ECC generator"); } target_write_buffer(target, MX3_NF_SPARE_BUFFER0, oob_size, oob); } @@ -530,7 +530,7 @@ static int initialize_nf_controller(struct nand_device *nand) struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; struct target *target = nand->target; /* - * resets NAND flash controller in zero time ? I dont know. + * resets NAND flash controller in zero time ? I don't know. */ target_write_u16(target, MX3_NF_CFG1, MX3_NF_BIT_RESET_EN); { @@ -680,18 +680,18 @@ static int do_data_output(struct nand_device *nand) target_read_u16 (target, MX3_NF_ECCSTATUS, &ecc_status); switch (ecc_status & 0x000c) { case 1 << 2: - LOG_DEBUG("main area readed with 1 (correctable) error"); + LOG_DEBUG("main area read with 1 (correctable) error"); break; case 2 << 2: - LOG_DEBUG("main area readed with more than 1 (incorrectable) error"); + LOG_DEBUG("main area read with more than 1 (incorrectable) error"); return ERROR_NAND_OPERATION_FAILED; } switch (ecc_status & 0x0003) { case 1: - LOG_DEBUG("spare area readed with 1 (correctable) error"); + LOG_DEBUG("spare area read with 1 (correctable) error"); break; case 2: - LOG_DEBUG("main area readed with more than 1 (incorrectable) error"); + LOG_DEBUG("main area read with more than 1 (incorrectable) error"); return ERROR_NAND_OPERATION_FAILED; } } diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c index ee093c056..2c5de0394 100644 --- a/src/flash/nand/mxc.c +++ b/src/flash/nand/mxc.c @@ -65,7 +65,7 @@ static const char target_not_halted_err_msg[] = "target must be halted to use mxc NAND flash controller"; static const char data_block_size_err_msg[] = - "minimal granularity is one half-word, %" PRId32 " is incorrect"; + "minimal granularity is one half-word, %" PRIu32 " is incorrect"; static const char sram_buffer_bounds_err_msg[] = "trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")"; static const char get_status_register_err_msg[] = "can't get NAND status"; @@ -136,7 +136,7 @@ NAND_DEVICE_COMMAND_HANDLER(mxc_nand_device_command) (nand->target->endianness == TARGET_LITTLE_ENDIAN); /* - * should factory bad block indicator be swaped + * should factory bad block indicator be swapped * as a workaround for how the nfc handles pages. */ if (CMD_ARGC > 4 && strcmp(CMD_ARGV[4], "biswap") == 0) { @@ -181,7 +181,7 @@ static const struct command_registration mxc_sub_command_handlers[] = { .name = "biswap", .mode = COMMAND_EXEC, .handler = handle_mxc_biswap_command, - .help = "Turns on/off bad block information swaping from main area, " + .help = "Turns on/off bad block information swapping from main area, " "without parameter query status.", .usage = "bank_id ['enable'|'disable']", }, @@ -400,7 +400,7 @@ static int mxc_command(struct nand_device *nand, uint8_t command) mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE; break; default: - /* Ohter command use the default 'One page data out' FDO */ + /* Other command use the default 'One page data out' FDO */ mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE; break; } @@ -502,10 +502,10 @@ static int mxc_write_page(struct nand_device *nand, uint32_t page, if (oob) { if (mxc_nf_info->flags.hw_ecc_enabled) { /* - * part of spare block will be overrided by hardware + * part of spare block will be overridden by hardware * ECC generator */ - LOG_DEBUG("part of spare block will be overrided " + LOG_DEBUG("part of spare block will be overridden " "by hardware ECC generator"); } if (nfc_is_v1()) @@ -710,7 +710,7 @@ static int initialize_nf_controller(struct nand_device *nand) uint16_t work_mode = 0; uint16_t temp; /* - * resets NAND flash controller in zero time ? I dont know. + * resets NAND flash controller in zero time ? I don't know. */ target_write_u16(target, MXC_NF_CFG1, MXC_NF_BIT_RESET_EN); if (mxc_nf_info->mxc_version == MXC_VERSION_MX27) diff --git a/src/flash/nand/tcl.c b/src/flash/nand/tcl.c index 5480e0d61..ca8b9dad4 100644 --- a/src/flash/nand/tcl.c +++ b/src/flash/nand/tcl.c @@ -124,7 +124,7 @@ COMMAND_HANDLER(handle_nand_info_command) bad_state = " (block condition unknown)"; command_print(CMD, - "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s", + "\t#%i: 0x%8.8" PRIx32 " (%" PRIu32 "kB) %s%s", j, p->blocks[j].offset, p->blocks[j].size / 1024, diff --git a/src/flash/nor/aduc702x.c b/src/flash/nor/aduc702x.c index b6e19376c..b7d2299f7 100644 --- a/src/flash/nor/aduc702x.c +++ b/src/flash/nor/aduc702x.c @@ -57,13 +57,12 @@ static int aduc702x_build_sector_list(struct flash_bank *bank) { /* aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv; */ - int i = 0; uint32_t offset = 0; /* sector size is 512 */ bank->num_sectors = bank->size / 512; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (i = 0; i < bank->num_sectors; ++i) { + for (unsigned int i = 0; i < bank->num_sectors; ++i) { bank->sectors[i].offset = offset; bank->sectors[i].size = 512; offset += bank->sectors[i].size; @@ -74,7 +73,8 @@ static int aduc702x_build_sector_list(struct flash_bank *bank) return ERROR_OK; } -static int aduc702x_erase(struct flash_bank *bank, int first, int last) +static int aduc702x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { /* int res; */ int x; diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c index 7c5596d48..4e816fd61 100644 --- a/src/flash/nor/aducm360.c +++ b/src/flash/nor/aducm360.c @@ -85,13 +85,12 @@ FLASH_BANK_COMMAND_HANDLER(aducm360_flash_bank_command) /* ----------------------------------------------------------------------- */ static int aducm360_build_sector_list(struct flash_bank *bank) { - int i = 0; uint32_t offset = 0; /* sector size is 512 */ bank->num_sectors = bank->size / FLASH_SECTOR_SIZE; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (i = 0; i < bank->num_sectors; ++i) { + for (unsigned i = 0; i < bank->num_sectors; ++i) { bank->sectors[i].offset = offset; bank->sectors[i].size = FLASH_SECTOR_SIZE; offset += bank->sectors[i].size; @@ -164,7 +163,8 @@ static int aducm360_page_erase(struct target *target, uint32_t padd) } /* ----------------------------------------------------------------------- */ -static int aducm360_erase(struct flash_bank *bank, int first, int last) +static int aducm360_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int res = ERROR_OK; int i; @@ -285,7 +285,7 @@ static int aducm360_write_block_sync( res = buf_get_u32(reg_params[4].value, 0, 32); if (res) { - LOG_ERROR("aducm360 fast sync algorithm reports an error (%02X)", res); + LOG_ERROR("aducm360 fast sync algorithm reports an error (%02" PRIX32 ")", res); retval = ERROR_FAIL; break; } @@ -401,7 +401,7 @@ static int aducm360_write_block_async( } else { res = buf_get_u32(reg_params[4].value, 0, 32); /*RESULT*/ if (res) { - LOG_ERROR("aducm360 fast async algorithm reports an error (%02X)", res); + LOG_ERROR("aducm360 fast async algorithm reports an error (%02" PRIX32 ")", res); retval = ERROR_FAIL; } } diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c index b41b15c07..1c4dce87d 100644 --- a/src/flash/nor/ambiqmicro.c +++ b/src/flash/nor/ambiqmicro.c @@ -92,7 +92,7 @@ static const uint32_t apollo_sram_size[] = { struct ambiqmicro_flash_bank { /* chip id register */ - uint32_t probed; + bool probed; const char *target_name; uint8_t target_class; @@ -156,7 +156,7 @@ FLASH_BANK_COMMAND_HANDLER(ambiqmicro_flash_bank_command) ambiqmicro_info->target_name = "Unknown target"; /* part wasn't probed yet */ - ambiqmicro_info->probed = 0; + ambiqmicro_info->probed = false; return ERROR_OK; } @@ -167,7 +167,7 @@ static int get_ambiqmicro_info(struct flash_bank *bank, char *buf, int buf_size) int printed; char *classname; - if (ambiqmicro_info->probed == 0) { + if (!ambiqmicro_info->probed) { LOG_ERROR("Target not probed"); return ERROR_FLASH_BANK_NOT_PROBED; } @@ -212,7 +212,7 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank) /* Set PartNum to default device */ PartNum = 0; } - LOG_DEBUG("Part number: 0x%x", PartNum); + LOG_DEBUG("Part number: 0x%" PRIx32, PartNum); /* * Determine device class. @@ -260,7 +260,7 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank) ambiqmicro_info->target_name = ambiqmicroParts[0].partname; - LOG_DEBUG("num_pages: %d, pagesize: %d, flash: %d, sram: %d", + LOG_DEBUG("num_pages: %" PRIu32 ", pagesize: %" PRIu32 ", flash: %" PRIu32 ", sram: %" PRIu32, ambiqmicro_info->num_pages, ambiqmicro_info->pagesize, ambiqmicro_info->flshsiz, @@ -280,7 +280,7 @@ static int ambiqmicro_protect_check(struct flash_bank *bank) uint32_t i; - if (ambiqmicro->probed == 0) { + if (!ambiqmicro->probed) { LOG_ERROR("Target not probed"); return ERROR_FLASH_BANK_NOT_PROBED; } @@ -304,7 +304,7 @@ static int check_flash_status(struct target *target, uint32_t address) } /* target flash failed, unknown cause. */ if (retflash != 0) { - LOG_ERROR("Flash not happy: status(0x%x)", retflash); + LOG_ERROR("Flash not happy: status(0x%" PRIx32 ")", retflash); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; @@ -371,7 +371,7 @@ static int ambiqmicro_mass_erase(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - if (ambiqmicro_info->probed == 0) { + if (!ambiqmicro_info->probed) { LOG_ERROR("Target not probed"); return ERROR_FLASH_BANK_NOT_PROBED; } @@ -427,18 +427,19 @@ static int ambiqmicro_mass_erase(struct flash_bank *bank) } -static int ambiqmicro_erase(struct flash_bank *bank, int first, int last) +static int ambiqmicro_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv; struct target *target = bank->target; - uint32_t retval = ERROR_OK; + int retval; if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if (ambiqmicro_info->probed == 0) { + if (!ambiqmicro_info->probed) { LOG_ERROR("Target not probed"); return ERROR_FLASH_BANK_NOT_PROBED; } @@ -447,14 +448,14 @@ static int ambiqmicro_erase(struct flash_bank *bank, int first, int last) * Check pages. * Fix num_pages for the device. */ - if ((first < 0) || (last < first) || (last >= (int)ambiqmicro_info->num_pages)) + if ((last < first) || (last >= ambiqmicro_info->num_pages)) return ERROR_FLASH_SECTOR_INVALID; /* * Just Mass Erase if all pages are given. * TODO: Fix num_pages for the device */ - if ((first == 0) && (last == ((int)ambiqmicro_info->num_pages-1))) + if ((first == 0) && (last == (ambiqmicro_info->num_pages - 1))) return ambiqmicro_mass_erase(bank); /* @@ -502,7 +503,7 @@ static int ambiqmicro_erase(struct flash_bank *bank, int first, int last) /* * Erase the pages. */ - LOG_INFO("Erasing pages %d to %d on bank %d", first, last, bank->bank_number); + LOG_INFO("Erasing pages %u to %u on bank %u", first, last, bank->bank_number); /* * passed pc, addr = ROM function, handle breakpoints, not debugging. @@ -512,7 +513,7 @@ static int ambiqmicro_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - LOG_INFO("%d pages erased!", 1+(last-first)); + LOG_INFO("%u pages erased!", 1+(last-first)); if (first == 0) { /* @@ -527,7 +528,8 @@ static int ambiqmicro_erase(struct flash_bank *bank, int first, int last) return retval; } -static int ambiqmicro_protect(struct flash_bank *bank, int set, int first, int last) +static int ambiqmicro_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { /* struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv; * struct target *target = bank->target; */ @@ -613,7 +615,7 @@ static int ambiqmicro_write_block(struct flash_bank *bank, break; } - LOG_DEBUG("address = 0x%08x", address); + LOG_DEBUG("address = 0x%08" PRIx32, address); retval = ambiqmicro_exec_command(target, FLASH_PROGRAM_MAIN_FROM_SRAM, 0x1000000c); CHECK_STATUS(retval, "error executing ambiqmicro flash write algorithm"); @@ -639,7 +641,7 @@ static int ambiqmicro_write_block(struct flash_bank *bank, static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { - uint32_t retval; + int retval; /* try using a block write */ retval = ambiqmicro_write_block(bank, buffer, offset, count); @@ -652,12 +654,12 @@ static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer, static int ambiqmicro_probe(struct flash_bank *bank) { struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv; - uint32_t retval; + int retval; /* If this is a ambiqmicro chip, it has flash; probe() is just * to figure out how much is present. Only do it once. */ - if (ambiqmicro_info->probed == 1) { + if (ambiqmicro_info->probed) { LOG_INFO("Target already probed"); return ERROR_OK; } @@ -670,16 +672,13 @@ static int ambiqmicro_probe(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); /* provide this for the benefit of the NOR flash framework */ bank->size = ambiqmicro_info->pagesize * ambiqmicro_info->num_pages; bank->num_sectors = ambiqmicro_info->num_pages; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * ambiqmicro_info->pagesize; bank->sectors[i].size = ambiqmicro_info->pagesize; bank->sectors[i].is_erased = -1; @@ -689,7 +688,7 @@ static int ambiqmicro_probe(struct flash_bank *bank) /* * Part has been probed. */ - ambiqmicro_info->probed = 1; + ambiqmicro_info->probed = true; return retval; } @@ -699,7 +698,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank, { struct target *target = NULL; struct ambiqmicro_flash_bank *ambiqmicro_info = NULL; - uint32_t retval = ERROR_OK; + int retval; ambiqmicro_info = bank->driver_priv; target = bank->target; @@ -709,7 +708,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank, return ERROR_TARGET_NOT_HALTED; } - if (ambiqmicro_info->probed == 0) { + if (!ambiqmicro_info->probed) { LOG_ERROR("Target not probed"); return ERROR_FLASH_BANK_NOT_PROBED; } @@ -758,7 +757,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank, /* * Program OTP. */ - LOG_INFO("Programming OTP offset 0x%08x", offset); + LOG_INFO("Programming OTP offset 0x%08" PRIx32, offset); /* * passed pc, addr = ROM function, handle breakpoints, not debugging. @@ -775,19 +774,17 @@ static int ambiqmicro_otp_program(struct flash_bank *bank, COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; struct flash_bank *bank; - uint32_t retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); if (ERROR_OK != retval) return retval; if (ambiqmicro_mass_erase(bank) == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "ambiqmicro mass erase complete"); @@ -801,7 +798,7 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command) { struct flash_bank *bank; uint32_t first, last; - uint32_t retval; + int retval; if (CMD_ARGC < 3) return ERROR_COMMAND_SYNTAX_ERROR; @@ -829,7 +826,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command) { struct flash_bank *bank; uint32_t offset, count; - uint32_t retval; + int retval; if (CMD_ARGC < 3) return ERROR_COMMAND_SYNTAX_ERROR; @@ -837,7 +834,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], offset); COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count); - command_print(CMD, "offset=0x%08x count=%d", offset, count); + command_print(CMD, "offset=0x%08" PRIx32 " count=%" PRIu32, offset, count); CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index c9ffa653b..c9baffc70 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -21,7 +21,7 @@ * along with this program. If not, see . * ****************************************************************************/ -/* Some of the the lower level code was based on code supplied by +/* Some of the lower level code was based on code supplied by * ATMEL under this copyright. */ /* BEGIN ATMEL COPYRIGHT */ @@ -187,7 +187,7 @@ struct sam3_cfg { */ struct sam3_bank_private { - int probed; + bool probed; /* DANGER: THERE ARE DRAGONS HERE.. */ /* NOTE: If you add more 'ghost' pointers */ /* be aware that you must *manually* update */ @@ -233,7 +233,7 @@ struct sam3_chip_details { struct sam3_chip { struct sam3_chip *next; - int probed; + bool probed; /* this is "initialized" from the global const structure */ struct sam3_chip_details details; @@ -306,7 +306,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -322,7 +322,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -357,7 +357,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -373,7 +373,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -399,7 +399,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -416,7 +416,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -448,7 +448,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { { /* .bank[0] = { */ - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -463,7 +463,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -498,7 +498,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -514,7 +514,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -540,7 +540,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -556,7 +556,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -578,7 +578,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -594,7 +594,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -611,7 +611,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -627,7 +627,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -643,7 +643,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -659,7 +659,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -675,7 +675,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -691,7 +691,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -707,7 +707,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -723,7 +723,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -739,7 +739,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -754,7 +754,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -779,7 +779,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -794,7 +794,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -819,7 +819,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -834,7 +834,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -859,7 +859,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -875,7 +875,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -891,7 +891,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -907,7 +907,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -923,7 +923,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -939,7 +939,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -955,7 +955,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -971,7 +971,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -987,7 +987,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1003,7 +1003,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -1019,7 +1019,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1035,7 +1035,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -1051,7 +1051,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1067,7 +1067,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, @@ -1101,7 +1101,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1118,7 +1118,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1150,7 +1150,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1167,7 +1167,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1199,7 +1199,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1216,7 +1216,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1248,7 +1248,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1265,7 +1265,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1297,7 +1297,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1314,7 +1314,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1346,7 +1346,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1363,7 +1363,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1395,7 +1395,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1412,7 +1412,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1444,7 +1444,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1461,7 +1461,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1493,7 +1493,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1510,7 +1510,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1527,7 +1527,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1544,7 +1544,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1561,7 +1561,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1578,7 +1578,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1595,7 +1595,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1612,7 +1612,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1629,7 +1629,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1646,7 +1646,7 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .present = 0, - .probed = 0, + .probed = false, .bank_number = 1, }, }, @@ -1680,7 +1680,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1695,7 +1695,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -1721,7 +1721,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1736,7 +1736,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -1780,7 +1780,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1795,7 +1795,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -1822,7 +1822,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1837,7 +1837,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -1863,7 +1863,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1878,7 +1878,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -1904,7 +1904,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1919,11 +1919,11 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, - .base_address = FLASH_BANK1_BASE_512K_AX , + .base_address = FLASH_BANK1_BASE_512K_AX, .controller_address = 0x400e0c00, .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, @@ -1945,7 +1945,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -1960,7 +1960,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -1986,7 +1986,7 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, @@ -2001,7 +2001,7 @@ static const struct sam3_chip_details all_sam3_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, @@ -3051,7 +3051,7 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command) pChip->target = bank->target; /* assumption is this runs at 32khz */ pChip->cfg.slow_freq = 32768; - pChip->probed = 0; + pChip->probed = false; } switch (bank->base) { @@ -3095,7 +3095,7 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command) } /** - * Remove all chips from the internal list without distingushing which one + * Remove all chips from the internal list without distinguishing which one * is owned by this bank. This simplification works only for one shot * deallocation like current flash_free_all_banks() */ @@ -3171,12 +3171,11 @@ static int sam3_GetDetails(struct sam3_bank_private *pPrivate) static int _sam3_probe(struct flash_bank *bank, int noise) { - unsigned x; int r; struct sam3_bank_private *pPrivate; - LOG_DEBUG("Begin: Bank: %d, Noise: %d", bank->bank_number, noise); + LOG_DEBUG("Begin: Bank: %u, Noise: %d", bank->bank_number, noise); if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; @@ -3201,7 +3200,7 @@ static int _sam3_probe(struct flash_bank *bank, int noise) return r; /* update the flash bank size */ - for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) { + for (unsigned int x = 0; x < SAM3_MAX_FLASH_BANKS; x++) { if (bank->base == pPrivate->pChip->details.bank[x].base_address) { bank->size = pPrivate->pChip->details.bank[x].size_bytes; break; @@ -3216,7 +3215,7 @@ static int _sam3_probe(struct flash_bank *bank, int noise) } bank->num_sectors = pPrivate->nsectors; - for (x = 0; ((int)(x)) < bank->num_sectors; x++) { + for (unsigned int x = 0; x < bank->num_sectors; x++) { bank->sectors[x].size = pPrivate->sector_size; bank->sectors[x].offset = x * (pPrivate->sector_size); /* mark as unknown */ @@ -3225,7 +3224,7 @@ static int _sam3_probe(struct flash_bank *bank, int noise) } } - pPrivate->probed = 1; + pPrivate->probed = true; r = sam3_protect_check(bank); if (r != ERROR_OK) @@ -3252,7 +3251,8 @@ static int sam3_auto_probe(struct flash_bank *bank) return _sam3_probe(bank, 0); } -static int sam3_erase(struct flash_bank *bank, int first, int last) +static int sam3_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct sam3_bank_private *pPrivate; int r; @@ -3273,7 +3273,7 @@ static int sam3_erase(struct flash_bank *bank, int first, int last) if (!(pPrivate->probed)) return ERROR_FLASH_BANK_NOT_PROBED; - if ((first == 0) && ((last + 1) == ((int)(pPrivate->nsectors)))) { + if ((first == 0) && ((last + 1) == pPrivate->nsectors)) { /* whole chip */ LOG_DEBUG("Here"); return FLASHD_EraseEntireBank(pPrivate); @@ -3282,7 +3282,8 @@ static int sam3_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int sam3_protect(struct flash_bank *bank, int set, int first, int last) +static int sam3_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct sam3_bank_private *pPrivate; int r; @@ -3298,9 +3299,9 @@ static int sam3_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; if (set) - r = FLASHD_Lock(pPrivate, (unsigned)(first), (unsigned)(last)); + r = FLASHD_Lock(pPrivate, first, last); else - r = FLASHD_Unlock(pPrivate, (unsigned)(first), (unsigned)(last)); + r = FLASHD_Unlock(pPrivate, first, last); LOG_DEBUG("End: r=%d", r); return r; @@ -3397,7 +3398,7 @@ static int sam3_write(struct flash_bank *bank, struct sam3_bank_private *pPrivate; uint8_t *pagebuffer; - /* incase we bail further below, set this to null */ + /* in case we bail further below, set this to null */ pagebuffer = NULL; /* ignore dumb requests */ @@ -3529,8 +3530,7 @@ static int sam3_write(struct flash_bank *bank, LOG_DEBUG("Done!"); r = ERROR_OK; done: - if (pagebuffer) - free(pagebuffer); + free(pagebuffer); return r; } diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index 5b56c4241..86abf7005 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -22,7 +22,7 @@ * along with this program. If not, see . * ****************************************************************************/ -/* Some of the the lower level code was based on code supplied by +/* Some of the lower level code was based on code supplied by * ATMEL under this copyright. */ /* BEGIN ATMEL COPYRIGHT */ @@ -166,7 +166,7 @@ struct sam4_cfg { }; struct sam4_bank_private { - int probed; + bool probed; /* DANGER: THERE ARE DRAGONS HERE.. */ /* NOTE: If you add more 'ghost' pointers */ /* be aware that you must *manually* update */ @@ -212,7 +212,7 @@ struct sam4_chip_details { struct sam4_chip { struct sam4_chip *next; - int probed; + bool probed; /* this is "initialized" from the global const structure */ struct sam4_chip_details details; @@ -275,14 +275,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_C32, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -290,14 +290,14 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_C32, .controller_address = 0x400e0c00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -316,14 +316,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_C32, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -331,14 +331,14 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_C32, .controller_address = 0x400e0c00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -357,14 +357,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_C, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -372,8 +372,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -390,14 +390,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_C, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -405,8 +405,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -423,14 +423,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_C, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 256 * 1024, .nsectors = 32, .sector_size = 8192, @@ -438,8 +438,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -458,14 +458,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -473,8 +473,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -493,14 +493,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -508,8 +508,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -526,14 +526,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -541,8 +541,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -559,14 +559,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -574,8 +574,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -592,14 +592,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -607,8 +607,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -625,14 +625,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -640,8 +640,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -660,14 +660,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -675,8 +675,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -694,14 +694,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -709,8 +709,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -727,14 +727,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -742,8 +742,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -760,14 +760,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -775,8 +775,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -793,14 +793,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -808,8 +808,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -826,14 +826,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -841,8 +841,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -859,14 +859,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -874,8 +874,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -892,14 +892,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -907,8 +907,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -926,14 +926,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 256 * 1024, .nsectors = 32, .sector_size = 8192, @@ -941,8 +941,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -960,14 +960,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 256 * 1024, .nsectors = 32, .sector_size = 8192, @@ -975,8 +975,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -994,14 +994,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 256 * 1024, .nsectors = 32, .sector_size = 8192, @@ -1009,8 +1009,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -1028,14 +1028,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 128 * 1024, .nsectors = 16, .sector_size = 8192, @@ -1043,8 +1043,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -1062,14 +1062,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 128 * 1024, .nsectors = 16, .sector_size = 8192, @@ -1077,8 +1077,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -1096,14 +1096,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = {*/ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 128 * 1024, .nsectors = 16, .sector_size = 8192, @@ -1111,8 +1111,8 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, @@ -1131,14 +1131,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -1147,14 +1147,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_2048K_SD, .controller_address = 0x400e0c00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -1175,14 +1175,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -1191,14 +1191,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_2048K_SD, .controller_address = 0x400e0c00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 1024 * 1024, .nsectors = 128, .sector_size = 8192, @@ -1219,14 +1219,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1235,14 +1235,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_1024K_SD, .controller_address = 0x400e0c00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1263,14 +1263,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = { */ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1279,14 +1279,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_1024K_SD, .controller_address = 0x400e0c00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1307,14 +1307,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1322,15 +1322,15 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = {*/ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, } }, - /* atsamg55g19 */ + /* atsamg55g19 Rev.A */ { .chipid_cidr = 0x24470ae0, .name = "atsamg55g19", @@ -1342,14 +1342,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1357,14 +1357,48 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = */ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, .bank_number = 1, }, } }, - /* atsamg55j19 */ + /* atsamg55g19 Rev.B */ + { + .chipid_cidr = 0x24470ae1, + .name = "atsamg55g19b", + .total_flash_size = 512 * 1024, + .total_sram_size = 160 * 1024, + .n_gpnvms = 2, + .n_banks = 1, + + { +/* .bank[0] = */ + { + .probed = false, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_S, + .controller_address = 0x400e0a00, + .flash_wait_states = 5, + .present = true, + .size_bytes = 512 * 1024, + .nsectors = 64, + .sector_size = 8192, + .page_size = 512, + }, +/* .bank[1] = */ + { + .present = false, + .probed = false, + .bank_number = 1, + }, + } + }, + + /* atsamg55j19 Rev.A */ { .chipid_cidr = 0x24570ae0, .name = "atsamg55j19", @@ -1376,14 +1410,14 @@ static const struct sam4_chip_details all_sam4_details[] = { { /* .bank[0] = */ { - .probed = 0, + .probed = false, .pChip = NULL, .pBank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, .flash_wait_states = 5, - .present = 1, + .present = true, .size_bytes = 512 * 1024, .nsectors = 64, .sector_size = 8192, @@ -1391,8 +1425,42 @@ static const struct sam4_chip_details all_sam4_details[] = { }, /* .bank[1] = */ { - .present = 0, - .probed = 0, + .present = false, + .probed = false, + .bank_number = 1, + }, + } + }, + + /* atsamg55j19 Rev.B */ + { + .chipid_cidr = 0x24570ae1, + .name = "atsamg55j19b", + .total_flash_size = 512 * 1024, + .total_sram_size = 160 * 1024, + .n_gpnvms = 2, + .n_banks = 1, + + { +/* .bank[0] = */ + { + .probed = false, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_S, + .controller_address = 0x400e0a00, + .flash_wait_states = 5, + .present = true, + .size_bytes = 512 * 1024, + .nsectors = 64, + .sector_size = 8192, + .page_size = 512, + }, +/* .bank[1] = */ + { + .present = false, + .probed = false, .bank_number = 1, }, } @@ -1896,7 +1964,7 @@ static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip, } /* show the basics */ - LOG_USER_N("\t%*s: %*" PRId32 " [0x%0*" PRIx32 "] ", + LOG_USER_N("\t%*s: %*" PRIu32 " [0x%0*" PRIx32 "] ", REG_NAME_WIDTH, regname, dwidth, v, hwidth, v); @@ -2472,7 +2540,7 @@ FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command) pChip->target = bank->target; /* assumption is this runs at 32khz */ pChip->cfg.slow_freq = 32768; - pChip->probed = 0; + pChip->probed = false; } switch (bank->base) { @@ -2509,7 +2577,7 @@ FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command) } /** - * Remove all chips from the internal list without distingushing which one + * Remove all chips from the internal list without distinguishing which one * is owned by this bank. This simplification works only for one shot * deallocation like current flash_free_all_banks() */ @@ -2549,7 +2617,7 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate) sam4_explain_chipid_cidr(pPrivate->pChip); return ERROR_FAIL; } else { - LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08x", pDetails->name, pDetails->chipid_cidr); + LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08" PRIx32, pDetails->name, pDetails->chipid_cidr); } /* DANGER: THERE ARE DRAGONS HERE */ @@ -2608,12 +2676,11 @@ static int sam4_info(struct flash_bank *bank, char *buf, int buf_size) static int sam4_probe(struct flash_bank *bank) { - unsigned x; int r; struct sam4_bank_private *pPrivate; - LOG_DEBUG("Begin: Bank: %d", bank->bank_number); + LOG_DEBUG("Begin: Bank: %u", bank->bank_number); if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; @@ -2638,7 +2705,7 @@ static int sam4_probe(struct flash_bank *bank) return r; /* update the flash bank size */ - for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) { + for (unsigned int x = 0; x < SAM4_MAX_FLASH_BANKS; x++) { if (bank->base == pPrivate->pChip->details.bank[x].base_address) { bank->size = pPrivate->pChip->details.bank[x].size_bytes; LOG_DEBUG("SAM4 Set flash bank to " TARGET_ADDR_FMT " - " @@ -2656,7 +2723,7 @@ static int sam4_probe(struct flash_bank *bank) } bank->num_sectors = pPrivate->nsectors; - for (x = 0; ((int)(x)) < bank->num_sectors; x++) { + for (unsigned int x = 0; x < bank->num_sectors; x++) { bank->sectors[x].size = pPrivate->sector_size; bank->sectors[x].offset = x * (pPrivate->sector_size); /* mark as unknown */ @@ -2665,7 +2732,7 @@ static int sam4_probe(struct flash_bank *bank) } } - pPrivate->probed = 1; + pPrivate->probed = true; r = sam4_protect_check(bank); if (r != ERROR_OK) @@ -2693,11 +2760,11 @@ static int sam4_auto_probe(struct flash_bank *bank) return sam4_probe(bank); } -static int sam4_erase(struct flash_bank *bank, int first, int last) +static int sam4_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct sam4_bank_private *pPrivate; int r; - int i; int pageCount; /*16 pages equals 8KB - Same size as a lock region*/ pageCount = 16; @@ -2719,26 +2786,26 @@ static int sam4_erase(struct flash_bank *bank, int first, int last) if (!(pPrivate->probed)) return ERROR_FLASH_BANK_NOT_PROBED; - if ((first == 0) && ((last + 1) == ((int)(pPrivate->nsectors)))) { + if ((first == 0) && ((last + 1) == pPrivate->nsectors)) { /* whole chip */ LOG_DEBUG("Here"); return FLASHD_EraseEntireBank(pPrivate); } LOG_INFO("sam4 does not auto-erase while programming (Erasing relevant sectors)"); - LOG_INFO("sam4 First: 0x%08x Last: 0x%08x", (unsigned int)(first), (unsigned int)(last)); - for (i = first; i <= last; i++) { + LOG_INFO("sam4 First: 0x%08x Last: 0x%08x", first, last); + for (unsigned int i = first; i <= last; i++) { /*16 pages equals 8KB - Same size as a lock region*/ r = FLASHD_ErasePages(pPrivate, (i * pageCount), pageCount, &status); - LOG_INFO("Erasing sector: 0x%08x", (unsigned int)(i)); + LOG_INFO("Erasing sector: 0x%08x", i); if (r != ERROR_OK) - LOG_ERROR("SAM4: Error performing Erase page @ lock region number %d", - (unsigned int)(i)); + LOG_ERROR("SAM4: Error performing Erase page @ lock region number %u", + i); if (status & (1 << 2)) { - LOG_ERROR("SAM4: Lock Region %d is locked", (unsigned int)(i)); + LOG_ERROR("SAM4: Lock Region %u is locked", i); return ERROR_FAIL; } if (status & (1 << 1)) { - LOG_ERROR("SAM4: Flash Command error @lock region %d", (unsigned int)(i)); + LOG_ERROR("SAM4: Flash Command error @lock region %u", i); return ERROR_FAIL; } } @@ -2746,7 +2813,8 @@ static int sam4_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int sam4_protect(struct flash_bank *bank, int set, int first, int last) +static int sam4_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct sam4_bank_private *pPrivate; int r; @@ -2762,9 +2830,9 @@ static int sam4_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; if (set) - r = FLASHD_Lock(pPrivate, (unsigned)(first), (unsigned)(last)); + r = FLASHD_Lock(pPrivate, first, last); else - r = FLASHD_Unlock(pPrivate, (unsigned)(first), (unsigned)(last)); + r = FLASHD_Unlock(pPrivate, first, last); LOG_DEBUG("End: r=%d", r); return r; @@ -2873,7 +2941,7 @@ static int sam4_write(struct flash_bank *bank, struct sam4_bank_private *pPrivate; uint8_t *pagebuffer; - /* incase we bail further below, set this to null */ + /* in case we bail further below, set this to null */ pagebuffer = NULL; /* ignore dumb requests */ @@ -3009,8 +3077,7 @@ static int sam4_write(struct flash_bank *bank, LOG_DEBUG("Done!"); r = ERROR_OK; done: - if (pagebuffer) - free(pagebuffer); + free(pagebuffer); return r; } diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c index d4bfe5310..d09414cbe 100644 --- a/src/flash/nor/at91sam4l.c +++ b/src/flash/nor/at91sam4l.c @@ -125,7 +125,7 @@ struct sam4l_info { uint32_t page_size; int num_pages; int sector_size; - int pages_per_sector; + unsigned int pages_per_sector; bool probed; struct target *target; @@ -335,7 +335,7 @@ static int sam4l_probe(struct flash_bank *bank) /* Fill out the sector information: all SAM4L sectors are the same size and * there is always a fixed number of them. */ - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].size = chip->sector_size; bank->sectors[i].offset = i * chip->sector_size; /* mark as unknown */ @@ -346,7 +346,7 @@ static int sam4l_probe(struct flash_bank *bank) /* Done */ chip->probed = true; - LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRId32 "B pages, %" PRIu32 "KB RAM)", + LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRIu32 "B pages, %" PRIu32 "KB RAM)", chip->details ? chip->details->name : "unknown", (char)('A' + (id & 0xF)), chip->flash_kb, chip->num_pages, chip->page_size, chip->ram_kb); @@ -375,13 +375,14 @@ static int sam4l_protect_check(struct flash_bank *bank) return res; st >>= 16; /* There are 16 lock region bits in the upper half word */ - for (int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_protected = !!(st & (1<num_sectors; i++) + bank->sectors[i].is_protected = !!(st & (1<driver_priv; @@ -398,7 +399,7 @@ static int sam4l_protect(struct flash_bank *bank, int set, int first, int last) /* Make sure the pages make sense. */ if (first >= bank->num_sectors || last >= bank->num_sectors) { - LOG_ERROR("Protect range %d - %d not valid (%d sectors total)", first, last, + LOG_ERROR("Protect range %u - %u not valid (%u sectors total)", first, last, bank->num_sectors); return ERROR_FAIL; } @@ -406,7 +407,7 @@ static int sam4l_protect(struct flash_bank *bank, int set, int first, int last) /* Try to lock or unlock each sector in the range. This is done by locking * a region containing one page in that sector, we arbitrarily choose the 0th * page in the sector. */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { int res; res = sam4l_flash_command(bank->target, @@ -420,7 +421,8 @@ static int sam4l_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_OK; } -static int sam4l_erase(struct flash_bank *bank, int first, int last) +static int sam4l_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int ret; struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv; @@ -438,7 +440,7 @@ static int sam4l_erase(struct flash_bank *bank, int first, int last) /* Make sure the pages make sense. */ if (first >= bank->num_sectors || last >= bank->num_sectors) { - LOG_ERROR("Erase range %d - %d not valid (%d sectors total)", first, last, + LOG_ERROR("Erase range %u - %u not valid (%u sectors total)", first, last, bank->num_sectors); return ERROR_FAIL; } @@ -453,19 +455,19 @@ static int sam4l_erase(struct flash_bank *bank, int first, int last) return ret; } } else { - LOG_DEBUG("Erasing sectors %d through %d...\n", first, last); + LOG_DEBUG("Erasing sectors %u through %u...\n", first, last); /* For each sector... */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { /* For each page in that sector... */ - for (int j = 0; j < chip->pages_per_sector; j++) { - int pn = i * chip->pages_per_sector + j; + for (unsigned int j = 0; j < chip->pages_per_sector; j++) { + unsigned int pn = i * chip->pages_per_sector + j; bool is_erased = false; /* Issue the page erase */ ret = sam4l_flash_command(bank->target, SAM4L_FCMD_EP, pn); if (ret != ERROR_OK) { - LOG_ERROR("Erasing page %d failed", pn); + LOG_ERROR("Erasing page %u failed", pn); return ret; } @@ -474,7 +476,7 @@ static int sam4l_erase(struct flash_bank *bank, int first, int last) return ret; if (!is_erased) { - LOG_DEBUG("Page %d was not erased.", pn); + LOG_DEBUG("Page %u was not erased.", pn); return ERROR_FAIL; } } diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c index 039746c16..3d8fee1af 100644 --- a/src/flash/nor/at91sam7.c +++ b/src/flash/nor/at91sam7.c @@ -254,7 +254,7 @@ static void at91sam7_read_clock_info(struct flash_bank *bank) at91sam7_info->mck_freq = tmp; } -/* Setup the timimg registers for nvbits or normal flash */ +/* Setup the timing registers for nvbits or normal flash */ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode) { uint32_t fmr, fmcn = 0, fws = 0; @@ -377,7 +377,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank) /* re-calculate master clock frequency */ at91sam7_read_clock_info(t_bank); - /* no timming */ + /* no timing */ at91sam7_set_flash_mode(t_bank, FMR_TIMING_NONE); /* check protect state */ @@ -415,7 +415,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank) /* calculate master clock frequency */ at91sam7_read_clock_info(t_bank); - /* no timming */ + /* no timing */ at91sam7_set_flash_mode(t_bank, FMR_TIMING_NONE); /* check protect state */ @@ -623,7 +623,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank) /* calculate master clock frequency */ at91sam7_read_clock_info(t_bank); - /* no timming */ + /* no timing */ at91sam7_set_flash_mode(t_bank, FMR_TIMING_NONE); /* check protect state */ @@ -702,17 +702,15 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command) uint32_t bank_size; uint32_t ext_freq = 0; - int chip_width; - int bus_width; - int banks_num; - int num_sectors; + unsigned int chip_width; + unsigned int bus_width; + unsigned int banks_num; + unsigned int num_sectors; uint16_t pages_per_sector; uint16_t page_size; uint16_t num_nvmbits; - int bnk, sec; - at91sam7_info = malloc(sizeof(struct at91sam7_flash_bank)); t_bank->driver_priv = at91sam7_info; @@ -729,11 +727,11 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], base_address); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], chip_width); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[4], bus_width); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[3], chip_width); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[4], bus_width); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[8], banks_num); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[9], num_sectors); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[8], banks_num); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[9], num_sectors); COMMAND_PARSE_NUMBER(u16, CMD_ARGV[10], pages_per_sector); COMMAND_PARSE_NUMBER(u16, CMD_ARGV[11], page_size); COMMAND_PARSE_NUMBER(u16, CMD_ARGV[12], num_nvmbits); @@ -754,7 +752,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command) /* calculate bank size */ bank_size = num_sectors * pages_per_sector * page_size; - for (bnk = 0; bnk < banks_num; bnk++) { + for (unsigned int bnk = 0; bnk < banks_num; bnk++) { if (bnk > 0) { if (!t_bank->next) { /* create a new bank element */ @@ -780,7 +778,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command) /* allocate sectors */ t_bank->sectors = malloc(num_sectors * sizeof(struct flash_sector)); - for (sec = 0; sec < num_sectors; sec++) { + for (unsigned int sec = 0; sec < num_sectors; sec++) { t_bank->sectors[sec].offset = sec * pages_per_sector * page_size; t_bank->sectors[sec].size = pages_per_sector * page_size; t_bank->sectors[sec].is_erased = -1; @@ -801,10 +799,10 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command) return ERROR_OK; } -static int at91sam7_erase(struct flash_bank *bank, int first, int last) +static int at91sam7_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; - int sec; uint32_t nbytes, pos; uint8_t *buffer; uint8_t erase_all; @@ -817,7 +815,7 @@ static int at91sam7_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) + if ((last < first) || (last >= bank->num_sectors)) return ERROR_FLASH_SECTOR_INVALID; erase_all = 0; @@ -847,16 +845,16 @@ static int at91sam7_erase(struct flash_bank *bank, int first, int last) } /* mark erased sectors */ - for (sec = first; sec <= last; sec++) + for (unsigned int sec = first; sec <= last; sec++) bank->sectors[sec].is_erased = 1; return ERROR_OK; } -static int at91sam7_protect(struct flash_bank *bank, int set, int first, int last) +static int at91sam7_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { uint32_t cmd; - int sector; uint32_t pagen; struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; @@ -869,14 +867,14 @@ static int at91sam7_protect(struct flash_bank *bank, int set, int first, int las return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) + if ((last < first) || (last >= bank->num_sectors)) return ERROR_FLASH_SECTOR_INVALID; /* Configure the flash controller timing */ at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS); - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (set) cmd = SLB; else @@ -956,7 +954,7 @@ static int at91sam7_write(struct flash_bank *bank, const uint8_t *buffer, uint32 /* Send Write Page command to Flash Controller */ if (at91sam7_flash_command(bank, WP, pagen) != ERROR_OK) return ERROR_FLASH_OPERATION_FAILED; - LOG_DEBUG("Write flash bank:%i page number:%" PRIi32 "", bank->bank_number, pagen); + LOG_DEBUG("Write flash bank:%u page number:%" PRIu32, bank->bank_number, pagen); } return ERROR_OK; @@ -1018,7 +1016,7 @@ static int get_at91sam7_info(struct flash_bank *bank, char *buf, int buf_size) printed = snprintf(buf, buf_size, - " Pagesize: %i bytes | Lockbits(%i): %i 0x%4.4x | Pages in lock region: %i\n", + " Pagesize: %i bytes | Lockbits(%u): %i 0x%4.4x | Pages in lock region: %i\n", at91sam7_info->pagesize, bank->num_sectors, at91sam7_info->num_lockbits_on, diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c index 6e89099ab..5fbf8bcaa 100644 --- a/src/flash/nor/at91samd.c +++ b/src/flash/nor/at91samd.c @@ -41,7 +41,7 @@ #define SAMD_NVMCTRL_CTRLA 0x00 /* NVM control A register */ #define SAMD_NVMCTRL_CTRLB 0x04 /* NVM control B register */ #define SAMD_NVMCTRL_PARAM 0x08 /* NVM parameters register */ -#define SAMD_NVMCTRL_INTFLAG 0x18 /* NVM Interupt Flag Status & Clear */ +#define SAMD_NVMCTRL_INTFLAG 0x18 /* NVM Interrupt Flag Status & Clear */ #define SAMD_NVMCTRL_STATUS 0x18 /* NVM status register */ #define SAMD_NVMCTRL_ADDR 0x1C /* NVM address register */ #define SAMD_NVMCTRL_LOCK 0x20 /* NVM Lock section register */ @@ -52,8 +52,8 @@ /* NVMCTRL commands. See Table 20-4 in 42129F–SAM–10/2013 */ #define SAMD_NVM_CMD_ER 0x02 /* Erase Row */ #define SAMD_NVM_CMD_WP 0x04 /* Write Page */ -#define SAMD_NVM_CMD_EAR 0x05 /* Erase Auxilary Row */ -#define SAMD_NVM_CMD_WAP 0x06 /* Write Auxilary Page */ +#define SAMD_NVM_CMD_EAR 0x05 /* Erase Auxiliary Row */ +#define SAMD_NVM_CMD_WAP 0x06 /* Write Auxiliary Page */ #define SAMD_NVM_CMD_LR 0x40 /* Lock Region */ #define SAMD_NVM_CMD_UR 0x41 /* Unlock Region */ #define SAMD_NVM_CMD_SPRM 0x42 /* Set Power Reduction Mode */ @@ -398,7 +398,7 @@ static const struct samd_part *samd_find_part(uint32_t id) static int samd_protect_check(struct flash_bank *bank) { - int res, prot_block; + int res; uint16_t lock; res = target_read_u16(bank->target, @@ -407,7 +407,7 @@ static int samd_protect_check(struct flash_bank *bank) return res; /* Lock bits are active-low */ - for (prot_block = 0; prot_block < bank->num_prot_blocks; prot_block++) + for (unsigned int prot_block = 0; prot_block < bank->num_prot_blocks; prot_block++) bank->prot_blocks[prot_block].is_protected = !(lock & (1u<prot_blocks[prot_block].is_protected) { /* Load an address that is within this protection block (we use offset 0) */ res = target_write_u32(bank->target, @@ -763,7 +763,7 @@ static int samd_protect(struct flash_bank *bank, int set, int first_prot_bl, int res = samd_modify_user_row(bank->target, set ? (uint64_t)0 : (uint64_t)UINT64_MAX, - 48 + first_prot_bl, 48 + last_prot_bl); + 48 + first, 48 + last); if (res != ERROR_OK) LOG_WARNING("SAMD: protect settings were not made persistent!"); @@ -775,9 +775,10 @@ exit: return res; } -static int samd_erase(struct flash_bank *bank, int first_sect, int last_sect) +static int samd_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int res, s; + int res; struct samd_info *chip = (struct samd_info *)bank->driver_priv; if (bank->target->state != TARGET_HALTED) { @@ -792,7 +793,7 @@ static int samd_erase(struct flash_bank *bank, int first_sect, int last_sect) } /* For each sector to be erased */ - for (s = first_sect; s <= last_sect; s++) { + for (unsigned int s = first; s <= last; s++) { res = samd_erase_row(bank->target, bank->sectors[s].offset); if (res != ERROR_OK) { LOG_ERROR("SAMD: failed to erase sector %d at 0x%08" PRIx32, s, bank->sectors[s].offset); @@ -914,9 +915,7 @@ static int samd_write(struct flash_bank *bank, const uint8_t *buffer, } free_pb: - if (pb) - free(pb); - + free(pb); return res; } diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c index c551f2722..9a4595f6d 100644 --- a/src/flash/nor/ath79.c +++ b/src/flash/nor/ath79.c @@ -89,7 +89,7 @@ struct ath79_spi_ctx { }; struct ath79_flash_bank { - int probed; + bool probed; int chipselect; uint32_t io_base; const struct flash_device *dev; @@ -275,7 +275,7 @@ static int ath79_spi_bitbang_chunk(struct flash_bank *bank, *transferred = 0; pracc_queue_init(&ctx); - LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08x, %p, %d)", + LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08" PRIx32 ", %p, %d)", target, ath79_info->io_base, data, len); LOG_DEBUG("max code %d => max len %d. to_xfer %d", @@ -498,21 +498,21 @@ static int ath79_erase_sector(struct flash_bank *bank, int sector) return wait_till_ready(bank, ATH79_MAX_TIMEOUT); } -static int ath79_erase(struct flash_bank *bank, int first, int last) +static int ath79_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct ath79_flash_bank *ath79_info = bank->driver_priv; int retval = ERROR_OK; - int sector; - LOG_DEBUG("%s: from sector %d to sector %d", __func__, first, last); + LOG_DEBUG("%s: from sector %u to sector %u", __func__, first, last); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -525,14 +525,14 @@ static int ath79_erase(struct flash_bank *bank, int first, int last) if (ath79_info->dev->erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; - for (sector = first; sector <= last; sector++) { + for (unsigned sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { retval = ath79_erase_sector(bank, sector); if (retval != ERROR_OK) break; @@ -542,12 +542,10 @@ static int ath79_erase(struct flash_bank *bank, int first, int last) return retval; } -static int ath79_protect(struct flash_bank *bank, int set, - int first, int last) +static int ath79_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { - int sector; - - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_protected = set; return ERROR_OK; } @@ -570,7 +568,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer, ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE; if (address & 0xff) { - LOG_ERROR("ath79_write_page: unaligned write address: %08x", + LOG_ERROR("ath79_write_page: unaligned write address: %08" PRIx32, address); return ERROR_FAIL; } @@ -579,7 +577,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FAIL; } if (len > ath79_info->dev->pagesize) { - LOG_ERROR("ath79_write_page: len bigger than page size %d: %d", + LOG_ERROR("ath79_write_page: len bigger than page size %" PRIu32 ": %" PRIu32, pagesize, len); return ERROR_FAIL; } @@ -591,7 +589,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer, if (i == len) /* all 0xff, no need to program. */ return ERROR_OK; - LOG_INFO("writing %d bytes to flash page @0x%08x", len, address); + LOG_INFO("writing %" PRIu32 " bytes to flash page @0x%08" PRIx32, len, address); memcpy(ath79_info->spi.page_buf, buffer, len); @@ -648,7 +646,6 @@ static int ath79_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct target *target = bank->target; - int sector; LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32, __func__, offset, count); @@ -664,7 +661,7 @@ static int ath79_write(struct flash_bank *bank, const uint8_t *buffer, } /* Check sector protection */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start offset in or before this sector? */ /* End offset in or behind this sector? */ struct flash_sector *bs = &bank->sectors[sector]; @@ -672,7 +669,7 @@ static int ath79_write(struct flash_bank *bank, const uint8_t *buffer, if ((offset < (bs->offset + bs->size)) && ((offset + count - 1) >= bs->offset) && bs->is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -695,12 +692,12 @@ static int ath79_read_buffer(struct flash_bank *bank, uint8_t *buffer, __func__, address, len); if (address & 0xff) { - LOG_ERROR("ath79_read_buffer: unaligned read address: %08x", + LOG_ERROR("ath79_read_buffer: unaligned read address: %08" PRIx32, address); return ERROR_FAIL; } - LOG_INFO("reading %d bytes from flash @0x%08x", len, address); + LOG_INFO("reading %" PRIu32 " bytes from flash @0x%08" PRIx32, len, address); /* bitbang command */ ath79_spi_bitbang_prepare(bank); @@ -780,7 +777,7 @@ static int ath79_probe(struct flash_bank *bank) free(bank->sectors); free(ath79_info->spi.page_buf); } - ath79_info->probed = 0; + ath79_info->probed = false; for (target_device = target_devices; target_device->name; ++target_device) @@ -845,7 +842,7 @@ static int ath79_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = 0; @@ -853,7 +850,7 @@ static int ath79_probe(struct flash_bank *bank) } bank->sectors = sectors; - ath79_info->probed = 1; + ath79_info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c index eac7847dc..ed0bef463 100644 --- a/src/flash/nor/atsame5.c +++ b/src/flash/nor/atsame5.c @@ -27,13 +27,14 @@ #include "imp.h" #include "helper/binarybuffer.h" +#include #include /* A note to prefixing. - * Definitions and functions ingerited from at91samd.c without - * any change retained the original prefix samd_ so they eventualy + * Definitions and functions inherited from at91samd.c without + * any change retained the original prefix samd_ so they eventually * may go to samd_common.h and .c - * As currently there are olny 3 short functions identical with + * As currently there are only 3 short functions identical with * the original source, no common file was created. */ #define SAME5_PAGES_PER_BLOCK 16 @@ -230,7 +231,7 @@ static const struct samd_part *samd_find_part(uint32_t id) static int same5_protect_check(struct flash_bank *bank) { - int res, prot_block; + int res; uint32_t lock; res = target_read_u32(bank->target, @@ -239,7 +240,7 @@ static int same5_protect_check(struct flash_bank *bank) return res; /* Lock bits are active-low */ - for (prot_block = 0; prot_block < bank->num_prot_blocks; prot_block++) + for (unsigned int prot_block = 0; prot_block < bank->num_prot_blocks; prot_block++) bank->prot_blocks[prot_block].is_protected = !(lock & (1u<prot_blocks[prot_block].is_protected) { /* Load an address that is within this protection block (we use offset 0) */ res = target_write_u32(bank->target, @@ -596,7 +606,7 @@ static int same5_protect(struct flash_bank *bank, int set, int first_prot_bl, in const uint8_t unlock[4] = { 0xff, 0xff, 0xff, 0xff }; uint8_t mask[4] = { 0, 0, 0, 0 }; - buf_set_u32(mask, first_prot_bl, last_prot_bl + 1 - first_prot_bl, 0xffffffff); + buf_set_u32(mask, first, last + 1 - first, 0xffffffff); res = same5_modify_user_row_masked(bank->target, set ? lock : unlock, mask, 8, 4); @@ -611,9 +621,10 @@ exit: return res; } -static int same5_erase(struct flash_bank *bank, int first_sect, int last_sect) +static int same5_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int res, s; + int res; struct samd_info *chip = (struct samd_info *)bank->driver_priv; if (bank->target->state != TARGET_HALTED) { @@ -626,7 +637,7 @@ static int same5_erase(struct flash_bank *bank, int first_sect, int last_sect) return ERROR_FLASH_BANK_NOT_PROBED; /* For each sector to be erased */ - for (s = first_sect; s <= last_sect; s++) { + for (unsigned int s = first; s <= last; s++) { res = same5_erase_block(bank->target, bank->sectors[s].offset); if (res != ERROR_OK) { LOG_ERROR("SAM: failed to erase sector %d at 0x%08" PRIx32, s, bank->sectors[s].offset); @@ -720,9 +731,7 @@ static int same5_write(struct flash_bank *bank, const uint8_t *buffer, } free_pb: - if (pb) - free(pb); - + free(pb); return res; } @@ -731,7 +740,7 @@ FLASH_BANK_COMMAND_HANDLER(same5_flash_bank_command) { if (bank->base != SAMD_FLASH) { LOG_ERROR("Address " TARGET_ADDR_FMT " invalid bank address (try " - "0x%08" PRIx32 "[same5] )", bank->base, SAMD_FLASH); + "0x%08x[same5] )", bank->base, SAMD_FLASH); return ERROR_FAIL; } diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c index 9a53369a7..af48398e0 100644 --- a/src/flash/nor/atsamv.c +++ b/src/flash/nor/atsamv.c @@ -25,7 +25,7 @@ * along with this program. If not, see . * ***************************************************************************/ -/* Some of the the lower level code was based on code supplied by +/* Some of the lower level code was based on code supplied by * ATMEL under this copyright. */ /* BEGIN ATMEL COPYRIGHT */ @@ -97,7 +97,7 @@ extern const struct flash_driver atsamv_flash; struct samv_flash_bank { - int probed; + bool probed; unsigned size_bytes; unsigned gpnvm[SAMV_NUM_GPNVM_BITS]; }; @@ -328,7 +328,7 @@ static int samv_protect_check(struct flash_bank *bank) if (r != ERROR_OK) return r; - for (int x = 0; x < bank->num_sectors; x++) + for (unsigned int x = 0; x < bank->num_sectors; x++) bank->sectors[x].is_protected = (!!(v[x >> 5] & (1 << (x % 32)))); return ERROR_OK; } @@ -379,12 +379,12 @@ static int samv_probe(struct flash_bank *bank) struct samv_flash_bank *samv_info = bank->driver_priv; samv_info->size_bytes = bank->size; - samv_info->probed = 1; + samv_info->probed = true; bank->base = SAMV_FLASH_BASE; bank->num_sectors = bank->size / SAMV_SECTOR_SIZE; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (int s = 0; s < (int)bank->num_sectors; s++) { + for (unsigned int s = 0; s < bank->num_sectors; s++) { bank->sectors[s].size = SAMV_SECTOR_SIZE; bank->sectors[s].offset = s * SAMV_SECTOR_SIZE; bank->sectors[s].is_erased = -1; @@ -406,7 +406,8 @@ static int samv_auto_probe(struct flash_bank *bank) return samv_probe(bank); } -static int samv_erase(struct flash_bank *bank, int first, int last) +static int samv_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { const int page_count = 32; /* 32 pages equals 16 KB lock region */ @@ -420,31 +421,31 @@ static int samv_erase(struct flash_bank *bank, int first, int last) return r; /* easy case: we've been requested to erase the entire flash */ - if ((first == 0) && ((last + 1) == (int)(bank->num_sectors))) + if ((first == 0) && ((last + 1) == bank->num_sectors)) return samv_efc_perform_command(bank->target, SAMV_EFC_FCMD_EA, 0, NULL); - LOG_INFO("erasing lock regions %d-%d...", first, last); + LOG_INFO("erasing lock regions %u-%u...", first, last); - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { uint32_t status; r = samv_erase_pages(bank->target, (i * page_count), page_count, &status); - LOG_INFO("erasing lock region %d", i); + LOG_INFO("erasing lock region %u", i); if (r != ERROR_OK) - LOG_ERROR("error performing erase page @ lock region number %d", - (unsigned int)(i)); + LOG_ERROR("error performing erase page @ lock region number %u", i); if (status & (1 << 2)) { - LOG_ERROR("lock region %d is locked", (unsigned int)(i)); + LOG_ERROR("lock region %u is locked", i); return ERROR_FAIL; } if (status & (1 << 1)) { - LOG_ERROR("flash command error @lock region %d", (unsigned int)(i)); + LOG_ERROR("flash command error @lock region %u", i); return ERROR_FAIL; } } return ERROR_OK; } -static int samv_protect(struct flash_bank *bank, int set, int first, int last) +static int samv_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -453,9 +454,9 @@ static int samv_protect(struct flash_bank *bank, int set, int first, int last) int r; if (set) - r = samv_flash_lock(bank->target, (unsigned)(first), (unsigned)(last)); + r = samv_flash_lock(bank->target, first, last); else - r = samv_flash_unlock(bank->target, (unsigned)(first), (unsigned)(last)); + r = samv_flash_unlock(bank->target, first, last); return r; } @@ -614,7 +615,7 @@ static int samv_get_info(struct flash_bank *bank, char *buf, int buf_size) if (ERROR_OK != r) return r; } - snprintf(buf, buf_size, "Cortex-M7 detected with %d kB flash", + snprintf(buf, buf_size, "Cortex-M7 detected with %" PRIu32 " kB flash", bank->size / 1024); return ERROR_OK; } @@ -660,7 +661,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command) return ERROR_COMMAND_SYNTAX_ERROR; } - uint32_t v; + unsigned v; if (!strcmp("show", CMD_ARGV[0])) { if (who == -1) { showall: diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c index 93f6872bd..dd3d077a0 100644 --- a/src/flash/nor/avrf.c +++ b/src/flash/nor/avrf.c @@ -218,7 +218,8 @@ FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command) return ERROR_OK; } -static int avrf_erase(struct flash_bank *bank, int first, int last) +static int avrf_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct avr_common *avr = target->arch_info; @@ -263,7 +264,7 @@ static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t o } LOG_DEBUG("offset is 0x%08" PRIx32 "", offset); - LOG_DEBUG("count is %" PRId32 "", count); + LOG_DEBUG("count is %" PRIu32 "", count); if (ERROR_OK != avr_jtagprg_enterprogmode(avr)) return ERROR_FAIL; @@ -332,10 +333,7 @@ static int avrf_probe(struct flash_bank *bank) } if (avr_info != NULL) { - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); /* chip found */ bank->base = 0x00000000; @@ -442,7 +440,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command) if (avrf_mass_erase(bank) == ERROR_OK) { /* set all sectors as erased */ - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "avr mass erase complete"); diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c index fbce20d55..57ea7396f 100644 --- a/src/flash/nor/bluenrg-x.c +++ b/src/flash/nor/bluenrg-x.c @@ -123,12 +123,13 @@ static inline int bluenrgx_write_flash_reg(struct flash_bank *bank, uint32_t reg return target_write_u32(bank->target, bluenrgx_get_flash_reg(bank, reg_offset), value); } -static int bluenrgx_erase(struct flash_bank *bank, int first, int last) +static int bluenrgx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval = ERROR_OK; struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv; - int num_sectors = (last - first + 1); - int mass_erase = (num_sectors == bank->num_sectors); + unsigned int num_sectors = (last - first + 1); + const bool mass_erase = (num_sectors == bank->num_sectors); struct target *target = bank->target; uint32_t address, command; @@ -181,9 +182,9 @@ static int bluenrgx_erase(struct flash_bank *bank, int first, int last) } else { command = FLASH_CMD_ERASE_PAGE; - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { address = bank->base+i*FLASH_PAGE_SIZE(bluenrgx_info); - LOG_DEBUG("address = %08x, index = %d", address, i); + LOG_DEBUG("address = %08" PRIx32 ", index = %u", address, i); if (bluenrgx_write_flash_reg(bank, FLASH_REG_IRQRAW, 0x3f) != ERROR_OK) { LOG_ERROR("Register write failed"); @@ -248,7 +249,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FLASH_BANK_NOT_PROBED; if ((offset + count) > bank->size) { - LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %d, size=%d", + LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %" PRIu32 ", size=%" PRIu32, (offset + count), bank->size); return ERROR_FLASH_DST_OUT_OF_BANK; @@ -311,8 +312,8 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer, LOG_DEBUG("source->address = " TARGET_ADDR_FMT, source->address); LOG_DEBUG("source->address+ source->size = " TARGET_ADDR_FMT, source->address+source->size); LOG_DEBUG("write_algorithm_sp->address = " TARGET_ADDR_FMT, write_algorithm_sp->address); - LOG_DEBUG("address = %08x", address); - LOG_DEBUG("count = %08x", count); + LOG_DEBUG("address = %08" PRIx32, address); + LOG_DEBUG("count = %08" PRIx32, count); retval = target_run_flash_async_algorithm(target, buffer, @@ -399,7 +400,7 @@ static int bluenrgx_probe(struct flash_bank *bank) bank->num_sectors = bank->size/FLASH_PAGE_SIZE(bluenrgx_info); bank->sectors = realloc(bank->sectors, sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * FLASH_PAGE_SIZE(bluenrgx_info); bank->sectors[i].size = FLASH_PAGE_SIZE(bluenrgx_info); bank->sectors[i].is_erased = -1; diff --git a/src/flash/nor/cc26xx.c b/src/flash/nor/cc26xx.c index 176211a07..5565aeb41 100644 --- a/src/flash/nor/cc26xx.c +++ b/src/flash/nor/cc26xx.c @@ -264,7 +264,8 @@ FLASH_BANK_COMMAND_HANDLER(cc26xx_flash_bank_command) return ERROR_OK; } -static int cc26xx_erase(struct flash_bank *bank, int first, int last) +static int cc26xx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct cc26xx_bank *cc26xx_bank = bank->driver_priv; @@ -526,7 +527,7 @@ static int cc26xx_info(struct flash_bank *bank, char *buf, int buf_size) } printed = snprintf(buf, buf_size, - "%s device: ICEPick ID 0x%08x, USER ID 0x%08x\n", + "%s device: ICEPick ID 0x%08" PRIx32 ", USER ID 0x%08" PRIx32 "\n", device, cc26xx_bank->icepick_id, cc26xx_bank->user_id); if (printed >= buf_size) diff --git a/src/flash/nor/cc3220sf.c b/src/flash/nor/cc3220sf.c index c8de7d002..5427bd3a9 100644 --- a/src/flash/nor/cc3220sf.c +++ b/src/flash/nor/cc3220sf.c @@ -106,7 +106,8 @@ FLASH_BANK_COMMAND_HANDLER(cc3220sf_flash_bank_command) return ERROR_OK; } -static int cc3220sf_erase(struct flash_bank *bank, int first, int last) +static int cc3220sf_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; bool done; @@ -129,7 +130,7 @@ static int cc3220sf_erase(struct flash_bank *bank, int first, int last) } /* Erase requested sectors one by one */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { /* Determine address of sector to erase */ address = FLASH_BASE_ADDR + i * FLASH_SECTOR_SIZE; @@ -431,16 +432,13 @@ static int cc3220sf_probe(struct flash_bank *bank) uint32_t base; uint32_t size; - int num_sectors; + unsigned int num_sectors; base = FLASH_BASE_ADDR; size = FLASH_NUM_SECTORS * FLASH_SECTOR_SIZE; num_sectors = FLASH_NUM_SECTORS; - if (NULL != bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); if (NULL == bank->sectors) @@ -452,7 +450,7 @@ static int cc3220sf_probe(struct flash_bank *bank) bank->write_end_alignment = 0; bank->num_sectors = num_sectors; - for (int i = 0; i < num_sectors; i++) { + for (unsigned int i = 0; i < num_sectors; i++) { bank->sectors[i].offset = i * FLASH_SECTOR_SIZE; bank->sectors[i].size = FLASH_SECTOR_SIZE; bank->sectors[i].is_erased = -1; diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 50ab207c1..5f5071e69 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -162,10 +162,10 @@ static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf) cmd_buf[i] = 0; if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) { - for (int i = bank->bus_width; i > 0; i--) + for (unsigned int i = bank->bus_width; i > 0; i--) *cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd; } else { - for (int i = 1; i <= bank->bus_width; i++) + for (unsigned int i = 1; i <= bank->bus_width; i++) *cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd; } } @@ -217,13 +217,13 @@ static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint return retval; if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) { - for (int i = 0; i < bank->bus_width / bank->chip_width; i++) + for (unsigned int i = 0; i < bank->bus_width / bank->chip_width; i++) data[0] |= data[i]; *val = data[0]; } else { uint8_t value = 0; - for (int i = 0; i < bank->bus_width / bank->chip_width; i++) + for (unsigned int i = 0; i < bank->bus_width / bank->chip_width; i++) value |= data[bank->bus_width - 1 - i]; *val = value; @@ -423,8 +423,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank) struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_intel_pri_ext *pri_ext; - if (cfi_info->pri_ext) - free(cfi_info->pri_ext); + free(cfi_info->pri_ext); pri_ext = malloc(sizeof(struct cfi_intel_pri_ext)); if (pri_ext == NULL) { @@ -520,8 +519,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext; - if (cfi_info->pri_ext) - free(cfi_info->pri_ext); + free(cfi_info->pri_ext); pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); if (pri_ext == NULL) { @@ -623,8 +621,7 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank) struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext; - if (cfi_info->pri_ext) - free(cfi_info->pri_ext); + free(cfi_info->pri_ext); pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); if (pri_ext == NULL) { @@ -814,7 +811,7 @@ static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size) int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **argv) { struct cfi_flash_bank *cfi_info; - int bus_swap = 0; + bool bus_swap = false; if (argc < 6) return ERROR_COMMAND_SYNTAX_ERROR; @@ -841,20 +838,20 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char ** cfi_info->pri_ext = NULL; bank->driver_priv = cfi_info; - cfi_info->x16_as_x8 = 0; - cfi_info->jedec_probe = 0; - cfi_info->not_cfi = 0; - cfi_info->data_swap = 0; + cfi_info->x16_as_x8 = false; + cfi_info->jedec_probe = false; + cfi_info->not_cfi = false; + cfi_info->data_swap = false; for (unsigned i = 6; i < argc; i++) { if (strcmp(argv[i], "x16_as_x8") == 0) - cfi_info->x16_as_x8 = 1; + cfi_info->x16_as_x8 = true; else if (strcmp(argv[i], "data_swap") == 0) - cfi_info->data_swap = 1; + cfi_info->data_swap = true; else if (strcmp(argv[i], "bus_swap") == 0) - bus_swap = 1; + bus_swap = true; else if (strcmp(argv[i], "jedec_probe") == 0) - cfi_info->jedec_probe = 1; + cfi_info->jedec_probe = true; } if (bus_swap) @@ -877,14 +874,15 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) return cfi_flash_bank_cmd(bank, CMD_ARGC, CMD_ARGV); } -static int cfi_intel_erase(struct flash_bank *bank, int first, int last) +static int cfi_intel_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; cfi_intel_clear_status_register(bank); - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = cfi_send_command(bank, 0x20, cfi_flash_address(bank, i, 0x0)); if (retval != ERROR_OK) return retval; @@ -905,7 +903,7 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - LOG_ERROR("couldn't erase block %i of flash bank at base " + LOG_ERROR("couldn't erase block %u of flash bank at base " TARGET_ADDR_FMT, i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } @@ -931,13 +929,14 @@ int cfi_spansion_unlock_seq(struct flash_bank *bank) return ERROR_OK; } -static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) +static int cfi_spansion_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = cfi_spansion_unlock_seq(bank); if (retval != ERROR_OK) return retval; @@ -970,7 +969,8 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) return cfi_send_command(bank, 0xf0, cfi_flash_address(bank, 0, 0x0)); } -int cfi_erase(struct flash_bank *bank, int first, int last) +int cfi_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -979,7 +979,7 @@ int cfi_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) + if ((last < first) || (last >= bank->num_sectors)) return ERROR_FLASH_SECTOR_INVALID; if (cfi_info->qry[0] != 'Q') @@ -999,7 +999,8 @@ int cfi_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int last) +static int cfi_intel_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -1016,7 +1017,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la cfi_intel_clear_status_register(bank); - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = cfi_send_command(bank, 0x60, cfi_flash_address(bank, i, 0x0)); if (retval != ERROR_OK) return retval; @@ -1087,7 +1088,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la * 3. re-protect what should be protected. * */ - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (bank->sectors[i].is_protected == 1) { cfi_intel_clear_status_register(bank); @@ -1110,7 +1111,8 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la return cfi_send_command(bank, 0xff, cfi_flash_address(bank, 0, 0x0)); } -int cfi_protect(struct flash_bank *bank, int set, int first, int last) +int cfi_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -1146,7 +1148,7 @@ static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd) case 4: return target_buffer_get_u32(target, buf); default: - LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", + LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes", bank->bus_width); return 0; } @@ -1173,7 +1175,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, * r6: error test pattern */ - /* see contib/loaders/flash/armv4_5_cfi_intel_32.s for src */ + /* see contrib/loaders/flash/armv4_5_cfi_intel_32.s for src */ static const uint32_t word_32_code[] = { 0xe4904004, /* loop: ldr r4, [r0], #4 */ 0xe5813000, /* str r3, [r1] */ @@ -1191,7 +1193,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, 0xeafffffe /* done: b -2 */ }; - /* see contib/loaders/flash/armv4_5_cfi_intel_16.s for src */ + /* see contrib/loaders/flash/armv4_5_cfi_intel_16.s for src */ static const uint32_t word_16_code[] = { 0xe0d040b2, /* loop: ldrh r4, [r0], #2 */ 0xe1c130b0, /* strh r3, [r1] */ @@ -1209,7 +1211,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, 0xeafffffe /* done: b -2 */ }; - /* see contib/loaders/flash/armv4_5_cfi_intel_8.s for src */ + /* see contrib/loaders/flash/armv4_5_cfi_intel_8.s for src */ static const uint32_t word_8_code[] = { 0xe4d04001, /* loop: ldrb r4, [r0], #1 */ 0xe5c13000, /* strb r3, [r1] */ @@ -1244,7 +1246,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, cfi_intel_clear_status_register(bank); - /* If we are setting up the write_algorith, we need target_code_src + /* If we are setting up the write_algorithm, we need target_code_src * if not we only need target_code_size. */ /* However, we don't want to create multiple code paths, so we @@ -1266,7 +1268,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, target_code_size = sizeof(word_32_code); break; default: - LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", + LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes", bank->bus_width); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -1359,7 +1361,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, if (retval != ERROR_OK) { cfi_intel_clear_status_register(bank); LOG_ERROR( - "Execution of flash algorythm failed. Can't fall back. Please report."); + "Execution of flash algorithm failed. Can't fall back. Please report."); retval = ERROR_FLASH_OPERATION_FAILED; /* retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; */ /* FIXME To allow fall back or recovery, we must save the actual status @@ -1502,7 +1504,7 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t } break; default: - LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", + LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes", bank->bus_width); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -1648,7 +1650,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff * R10 = unlock2_addr * R11 = unlock2_cmd */ - /* see contib/loaders/flash/armv4_5_cfi_span_32.s for src */ + /* see contrib/loaders/flash/armv4_5_cfi_span_32.s for src */ static const uint32_t armv4_5_word_32_code[] = { /* 00008100 : */ 0xe4905004, /* ldr r5, [r0], #4 */ @@ -1680,7 +1682,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff 0xeafffffe /* b 8154 */ }; - /* see contib/loaders/flash/armv4_5_cfi_span_16.s for src */ + /* see contrib/loaders/flash/armv4_5_cfi_span_16.s for src */ static const uint32_t armv4_5_word_16_code[] = { /* 00008158 : */ 0xe0d050b2, /* ldrh r5, [r0], #2 */ @@ -1881,7 +1883,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff target_code_size = sizeof(armv4_5_word_32_code); break; default: - LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", + LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes", bank->bus_width); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -2050,7 +2052,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32, + LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %" PRIu32, wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } @@ -2165,8 +2167,8 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" - PRId32, wordcount, buffersize); + LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %" + PRIu32, wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } @@ -2286,7 +2288,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u return retval; /* take only bytes we need */ - for (int i = align; (i < bank->bus_width) && (count > 0); i++, count--) + for (unsigned int i = align; (i < bank->bus_width) && (count > 0); i++, count--) *buffer++ = current_word[i]; read_p += bank->bus_width; @@ -2312,7 +2314,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u return retval; /* take only bytes we need */ - for (int i = 0; (i < bank->bus_width) && (count > 0); i++, count--) + for (unsigned int i = 0; (i < bank->bus_width) && (count > 0); i++, count--) *buffer++ = current_word[i]; } @@ -2355,9 +2357,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of return retval; /* replace only bytes that must be written */ - for (int i = align; - (i < bank->bus_width) && (count > 0); - i++, count--) + for (unsigned int i = align; (i < bank->bus_width) && (count > 0); i++, count--) if (cfi_info->data_swap) /* data bytes are swapped (reverse endianness) */ current_word[bank->bus_width - i] = *buffer++; @@ -2403,7 +2403,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of break; } if (retval == ERROR_OK) { - /* Increment pointers and decrease count on succesful block write */ + /* Increment pointers and decrease count on successful block write */ buffer += blk_count; write_p += blk_count; count -= blk_count; @@ -2440,7 +2440,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of } /* try the slow way? */ if (fallback) { - for (int i = 0; i < bank->bus_width; i++) + for (unsigned int i = 0; i < bank->bus_width; i++) current_word[i] = *buffer++; retval = cfi_write_word(bank, current_word, write_p); @@ -2467,7 +2467,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of /* handle unaligned tail bytes */ if (count > 0) { - LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count); + LOG_INFO("Fixup %" PRIu32 " unaligned tail bytes", count); /* read a complete word from flash */ retval = cfi_target_read_memory(bank, write_p, 1, current_word); @@ -2475,7 +2475,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of return retval; /* replace only bytes that must be written */ - for (int i = 0; (i < bank->bus_width) && (count > 0); i++, count--) + for (unsigned int i = 0; (i < bank->bus_width) && (count > 0); i++, count--) if (cfi_info->data_swap) /* data bytes are swapped (reverse endianness) */ current_word[bank->bus_width - i] = *buffer++; @@ -2576,7 +2576,7 @@ int cfi_probe(struct flash_bank *bank) { struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; - int num_sectors = 0; + unsigned int num_sectors = 0; int sector = 0; uint32_t unlock1 = 0x555; uint32_t unlock2 = 0x2aa; @@ -2590,14 +2590,12 @@ int cfi_probe(struct flash_bank *bank) cfi_info->probed = false; cfi_info->num_erase_regions = 0; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } - if (cfi_info->erase_region_info) { - free(cfi_info->erase_region_info); - cfi_info->erase_region_info = NULL; - } + + free(bank->sectors); + bank->sectors = NULL; + + free(cfi_info->erase_region_info); + cfi_info->erase_region_info = NULL; /* JEDEC standard JESD21C uses 0x5555 and 0x2aaa as unlock addresses, * while CFI compatible AMD/Spansion flashes use 0x555 and 0x2aa @@ -2640,7 +2638,7 @@ int cfi_probe(struct flash_bank *bank) cfi_info->device_id = target_buffer_get_u32(target, value_buf1); break; default: - LOG_ERROR("Unsupported bank chipwidth %d, can't probe memory", + LOG_ERROR("Unsupported bank chipwidth %u, can't probe memory", bank->chip_width); return ERROR_FLASH_OPERATION_FAILED; } @@ -2658,7 +2656,7 @@ int cfi_probe(struct flash_bank *bank) /* query only if this is a CFI compatible flash, * otherwise the relevant info has already been filled in */ - if (cfi_info->not_cfi == 0) { + if (!cfi_info->not_cfi) { /* enter CFI query mode * according to JEDEC Standard No. 68.01, * a single bus sequence with address = 0x55, data = 0x98 should put @@ -2792,7 +2790,7 @@ int cfi_probe(struct flash_bank *bank) *for *all *CFI - *flashs + *flashes **/ cfi_read_0002_pri_ext(bank); break; @@ -2928,7 +2926,7 @@ static int cfi_intel_protect_check(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { uint8_t block_status; retval = cfi_get_u8(bank, i, 0x2, &block_status); if (retval != ERROR_OK) @@ -2957,7 +2955,7 @@ static int cfi_spansion_protect_check(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { uint8_t block_status; retval = cfi_get_u8(bank, i, 0x2, &block_status); if (retval != ERROR_OK) @@ -3008,7 +3006,7 @@ int cfi_get_info(struct flash_bank *bank, char *buf, int buf_size) return ERROR_OK; } - if (cfi_info->not_cfi == 0) + if (!cfi_info->not_cfi) printed = snprintf(buf, buf_size, "\nCFI flash: "); else printed = snprintf(buf, buf_size, "\nnon-CFI flash: "); diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h index aef7a04f9..eceb9a4b3 100644 --- a/src/flash/nor/cfi.h +++ b/src/flash/nor/cfi.h @@ -23,13 +23,13 @@ #define CFI_STATUS_POLL_MASK_DQ6_DQ7 0xC0 /* DQ6..DQ7 */ struct cfi_flash_bank { - int x16_as_x8; - int jedec_probe; - int not_cfi; - int probed; + bool x16_as_x8; + bool jedec_probe; + bool not_cfi; + bool probed; enum target_endianness endianness; - int data_swap; + bool data_swap; uint16_t manufacturer; uint16_t device_id; @@ -154,8 +154,9 @@ struct cfi_fixup { const void *param; }; -int cfi_erase(struct flash_bank *bank, int first, int last); -int cfi_protect(struct flash_bank *bank, int set, int first, int last); +int cfi_erase(struct flash_bank *bank, unsigned int first, unsigned int last); +int cfi_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last); int cfi_probe(struct flash_bank *bank); int cfi_auto_probe(struct flash_bank *bank); int cfi_protect_check(struct flash_bank *bank); diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c index 043ff13c8..d56301351 100644 --- a/src/flash/nor/core.c +++ b/src/flash/nor/core.c @@ -37,21 +37,23 @@ static struct flash_bank *flash_banks; -int flash_driver_erase(struct flash_bank *bank, int first, int last) +int flash_driver_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval; retval = bank->driver->erase(bank, first, last); if (retval != ERROR_OK) - LOG_ERROR("failed erasing sectors %d to %d", first, last); + LOG_ERROR("failed erasing sectors %u to %u", first, last); return retval; } -int flash_driver_protect(struct flash_bank *bank, int set, int first, int last) +int flash_driver_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { int retval; - int num_blocks; + unsigned int num_blocks; if (bank->num_prot_blocks) num_blocks = bank->num_prot_blocks; @@ -60,7 +62,7 @@ int flash_driver_protect(struct flash_bank *bank, int set, int first, int last) /* callers may not supply illegal parameters ... */ - if (first < 0 || first > last || last >= num_blocks) { + if (first > last || last >= num_blocks) { LOG_ERROR("illegal protection block range"); return ERROR_FAIL; } @@ -86,7 +88,7 @@ int flash_driver_protect(struct flash_bank *bank, int set, int first, int last) */ retval = bank->driver->protect(bank, set, first, last); if (retval != ERROR_OK) - LOG_ERROR("failed setting protection for blocks %d to %d", first, last); + LOG_ERROR("failed setting protection for blocks %u to %u", first, last); return retval; } @@ -157,10 +159,10 @@ struct flash_bank *flash_bank_list(void) return flash_banks; } -struct flash_bank *get_flash_bank_by_num_noprobe(int num) +struct flash_bank *get_flash_bank_by_num_noprobe(unsigned int num) { struct flash_bank *p; - int i = 0; + unsigned int i = 0; for (p = flash_banks; p; p = p->next) { if (i++ == num) @@ -170,10 +172,10 @@ struct flash_bank *get_flash_bank_by_num_noprobe(int num) return NULL; } -int flash_get_bank_count(void) +unsigned int flash_get_bank_count(void) { struct flash_bank *p; - int i = 0; + unsigned int i = 0; for (p = flash_banks; p; p = p->next) i++; return i; @@ -249,7 +251,7 @@ int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result) return ERROR_OK; } -int get_flash_bank_by_num(int num, struct flash_bank **bank) +int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank) { struct flash_bank *p = get_flash_bank_by_num_noprobe(num); int retval; @@ -306,7 +308,6 @@ static int default_flash_mem_blank_check(struct flash_bank *bank) { struct target *target = bank->target; const int buffer_size = 1024; - int i; uint32_t nBytes; int retval = ERROR_OK; @@ -317,7 +318,7 @@ static int default_flash_mem_blank_check(struct flash_bank *bank) uint8_t *buffer = malloc(buffer_size); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { uint32_t j; bank->sectors[i].is_erased = 1; @@ -353,7 +354,6 @@ done: int default_flash_blank_check(struct flash_bank *bank) { struct target *target = bank->target; - int i; int retval; if (bank->target->state != TARGET_HALTED) { @@ -366,14 +366,14 @@ int default_flash_blank_check(struct flash_bank *bank) if (block_array == NULL) return default_flash_mem_blank_check(bank); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { block_array[i].address = bank->base + bank->sectors[i].offset; block_array[i].size = bank->sectors[i].size; block_array[i].result = UINT32_MAX; /* erase state unknown */ } bool fast_check = true; - for (i = 0; i < bank->num_sectors; ) { + for (unsigned int i = 0; i < bank->num_sectors; ) { retval = target_blank_check_memory(target, block_array + i, bank->num_sectors - i, bank->erased_value); @@ -388,7 +388,7 @@ int default_flash_blank_check(struct flash_bank *bank) } if (fast_check) { - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = block_array[i].result; retval = ERROR_OK; } else { @@ -418,7 +418,8 @@ int default_flash_blank_check(struct flash_bank *bank) static int flash_iterate_address_range_inner(struct target *target, char *pad_reason, target_addr_t addr, uint32_t length, bool iterate_protect_blocks, - int (*callback)(struct flash_bank *bank, int first, int last)) + int (*callback)(struct flash_bank *bank, unsigned int first, + unsigned int last)) { struct flash_bank *c; struct flash_sector *block_array; @@ -547,7 +548,8 @@ static int flash_iterate_address_range_inner(struct target *target, static int flash_iterate_address_range(struct target *target, char *pad_reason, target_addr_t addr, uint32_t length, bool iterate_protect_blocks, - int (*callback)(struct flash_bank *bank, int first, int last)) + int (*callback)(struct flash_bank *bank, unsigned int first, + unsigned int last)) { struct flash_bank *c; int retval = ERROR_OK; @@ -585,7 +587,8 @@ int flash_erase_address_range(struct target *target, addr, length, false, &flash_driver_erase); } -static int flash_driver_unprotect(struct flash_bank *bank, int first, int last) +static int flash_driver_unprotect(struct flash_bank *bank, unsigned int first, + unsigned int last) { return flash_driver_protect(bank, 0, first, last); } @@ -627,8 +630,7 @@ target_addr_t flash_write_align_start(struct flash_bank *bank, target_addr_t add if (bank->write_start_alignment == FLASH_WRITE_ALIGN_SECTOR) { uint32_t offset = addr - bank->base; uint32_t aligned = 0; - int sect; - for (sect = 0; sect < bank->num_sectors; sect++) { + for (unsigned int sect = 0; sect < bank->num_sectors; sect++) { if (bank->sectors[sect].offset > offset) break; @@ -652,8 +654,7 @@ target_addr_t flash_write_align_end(struct flash_bank *bank, target_addr_t addr) if (bank->write_end_alignment == FLASH_WRITE_ALIGN_SECTOR) { uint32_t offset = addr - bank->base; uint32_t aligned = 0; - int sect; - for (sect = 0; sect < bank->num_sectors; sect++) { + for (unsigned int sect = 0; sect < bank->num_sectors; sect++) { aligned = bank->sectors[sect].offset + bank->sectors[sect].size - 1; if (aligned >= offset) break; @@ -676,7 +677,7 @@ static bool flash_write_check_gap(struct flash_bank *bank, return false; if (bank->minimal_write_gap == FLASH_WRITE_GAP_SECTOR) { - int sect; + unsigned int sect; uint32_t offset1 = addr1 - bank->base; /* find the sector following the one containing addr1 */ for (sect = 0; sect < bank->num_sectors; sect++) { @@ -697,7 +698,7 @@ static bool flash_write_check_gap(struct flash_bank *bank, int flash_write_unlock(struct target *target, struct image *image, - uint32_t *written, int erase, bool unlock) + uint32_t *written, bool erase, bool unlock) { int retval = ERROR_OK; @@ -824,7 +825,7 @@ int flash_write_unlock(struct target *target, struct image *image, LOG_WARNING("Section start address " TARGET_ADDR_FMT " breaks the required alignment of flash bank %s", run_address, c->name); - LOG_WARNING("Padding %d bytes from " TARGET_ADDR_FMT, + LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT, padding_at_start, aligned_start); run_address -= padding_at_start; @@ -847,12 +848,11 @@ int flash_write_unlock(struct target *target, struct image *image, /* If we're applying any sector automagic, then pad this * (maybe-combined) segment to the end of its last sector. */ - int sector; uint32_t offset_start = run_address - c->base; uint32_t offset_end = offset_start + run_size; uint32_t end = offset_end, delta; - for (sector = 0; sector < c->num_sectors; sector++) { + for (unsigned int sector = 0; sector < c->num_sectors; sector++) { end = c->sectors[sector].offset + c->sectors[sector].size; if (offset_end <= end) @@ -955,20 +955,19 @@ done: } int flash_write(struct target *target, struct image *image, - uint32_t *written, int erase) + uint32_t *written, bool erase) { return flash_write_unlock(target, image, written, erase, false); } -struct flash_sector *alloc_block_array(uint32_t offset, uint32_t size, int num_blocks) +struct flash_sector *alloc_block_array(uint32_t offset, uint32_t size, + unsigned int num_blocks) { - int i; - struct flash_sector *array = calloc(num_blocks, sizeof(struct flash_sector)); if (array == NULL) return NULL; - for (i = 0; i < num_blocks; i++) { + for (unsigned int i = 0; i < num_blocks; i++) { array[i].offset = offset; array[i].size = size; array[i].is_erased = -1; diff --git a/src/flash/nor/core.h b/src/flash/nor/core.h index ff5cb60c4..163e57878 100644 --- a/src/flash/nor/core.h +++ b/src/flash/nor/core.h @@ -93,12 +93,12 @@ struct flash_bank { const struct flash_driver *driver; /**< Driver for this bank. */ void *driver_priv; /**< Private driver storage pointer */ - int bank_number; /**< The 'bank' (or chip number) of this instance. */ + unsigned int bank_number; /**< The 'bank' (or chip number) of this instance. */ target_addr_t base; /**< The base address of this bank */ uint32_t size; /**< The size of this chip bank, in bytes */ - int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */ - int bus_width; /**< Maximum bus width, in bytes (1,2,4 bytes) */ + unsigned int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */ + unsigned int bus_width; /**< Maximum bus width, in bytes (1,2,4 bytes) */ /** Erased value. Defaults to 0xFF. */ uint8_t erased_value; @@ -124,7 +124,7 @@ struct flash_bank { * be set initially to 0, and the flash driver must set this to * some non-zero value during "probe()" or "auto_probe()". */ - int num_sectors; + unsigned int num_sectors; /** Array of sectors, allocated and initialized by the flash driver */ struct flash_sector *sectors; @@ -134,7 +134,7 @@ struct flash_bank { * Driver probe can set protection blocks array to work with * protection granularity different than sector size. */ - int num_prot_blocks; + unsigned int num_prot_blocks; /** Array of protection blocks, allocated and initialized by the flash driver */ struct flash_sector *prot_blocks; @@ -179,12 +179,12 @@ target_addr_t flash_write_align_end(struct flash_bank *bank, target_addr_t addr) * @param target The target with the flash to be programmed. * @param image The image that will be programmed to flash. * @param written On return, contains the number of bytes written. - * @param erase If non-zero, indicates the flash driver should first + * @param erase Indicates whether the flash driver should first * erase the corresponding banks or sectors before programming. * @returns ERROR_OK if successful; otherwise, an error code. */ int flash_write(struct target *target, - struct image *image, uint32_t *written, int erase); + struct image *image, uint32_t *written, bool erase); /** * Forces targets to re-examine their erase/protection state. @@ -193,7 +193,7 @@ int flash_write(struct target *target, void flash_set_dirty(void); /** @returns The number of flash banks currently defined. */ -int flash_get_bank_count(void); +unsigned int flash_get_bank_count(void); /** Deallocates bank->driver_priv */ void default_flash_free_driver_priv(struct flash_bank *bank); @@ -240,7 +240,7 @@ struct flash_bank *get_flash_bank_by_name_noprobe(const char *name); * @param bank returned bank if fn returns ERROR_OK * @returns ERROR_OK if successful */ -int get_flash_bank_by_num(int num, struct flash_bank **bank); +int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank); /** * Retrieves @a bank from a command argument, reporting errors parsing * the bank identifier or retrieving the specified bank. The bank @@ -248,7 +248,7 @@ int get_flash_bank_by_num(int num, struct flash_bank **bank); * @a instance is driver-specific. * @param name_index The index to the string in args containing the * bank identifier. - * @param bank On output, contians a pointer to the bank or NULL. + * @param bank On output, contains a pointer to the bank or NULL. * @returns ERROR_OK on success, or an error indicating the problem. */ COMMAND_HELPER(flash_command_get_bank, unsigned name_index, @@ -258,7 +258,7 @@ COMMAND_HELPER(flash_command_get_bank, unsigned name_index, * @param num The flash bank number. * @returns A struct flash_bank for flash bank @a num, or NULL. */ -struct flash_bank *get_flash_bank_by_num_noprobe(int num); +struct flash_bank *get_flash_bank_by_num_noprobe(unsigned int num); /** * Returns the flash bank located at a specified address. * @param target The target, presumed to contain one or more banks. @@ -275,6 +275,7 @@ int get_flash_bank_by_addr(struct target *target, target_addr_t addr, bool check * @param num_blocks Number of blocks in array. * @returns A struct flash_sector pointer or NULL when allocation failed. */ -struct flash_sector *alloc_block_array(uint32_t offset, uint32_t size, int num_blocks); +struct flash_sector *alloc_block_array(uint32_t offset, uint32_t size, + unsigned int num_blocks); #endif /* OPENOCD_FLASH_NOR_CORE_H */ diff --git a/src/flash/nor/driver.h b/src/flash/nor/driver.h index 9c56d4ea8..7f66047fe 100644 --- a/src/flash/nor/driver.h +++ b/src/flash/nor/driver.h @@ -104,7 +104,8 @@ struct flash_driver { * @param last The number of the last sector to erase, typically N-1. * @returns ERROR_OK if successful; otherwise, an error code. */ - int (*erase)(struct flash_bank *bank, int first, int last); + int (*erase)(struct flash_bank *bank, unsigned int first, + unsigned int last); /** * Bank/sector protection routine (target-specific). @@ -119,11 +120,12 @@ struct flash_driver { * * @param bank The bank to protect or unprotect. * @param set If non-zero, enable protection; if 0, disable it. - * @param first The first sector to (un)protect, typicaly 0. + * @param first The first sector to (un)protect, typically 0. * @param last The last sector to (un)project, typically N-1. * @returns ERROR_OK if successful; otherwise, an error code. */ - int (*protect)(struct flash_bank *bank, int set, int first, int last); + int (*protect)(struct flash_bank *bank, int set, unsigned int first, + unsigned int last); /** * Program data into the flash. Note CPU address will be @@ -200,14 +202,14 @@ struct flash_driver { int (*info)(struct flash_bank *bank, char *buf, int buf_size); /** - * A more gentle flavor of filash_driver_s::probe, performing + * A more gentle flavor of flash_driver_s::probe, performing * setup with less noise. Generally, driver routines should test * to see if the bank has already been probed; if it has, the * driver probably should not perform its probe a second time. * * This callback is often called from the inside of other * routines (e.g. GDB flash downloads) to autoprobe the flash as - * it is programing the flash. + * it is programming the flash. * * @param bank - the bank to probe * @returns ERROR_OK if successful; otherwise, an error code. diff --git a/src/flash/nor/dsp5680xx_flash.c b/src/flash/nor/dsp5680xx_flash.c index da675856f..6f1eccfeb 100644 --- a/src/flash/nor/dsp5680xx_flash.c +++ b/src/flash/nor/dsp5680xx_flash.c @@ -48,9 +48,8 @@ static int dsp5680xx_build_sector_list(struct flash_bank *bank) uint32_t offset = HFM_FLASH_BASE_ADDR; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - int i; - for (i = 0; i < bank->num_sectors; ++i) { + for (unsigned int i = 0; i < bank->num_sectors; ++i) { bank->sectors[i].offset = i * HFM_SECTOR_SIZE; bank->sectors[i].size = HFM_SECTOR_SIZE; offset += bank->sectors[i].size; @@ -108,7 +107,7 @@ static int dsp5680xx_flash_protect_check(struct flash_bank *bank) } /** - * Protection funcionality is not implemented. + * Protection functionality is not implemented. * The current implementation applies/removes security on the chip. * The chip is effectively secured/unsecured after the first reset * following the execution of this function. @@ -120,8 +119,8 @@ static int dsp5680xx_flash_protect_check(struct flash_bank *bank) * * @return */ -static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, int first, - int last) +static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { /** * This applies security to flash module after next reset, it does @@ -204,7 +203,8 @@ static int dsp5680xx_probe(struct flash_bank *bank) * * @return */ -static int dsp5680xx_flash_erase(struct flash_bank *bank, int first, int last) +static int dsp5680xx_flash_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval; @@ -212,14 +212,14 @@ static int dsp5680xx_flash_erase(struct flash_bank *bank, int first, int last) if ((!(first | last)) || ((first == 0) && (last == (HFM_SECTOR_COUNT - 1)))) last = HFM_SECTOR_COUNT - 1; if (retval == ERROR_OK) - for (int i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) bank->sectors[i].is_erased = 1; else /** * If an error occurred unknown status *is set even though some sector could have been correctly erased. */ - for (int i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) bank->sectors[i].is_erased = -1; return retval; } diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index fe4ddd47e..6f2900762 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -467,7 +467,8 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr) EFM32_MSC_STATUS_BUSY_MASK, 0); } -static int efm32x_erase(struct flash_bank *bank, int first, int last) +static int efm32x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; int ret = 0; @@ -484,7 +485,7 @@ static int efm32x_erase(struct flash_bank *bank, int first, int last) return ret; } - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { ret = efm32x_erase_page(bank, bank->sectors[i].offset); if (ERROR_OK != ret) LOG_ERROR("Failed to erase page %d", i); @@ -614,7 +615,8 @@ static int efm32x_set_page_lock(struct flash_bank *bank, size_t page, int set) return ERROR_OK; } -static int efm32x_protect(struct flash_bank *bank, int set, int first, int last) +static int efm32x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; int ret = 0; @@ -629,7 +631,7 @@ static int efm32x_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_TARGET_NOT_HALTED; } - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { ret = efm32x_set_page_lock(bank, i, set); if (ERROR_OK != ret) { LOG_ERROR("Failed to set lock on page %d", i); @@ -949,9 +951,7 @@ reset_pg_and_lock: retval = retval2; cleanup: - if (new_buffer) - free(new_buffer); - + free(new_buffer); return retval; } @@ -985,10 +985,8 @@ static int efm32x_probe(struct flash_bank *bank) assert(num_pages > 0); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); + bank->sectors = NULL; bank->base = base_address; bank->size = (num_pages * efm32_mcu_info.page_size); @@ -1040,7 +1038,7 @@ static int efm32x_protect_check(struct flash_bank *bank) assert(NULL != bank->sectors); - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = efm32x_get_page_lock(bank, i); return ERROR_OK; diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c index 38fb73189..4e2a169c6 100644 --- a/src/flash/nor/em357.c +++ b/src/flash/nor/em357.c @@ -87,7 +87,7 @@ struct em357_options { struct em357_flash_bank { struct em357_options option_bytes; int ppage_size; - int probed; + bool probed; }; static int em357_mass_erase(struct flash_bank *bank); @@ -104,7 +104,7 @@ FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command) em357_info = malloc(sizeof(struct em357_flash_bank)); bank->driver_priv = em357_info; - em357_info->probed = 0; + em357_info->probed = false; return ERROR_OK; } @@ -343,10 +343,10 @@ static int em357_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int em357_erase(struct flash_bank *bank, int first, int last) +static int em357_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; - int i; if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -367,7 +367,7 @@ static int em357_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER); if (retval != ERROR_OK) return retval; @@ -393,12 +393,13 @@ static int em357_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int em357_protect(struct flash_bank *bank, int set, int first, int last) +static int em357_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct em357_flash_bank *em357_info = NULL; struct target *target = bank->target; uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF}; - int i, reg, bit; + int reg, bit; int status; uint32_t protection; @@ -431,7 +432,7 @@ static int em357_protect(struct flash_bank *bank, int set, int first, int last) prot_reg[1] = (uint16_t)(protection >> 8); prot_reg[2] = (uint16_t)(protection >> 16); - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { reg = (i / em357_info->ppage_size) / 8; bit = (i / em357_info->ppage_size) - (reg * 8); @@ -465,7 +466,7 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer, struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - /* see contib/loaders/flash/stm32x.s for src, the same is used here except for + /* see contrib/loaders/flash/stm32x.s for src, the same is used here except for * a modified *_FLASH_BASE */ static const uint8_t em357_flash_write_code[] = { @@ -679,7 +680,7 @@ static int em357_probe(struct flash_bank *bank) int page_size; uint32_t base_address = 0x08000000; - em357_info->probed = 0; + em357_info->probed = false; switch (bank->size) { case 0x10000: @@ -723,10 +724,7 @@ static int em357_probe(struct flash_bank *bank) LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->base = base_address; bank->size = (num_pages * page_size); @@ -740,7 +738,7 @@ static int em357_probe(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } - em357_info->probed = 1; + em357_info->probed = true; return ERROR_OK; } @@ -870,8 +868,6 @@ static int em357_mass_erase(struct flash_bank *bank) COMMAND_HANDLER(em357_handle_mass_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; @@ -883,7 +879,7 @@ COMMAND_HANDLER(em357_handle_mass_erase_command) retval = em357_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "em357 mass erase complete"); diff --git a/src/flash/nor/esirisc_flash.c b/src/flash/nor/esirisc_flash.c index 3bed06581..88f00bcca 100644 --- a/src/flash/nor/esirisc_flash.c +++ b/src/flash/nor/esirisc_flash.c @@ -252,7 +252,8 @@ static int esirisc_flash_recall(struct flash_bank *bank) return esirisc_flash_control(bank, CONTROL_R); } -static int esirisc_flash_erase(struct flash_bank *bank, int first, int last) +static int esirisc_flash_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct esirisc_flash_bank *esirisc_info = bank->driver_priv; struct target *target = bank->target; @@ -263,7 +264,7 @@ static int esirisc_flash_erase(struct flash_bank *bank, int first, int last) (void)esirisc_flash_disable_protect(bank); - for (int page = first; page < last; ++page) { + for (unsigned int page = first; page < last; ++page) { uint32_t address = page * FLASH_PAGE_SIZE; target_write_u32(target, esirisc_info->cfg + ADDRESS, address); @@ -493,7 +494,7 @@ static int esirisc_flash_info(struct flash_bank *bank, char *buf, int buf_size) struct esirisc_flash_bank *esirisc_info = bank->driver_priv; snprintf(buf, buf_size, - "%4s cfg at 0x%" PRIx32 ", clock %" PRId32 ", wait_states %" PRId32, + "%4s cfg at 0x%" PRIx32 ", clock %" PRIu32 ", wait_states %" PRIu32, "", /* align with first line */ esirisc_info->cfg, esirisc_info->clock, diff --git a/src/flash/nor/faux.c b/src/flash/nor/faux.c index a894d0398..d6c6b2dae 100644 --- a/src/flash/nor/faux.c +++ b/src/flash/nor/faux.c @@ -56,11 +56,10 @@ FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command) bank->driver_priv = info; /* Use 0x10000 as a fixed sector size. */ - int i = 0; uint32_t offset = 0; bank->num_sectors = bank->size/sectorSize; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; bank->sectors[i].size = sectorSize; offset += bank->sectors[i].size; @@ -78,7 +77,8 @@ FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command) return ERROR_OK; } -static int faux_erase(struct flash_bank *bank, int first, int last) +static int faux_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct faux_flash_bank *info = bank->driver_priv; memset(info->memory + first*sectorSize, 0xff, sectorSize*(last-first + 1)); diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c index bc192b677..e515d89f1 100644 --- a/src/flash/nor/fespi.c +++ b/src/flash/nor/fespi.c @@ -122,7 +122,7 @@ struct fespi_flash_bank { - int probed; + bool probed; target_addr_t ctrl_base; const struct flash_device *dev; }; @@ -136,9 +136,9 @@ struct fespi_target { /* TODO !!! What is the right naming convention here? */ static const struct fespi_target target_devices[] = { /* name, tap_idcode, ctrl_base */ - { "Freedom E310-G000 SPI Flash", 0x10e31913 , 0x10014000 }, - { "Freedom E310-G002 SPI Flash", 0x20000913 , 0x10014000 }, - { NULL, 0, 0 } + { "Freedom E310-G000 SPI Flash", 0x10e31913, 0x10014000 }, + { "Freedom E310-G002 SPI Flash", 0x20000913, 0x10014000 }, + { NULL, 0, 0 } }; FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command) @@ -157,7 +157,7 @@ FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command) } bank->driver_priv = fespi_info; - fespi_info->probed = 0; + fespi_info->probed = false; fespi_info->ctrl_base = 0; if (CMD_ARGC >= 7) { COMMAND_PARSE_ADDRESS(CMD_ARGV[6], fespi_info->ctrl_base); @@ -189,7 +189,7 @@ static int fespi_write_reg(struct flash_bank *bank, target_addr_t address, uint3 int result = target_write_u32(target, fespi_info->ctrl_base + address, value); if (result != ERROR_OK) { - LOG_ERROR("fespi_write_reg() error writing 0x%x to " TARGET_ADDR_FMT, + LOG_ERROR("fespi_write_reg() error writing 0x%" PRIx32 " to " TARGET_ADDR_FMT, value, fespi_info->ctrl_base + address); return result; } @@ -274,7 +274,7 @@ static int fespi_rx(struct flash_bank *bank, uint8_t *out) break; int64_t now = timeval_ms(); if (now - start > 1000) { - LOG_ERROR("rxfifo didn't go positive (value=0x%x).", value); + LOG_ERROR("rxfifo didn't go positive (value=0x%" PRIx32 ").", value); return ERROR_TARGET_TIMEOUT; } } @@ -364,21 +364,21 @@ static int fespi_erase_sector(struct flash_bank *bank, int sector) return ERROR_OK; } -static int fespi_erase(struct flash_bank *bank, int first, int last) +static int fespi_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct fespi_flash_bank *fespi_info = bank->driver_priv; int retval = ERROR_OK; - int sector; - LOG_DEBUG("%s: from sector %d to sector %d", __func__, first, last); + LOG_DEBUG("%s: from sector %u to sector %u", __func__, first, last); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -388,9 +388,9 @@ static int fespi_erase(struct flash_bank *bank, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -415,7 +415,7 @@ static int fespi_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) goto done; - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { retval = fespi_erase_sector(bank, sector); if (retval != ERROR_OK) goto done; @@ -430,11 +430,9 @@ done: } static int fespi_protect(struct flash_bank *bank, int set, - int first, int last) + unsigned int first, unsigned int last) { - int sector; - - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_protected = set; return ERROR_OK; } @@ -497,7 +495,6 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer, struct target *target = bank->target; struct fespi_flash_bank *fespi_info = bank->driver_priv; uint32_t cur_count, page_size; - int sector; int retval = ERROR_OK; LOG_DEBUG("bank->size=0x%x offset=0x%08" PRIx32 " count=0x%08" PRIx32, @@ -514,14 +511,14 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer, } /* Check sector protection */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start offset in or before this sector? */ /* End offset in or behind this sector? */ if ((offset < (bank->sectors[sector].offset + bank->sectors[sector].size)) && ((offset + count - 1) >= bank->sectors[sector].offset) && bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -747,7 +744,7 @@ static int fespi_probe(struct flash_bank *bank) if (fespi_info->probed) free(bank->sectors); - fespi_info->probed = 0; + fespi_info->probed = false; if (fespi_info->ctrl_base == 0) { for (target_device = target_devices ; target_device->name ; ++target_device) @@ -820,7 +817,7 @@ static int fespi_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = -1; @@ -828,7 +825,7 @@ static int fespi_probe(struct flash_bank *bank) } bank->sectors = sectors; - fespi_info->probed = 1; + fespi_info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index eeefa3f43..fef179706 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -61,7 +61,7 @@ enum fm3_flash_type { struct fm3_flash_bank { enum fm3_variant variant; enum fm3_flash_type flashtype; - int probed; + bool probed; }; FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) @@ -132,7 +132,7 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) return ERROR_FLASH_BANK_INVALID; } - fm3_info->probed = 0; + fm3_info->probed = false; return ERROR_OK; } @@ -201,13 +201,14 @@ static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) return retval; } -static int fm3_erase(struct flash_bank *bank, int first, int last) +static int fm3_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct fm3_flash_bank *fm3_info = bank->driver_priv; struct target *target = bank->target; int retval = ERROR_OK; uint32_t u32DummyRead; - int sector, odd; + int odd; uint32_t u32FlashType; uint32_t u32FlashSeqAddress1; uint32_t u32FlashSeqAddress2; @@ -260,7 +261,7 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) 0x00, 0xBE, /* BKPT #0 */ }; - LOG_INFO("Fujitsu MB9[A/B]FXXX: Sector Erase ... (%d to %d)", first, last); + LOG_INFO("Fujitsu MB9[A/B]FXXX: Sector Erase ... (%u to %u)", first, last); /* disable HW watchdog */ retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); @@ -275,7 +276,7 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash acccess) */ + /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */ retval = target_write_u32(target, 0x40000000, 0x0001); if (retval != ERROR_OK) return retval; @@ -304,7 +305,7 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */ /* write code buffer and use Flash sector erase code within fm3 */ - for (sector = first ; sector <= last ; sector++) { + for (unsigned int sector = first ; sector <= last ; sector++) { uint32_t offset = bank->sectors[sector].offset; for (odd = 0; odd < 2 ; odd++) { @@ -335,7 +336,7 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); - /* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash acccess) */ + /* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash access) */ retval = target_write_u32(target, 0x40000000, 0x0002); if (retval != ERROR_OK) return retval; @@ -656,7 +657,7 @@ static int fm3_probe(struct flash_bank *bank) */ num_pages = 10; /* max number of Flash pages for malloc */ - fm3_info->probed = 0; + fm3_info->probed = false; bank->sectors = malloc(sizeof(struct flash_sector) * num_pages); bank->base = 0x00000000; @@ -796,7 +797,7 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[9].is_protected = -1; } - fm3_info->probed = 1; + fm3_info->probed = true; return ERROR_OK; } @@ -943,8 +944,6 @@ static int fm3_chip_erase(struct flash_bank *bank) COMMAND_HANDLER(fm3_handle_chip_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; @@ -955,7 +954,7 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command) if (fm3_chip_erase(bank) == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "fm3 chip erase complete"); diff --git a/src/flash/nor/fm4.c b/src/flash/nor/fm4.c index 7e3a1c51f..211a00863 100644 --- a/src/flash/nor/fm4.c +++ b/src/flash/nor/fm4.c @@ -98,14 +98,15 @@ static int fm4_enter_flash_cpu_rom_mode(struct target *target) return ERROR_OK; } -static int fm4_flash_erase(struct flash_bank *bank, int first, int last) +static int fm4_flash_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct working_area *workarea; struct reg_param reg_params[4]; struct armv7m_algorithm armv7m_algo; unsigned i; - int retval, sector; + int retval; const uint8_t erase_sector_code[] = { #include "../../../contrib/loaders/flash/fm4/erase.inc" }; @@ -115,7 +116,7 @@ static int fm4_flash_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - LOG_DEBUG("Spansion FM4 erase sectors %d to %d", first, last); + LOG_DEBUG("Spansion FM4 erase sectors %u to %u", first, last); retval = fm4_disable_hw_watchdog(target); if (retval != ERROR_OK) @@ -145,7 +146,7 @@ static int fm4_flash_erase(struct flash_bank *bank, int first, int last) init_reg_param(®_params[2], "r2", 32, PARAM_OUT); init_reg_param(®_params[3], "r3", 32, PARAM_IN); - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { uint32_t addr = bank->base + bank->sectors[sector].offset; uint32_t result; @@ -171,7 +172,7 @@ static int fm4_flash_erase(struct flash_bank *bank, int first, int last) retval = ERROR_FLASH_OPERATION_FAILED; goto err_run_ret; } else if (result != 0) { - LOG_ERROR("Unexpected error %d from flash sector erase programming algorithm", result); + LOG_ERROR("Unexpected error %" PRIu32 " from flash sector erase programming algorithm", result); retval = ERROR_FLASH_OPERATION_FAILED; goto err_run_ret; } else @@ -212,7 +213,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, #include "../../../contrib/loaders/flash/fm4/write.inc" }; - LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRId32 " bytes)", + LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)", offset, byte_count); if (offset & 0x1) { @@ -221,7 +222,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } if (byte_count & 0x1) { - LOG_WARNING("length %" PRId32 " is not 2-byte aligned, rounding up", + LOG_WARNING("length %" PRIu32 " is not 2-byte aligned, rounding up", byte_count); } @@ -272,7 +273,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2); uint32_t addr = bank->base + offset; - LOG_DEBUG("copying %" PRId32 " bytes to SRAM " TARGET_ADDR_FMT, + LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT, MIN(halfwords * 2, byte_count), data_workarea->address); retval = target_write_buffer(target, data_workarea->address, @@ -283,7 +284,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, goto err_write_data; } - LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)", + LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)", addr, addr + halfwords * 2 - 1, halfwords); buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8); @@ -311,7 +312,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, retval = ERROR_FLASH_OPERATION_FAILED; goto err_run_ret; } else if (result != 0) { - LOG_ERROR("Unexpected error %d from flash write " + LOG_ERROR("Unexpected error %" PRIu32 " from flash write " "programming algorithm", result); retval = ERROR_FLASH_OPERATION_FAILED; goto err_run_ret; @@ -347,7 +348,6 @@ static int mb9bf_probe(struct flash_bank *bank) { struct fm4_flash_bank *fm4_bank = bank->driver_priv; uint32_t flash_addr = bank->base; - int i; switch (fm4_bank->variant) { case mb9bfx64: @@ -369,10 +369,10 @@ static int mb9bf_probe(struct flash_bank *bank) return ERROR_FLASH_OPER_UNSUPPORTED; } - LOG_DEBUG("%d sectors", bank->num_sectors); + LOG_DEBUG("%u sectors", bank->num_sectors); bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i < 4) bank->sectors[i].size = 8 * 1024; else if (i == 4) @@ -409,7 +409,8 @@ static int s6e2cc_probe(struct flash_bank *bank) struct fm4_flash_bank *fm4_bank = bank->driver_priv; uint32_t u32_value; uint32_t flash_addr = bank->base; - int i, retval, num_sectors, num_extra_sectors; + int retval; + unsigned int i, num_extra_sectors, num_sectors; retval = target_read_u32(target, DFCTRLR, &u32_value); if (retval != ERROR_OK) @@ -435,7 +436,7 @@ static int s6e2cc_probe(struct flash_bank *bank) num_extra_sectors = (fm4_bank->macro_nr == 0) ? 1 : 4; bank->num_sectors = num_sectors + num_extra_sectors; - LOG_DEBUG("%d sectors", bank->num_sectors); + LOG_DEBUG("%u sectors", bank->num_sectors); bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); for (i = 0; i < num_sectors; i++) { @@ -466,12 +467,11 @@ static int s6e2cc_probe(struct flash_bank *bank) static int s6e2dh_probe(struct flash_bank *bank) { uint32_t flash_addr = bank->base; - int i; bank->num_sectors = 10; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i < 4) bank->sectors[i].size = 8 * 1024; else if (i == 4) diff --git a/src/flash/nor/gd32vf103.c b/src/flash/nor/gd32vf103.c index bdf3d2fe7..96c08f97f 100644 --- a/src/flash/nor/gd32vf103.c +++ b/src/flash/nor/gd32vf103.c @@ -341,7 +341,7 @@ static int gd32vf103_protect_check(struct flash_bank *bank) struct gd32vf103_flash_bank *gd32vf103_info = bank->driver_priv; uint32_t protection; - int i, s; + int i; int num_bits; int set; @@ -369,7 +369,7 @@ static int gd32vf103_protect_check(struct flash_bank *bank) /* bit 31 controls sector 62 - 255 protection for high density * bit 31 controls sector 62 - 127 protection for connectivity line */ - for (s = 62; s < bank->num_sectors; s++) + for (unsigned s = 62; s < bank->num_sectors; s++) bank->sectors[s].is_protected = set; if (bank->num_sectors > 61) @@ -381,7 +381,7 @@ static int gd32vf103_protect_check(struct flash_bank *bank) if (protection & (1 << i)) set = 0; - for (s = 0; s < gd32vf103_info->ppage_size; s++) + for (int s = 0; s < gd32vf103_info->ppage_size; s++) bank->sectors[(i * gd32vf103_info->ppage_size) + s].is_protected = set; } } else { @@ -392,7 +392,7 @@ static int gd32vf103_protect_check(struct flash_bank *bank) if (protection & (1 << i)) set = 0; - for (s = 0; s < gd32vf103_info->ppage_size; s++) + for (int s = 0; s < gd32vf103_info->ppage_size; s++) bank->sectors[(i * gd32vf103_info->ppage_size) + s].is_protected = set; } } @@ -400,10 +400,9 @@ static int gd32vf103_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int gd32vf103_erase(struct flash_bank *bank, int first, int last) +static int gd32vf103_erase(struct flash_bank *bank, unsigned first, unsigned last) { struct target *target = bank->target; - int i; uint32_t optiondata; uint32_t obstat; @@ -440,7 +439,7 @@ static int gd32vf103_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - for (i = first; i <= last; i++) { + for (unsigned i = first; i <= last; i++) { retval = target_write_u32(target, gd32vf103_get_flash_reg(bank, FMC_CTL), FMC_CTL_PER); if (retval != ERROR_OK) return retval; @@ -467,12 +466,12 @@ static int gd32vf103_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int gd32vf103_protect(struct flash_bank *bank, int set, int first, int last) +static int gd32vf103_protect(struct flash_bank *bank, int set, unsigned first, unsigned last) { struct gd32vf103_flash_bank *gd32vf103_info = NULL; struct target *target = bank->target; uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF}; - int i, reg, bit; + int reg, bit; int status; uint32_t protection; @@ -527,7 +526,7 @@ static int gd32vf103_protect(struct flash_bank *bank, int set, int first, int la if (last > 61) last = 61; - for (i = first; i <= last; i++) { + for (unsigned i = first; i <= last; i++) { reg = (i / gd32vf103_info->ppage_size) / 8; bit = (i / gd32vf103_info->ppage_size) - (reg * 8); @@ -538,7 +537,7 @@ static int gd32vf103_protect(struct flash_bank *bank, int set, int first, int la } } else { /* medium density flash */ - for (i = first; i <= last; i++) { + for (unsigned i = first; i <= last; i++) { reg = (i / gd32vf103_info->ppage_size) / 8; bit = (i / gd32vf103_info->ppage_size) - (reg * 8); @@ -1255,8 +1254,6 @@ static int gd32vf103_mass_erase(struct flash_bank *bank) COMMAND_HANDLER(gd32vf103_handle_mass_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; @@ -1268,7 +1265,7 @@ COMMAND_HANDLER(gd32vf103_handle_mass_erase_command) retval = gd32vf103_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "gd32vf103 mass erase complete"); diff --git a/src/flash/nor/imp.h b/src/flash/nor/imp.h index 87475a39c..06fb2a2b6 100644 --- a/src/flash/nor/imp.h +++ b/src/flash/nor/imp.h @@ -18,6 +18,8 @@ #ifndef OPENOCD_FLASH_NOR_IMP_H #define OPENOCD_FLASH_NOR_IMP_H +#include + /* this is an internal header */ #include "core.h" #include "driver.h" @@ -35,8 +37,10 @@ void flash_bank_add(struct flash_bank *bank); */ struct flash_bank *flash_bank_list(void); -int flash_driver_erase(struct flash_bank *bank, int first, int last); -int flash_driver_protect(struct flash_bank *bank, int set, int first, int last); +int flash_driver_erase(struct flash_bank *bank, unsigned int first, + unsigned int last); +int flash_driver_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last); int flash_driver_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count); int flash_driver_read(struct flash_bank *bank, @@ -44,6 +48,6 @@ int flash_driver_read(struct flash_bank *bank, /* write (optional verify) an image to flash memory of the given target */ int flash_write_unlock(struct target *target, struct image *image, - uint32_t *written, int erase, bool unlock); + uint32_t *written, bool erase, bool unlock); #endif /* OPENOCD_FLASH_NOR_IMP_H */ diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c index d841579ff..20362f384 100644 --- a/src/flash/nor/jtagspi.c +++ b/src/flash/nor/jtagspi.c @@ -30,7 +30,7 @@ struct jtagspi_flash_bank { struct jtag_tap *tap; const struct flash_device *dev; - int probed; + bool probed; uint32_t ir; }; @@ -49,7 +49,7 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command) bank->driver_priv = info; info->tap = NULL; - info->probed = 0; + info->probed = false; COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], info->ir); return ERROR_OK; @@ -170,7 +170,7 @@ static int jtagspi_probe(struct flash_bank *bank) if (info->probed) free(bank->sectors); - info->probed = 0; + info->probed = false; if (bank->target->tap == NULL) { LOG_ERROR("Target has no JTAG tap"); @@ -216,7 +216,7 @@ static int jtagspi_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = -1; @@ -224,7 +224,7 @@ static int jtagspi_probe(struct flash_bank *bank) } bank->sectors = sectors; - info->probed = 1; + info->probed = true; return ERROR_OK; } @@ -299,7 +299,7 @@ static int jtagspi_bulk_erase(struct flash_bank *bank) return retval; } -static int jtagspi_sector_erase(struct flash_bank *bank, int sector) +static int jtagspi_sector_erase(struct flash_bank *bank, unsigned int sector) { struct jtagspi_flash_bank *info = bank->driver_priv; int retval; @@ -310,19 +310,19 @@ static int jtagspi_sector_erase(struct flash_bank *bank, int sector) return retval; jtagspi_cmd(bank, info->dev->erase_cmd, &bank->sectors[sector].offset, NULL, 0); retval = jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT); - LOG_INFO("sector %d took %" PRId64 " ms", sector, timeval_ms() - t0); + LOG_INFO("sector %u took %" PRId64 " ms", sector, timeval_ms() - t0); return retval; } -static int jtagspi_erase(struct flash_bank *bank, int first, int last) +static int jtagspi_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int sector; struct jtagspi_flash_bank *info = bank->driver_priv; int retval = ERROR_OK; - LOG_DEBUG("erase from sector %d to sector %d", first, last); + LOG_DEBUG("erase from sector %u to sector %u", first, last); - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -332,9 +332,9 @@ static int jtagspi_erase(struct flash_bank *bank, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -352,7 +352,7 @@ static int jtagspi_erase(struct flash_bank *bank, int first, int last) if (info->dev->erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { retval = jtagspi_sector_erase(bank, sector); if (retval != ERROR_OK) { LOG_ERROR("Sector erase failed."); @@ -363,11 +363,10 @@ static int jtagspi_erase(struct flash_bank *bank, int first, int last) return retval; } -static int jtagspi_protect(struct flash_bank *bank, int set, int first, int last) +static int jtagspi_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { - int sector; - - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_protected = set; return ERROR_OK; } diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 084e009ee..e6b452e05 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -79,7 +79,7 @@ * */ -/* Addressess */ +/* Addresses */ #define FCF_ADDRESS 0x00000400 #define FCF_FPROT 0x8 #define FCF_FSEC 0xc @@ -389,7 +389,6 @@ static const struct kinetis_type kinetis_types_old[] = { static bool allow_fcf_writes; static uint8_t fcf_fopt = 0xff; -static bool fcf_fopt_configured; static bool create_banks; @@ -507,7 +506,7 @@ COMMAND_HANDLER(kinetis_mdm_halt) } } - LOG_DEBUG("MDM: halt succeded after %d attempts.", tries); + LOG_DEBUG("MDM: halt succeeded after %d attempts.", tries); target_poll(target); /* enable polling in case kinetis_check_flash_security_status disabled it */ @@ -1250,7 +1249,7 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t wcount) { struct target *target = bank->target; - uint32_t buffer_size = 2048; /* Default minimum value */ + uint32_t buffer_size; struct working_area *write_algorithm; struct working_area *source; struct kinetis_flash_bank *k_bank = bank->driver_priv; @@ -1261,10 +1260,6 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, int retval; uint8_t fstat; - /* Increase buffer_size if needed */ - if (buffer_size < (target->working_area_size/2)) - buffer_size = (target->working_area_size/2); - /* allocate working area with flash programming code */ if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code), &write_algorithm) != ERROR_OK) { @@ -1277,16 +1272,19 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, if (retval != ERROR_OK) return retval; - /* memory buffer */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { - buffer_size /= 4; - if (buffer_size <= 256) { - /* free working area, write algorithm already allocated */ - target_free_working_area(target, write_algorithm); + /* memory buffer, size *must* be multiple of word */ + buffer_size = target_get_working_area_avail(target) & ~(sizeof(uint32_t) - 1); + if (buffer_size < 256) { + LOG_WARNING("large enough working area not available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } else if (buffer_size > 16384) { + /* probably won't benefit from more than 16k ... */ + buffer_size = 16384; + } - LOG_WARNING("No large enough working area available, can't do block memory writes"); - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - } + if (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { + LOG_ERROR("allocating working area failed"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; @@ -1338,7 +1336,8 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, return retval; } -static int kinetis_protect(struct flash_bank *bank, int set, int first, int last) +static int kinetis_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { if (allow_fcf_writes) { LOG_ERROR("Protection setting is possible with 'kinetis fcf_source protection' only!"); @@ -1350,7 +1349,7 @@ static int kinetis_protect(struct flash_bank *bank, int set, int first, int last return ERROR_FLASH_BANK_INVALID; } - for (int i = first; i < bank->num_prot_blocks && i <= last; i++) + for (unsigned int i = first; i < bank->num_prot_blocks && i <= last; i++) bank->prot_blocks[i].is_protected = set; LOG_INFO("Protection bits will be written at the next FCF sector erase or write."); @@ -1392,7 +1391,7 @@ static int kinetis_protect_check(struct flash_bank *bank) } b = k_bank->protection_block; - for (int i = 0; i < bank->num_prot_blocks; i++) { + for (unsigned int i = 0; i < bank->num_prot_blocks; i++) { if ((fprot >> b) & 1) bank->prot_blocks[i].is_protected = 0; else @@ -1430,7 +1429,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) bank_iter = k_bank->bank; if (bank_iter == NULL) { - LOG_WARNING("Missing bank %u configuration, FCF protection flags may be incomplette", bank_idx); + LOG_WARNING("Missing bank %u configuration, FCF protection flags may be incomplete", bank_idx); continue; } @@ -1439,7 +1438,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) assert(bank_iter->prot_blocks); if (k_bank->flash_class == FC_PFLASH) { - for (int i = 0; i < bank_iter->num_prot_blocks; i++) { + for (unsigned int i = 0; i < bank_iter->num_prot_blocks; i++) { if (bank_iter->prot_blocks[i].is_protected == 1) fprot &= ~pflash_bit; @@ -1447,7 +1446,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) } } else if (k_bank->flash_class == FC_FLEX_NVM) { - for (int i = 0; i < bank_iter->num_prot_blocks; i++) { + for (unsigned int i = 0; i < bank_iter->num_prot_blocks; i++) { if (bank_iter->prot_blocks[i].is_protected == 1) fdprot &= ~dflash_bit; @@ -1616,7 +1615,8 @@ static void kinetis_invalidate_flash_cache(struct kinetis_chip *k_chip) } -static int kinetis_erase(struct flash_bank *bank, int first, int last) +static int kinetis_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int result; struct kinetis_flash_bank *k_bank = bank->driver_priv; @@ -1639,18 +1639,16 @@ static int kinetis_erase(struct flash_bank *bank, int first, int last) * requested erase is PFlash or NVM and encompasses the entire * block. Should be quicker. */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { /* set command and sector address */ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, k_bank->prog_base + bank->sectors[i].offset, 0, 0, 0, 0, 0, 0, 0, 0, NULL); if (result != ERROR_OK) { - LOG_WARNING("erase sector %d failed", i); + LOG_WARNING("erase sector %u failed", i); return ERROR_FLASH_OPERATION_FAILED; } - bank->sectors[i].is_erased = 1; - if (k_bank->prog_base == 0 && bank->sectors[i].offset <= FCF_ADDRESS && bank->sectors[i].offset + bank->sectors[i].size > FCF_ADDRESS + FCF_SIZE) { @@ -1664,7 +1662,8 @@ static int kinetis_erase(struct flash_bank *bank, int first, int last) result = kinetis_write_inner(bank, fcf_buffer, FCF_ADDRESS, FCF_SIZE); if (result != ERROR_OK) LOG_WARNING("Flash Configuration Field write failed"); - bank->sectors[i].is_erased = 0; + else + LOG_DEBUG("Generated FCF written"); } } } @@ -1908,6 +1907,7 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer, int result; bool set_fcf = false; bool fcf_in_data_valid = false; + bool fcf_differs = false; int sect = 0; struct kinetis_flash_bank *k_bank = bank->driver_priv; struct kinetis_chip *k_chip = k_bank->k_chip; @@ -1940,31 +1940,45 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer, && offset + count >= FCF_ADDRESS + FCF_SIZE; if (fcf_in_data_valid) { memcpy(fcf_in_data, buffer + FCF_ADDRESS - offset, FCF_SIZE); - if (memcmp(fcf_in_data + FCF_FPROT, fcf_buffer, 4)) { - fcf_in_data_valid = false; - LOG_INFO("Flash protection requested in programmed file differs from current setting."); + if (memcmp(fcf_in_data, fcf_buffer, 8)) { + fcf_differs = true; + LOG_INFO("Setting of backdoor key is not supported in mode 'kinetis fcf_source protection'."); + } + if (memcmp(fcf_in_data + FCF_FPROT, fcf_buffer + FCF_FPROT, 4)) { + fcf_differs = true; + LOG_INFO("Flash protection requested in the programmed file differs from current setting."); } if (fcf_in_data[FCF_FDPROT] != fcf_buffer[FCF_FDPROT]) { - fcf_in_data_valid = false; - LOG_INFO("Data flash protection requested in programmed file differs from current setting."); + fcf_differs = true; + LOG_INFO("Data flash protection requested in the programmed file differs from current setting."); } if ((fcf_in_data[FCF_FSEC] & 3) != 2) { fcf_in_data_valid = false; - LOG_INFO("Device security requested in programmed file!"); - } else if (k_chip->flash_support & FS_ECC - && fcf_in_data[FCF_FSEC] != fcf_buffer[FCF_FSEC]) { - fcf_in_data_valid = false; + LOG_INFO("Device security requested in the programmed file! Write denied."); + } else if (fcf_in_data[FCF_FSEC] != fcf_buffer[FCF_FSEC]) { + fcf_differs = true; LOG_INFO("Strange unsecure mode 0x%02" PRIx8 - "requested in programmed file!", - fcf_in_data[FCF_FSEC]); + " requested in the programmed file, set FSEC = 0x%02" PRIx8 + " in the startup code!", + fcf_in_data[FCF_FSEC], fcf_buffer[FCF_FSEC]); } - if ((k_chip->flash_support & FS_ECC || fcf_fopt_configured) - && fcf_in_data[FCF_FOPT] != fcf_fopt) { - fcf_in_data_valid = false; - LOG_INFO("FOPT requested in programmed file differs from current setting."); + if (fcf_in_data[FCF_FOPT] != fcf_buffer[FCF_FOPT]) { + fcf_differs = true; + LOG_INFO("FOPT requested in the programmed file differs from current setting, set 'kinetis fopt 0x%02" + PRIx8 "'.", fcf_in_data[FCF_FOPT]); + } + + /* If the device has ECC flash, then we cannot re-program FCF */ + if (fcf_differs) { + if (k_chip->flash_support & FS_ECC) { + fcf_in_data_valid = false; + LOG_INFO("Cannot re-program FCF. Expect verify errors at FCF (0x400-0x40f)."); + } else { + LOG_INFO("Trying to re-program FCF."); + if (!(k_chip->flash_support & FS_PROGRAM_LONGWORD)) + LOG_INFO("Flash re-programming may fail on this device!"); + } } - if (!fcf_in_data_valid) - LOG_INFO("Expect verify errors at FCF (0x408-0x40f)."); } } @@ -2564,7 +2578,7 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) else k_chip->pflash_size = k_chip->fcfg2_maxaddr0_shifted * num_blocks / 2; if (k_chip->pflash_size != 2048<<10) - LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", k_chip->pflash_size>>10); + LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %" PRIu32 " KB", k_chip->pflash_size>>10); break; default: @@ -2654,7 +2668,7 @@ static int kinetis_probe(struct flash_bank *bank) k_bank->protection_block = bank->num_prot_blocks * k_bank->bank_number; size_k = bank->size / 1024; - LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k PFlash, FTFx base 0x%08" PRIx32 ", sect %u", + LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k PFlash, FTFx base 0x%08" PRIx32 ", sect %" PRIu32, k_bank->bank_number, size_k, k_bank->prog_base, k_bank->sector_size); } else if (k_bank->bank_number < num_blocks) { @@ -2689,16 +2703,16 @@ static int kinetis_probe(struct flash_bank *bank) if (bank->size > limit) { bank->size = limit; - LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32 " due to active EEPROM backup", + LOG_DEBUG("FlexNVM bank %u limited to 0x%08" PRIx32 " due to active EEPROM backup", k_bank->bank_number, limit); } size_k = bank->size / 1024; - LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k FlexNVM, FTFx base 0x%08" PRIx32 ", sect %u", + LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k FlexNVM, FTFx base 0x%08" PRIx32 ", sect %" PRIu32, k_bank->bank_number, size_k, k_bank->prog_base, k_bank->sector_size); } else { - LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device", + LOG_ERROR("Cannot determine parameters for bank %u, only %u banks on device", k_bank->bank_number, num_blocks); return ERROR_FLASH_BANK_INVALID; } @@ -2722,17 +2736,14 @@ static int kinetis_probe(struct flash_bank *bank) " please report to OpenOCD mailing list", fcfg2_maxaddr1); } - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } - if (bank->prot_blocks) { - free(bank->prot_blocks); - bank->prot_blocks = NULL; - } + free(bank->sectors); + bank->sectors = NULL; + + free(bank->prot_blocks); + bank->prot_blocks = NULL; if (k_bank->sector_size == 0) { - LOG_ERROR("Unknown sector size for bank %d", bank->bank_number); + LOG_ERROR("Unknown sector size for bank %u", bank->bank_number); return ERROR_FLASH_BANK_INVALID; } @@ -2827,7 +2838,7 @@ static int kinetis_blank_check(struct flash_bank *bank) if (block_dirty) { /* the whole bank is not erased, check sector-by-sector */ - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { /* normal margin */ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT, k_bank->prog_base + bank->sectors[i].offset, @@ -2836,14 +2847,14 @@ static int kinetis_blank_check(struct flash_bank *bank) if (result == ERROR_OK) { bank->sectors[i].is_erased = !(ftfx_fstat & 0x01); } else { - LOG_DEBUG("Ignoring errored PFlash sector blank-check"); + LOG_DEBUG("Ignoring error on PFlash sector blank-check"); kinetis_ftfx_clear_error(bank->target); bank->sectors[i].is_erased = -1; } } } else { /* the whole bank is erased, update all sectors */ - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; } } else { @@ -3034,7 +3045,6 @@ COMMAND_HANDLER(kinetis_fopt_handler) if (CMD_ARGC == 1) { fcf_fopt = (uint8_t)strtoul(CMD_ARGV[0], NULL, 0); - fcf_fopt_configured = true; } else { command_print(CMD, "FCF_FOPT 0x%02" PRIx8, fcf_fopt); } diff --git a/src/flash/nor/kinetis_ke.c b/src/flash/nor/kinetis_ke.c index cfc04928b..349b2564d 100644 --- a/src/flash/nor/kinetis_ke.c +++ b/src/flash/nor/kinetis_ke.c @@ -764,7 +764,8 @@ static int kinetis_ke_write_words(struct flash_bank *bank, const uint8_t *buffer return retval; } -static int kinetis_ke_protect(struct flash_bank *bank, int set, int first, int last) +static int kinetis_ke_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { LOG_WARNING("kinetis_ke_protect not supported yet"); /* FIXME: TODO */ @@ -809,7 +810,7 @@ static int kinetis_ke_protect_check(struct flash_bank *bank) if (fpopen && fpldis && fphdis) { LOG_WARNING("No flash protection found."); - for (uint32_t i = 0; i < (uint32_t) bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = 0; kinfo->protection_size = 0; @@ -840,7 +841,7 @@ static int kinetis_ke_protect_check(struct flash_bank *bank) /* hprot_from indicates from where the upper region is protected */ hprot_from = (0x8000 - hprot_size) / kinfo->sector_size; - for (uint32_t i = 0; i < (uint32_t) bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { /* Check if the sector is in the lower region */ if (bank->sectors[i].offset < 0x4000) { @@ -964,9 +965,10 @@ COMMAND_HANDLER(kinetis_ke_securing_test) return kinetis_ke_ftmrx_command(bank, 2, FCCOBIX, FCCOBHI, FCCOBLO, &fstat); } -static int kinetis_ke_erase(struct flash_bank *bank, int first, int last) +static int kinetis_ke_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int result, i; + int result; uint8_t FCCOBIX[2], FCCOBHI[2], FCCOBLO[2], fstat; bool fcf_erased = false; @@ -982,7 +984,7 @@ static int kinetis_ke_erase(struct flash_bank *bank, int first, int last) if (result != ERROR_OK) return result; - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { FCCOBIX[0] = 0; FCCOBHI[0] = FTMRX_CMD_ERASESECTOR; FCCOBLO[0] = (bank->base + bank->sectors[i].offset) >> 16; @@ -994,7 +996,7 @@ static int kinetis_ke_erase(struct flash_bank *bank, int first, int last) result = kinetis_ke_ftmrx_command(bank, 2, FCCOBIX, FCCOBHI, FCCOBLO, &fstat); if (result != ERROR_OK) { - LOG_WARNING("erase sector %d failed", i); + LOG_WARNING("erase sector %u failed", i); return ERROR_FLASH_OPERATION_FAILED; } @@ -1066,7 +1068,7 @@ static int kinetis_ke_write(struct flash_bank *bank, const uint8_t *buffer, static int kinetis_ke_probe(struct flash_bank *bank) { - int result, i; + int result; uint32_t offset = 0; struct target *target = bank->target; struct kinetis_ke_flash_bank *kinfo = bank->driver_priv; @@ -1143,15 +1145,12 @@ static int kinetis_ke_probe(struct flash_bank *bank) break; } - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); assert(bank->num_sectors > 0); bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; bank->sectors[i].size = kinfo->sector_size; offset += kinfo->sector_size; @@ -1207,9 +1206,7 @@ static int kinetis_ke_blank_check(struct flash_bank *bank) if (fstat & (FTMRX_FSTAT_MGSTAT0_MASK | FTMRX_FSTAT_MGSTAT1_MASK)) { /* the whole bank is not erased, check sector-by-sector */ - int i; - - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { FCCOBIX[0] = 0; FCCOBHI[0] = FTMRX_CMD_SECTIONERASED; FCCOBLO[0] = (bank->base + bank->sectors[i].offset) >> 16; @@ -1229,14 +1226,13 @@ static int kinetis_ke_blank_check(struct flash_bank *bank) if (result == ERROR_OK) { bank->sectors[i].is_erased = !(fstat & (FTMRX_FSTAT_MGSTAT0_MASK | FTMRX_FSTAT_MGSTAT1_MASK)); } else { - LOG_DEBUG("Ignoring errored PFlash sector blank-check"); + LOG_DEBUG("Ignoring error on PFlash sector blank-check"); bank->sectors[i].is_erased = -1; } } } else { /* the whole bank is erased, update all sectors */ - int i; - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; } diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index 2a69af692..942ef555c 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -432,7 +432,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i < 8) { bank->sectors[i].offset = offset; bank->sectors[i].size = 4 * 1024; @@ -494,7 +494,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; /* sectors 0-15 are 4kB-sized, 16 and above are 32kB-sized for LPC17xx/LPC40xx devices */ bank->sectors[i].size = (i < 16) ? 4 * 1024 : 32 * 1024; @@ -524,7 +524,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; /* sectors 0-7 are 8kB-sized, 8 and above are 64kB-sized for LPC43xx devices */ bank->sectors[i].size = (i < 8) ? 8 * 1024 : 64 * 1024; @@ -568,7 +568,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; /* all sectors are 1kB-sized for LPC8xx devices */ bank->sectors[i].size = 1 * 1024; @@ -599,7 +599,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; bank->sectors[i].size = (i < LPC11xx_REG_SECTORS ? 4 : 32) * 1024; offset += bank->sectors[i].size; @@ -629,7 +629,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; /* all sectors are 4kB-sized */ bank->sectors[i].size = 4 * 1024; @@ -657,7 +657,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; /* all sectors are 32kB-sized */ bank->sectors[i].size = 32 * 1024; @@ -863,9 +863,10 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo return status_code; } -static int lpc2000_iap_blank_check(struct flash_bank *bank, int first, int last) +static int lpc2000_iap_blank_check(struct flash_bank *bank, unsigned int first, + unsigned int last) { - if ((first < 0) || (last >= bank->num_sectors)) + if (last >= bank->num_sectors) return ERROR_FLASH_SECTOR_INVALID; uint32_t param_table[5] = {0}; @@ -881,7 +882,7 @@ static int lpc2000_iap_blank_check(struct flash_bank *bank, int first, int last) if (lpc2000_info->variant == lpc4300) param_table[2] = lpc2000_info->lpc4300_bank; - for (int i = first; i <= last && retval == ERROR_OK; i++) { + for (unsigned int i = first; i <= last && retval == ERROR_OK; i++) { /* check single sector */ param_table[0] = param_table[1] = i; int status_code = lpc2000_iap_call(bank, iap_working_area, 53, param_table, result_table); @@ -978,7 +979,8 @@ FLASH_BANK_COMMAND_HANDLER(lpc2000_flash_bank_command) return ERROR_OK; } -static int lpc2000_erase(struct flash_bank *bank, int first, int last) +static int lpc2000_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -1078,7 +1080,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ int first_sector = 0; int last_sector = 0; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (offset >= bank->sectors[i].offset) first_sector = i; if (offset + DIV_ROUND_UP(count, dst_min_alignment) * dst_min_alignment > bank->sectors[i].offset) @@ -1168,7 +1170,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ break; } - /* Exit if error occured */ + /* Exit if error occurred */ if (retval != ERROR_OK) break; @@ -1210,7 +1212,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ break; } - /* Exit if error occured */ + /* Exit if error occurred */ if (retval != ERROR_OK) break; @@ -1554,7 +1556,7 @@ static int get_lpc2000_info(struct flash_bank *bank, char *buf, int buf_size) { struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv; - snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIi32 "kHz", lpc2000_info->variant, + snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIu32 "kHz", lpc2000_info->variant, lpc2000_info->cclk); return ERROR_OK; diff --git a/src/flash/nor/lpc288x.c b/src/flash/nor/lpc288x.c index 8852c859c..1c10e5015 100644 --- a/src/flash/nor/lpc288x.c +++ b/src/flash/nor/lpc288x.c @@ -232,17 +232,17 @@ static uint32_t lpc288x_system_ready(struct flash_bank *bank) return ERROR_OK; } -static int lpc288x_erase(struct flash_bank *bank, int first, int last) +static int lpc288x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { uint32_t status; - int sector; struct target *target = bank->target; status = lpc288x_system_ready(bank); /* probed? halted? */ if (status != ERROR_OK) return status; - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_INFO("Bad sector range"); return ERROR_FLASH_SECTOR_INVALID; } @@ -250,7 +250,7 @@ static int lpc288x_erase(struct flash_bank *bank, int first, int last) /* Configure the flash controller timing */ lpc288x_set_flash_clk(bank); - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK) return ERROR_FLASH_OPERATION_FAILED; @@ -272,7 +272,6 @@ static int lpc288x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ struct target *target = bank->target; uint32_t bytes_remaining = count; uint32_t first_sector, last_sector, sector, page; - int i; /* probed? halted? */ status = lpc288x_system_ready(bank); @@ -283,7 +282,7 @@ static int lpc288x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ first_sector = last_sector = 0xffffffff; /* validate the write range... */ - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if ((offset >= bank->sectors[i].offset) && (offset < (bank->sectors[i].offset + bank->sectors[i].size)) && (first_sector == 0xffffffff)) { @@ -379,9 +378,10 @@ static int lpc288x_probe(struct flash_bank *bank) return ERROR_OK; } -static int lpc288x_protect(struct flash_bank *bank, int set, int first, int last) +static int lpc288x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { - int lockregion, status; + int status; uint32_t value; struct target *target = bank->target; @@ -390,18 +390,18 @@ static int lpc288x_protect(struct flash_bank *bank, int set, int first, int last if (status != ERROR_OK) return status; - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) + if ((last < first) || (last >= bank->num_sectors)) return ERROR_FLASH_SECTOR_INVALID; /* Configure the flash controller timing */ lpc288x_set_flash_clk(bank); - for (lockregion = first; lockregion <= last; lockregion++) { + for (unsigned int lockregion = first; lockregion <= last; lockregion++) { if (set) { - /* write an odd value to base addy to protect... */ + /* write an odd value to base address to protect... */ value = 0x01; } else { - /* write an even value to base addy to unprotect... */ + /* write an even value to base address to unprotect... */ value = 0x00; } target_write_u32(target, bank->sectors[lockregion].offset, value); diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c index 5412c93de..c8e885aba 100644 --- a/src/flash/nor/lpc2900.c +++ b/src/flash/nor/lpc2900.c @@ -49,8 +49,8 @@ #define FTCTR 0x2020000C /* Flash test control */ #define FBWST 0x20200010 /* Flash bridge wait-state */ #define FCRA 0x2020001C /* Flash clock divider */ -#define FMSSTART 0x20200020 /* Flash Built-In Selft Test start address */ -#define FMSSTOP 0x20200024 /* Flash Built-In Selft Test stop address */ +#define FMSSTART 0x20200020 /* Flash Built-In Self Test start address */ +#define FMSSTOP 0x20200024 /* Flash Built-In Self Test stop address */ #define FMS16 0x20200028 /* Flash 16-bit signature */ #define FMSW0 0x2020002C /* Flash 128-bit signature Word 0 */ #define FMSW1 0x20200030 /* Flash 128-bit signature Word 1 */ @@ -160,7 +160,7 @@ struct lpc2900_flash_bank { /** * Maximum contiguous block of internal SRAM (bytes). - * Autodetected by the driver. Not the total amount of SRAM, only the + * Autodetected by the driver. Not the total amount of SRAM, only * the largest \em contiguous block! */ uint32_t max_ram_block; @@ -174,7 +174,7 @@ static uint32_t lpc2900_read_security_status(struct flash_bank *bank); static uint32_t lpc2900_run_bist128(struct flash_bank *bank, uint32_t addr_from, uint32_t addr_to, uint32_t signature[4]); -static uint32_t lpc2900_address2sector(struct flash_bank *bank, uint32_t offset); +static unsigned int lpc2900_address2sector(struct flash_bank *bank, uint32_t offset); static uint32_t lpc2900_calc_tr(uint32_t clock_var, uint32_t time_var); /*********************** Helper functions **************************/ @@ -283,9 +283,9 @@ static uint32_t lpc2900_read_security_status(struct flash_bank *bank) * Anything else is undefined (is_protected = -1). This is treated as * a protected sector! */ - int sector; - int index_t; - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { + unsigned int index_t; + /* Convert logical sector number to physical sector number */ if (sector <= 4) index_t = sector + 11; @@ -356,14 +356,13 @@ static uint32_t lpc2900_run_bist128(struct flash_bank *bank, * @param bank Pointer to the flash bank descriptor * @param offset Offset address relative to bank start */ -static uint32_t lpc2900_address2sector(struct flash_bank *bank, +static unsigned int lpc2900_address2sector(struct flash_bank *bank, uint32_t offset) { uint32_t address = bank->base + offset; /* Run through all sectors of this bank */ - int sector; - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Return immediately if address is within the current sector */ if (address < (bank->sectors[sector].offset + bank->sectors[sector].size)) return sector; @@ -728,9 +727,9 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) lpc2900_info->risky = 0; /* Read sector range, and do a sanity check. */ - int first, last; - COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last); + unsigned int first, last; + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], first); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], last); if ((first >= bank->num_sectors) || (last >= bank->num_sectors) || (first > last)) { @@ -739,12 +738,11 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) } uint8_t page[FLASH_PAGE_SIZE]; - int sector; /* Sectors in page 6 */ if ((first <= 4) || (last >= 8)) { memset(&page, 0xff, FLASH_PAGE_SIZE); - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (sector <= 4) memset(&page[0xB0 + 16*sector], 0, 16); else if (sector >= 8) @@ -761,7 +759,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) /* Sectors in page 7 */ if ((first <= 7) && (last >= 5)) { memset(&page, 0xff, FLASH_PAGE_SIZE); - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if ((sector >= 5) && (sector <= 7)) memset(&page[0x00 + 16*(sector - 5)], 0, 16); } @@ -945,11 +943,12 @@ FLASH_BANK_COMMAND_HANDLER(lpc2900_flash_bank_command) * @param first First sector to be erased * @param last Last sector (including) to be erased */ -static int lpc2900_erase(struct flash_bank *bank, int first, int last) +static int lpc2900_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { uint32_t status; - int sector; - int last_unsecured_sector; + unsigned int last_unsecured_sector; + bool has_unsecured_sector; struct target *target = bank->target; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; @@ -959,7 +958,7 @@ static int lpc2900_erase(struct flash_bank *bank, int first, int last) return status; /* Sanity check on sector range */ - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_INFO("Bad sector range"); return ERROR_FLASH_SECTOR_INVALID; } @@ -974,16 +973,19 @@ static int lpc2900_erase(struct flash_bank *bank, int first, int last) * a special way. */ last_unsecured_sector = -1; - for (sector = first; sector <= last; sector++) { - if (!bank->sectors[sector].is_protected) + has_unsecured_sector = false; + for (unsigned int sector = first; sector <= last; sector++) { + if (!bank->sectors[sector].is_protected) { last_unsecured_sector = sector; + has_unsecured_sector = true; + } } /* Exit now, in case of the rare constellation where all sectors in range * are secured. This is regarded a success, since erasing/programming of * secured sectors shall be handled transparently. */ - if (last_unsecured_sector == -1) + if (!has_unsecured_sector) return ERROR_OK; /* Enable flash block and set the correct CRA clock of 66 kHz */ @@ -998,7 +1000,7 @@ static int lpc2900_erase(struct flash_bank *bank, int first, int last) FLASH_ERASE_TIME)); /* Sectors are marked for erasure, then erased all together */ - for (sector = first; sector <= last_unsecured_sector; sector++) { + for (unsigned int sector = first; sector <= last_unsecured_sector; sector++) { /* Only mark sectors that aren't secured. Any attempt to erase a group * of sectors will fail if any single one of them is secured! */ @@ -1059,7 +1061,6 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t num_bytes; struct target *target = bank->target; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; - int sector; int retval; static const uint32_t write_target_code[] = { @@ -1111,7 +1112,7 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer, lpc2900_read_security_status(bank); /* Unprotect all involved sectors */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start address in or before this sector? * End address in or behind this sector? */ if (((bank->base + offset) < @@ -1179,7 +1180,7 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer, while (count != 0) { uint32_t this_npages; const uint8_t *this_buffer; - int start_sector = lpc2900_address2sector(bank, offset); + unsigned int start_sector = lpc2900_address2sector(bank, offset); /* First page / last page / rest */ if (offset % FLASH_PAGE_SIZE) { @@ -1208,7 +1209,7 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer, this_buffer = buffer; /* Make sure we stop at the next secured sector */ - sector = start_sector + 1; + unsigned int sector = start_sector + 1; while (sector < bank->num_sectors) { /* Secured? */ if (bank->sectors[sector].is_protected) { @@ -1230,7 +1231,7 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer, /* Skip the current sector if it is secured */ if (bank->sectors[start_sector].is_protected) { - LOG_DEBUG("Skip secured sector %d", + LOG_DEBUG("Skip secured sector %u", start_sector); /* Stop if this is the last sector */ @@ -1371,7 +1372,6 @@ static int lpc2900_probe(struct flash_bank *bank) { struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; struct target *target = bank->target; - int i = 0; uint32_t offset; @@ -1467,8 +1467,8 @@ static int lpc2900_probe(struct flash_bank *bank) } /* Show detected device */ - LOG_INFO("Flash bank %d: Device %s, %" PRIu32 - " KiB in %d sectors", + LOG_INFO("Flash bank %u: Device %s, %" PRIu32 + " KiB in %u sectors", bank->bank_number, lpc2900_info->target_name, bank->size / KiB, bank->num_sectors); @@ -1487,7 +1487,7 @@ static int lpc2900_probe(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); offset = 0; - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = -1; @@ -1501,7 +1501,7 @@ static int lpc2900_probe(struct flash_bank *bank) * that has more than 19 sectors. Politely ask for a fix then. */ bank->sectors[i].size = 0; - LOG_ERROR("Never heard about sector %d", i); + LOG_ERROR("Never heard about sector %u", i); } offset += bank->sectors[i].size; @@ -1535,11 +1535,10 @@ static int lpc2900_erase_check(struct flash_bank *bank) return status; } - /* Use the BIST (Built-In Selft Test) to generate a signature of each flash + /* Use the BIST (Built-In Self Test) to generate a signature of each flash * sector. Compare against the expected signature of an empty sector. */ - int sector; - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { uint32_t signature[4]; status = lpc2900_run_bist128(bank, bank->sectors[sector].offset, bank->sectors[sector].offset + (bank->sectors[sector].size - 1), signature); diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c index 04ac3bb4d..dd1c63d74 100644 --- a/src/flash/nor/lpcspifi.c +++ b/src/flash/nor/lpcspifi.c @@ -47,7 +47,7 @@ #define SPIFI_INIT_STACK_SIZE 512 struct lpcspifi_flash_bank { - int probed; + bool probed; uint32_t ssp_base; uint32_t io_base; uint32_t ioconfig_base; @@ -72,7 +72,7 @@ FLASH_BANK_COMMAND_HANDLER(lpcspifi_flash_bank_command) } bank->driver_priv = lpcspifi_info; - lpcspifi_info->probed = 0; + lpcspifi_info->probed = false; return ERROR_OK; } @@ -216,7 +216,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank) /* Run the algorithm */ LOG_DEBUG("Running SPIFI init algorithm"); - retval = target_run_algorithm(target, 0 , NULL, 2, reg_params, + retval = target_run_algorithm(target, 0, NULL, 2, reg_params, spifi_init_algorithm->address, spifi_init_algorithm->address + sizeof(spifi_init_code) - 2, 1000, &armv7m_info); @@ -414,7 +414,8 @@ static int lpcspifi_bulk_erase(struct flash_bank *bank) return retval; } -static int lpcspifi_erase(struct flash_bank *bank, int first, int last) +static int lpcspifi_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv; @@ -422,16 +423,15 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) struct armv7m_algorithm armv7m_info; struct working_area *erase_algorithm; int retval = ERROR_OK; - int sector; - LOG_DEBUG("erase from sector %d to sector %d", first, last); + LOG_DEBUG("erase from sector %u to sector %u", first, last); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -441,9 +441,9 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -550,7 +550,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) buf_set_u32(reg_params[3].value, 0, 32, bank->sectors[first].size); /* Run the algorithm */ - retval = target_run_algorithm(target, 0 , NULL, 4, reg_params, + retval = target_run_algorithm(target, 0, NULL, 4, reg_params, erase_algorithm->address, erase_algorithm->address + sizeof(lpcspifi_flash_erase_code) - 4, 3000*(last - first + 1), &armv7m_info); @@ -571,11 +571,9 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) } static int lpcspifi_protect(struct flash_bank *bank, int set, - int first, int last) + unsigned int first, unsigned int last) { - int sector; - - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_protected = set; return ERROR_OK; } @@ -590,7 +588,6 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, struct reg_param reg_params[5]; struct armv7m_algorithm armv7m_info; struct working_area *write_algorithm; - int sector; int retval = ERROR_OK; LOG_DEBUG("offset=0x%08" PRIx32 " count=0x%08" PRIx32, @@ -607,14 +604,14 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, } /* Check sector protection */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start offset in or before this sector? */ /* End offset in or behind this sector? */ if ((offset < (bank->sectors[sector].offset + bank->sectors[sector].size)) && ((offset + count - 1) >= bank->sectors[sector].offset) && bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -852,7 +849,7 @@ static int lpcspifi_probe(struct flash_bank *bank) /* If we've already probed, we should be fine to skip this time. */ if (lpcspifi_info->probed) return ERROR_OK; - lpcspifi_info->probed = 0; + lpcspifi_info->probed = false; lpcspifi_info->ssp_base = 0x40083000; lpcspifi_info->io_base = 0x400F4000; @@ -902,7 +899,7 @@ static int lpcspifi_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = -1; @@ -911,7 +908,7 @@ static int lpcspifi_probe(struct flash_bank *bank) bank->sectors = sectors; - lpcspifi_info->probed = 1; + lpcspifi_info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c index 3bf4b22ff..9a5e83fa0 100644 --- a/src/flash/nor/max32xxx.c +++ b/src/flash/nor/max32xxx.c @@ -70,17 +70,17 @@ static int max32xxx_mass_erase(struct flash_bank *bank); struct max32xxx_flash_bank { - int probed; + bool probed; int max326xx; unsigned int flash_size; unsigned int flc_base; unsigned int sector_size; unsigned int clkdiv_value; - unsigned int int_state; + uint32_t int_state; unsigned int burst_size_bits; }; -/* see contib/loaders/flash/max32xxx/max32xxx.s for src */ +/* see contrib/loaders/flash/max32xxx/max32xxx.s for src */ static const uint8_t write_code[] = { #include "../../contrib/loaders/flash/max32xxx/max32xxx.inc" }; @@ -98,13 +98,13 @@ FLASH_BANK_COMMAND_HANDLER(max32xxx_flash_bank_command) } info = calloc(sizeof(struct max32xxx_flash_bank), 1); - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], info->flash_size); - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], info->flc_base); - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[7], info->sector_size); - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[8], info->clkdiv_value); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], info->flash_size); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], info->flc_base); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], info->sector_size); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[8], info->clkdiv_value); if (CMD_ARGC > 9) - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[9], info->burst_size_bits); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[9], info->burst_size_bits); else info->burst_size_bits = 32; @@ -118,7 +118,7 @@ static int get_info(struct flash_bank *bank, char *buf, int buf_size) int printed; struct max32xxx_flash_bank *info = bank->driver_priv; - if (info->probed == 0) + if (!info->probed) return ERROR_FLASH_BANK_NOT_PROBED; printed = snprintf(buf, buf_size, "\nMaxim Integrated max32xxx flash driver\n"); @@ -209,21 +209,20 @@ static int max32xxx_protect_check(struct flash_bank *bank) { struct max32xxx_flash_bank *info = bank->driver_priv; struct target *target = bank->target; - int i; uint32_t temp_reg; - if (info->probed == 0) + if (!info->probed) return ERROR_FLASH_BANK_NOT_PROBED; if (!info->max326xx) { - for (i = 0; i < bank->num_sectors; i++) + for (unsigned i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = -1; return ERROR_FLASH_OPER_UNSUPPORTED; } /* Check the protection */ - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned i = 0; i < bank->num_sectors; i++) { if (i%32 == 0) target_read_u32(target, info->flc_base + FLSH_PROT + ((i/32)*4), &temp_reg); @@ -235,9 +234,9 @@ static int max32xxx_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int max32xxx_erase(struct flash_bank *bank, int first, int last) +static int max32xxx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int banknr; uint32_t flsh_cn, flsh_int; struct max32xxx_flash_bank *info = bank->driver_priv; struct target *target = bank->target; @@ -249,10 +248,10 @@ static int max32xxx_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - if (info->probed == 0) + if (!info->probed) return ERROR_FLASH_BANK_NOT_PROBED; - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) + if ((last < first) || (last >= bank->num_sectors)) return ERROR_FLASH_SECTOR_INVALID; if ((first == 0) && (last == (bank->num_sectors - 1))) @@ -265,11 +264,11 @@ static int max32xxx_erase(struct flash_bank *bank, int first, int last) return retval; int erased = 0; - for (banknr = first; banknr <= last; banknr++) { + for (unsigned int banknr = first; banknr <= last; banknr++) { /* Check the protection */ if (bank->sectors[banknr].is_protected == 1) { - LOG_WARNING("Flash sector %d is protected", banknr); + LOG_WARNING("Flash sector %u is protected", banknr); continue; } else erased = 1; @@ -311,7 +310,7 @@ static int max32xxx_erase(struct flash_bank *bank, int first, int last) } if (!erased) { - LOG_ERROR("All pages protected %d to %d", first, last); + LOG_ERROR("All pages protected %u to %u", first, last); max32xxx_flash_op_post(bank); return ERROR_FAIL; } @@ -322,11 +321,11 @@ static int max32xxx_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int max32xxx_protect(struct flash_bank *bank, int set, int first, int last) +static int max32xxx_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { struct max32xxx_flash_bank *info = bank->driver_priv; struct target *target = bank->target; - int page; uint32_t temp_reg; if (bank->target->state != TARGET_HALTED) { @@ -334,17 +333,17 @@ static int max32xxx_protect(struct flash_bank *bank, int set, int first, int las return ERROR_TARGET_NOT_HALTED; } - if (info->probed == 0) + if (!info->probed) return ERROR_FLASH_BANK_NOT_PROBED; if (!info->max326xx) return ERROR_FLASH_OPER_UNSUPPORTED; - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) + if ((last < first) || (last >= bank->num_sectors)) return ERROR_FLASH_SECTOR_INVALID; /* Setup the protection on the pages given */ - for (page = first; page <= last; page++) { + for (unsigned int page = first; page <= last; page++) { if (set) { /* Set the write/erase bit for this page */ target_read_u32(target, info->flc_base + FLSH_PROT + (page/32), &temp_reg); @@ -460,7 +459,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, LOG_DEBUG("bank=%p buffer=%p offset=%08" PRIx32 " count=%08" PRIx32 "", bank, buffer, offset, count); - if (info->probed == 0) + if (!info->probed) return ERROR_FLASH_BANK_NOT_PROBED; if (offset & 0x3) { @@ -523,7 +522,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, } while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND)); if (retry <= 0) { - LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address); + LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -544,7 +543,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, while (remaining >= 16) { if ((address & 0xFFF) == 0) - LOG_DEBUG("Writing @ 0x%08x", address); + LOG_DEBUG("Writing @ 0x%08" PRIx32, address); target_write_buffer(target, info->flc_base + FLSH_DATA0, 16, buffer); flsh_cn |= 0x00000001; @@ -557,7 +556,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, } while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND)); if (retry <= 0) { - LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address); + LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -588,7 +587,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, } while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND)); if (retry <= 0) { - LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address); + LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -626,7 +625,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, } while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND)); if (retry <= 0) { - LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address); + LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address); return ERROR_FLASH_OPERATION_FAILED; } } @@ -634,7 +633,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer, /* Check access violations */ target_read_u32(target, info->flc_base + FLSH_INT, &flsh_int); if (flsh_int & FLSH_INT_AF) { - LOG_ERROR("Flash Error writing 0x%x bytes at 0x%08x", count, offset); + LOG_ERROR("Flash Error writing 0x%" PRIx32 " bytes at 0x%08" PRIx32, count, offset); max32xxx_flash_op_post(bank); return ERROR_FLASH_OPERATION_FAILED; } @@ -652,17 +651,14 @@ static int max32xxx_probe(struct flash_bank *bank) uint32_t arm_id[2]; uint16_t arm_pid; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); /* provide this for the benefit of the NOR flash framework */ bank->size = info->flash_size; bank->num_sectors = info->flash_size / info->sector_size; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * info->sector_size; bank->sectors[i].size = info->sector_size; bank->sectors[i].is_erased = -1; @@ -679,7 +675,7 @@ static int max32xxx_probe(struct flash_bank *bank) if ((arm_pid == ARM_PID_DEFAULT_CM3) || arm_pid == ARM_PID_DEFAULT_CM4) { uint32_t max326xx_id; target_read_u32(target, MAX326XX_ID_REG, &max326xx_id); - LOG_DEBUG("max326xx_id = 0x%x", max326xx_id); + LOG_DEBUG("max326xx_id = 0x%" PRIx32, max326xx_id); max326xx_id = ((max326xx_id & 0xFF000000) >> 24); if (max326xx_id == MAX326XX_ID) info->max326xx = 1; @@ -690,7 +686,7 @@ static int max32xxx_probe(struct flash_bank *bank) if (max32xxx_protect_check(bank) == ERROR_FLASH_OPER_UNSUPPORTED) LOG_WARNING("Flash protection not supported on this device"); - info->probed = 1; + info->probed = true; return ERROR_OK; } @@ -709,13 +705,13 @@ static int max32xxx_mass_erase(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - if (info->probed == 0) + if (!info->probed) return ERROR_FLASH_BANK_NOT_PROBED; int not_protected = 0; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (bank->sectors[i].is_protected == 1) - LOG_WARNING("Flash sector %d is protected", i); + LOG_WARNING("Flash sector %u is protected", i); else not_protected = 1; } @@ -767,7 +763,6 @@ static int max32xxx_mass_erase(struct flash_bank *bank) COMMAND_HANDLER(max32xxx_handle_mass_erase_command) { - int i; struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); @@ -781,7 +776,7 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command) if (max32xxx_mass_erase(bank) == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "max32xxx mass erase complete"); @@ -908,7 +903,6 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command) struct flash_bank *bank; int retval; struct max32xxx_flash_bank *info; - int i; if (CMD_ARGC < 1) { command_print(CMD, "max32xxx protection_check "); @@ -928,7 +922,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command) } LOG_WARNING("s: a:
p:"); - for (i = 0; i < bank->num_sectors; i += 4) { + for (unsigned i = 0; i < bank->num_sectors; i += 4) { LOG_WARNING("s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d", (i+0), (i+0)*info->sector_size, bank->sectors[(i+0)].is_protected, (i+1), (i+1)*info->sector_size, bank->sectors[(i+1)].is_protected, diff --git a/src/flash/nor/mdr.c b/src/flash/nor/mdr.c index 379625994..2518c229b 100644 --- a/src/flash/nor/mdr.c +++ b/src/flash/nor/mdr.c @@ -62,7 +62,7 @@ #define KEY 0x8AAA5551 struct mdr_flash_bank { - int probed; + bool probed; unsigned int mem_type; unsigned int page_count; unsigned int sec_count; @@ -79,7 +79,7 @@ FLASH_BANK_COMMAND_HANDLER(mdr_flash_bank_command) mdr_info = malloc(sizeof(struct mdr_flash_bank)); bank->driver_priv = mdr_info; - mdr_info->probed = 0; + mdr_info->probed = false; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], mdr_info->mem_type); COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], mdr_info->page_count); COMMAND_PARSE_NUMBER(uint, CMD_ARGV[8], mdr_info->sec_count); @@ -124,11 +124,12 @@ static int mdr_mass_erase(struct flash_bank *bank) return retval; } -static int mdr_erase(struct flash_bank *bank, int first, int last) +static int mdr_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct mdr_flash_bank *mdr_info = bank->driver_priv; - int i, retval, retval2; + int retval, retval2; unsigned int j; uint32_t flash_cmd, cur_per_clock; @@ -173,7 +174,7 @@ static int mdr_erase(struct flash_bank *bank, int first, int last) } unsigned int page_size = bank->size / mdr_info->page_count; - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { for (j = 0; j < mdr_info->sec_count; j++) { retval = target_write_u32(target, FLASH_ADR, (i * page_size) | (j << 2)); if (retval != ERROR_OK) @@ -457,8 +458,7 @@ reset_pg_and_lock: retval = retval2; free_buffer: - if (new_buffer) - free(new_buffer); + free(new_buffer); /* read some bytes bytes to flush buffer in flash accelerator. * See errata for 1986VE1T and 1986VE3. Error 0007 */ @@ -572,10 +572,7 @@ static int mdr_probe(struct flash_bank *bank) page_count = mdr_info->page_count; page_size = bank->size / page_count; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->num_sectors = page_count; bank->sectors = malloc(sizeof(struct flash_sector) * page_count); @@ -587,7 +584,7 @@ static int mdr_probe(struct flash_bank *bank) bank->sectors[i].is_protected = 0; } - mdr_info->probed = 1; + mdr_info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/mrvlqspi.c b/src/flash/nor/mrvlqspi.c index 7a06b3d09..3293e6129 100644 --- a/src/flash/nor/mrvlqspi.c +++ b/src/flash/nor/mrvlqspi.c @@ -73,7 +73,7 @@ #define DINCNT 0x20 struct mrvlqspi_flash_bank { - int probed; + bool probed; uint32_t reg_base; uint32_t bank_num; const struct flash_device *dev; @@ -328,7 +328,7 @@ static int mrvlqspi_flash_busy_status(struct flash_bank *bank, int timeout) uint8_t val; int retval; - /* Flush read/write fifo's */ + /* Flush read/write fifos */ retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT); if (retval != ERROR_OK) return retval; @@ -379,7 +379,7 @@ static int mrvlqspi_set_write_status(struct flash_bank *bank, bool mode) int retval; uint32_t instr; - /* Flush read/write fifo's */ + /* Flush read/write fifos */ retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT); if (retval != ERROR_OK) return retval; @@ -417,7 +417,7 @@ static int mrvlqspi_read_id(struct flash_bank *bank, uint32_t *id) LOG_DEBUG("Getting ID"); - /* Flush read/write fifo's */ + /* Flush read/write fifos */ retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT); if (retval != ERROR_OK) return retval; @@ -527,21 +527,21 @@ static int mrvlqspi_bulk_erase(struct flash_bank *bank) return mrvlqspi_flash_busy_status(bank, CHIP_ERASE_TIMEOUT); } -static int mrvlqspi_flash_erase(struct flash_bank *bank, int first, int last) +static int mrvlqspi_flash_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv; int retval = ERROR_OK; - int sector; - LOG_DEBUG("erase from sector %d to sector %d", first, last); + LOG_DEBUG("erase from sector %u to sector %u", first, last); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -551,9 +551,9 @@ static int mrvlqspi_flash_erase(struct flash_bank *bank, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -576,7 +576,7 @@ static int mrvlqspi_flash_erase(struct flash_bank *bank, int first, int last) if (mrvlqspi_info->dev->erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { retval = mrvlqspi_block_erase(bank, sector * mrvlqspi_info->dev->sectorsize); if (retval != ERROR_OK) @@ -597,7 +597,6 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer, struct reg_param reg_params[6]; struct armv7m_algorithm armv7m_info; struct working_area *write_algorithm; - int sector; LOG_DEBUG("offset=0x%08" PRIx32 " count=0x%08" PRIx32, offset, count); @@ -613,14 +612,14 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer, } /* Check sector protection */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start offset in or before this sector? */ /* End offset in or behind this sector? */ if ((offset < (bank->sectors[sector].offset + bank->sectors[sector].size)) && ((offset + count - 1) >= bank->sectors[sector].offset) && bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -780,7 +779,7 @@ int mrvlqspi_flash_read(struct flash_bank *bank, uint8_t *buffer, return ERROR_FLASH_BANK_NOT_PROBED; } - /* Flush read/write fifo's */ + /* Flush read/write fifos */ retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT); if (retval != ERROR_OK) return retval; @@ -845,7 +844,7 @@ static int mrvlqspi_probe(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - mrvlqspi_info->probed = 0; + mrvlqspi_info->probed = false; mrvlqspi_info->bank_num = bank->bank_number; /* Read flash JEDEC ID */ @@ -888,7 +887,7 @@ static int mrvlqspi_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = -1; @@ -896,7 +895,7 @@ static int mrvlqspi_probe(struct flash_bank *bank) } bank->sectors = sectors; - mrvlqspi_info->probed = 1; + mrvlqspi_info->probed = true; return ERROR_OK; } @@ -948,7 +947,7 @@ FLASH_BANK_COMMAND_HANDLER(mrvlqspi_flash_bank_command) /* Get QSPI controller register map base address */ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], mrvlqspi_info->reg_base); bank->driver_priv = mrvlqspi_info; - mrvlqspi_info->probed = 0; + mrvlqspi_info->probed = false; return ERROR_OK; } diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c index 95c99b970..b6933e1e9 100644 --- a/src/flash/nor/msp432.c +++ b/src/flash/nor/msp432.c @@ -320,7 +320,7 @@ static int msp432_init(struct flash_bank *bank) /* Explicit device type check failed. Report this. */ LOG_WARNING( "msp432: Unrecognized MSP432P4 Device ID and Hardware " - "Rev (%04X, %02X)", msp432_bank->device_id, + "Rev (%04" PRIX32 ", %02" PRIX32 ")", msp432_bank->device_id, msp432_bank->hardware_rev); } else if (MSP432P401X_DEPR == msp432_bank->device_type) { LOG_WARNING( @@ -330,7 +330,7 @@ static int msp432_init(struct flash_bank *bank) /* Explicit device type check failed. Report this. */ LOG_WARNING( "msp432: Unrecognized MSP432E4 DID0 and DID1 values " - "(%08X, %08X)", msp432_bank->device_id, + "(%08" PRIX32 ", %08" PRIX32 ")", msp432_bank->device_id, msp432_bank->hardware_rev); } @@ -590,7 +590,8 @@ FLASH_BANK_COMMAND_HANDLER(msp432_flash_bank_command) return ERROR_OK; } -static int msp432_erase(struct flash_bank *bank, int first, int last) +static int msp432_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct msp432_bank *msp432_bank = bank->driver_priv; @@ -628,7 +629,7 @@ static int msp432_erase(struct flash_bank *bank, int first, int last) } /* Erase requested sectors one by one */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { /* Skip TVL (read-only) sector of the info bank */ if (is_info && 1 == i) @@ -809,7 +810,7 @@ static int msp432_probe(struct flash_bank *bank) uint32_t sector_length; uint32_t size; - int num_sectors; + unsigned int num_sectors; bool is_main = FLASH_BASE == bank->base; bool is_info = P4_FLASH_INFO_BASE == bank->base; @@ -901,10 +902,8 @@ static int msp432_probe(struct flash_bank *bank) } } - if (NULL != bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); + bank->sectors = NULL; if (num_sectors > 0) { bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); @@ -918,7 +917,7 @@ static int msp432_probe(struct flash_bank *bank) bank->num_sectors = num_sectors; msp432_bank->sector_length = sector_length; - for (int i = 0; i < num_sectors; i++) { + for (unsigned int i = 0; i < num_sectors; i++) { bank->sectors[i].offset = i * sector_length; bank->sectors[i].size = sector_length; bank->sectors[i].is_erased = -1; @@ -1013,14 +1012,14 @@ static int msp432_info(struct flash_bank *bank, char *buf, int buf_size) break; case MSP432E4X_GUESS: printed = snprintf(buf, buf_size, - "Unrecognized MSP432E4 DID0 and DID1 IDs (%08X, %08X)", + "Unrecognized MSP432E4 DID0 and DID1 IDs (%08" PRIX32 ", %08" PRIX32 ")", msp432_bank->device_id, msp432_bank->hardware_rev); break; case MSP432P401X_GUESS: case MSP432P411X_GUESS: default: printed = snprintf(buf, buf_size, - "Unrecognized MSP432P4 Device ID and Hardware Rev (%04X, %02X)", + "Unrecognized MSP432P4 Device ID and Hardware Rev (%04" PRIX32 ", %02" PRIX32 ")", msp432_bank->device_id, msp432_bank->hardware_rev); break; } @@ -1045,7 +1044,7 @@ static void msp432_flash_free_driver_priv(struct flash_bank *bank) /* A single private struct is shared between main and info banks */ /* Only free it on the call for main bank */ - if (is_main && (NULL != bank->driver_priv)) + if (is_main) free(bank->driver_priv); /* Forget about the private struct on both main and info banks */ diff --git a/src/flash/nor/niietcm4.c b/src/flash/nor/niietcm4.c index 7b67bb8ad..1831314dd 100644 --- a/src/flash/nor/niietcm4.c +++ b/src/flash/nor/niietcm4.c @@ -65,8 +65,8 @@ #define FCIS_OP_ERROR (1<<1) /* Flag operation error */ /*---- FCIC: CLear status register */ -#define FCIC_CLR_OPCMLT (1<<0) /* Cleare completion flag in register FCIS */ -#define FCIC_CLR_OPERROR (1<<1) /* Cleare error flag in register FCIS */ +#define FCIC_CLR_OPCMLT (1<<0) /* Clear completion flag in register FCIS */ +#define FCIC_CLR_OPERROR (1<<1) /* Clear error flag in register FCIS */ /*-- USERFLASH ---------------------------------------------------------------*/ #define USERFLASH_PAGE_SIZE 256 @@ -95,8 +95,8 @@ #define UFCIS_OP_ERROR (1<<1) /* Flag operation error */ /*---- UFCIC: CLear status register */ -#define UFCIC_CLR_OPCMLT (1<<0) /* Cleared completion flag in register FCIS */ -#define UFCIC_CLR_OPERROR (1<<1) /* Cleared error flag in register FCIS */ +#define UFCIC_CLR_OPCMLT (1<<0) /* Clear completion flag in register FCIS */ +#define UFCIC_CLR_OPERROR (1<<1) /* Clear error flag in register FCIS */ /*---- In info userflash address space */ #define INFOWORD0_ADDR 0x00 @@ -330,7 +330,8 @@ static int niietcm4_uflash_page_erase(struct flash_bank *bank, int page_num, int /** * Enable or disable protection of userflash pages */ -static int niietcm4_uflash_protect(struct flash_bank *bank, int mem_type, int set, int first, int last) +static int niietcm4_uflash_protect(struct flash_bank *bank, int mem_type, + int set, unsigned int first, unsigned int last) { int retval; if (mem_type == INFO_MEM_TYPE) { @@ -359,7 +360,7 @@ static int niietcm4_uflash_protect(struct flash_bank *bank, int mem_type, int se if (retval != ERROR_OK) return retval; /* modify dump */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { uint32_t reg_num = i/8; uint32_t bit_num = i%8; if (set) @@ -410,7 +411,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command) else return ERROR_COMMAND_SYNTAX_ERROR; - COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], uflash_addr); retval = target_write_u32(target, UFMA, uflash_addr); if (retval != ERROR_OK) @@ -426,8 +427,8 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command) if (retval != ERROR_OK) return retval; command_print(CMD, "Read userflash %s region:\n" - "address = 0x%04x,\n" - "value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data); + "address = 0x%04" PRIx32 ",\n" + "value = 0x%02" PRIx32 ".", CMD_ARGV[0], uflash_addr, uflash_data); return retval; } @@ -462,14 +463,14 @@ COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command) else return ERROR_COMMAND_SYNTAX_ERROR; - COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr); - COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], uflash_data); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], uflash_addr); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], uflash_data); int page_num = uflash_addr/USERFLASH_PAGE_SIZE; command_print(CMD, "Write userflash %s region:\n" - "address = 0x%04x,\n" - "value = 0x%02x.\n" + "address = 0x%04" PRIx32 ",\n" + "value = 0x%02" PRIx32 ".\n" "Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data); /* dump */ uint32_t uflash_dump[USERFLASH_PAGE_SIZE]; @@ -563,7 +564,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_erase_command) return retval; } - command_print(CMD, "Erase %s userflash pages %d through %d done!", CMD_ARGV[0], first, last); + command_print(CMD, "Erase %s userflash pages %u through %u done!", CMD_ARGV[0], first, last); return retval; } @@ -693,11 +694,11 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_command) int set; if (strcmp("on", CMD_ARGV[3]) == 0) { - command_print(CMD, "Try to enable %s userflash sectors %d through %d protection. Please wait ... ", + command_print(CMD, "Try to enable %s userflash sectors %u through %u protection. Please wait ... ", CMD_ARGV[0], first, last); set = 1; } else if (strcmp("off", CMD_ARGV[3]) == 0) { - command_print(CMD, "Try to disable %s userflash sectors %d through %d protection. Please wait ... ", + command_print(CMD, "Try to disable %s userflash sectors %u through %u protection. Please wait ... ", CMD_ARGV[0], first, last); set = 0; } else @@ -802,7 +803,7 @@ COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command) return ERROR_COMMAND_SYNTAX_ERROR; uint32_t pin; - COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], pin); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], pin); if (pin > 15) return ERROR_COMMAND_SYNTAX_ERROR; @@ -1111,7 +1112,7 @@ static int niietcm4_protect_check(struct flash_bank *bank) } else { uflash_addr = BF_LOCK_ADDR; uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB; - for (int i = 0; i < bank->num_sectors/8; i++) { + for (unsigned int i = 0; i < bank->num_sectors/8; i++) { retval = target_write_u32(target, UFMA, uflash_addr); if (retval != ERROR_OK) return retval; @@ -1163,7 +1164,8 @@ static int niietcm4_mass_erase(struct flash_bank *bank) return retval; } -static int niietcm4_erase(struct flash_bank *bank, int first, int last) +static int niietcm4_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv; @@ -1188,7 +1190,7 @@ static int niietcm4_erase(struct flash_bank *bank, int first, int last) /* erasing pages */ unsigned int page_size = bank->size / bank->num_sectors; - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { /* current page addr */ flash_addr = i*page_size; retval = target_write_u32(target, FMA, flash_addr); @@ -1211,7 +1213,8 @@ static int niietcm4_erase(struct flash_bank *bank, int first, int last) return retval; } -static int niietcm4_protect(struct flash_bank *bank, int set, int first, int last) +static int niietcm4_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { struct target *target = bank->target; struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv; @@ -1223,7 +1226,7 @@ static int niietcm4_protect(struct flash_bank *bank, int set, int first, int las return ERROR_TARGET_NOT_HALTED; } - LOG_INFO("Plese wait ..."); /* it`s quite a long process */ + LOG_INFO("Please wait ..."); /* it`s quite a long process */ /* chose between main bootflash and info bootflash */ if (niietcm4_info->bflash_info_remap) { /* dump */ @@ -1251,7 +1254,7 @@ static int niietcm4_protect(struct flash_bank *bank, int set, int first, int las if (retval != ERROR_OK) return retval; /* modify dump */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { uint32_t reg_num = i/8; uint32_t bit_num = i%8; if (set) @@ -1413,7 +1416,7 @@ static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer, /* if block write failed (no sufficient working area), * we use normal (slow) single halfword accesses */ LOG_WARNING("Can't use block writes, falling back to single memory accesses"); - LOG_INFO("Plese wait ..."); /* it`s quite a long process */ + LOG_INFO("Please wait ..."); /* it`s quite a long process */ /* chose between main bootflash and info bootflash */ if (niietcm4_info->bflash_info_remap) @@ -1424,7 +1427,7 @@ static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer, /* write 16 bytes per try */ for (unsigned int i = 0; i < count; i += 16) { /* current addr */ - LOG_INFO("%d byte of %d", i, count); + LOG_INFO("%u byte of %" PRIu32, i, count); flash_addr = offset + i; retval = target_write_u32(target, FMA, flash_addr); if (retval != ERROR_OK) @@ -1466,9 +1469,7 @@ static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer, } free_buffer: - if (new_buffer) - free(new_buffer); - + free(new_buffer); return retval; } @@ -1585,41 +1586,41 @@ static int niietcm4_probe_k1921vk01t(struct flash_bank *bank) char info_bootflash_addr_str[64]; if (niietcm4_info->bflash_info_remap) snprintf(info_bootflash_addr_str, sizeof(info_bootflash_addr_str), - TARGET_ADDR_FMT " base adress", bank->base); + TARGET_ADDR_FMT " base address", bank->base); else snprintf(info_bootflash_addr_str, sizeof(info_bootflash_addr_str), - "not mapped to global adress space"); + "not mapped to global address space"); snprintf(niietcm4_info->chip_brief, sizeof(niietcm4_info->chip_brief), "\n" "MEMORY CONFIGURATION\n" "Bootflash :\n" - " %d kB total\n" - " %d pages %d kB each\n" - " 0x%08x base adress\n" + " %" PRIu32 " kB total\n" + " %" PRIu32 " pages %" PRIu32 " kB each\n" + " 0x%08" PRIx32 " base address\n" "%s" "Info bootflash :\n" - " %d kB total\n" - " %d pages %d kB each\n" + " %" PRIu32 " kB total\n" + " %" PRIu32 " pages %" PRIu32 " kB each\n" " %s\n" "%s" "Userflash :\n" - " %d kB total\n" - " %d pages %d B each\n" - " %d bit cells\n" - " not maped to global adress space\n" + " %" PRIu32 " kB total\n" + " %" PRIu32 " pages %" PRIu32 " B each\n" + " %" PRIu32 " bit cells\n" + " not mapped to global address space\n" "Info userflash :\n" - " %d B total\n" - " %d pages of %d B each\n" - " %d bit cells\n" - " not maped to global adress space\n" + " %" PRIu32 " B total\n" + " %" PRIu32 " pages of %" PRIu32 " B each\n" + " %" PRIu32 " bit cells\n" + " not mapped to global address space\n" "RAM :\n" " 192 kB total\n" - " 0x20000000 base adress\n" + " 0x20000000 base address\n" "External memory :\n" " 8/16 bit address space\n" - " 0x%08x base adress\n" + " 0x%08" PRIx32 " base address\n" "\n" "INFOWORD STATUS\n" "Bootflash info region remap :\n" @@ -1627,9 +1628,9 @@ static int niietcm4_probe_k1921vk01t(struct flash_bank *bank) "External memory boot port :\n" " %s\n" "External memory boot pin :\n" - " %d\n" + " %" PRIu32 "\n" "External memory interface alternative function :\n" - " %d\n" + " %" PRIu32 "\n" "Option boot from external memory :\n" " %s\n", bflash_size/1024, @@ -1656,7 +1657,7 @@ static int niietcm4_probe_k1921vk01t(struct flash_bank *bank) niietcm4_info->extmem_boot_pin, niietcm4_info->extmem_boot_altfunc, niietcm4_info->extmem_boot ? "enable" : "disable"); - } else{ + } else { bank->size = 0x100000; bank->num_sectors = 128; @@ -1678,10 +1679,9 @@ static int niietcm4_probe(struct flash_bank *bank) struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv; struct target *target = bank->target; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); + bank->sectors = NULL; + uint32_t retval; uint32_t chipid; diff --git a/src/flash/nor/non_cfi.c b/src/flash/nor/non_cfi.c index 851c0ae81..a817966c6 100644 --- a/src/flash/nor/non_cfi.c +++ b/src/flash/nor/non_cfi.c @@ -483,11 +483,11 @@ void cfi_fixup_non_cfi(struct flash_bank *bank) break; } - /* only fixup jedec flashs found in table */ + /* only fixup jedec flashes found in table */ if (!non_cfi->mfr) return; - cfi_info->not_cfi = 1; + cfi_info->not_cfi = true; /* fill in defaults for non-critical data */ cfi_info->vcc_min = 0x0; diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c index 9a68b5f37..0b6536728 100644 --- a/src/flash/nor/nrf5.c +++ b/src/flash/nor/nrf5.c @@ -89,7 +89,7 @@ enum nrf5_ficr_registers { enum nrf5_uicr_registers { NRF5_UICR_BASE = 0x10001000, /* User Information - * Configuration Regsters */ + * Configuration Registers */ #define NRF5_UICR_REG(offset) (NRF5_UICR_BASE + offset) @@ -256,7 +256,7 @@ static const struct nrf5_device_spec nrf5_known_devices_table[] = { NRF51_DEVICE_DEF(0x007A, "51422", "CEAA", "C0", 256), NRF51_DEVICE_DEF(0x0088, "51422", "CFAC", "A0", 256), - /* The driver fully autodects nRF52 series devices by FICR INFO, + /* The driver fully autodetects nRF52 series devices by FICR INFO, * no need for nRF52xxx HWIDs in this table */ #if 0 /* nRF52810 Devices */ @@ -451,7 +451,7 @@ static int nrf5_protect_check_bprot(struct flash_bank *bank) uint32_t bprot_reg = 0; int res; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { unsigned int bit = i % 32; if (bit == 0) { unsigned int n_reg = i / 32; @@ -505,14 +505,15 @@ static int nrf5_protect_check(struct flash_bank *bank) } } - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = clenr0 != 0xFFFFFFFF && bank->sectors[i].offset < clenr0; return ERROR_OK; } -static int nrf5_protect(struct flash_bank *bank, int set, int first, int last) +static int nrf5_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { int res; uint32_t clenr0, ppfc; @@ -532,7 +533,7 @@ static int nrf5_protect(struct flash_bank *bank, int set, int first, int last) } if (first != 0) { - LOG_ERROR("Code region 0 must start at the begining of the bank"); + LOG_ERROR("Code region 0 must start at the beginning of the bank"); return ERROR_FAIL; } @@ -1026,7 +1027,8 @@ error: return res; } -static int nrf5_erase(struct flash_bank *bank, int first, int last) +static int nrf5_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int res; struct nrf5_info *chip; @@ -1036,7 +1038,7 @@ static int nrf5_erase(struct flash_bank *bank, int first, int last) return res; /* For each sector to be erased */ - for (int s = first; s <= last && res == ERROR_OK; s++) + for (unsigned int s = first; s <= last && res == ERROR_OK; s++) res = nrf5_erase_page(bank, chip, &bank->sectors[s]); return res; @@ -1360,7 +1362,7 @@ const struct flash_driver nrf5_flash = { }; /* We need to retain the flash-driver name as well as the commands - * for backwards compatability */ + * for backwards compatibility */ const struct flash_driver nrf51_flash = { .name = "nrf51", .commands = nrf5_command_handlers, diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c index a4852829e..7609fa81c 100644 --- a/src/flash/nor/numicro.c +++ b/src/flash/nor/numicro.c @@ -1433,7 +1433,7 @@ static int numicro_protect_check(struct flash_bank *bank) { struct target *target = bank->target; uint32_t set, config[2]; - int i, retval = ERROR_OK; + int retval = ERROR_OK; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -1467,25 +1467,26 @@ static int numicro_protect_check(struct flash_bank *bank) set = 0; } - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = set; return ERROR_OK; } -static int numicro_erase(struct flash_bank *bank, int first, int last) +static int numicro_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; uint32_t timeout, status; - int i, retval = ERROR_OK; + int retval = ERROR_OK; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - LOG_INFO("Nuvoton NuMicro: Sector Erase ... (%d to %d)", first, last); + LOG_INFO("Nuvoton NuMicro: Sector Erase ... (%u to %u)", first, last); retval = numicro_init_isp(target); if (retval != ERROR_OK) @@ -1495,8 +1496,8 @@ static int numicro_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - for (i = first; i <= last; i++) { - LOG_DEBUG("erasing sector %d at address " TARGET_ADDR_FMT, i, + for (unsigned int i = first; i <= last; i++) { + LOG_DEBUG("erasing sector %u at address " TARGET_ADDR_FMT, i, bank->base + bank->sectors[i].offset); retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + bank->sectors[i].offset); if (retval != ERROR_OK) @@ -1582,7 +1583,7 @@ static int numicro_write(struct flash_bank *bank, const uint8_t *buffer, /* program command */ for (uint32_t i = 0; i < count; i += 4) { - LOG_DEBUG("write longword @ %08X", offset + i); + LOG_DEBUG("write longword @ %08" PRIX32, offset + i); retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + offset + i); if (retval != ERROR_OK) diff --git a/src/flash/nor/ocl.c b/src/flash/nor/ocl.c index d2a659418..813537d44 100644 --- a/src/flash/nor/ocl.c +++ b/src/flash/nor/ocl.c @@ -51,7 +51,8 @@ FLASH_BANK_COMMAND_HANDLER(ocl_flash_bank_command) return ERROR_OK; } -static int ocl_erase(struct flash_bank *bank, int first, int last) +static int ocl_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct ocl_priv *ocl = bank->driver_priv; int retval; @@ -207,7 +208,6 @@ static int ocl_probe(struct flash_bank *bank) int retval; uint32_t dcc_buffer[1]; int sectsize; - int i; /* purge pending data in DCC */ embeddedice_receive(ocl->jtag_info, dcc_buffer, 1); @@ -276,7 +276,7 @@ static int ocl_probe(struct flash_bank *bank) return ERROR_FLASH_BANK_INVALID; } sectsize = bank->size / bank->num_sectors; - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * sectsize; bank->sectors[i].size = sectsize; bank->sectors[i].is_erased = -1; diff --git a/src/flash/nor/ocl.h b/src/flash/nor/ocl.h index 3e83f76cf..b1fe308f2 100644 --- a/src/flash/nor/ocl.h +++ b/src/flash/nor/ocl.h @@ -22,7 +22,7 @@ /* command/response mask */ #define OCL_CMD_MASK 0xFFFF0000L -/* commads */ +/* commands */ #define OCL_FLASH_BLOCK 0x0CFB0000L #define OCL_ERASE_BLOCK 0x0CEB0000L #define OCL_ERASE_ALL 0x0CEA0000L diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c index 81ffdc400..c42cfb2bb 100644 --- a/src/flash/nor/pic32mx.c +++ b/src/flash/nor/pic32mx.c @@ -95,7 +95,7 @@ #define MX_17x_27x 2 /* PIC32mx17x/27x */ struct pic32mx_flash_bank { - int probed; + bool probed; int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */ }; @@ -211,7 +211,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command) pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank)); bank->driver_priv = pic32mx_info; - pic32mx_info->probed = 0; + pic32mx_info->probed = false; pic32mx_info->dev_type = 0; return ERROR_OK; @@ -271,8 +271,7 @@ static int pic32mx_protect_check(struct flash_bank *bank) uint32_t config0_address; uint32_t devcfg0; - int s; - int num_pages; + unsigned int s, num_pages; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -321,10 +320,10 @@ static int pic32mx_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int pic32mx_erase(struct flash_bank *bank, int first, int last) +static int pic32mx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; - int i; uint32_t status; if (bank->target->state != TARGET_HALTED) { @@ -345,7 +344,7 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset)); status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10); @@ -360,7 +359,8 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last) +static int pic32mx_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; @@ -372,7 +372,7 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last return ERROR_OK; } -/* see contib/loaders/flash/pic32mx.s for src */ +/* see contrib/loaders/flash/pic32mx.s for src */ static uint32_t pic32mx_flash_write_code[] = { /* write: */ @@ -591,8 +591,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); - if (new_buffer != NULL) - free(new_buffer); + free(new_buffer); return retval; } @@ -700,7 +699,7 @@ static int pic32mx_probe(struct flash_bank *bank) uint32_t device_id; int page_size; - pic32mx_info->probed = 0; + pic32mx_info->probed = false; device_id = ejtag_info->idcode; LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)", @@ -772,12 +771,9 @@ static int pic32mx_probe(struct flash_bank *bank) } } - LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024); + LOG_INFO("flash size = %" PRIu32 "kbytes", num_pages / 1024); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); /* calculate numbers of pages */ num_pages /= page_size; @@ -792,7 +788,7 @@ static int pic32mx_probe(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } - pic32mx_info->probed = 1; + pic32mx_info->probed = true; return ERROR_OK; } @@ -817,7 +813,7 @@ static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size) if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) { snprintf(buf, buf_size, - "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", + "Cannot identify target as a PIC32MX family (manufacturer 0x%03x != 0x%03x)\n", (unsigned)((device_id >> 1) & 0x7ff), PIC32MX_MANUF_ID); return ERROR_FLASH_OPERATION_FAILED; @@ -920,7 +916,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command) mchip_cmd = MCHP_STATUS; mips_ejtag_drscan_8(ejtag_info, &mchip_cmd); if (timeout-- == 0) { - LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd); + LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx8 "", mchip_cmd); break; } alive_sleep(1); diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c index 1eb6a26ed..9c2fdf775 100644 --- a/src/flash/nor/psoc4.c +++ b/src/flash/nor/psoc4.c @@ -35,7 +35,7 @@ #include #include -/* device documets: +/* device documents: PSoC(R) 4: PSoC 4200 Family Datasheet Document Number: 001-87197 Rev. *B Revised August 29, 2013 @@ -157,7 +157,7 @@ const struct psoc4_chip_family psoc4_families[] = { struct psoc4_flash_bank { uint32_t row_size; uint32_t user_bank_size; - int num_macros; + unsigned int num_macros; bool probed; uint8_t cmd_program_row; uint16_t family_id; @@ -392,7 +392,7 @@ static int psoc4_get_silicon_id(struct flash_bank *bank, uint32_t *silicon_id, u /* build ID as Cypress sw does: * bit 31..16 silicon ID * bit 15..8 revision ID (so far 0x11 for all devices) - * bit 7..0 family ID (lowes 8 bits) + * bit 7..0 family ID (lowest 8 bits) */ if (silicon_id) *silicon_id = ((part0 & 0x0000ffff) << 16) @@ -496,16 +496,15 @@ static int psoc4_protect_check(struct flash_bank *bank) uint32_t prot_addr = PSOC4_SFLASH_MACRO0; int retval; - int s = 0; - int m, i; uint8_t bf[PSOC4_ROWS_PER_MACRO/8]; + unsigned int s = 0; - for (m = 0; m < psoc4_info->num_macros; m++, prot_addr += PSOC4_SFLASH_MACRO_SIZE) { + for (unsigned int m = 0; m < psoc4_info->num_macros; m++, prot_addr += PSOC4_SFLASH_MACRO_SIZE) { retval = target_read_memory(target, prot_addr, 4, PSOC4_ROWS_PER_MACRO/32, bf); if (retval != ERROR_OK) return retval; - for (i = 0; i < PSOC4_ROWS_PER_MACRO && s < bank->num_sectors; i++, s++) + for (unsigned int i = 0; i < PSOC4_ROWS_PER_MACRO && s < bank->num_sectors; i++, s++) bank->sectors[s].is_protected = bf[i/8] & (1 << (i%8)) ? 1 : 0; } @@ -515,7 +514,6 @@ static int psoc4_protect_check(struct flash_bank *bank) static int psoc4_mass_erase(struct flash_bank *bank) { - int i; int retval = psoc4_flash_prepare(bank); if (retval != ERROR_OK) return retval; @@ -528,14 +526,15 @@ static int psoc4_mass_erase(struct flash_bank *bank) if (retval == ERROR_OK) /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; return retval; } -static int psoc4_erase(struct flash_bank *bank, int first, int last) +static int psoc4_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct psoc4_flash_bank *psoc4_info = bank->driver_priv; if (psoc4_info->cmd_program_row == PSOC4_CMD_WRITE_ROW) { @@ -552,7 +551,8 @@ static int psoc4_erase(struct flash_bank *bank, int first, int last) } -static int psoc4_protect(struct flash_bank *bank, int set, int first, int last) +static int psoc4_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct psoc4_flash_bank *psoc4_info = bank->driver_priv; @@ -567,8 +567,8 @@ static int psoc4_protect(struct flash_bank *bank, int set, int first, int last) uint32_t *sysrq_buffer = NULL; const int param_sz = 8; int chip_prot = PSOC4_CHIP_PROT_OPEN; - int i, m, sect; - int num_bits = bank->num_sectors; + unsigned int i; + unsigned int num_bits = bank->num_sectors; if (num_bits > PSOC4_ROWS_PER_MACRO) num_bits = PSOC4_ROWS_PER_MACRO; @@ -584,7 +584,7 @@ static int psoc4_protect(struct flash_bank *bank, int set, int first, int last) for (i = first; i <= last && i < bank->num_sectors; i++) bank->sectors[i].is_protected = set; - for (m = 0, sect = 0; m < psoc4_info->num_macros; m++) { + for (unsigned int m = 0, sect = 0; m < psoc4_info->num_macros; m++) { uint8_t *p = (uint8_t *)(sysrq_buffer + 2); memset(p, 0, prot_sz); for (i = 0; i < num_bits && sect < bank->num_sectors; i++, sect++) { @@ -610,8 +610,7 @@ static int psoc4_protect(struct flash_bank *bank, int set, int first, int last) break; } - if (sysrq_buffer) - free(sysrq_buffer); + free(sysrq_buffer); psoc4_protect_check(bank); return retval; @@ -714,9 +713,7 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer, cleanup: jtag_poll_set_enabled(save_poll); - if (sysrq_buffer) - free(sysrq_buffer); - + free(sysrq_buffer); return retval; } @@ -827,9 +824,7 @@ static int psoc4_probe(struct flash_bank *bank) } } - if (bank->sectors) { - free(bank->sectors); - } + free(bank->sectors); psoc4_info->family_id = family_id; psoc4_info->num_macros = num_macros; diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c index 7f801f294..c651dea7a 100644 --- a/src/flash/nor/psoc5lp.c +++ b/src/flash/nor/psoc5lp.c @@ -47,7 +47,7 @@ #define PANTHER_DEVICE_ID 0x4008001C /* NVL is not actually mapped to the Cortex-M address space - * As we need a base addess different from other banks in the device + * As we need a base address different from other banks in the device * we use the address of NVL programming data in Cypress images */ #define NVL_META_BASE 0x90000000 @@ -657,7 +657,8 @@ static int psoc5lp_nvl_read(struct flash_bank *bank, return ERROR_OK; } -static int psoc5lp_nvl_erase(struct flash_bank *bank, int first, int last) +static int psoc5lp_nvl_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { LOG_WARNING("There is no erase operation for NV Latches"); return ERROR_FLASH_OPER_UNSUPPORTED; @@ -665,9 +666,7 @@ static int psoc5lp_nvl_erase(struct flash_bank *bank, int first, int last) static int psoc5lp_nvl_erase_check(struct flash_bank *bank) { - int i; - - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 0; return ERROR_OK; @@ -861,11 +860,12 @@ struct psoc5lp_eeprom_flash_bank { const struct psoc5lp_device *device; }; -static int psoc5lp_eeprom_erase(struct flash_bank *bank, int first, int last) +static int psoc5lp_eeprom_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int i, retval; + int retval; - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = psoc5lp_spc_erase_sector(bank->target, SPC_ARRAY_EEPROM, i); if (retval != ERROR_OK) @@ -919,7 +919,7 @@ static int psoc5lp_eeprom_write(struct flash_bank *bank, memset(buf + byte_count, bank->default_padded_value, EEPROM_ROW_SIZE - byte_count); - LOG_DEBUG("Padding %d bytes", EEPROM_ROW_SIZE - byte_count); + LOG_DEBUG("Padding %" PRIu32 " bytes", EEPROM_ROW_SIZE - byte_count); retval = psoc5lp_spc_load_row(target, SPC_ARRAY_EEPROM, buf, EEPROM_ROW_SIZE); if (retval != ERROR_OK) @@ -951,7 +951,7 @@ static int psoc5lp_eeprom_probe(struct flash_bank *bank) struct psoc5lp_eeprom_flash_bank *psoc_eeprom_bank = bank->driver_priv; uint32_t flash_addr = bank->base; uint32_t val; - int i, retval; + int retval; if (psoc_eeprom_bank->probed) return ERROR_OK; @@ -979,7 +979,7 @@ static int psoc5lp_eeprom_probe(struct flash_bank *bank) bank->num_sectors = DIV_ROUND_UP(bank->size, EEPROM_SECTOR_SIZE); bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].size = EEPROM_SECTOR_SIZE; bank->sectors[i].offset = flash_addr - bank->base; bank->sectors[i].is_erased = -1; @@ -1064,27 +1064,28 @@ struct psoc5lp_flash_bank { * are used for driver private flash operations */ }; -static int psoc5lp_erase(struct flash_bank *bank, int first, int last) +static int psoc5lp_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv; - int i, retval; + int retval; if (!psoc_bank->ecc_enabled) { /* Silently avoid erasing sectors twice */ if (last >= first + bank->num_sectors / 2) { - LOG_DEBUG("Skipping duplicate erase of sectors %d to %d", + LOG_DEBUG("Skipping duplicate erase of sectors %u to %u", first + bank->num_sectors / 2, last); last = first + (bank->num_sectors / 2) - 1; } /* Check for any remaining ECC sectors */ if (last >= bank->num_sectors / 2) { - LOG_WARNING("Skipping erase of ECC region sectors %d to %d", + LOG_WARNING("Skipping erase of ECC region sectors %u to %u", bank->num_sectors / 2, last); last = (bank->num_sectors / 2) - 1; } } - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = psoc5lp_spc_erase_sector(bank->target, i / SECTORS_PER_BLOCK, i % SECTORS_PER_BLOCK); if (retval != ERROR_OK) @@ -1099,14 +1100,14 @@ static int psoc5lp_erase_check(struct flash_bank *bank) { struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv; struct target *target = bank->target; - int i, retval; + int retval; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - int num_sectors = bank->num_sectors; + unsigned int num_sectors = bank->num_sectors; if (psoc_bank->ecc_enabled) num_sectors *= 2; /* count both std and ecc sector always */ @@ -1115,14 +1116,14 @@ static int psoc5lp_erase_check(struct flash_bank *bank) if (block_array == NULL) return ERROR_FAIL; - for (i = 0; i < num_sectors; i++) { + for (unsigned int i = 0; i < num_sectors; i++) { block_array[i].address = bank->base + bank->sectors[i].offset; block_array[i].size = bank->sectors[i].size; block_array[i].result = UINT32_MAX; /* erase state unknown */ } bool fast_check = true; - for (i = 0; i < num_sectors; ) { + for (unsigned int i = 0; i < num_sectors; ) { retval = armv7m_blank_check_memory(target, block_array + i, num_sectors - i, bank->erased_value); @@ -1138,14 +1139,14 @@ static int psoc5lp_erase_check(struct flash_bank *bank) if (fast_check) { if (psoc_bank->ecc_enabled) { - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = (block_array[i].result != 1) ? block_array[i].result : block_array[i + bank->num_sectors].result; /* if std sector is erased, use status of ecc sector */ } else { - for (i = 0; i < num_sectors; i++) + for (unsigned int i = 0; i < num_sectors; i++) bank->sectors[i].is_erased = block_array[i].result; } retval = ERROR_OK; @@ -1350,7 +1351,7 @@ static int psoc5lp_protect_check(struct flash_bank *bank) struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv; uint8_t row_data[ROW_SIZE]; const unsigned protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8; - unsigned i, j, k, num_sectors; + unsigned i, k, num_sectors; int retval; if (bank->target->state != TARGET_HALTED) { @@ -1370,7 +1371,7 @@ static int psoc5lp_protect_check(struct flash_bank *bank) else num_sectors = SECTORS_PER_BLOCK; - for (j = 0; j < num_sectors; j++) { + for (unsigned int j = 0; j < num_sectors; j++) { int sector_nr = i * SECTORS_PER_BLOCK + j; struct flash_sector *sector = &bank->sectors[sector_nr]; struct flash_sector *ecc_sector; @@ -1416,7 +1417,7 @@ static int psoc5lp_probe(struct flash_bank *bank) struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv; uint32_t flash_addr = bank->base; uint8_t nvl[4], temp[2]; - int i, retval; + int retval; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -1447,7 +1448,7 @@ static int psoc5lp_probe(struct flash_bank *bank) bank->sectors = calloc(bank->num_sectors * 2, sizeof(struct flash_sector)); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].size = SECTOR_SIZE; bank->sectors[i].offset = flash_addr - bank->base; bank->sectors[i].is_erased = -1; @@ -1456,7 +1457,7 @@ static int psoc5lp_probe(struct flash_bank *bank) flash_addr += bank->sectors[i].size; } flash_addr = 0x48000000; - for (i = bank->num_sectors; i < bank->num_sectors * 2; i++) { + for (unsigned int i = bank->num_sectors; i < bank->num_sectors * 2; i++) { bank->sectors[i].size = ROWS_PER_SECTOR * ROW_ECC_SIZE; bank->sectors[i].offset = flash_addr - bank->base; bank->sectors[i].is_erased = -1; diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c index a8f8d3f08..df151c1b5 100644 --- a/src/flash/nor/psoc6.c +++ b/src/flash/nor/psoc6.c @@ -325,7 +325,7 @@ static int ipc_acquire(struct target *target, char ipc_id) * @brief Invokes SROM API functions which are responsible for Flash operations * * @param target current target - * @param req_and_params requect id of the function to invoke + * @param req_and_params request id of the function to invoke * @param working_area address of memory buffer in target's memory space for SROM API parameters * @param data_out pointer to variable which will be populated with execution status * @return ERROR_OK in case of success, ERROR_XXX code otherwise @@ -378,7 +378,7 @@ static int call_sromapi(struct target *target, bool is_success = (*data_out & SROMAPI_STATUS_MSK) == SROMAPI_STAT_SUCCESS; if (!is_success) { - LOG_ERROR("SROM API execution failed. Status: 0x%08X", (uint32_t)*data_out); + LOG_ERROR("SROM API execution failed. Status: 0x%08" PRIX32, *data_out); return ERROR_TARGET_FAILURE; } @@ -450,7 +450,7 @@ static int psoc6_protect_check(struct flash_bank *bank) break; } - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = is_protected; return ERROR_OK; @@ -460,7 +460,8 @@ static int psoc6_protect_check(struct flash_bank *bank) * @brief Dummy function, Life Cycle transition is not currently supported * @return ERROR_OK always *************************************************************************************************/ -static int psoc6_protect(struct flash_bank *bank, int set, int first, int last) +static int psoc6_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { (void)bank; (void)set; @@ -474,7 +475,7 @@ static int psoc6_protect(struct flash_bank *bank, int set, int first, int last) /** *********************************************************************************************** * @brief Translates Protection status to string * @param protection protection value - * @return pointer to const string describintg protection status + * @return pointer to const string describing protection status *************************************************************************************************/ static const char *protection_to_str(uint8_t protection) { @@ -512,9 +513,9 @@ static int psoc6_get_info(struct flash_bank *bank, char *buf, int buf_size) return hr; snprintf(buf, buf_size, - "PSoC6 Silicon ID: 0x%08X\n" + "PSoC6 Silicon ID: 0x%08" PRIX32 "\n" "Protection: %s\n" - "Main Flash size: %d kB\n" + "Main Flash size: %" PRIu32 " kB\n" "Work Flash size: 32 kB\n", psoc6_info->silicon_id, protection_to_str(psoc6_info->protection), @@ -573,7 +574,7 @@ static int psoc6_probe(struct flash_bank *bank) int hr = ERROR_OK; - /* Retrieve data from SPCIF_GEOMATRY */ + /* Retrieve data from SPCIF_GEOMETRY */ uint32_t geom; target_read_u32(target, PSOC6_SPCIF_GEOMETRY, &geom); uint32_t row_sz_lg2 = (geom & 0xF0) >> 4; @@ -584,10 +585,8 @@ static int psoc6_probe(struct flash_bank *bank) /* Calculate size of Main Flash*/ uint32_t flash_sz_bytes = bank_cnt * row_cnt * row_sz; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); + bank->sectors = NULL; size_t bank_size = 0; @@ -609,7 +608,7 @@ static int psoc6_probe(struct flash_bank *bank) return ERROR_FLASH_BANK_INVALID; } - size_t num_sectors = bank_size / row_sz; + unsigned int num_sectors = bank_size / row_sz; bank->size = bank_size; bank->chip_width = 4; bank->bus_width = 4; @@ -618,7 +617,7 @@ static int psoc6_probe(struct flash_bank *bank) bank->num_sectors = num_sectors; bank->sectors = calloc(num_sectors, sizeof(struct flash_sector)); - for (size_t i = 0; i < num_sectors; i++) { + for (unsigned int i = 0; i < num_sectors; i++) { bank->sectors[i].size = row_sz; bank->sectors[i].offset = i * row_sz; bank->sectors[i].is_erased = -1; @@ -661,7 +660,7 @@ static int psoc6_erase_sector(struct flash_bank *bank, struct working_area *wa, { struct target *target = bank->target; - LOG_DEBUG("Erasing SECTOR @%08X", addr); + LOG_DEBUG("Erasing SECTOR @%08" PRIX32, addr); int hr = target_write_u32(target, wa->address, SROMAPI_ERASESECTOR_REQ); if (hr != ERROR_OK) @@ -674,7 +673,7 @@ static int psoc6_erase_sector(struct flash_bank *bank, struct working_area *wa, uint32_t data_out; hr = call_sromapi(target, SROMAPI_ERASESECTOR_REQ, wa->address, &data_out); if (hr != ERROR_OK) - LOG_ERROR("SECTOR @%08X not erased!", addr); + LOG_ERROR("SECTOR @%08" PRIX32 " not erased!", addr); return hr; } @@ -690,7 +689,7 @@ static int psoc6_erase_row(struct flash_bank *bank, struct working_area *wa, uin { struct target *target = bank->target; - LOG_DEBUG("Erasing ROW @%08X", addr); + LOG_DEBUG("Erasing ROW @%08" PRIX32, addr); int hr = target_write_u32(target, wa->address, SROMAPI_ERASEROW_REQ); if (hr != ERROR_OK) @@ -703,7 +702,7 @@ static int psoc6_erase_row(struct flash_bank *bank, struct working_area *wa, uin uint32_t data_out; hr = call_sromapi(target, SROMAPI_ERASEROW_REQ, wa->address, &data_out); if (hr != ERROR_OK) - LOG_ERROR("ROW @%08X not erased!", addr); + LOG_ERROR("ROW @%08" PRIX32 " not erased!", addr); return hr; } @@ -717,7 +716,8 @@ static int psoc6_erase_row(struct flash_bank *bank, struct working_area *wa, uin * @param last last sector to erase * @return ERROR_OK in case of success, ERROR_XXX code otherwise *************************************************************************************************/ -static int psoc6_erase(struct flash_bank *bank, int first, int last) +static int psoc6_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct psoc6_target_info *psoc6_info = bank->driver_priv; @@ -740,7 +740,7 @@ static int psoc6_erase(struct flash_bank *bank, int first, int last) goto exit; /* Number of rows in single sector */ - const int rows_in_sector = sector_size / psoc6_info->row_sz; + const unsigned int rows_in_sector = sector_size / psoc6_info->row_sz; while (last >= first) { /* Erase Sector if we are on sector boundary and erase size covers whole sector */ @@ -750,7 +750,7 @@ static int psoc6_erase(struct flash_bank *bank, int first, int last) if (hr != ERROR_OK) goto exit_free_wa; - for (int i = first; i < first + rows_in_sector; i++) + for (unsigned int i = first; i < first + rows_in_sector; i++) bank->sectors[i].is_erased = 1; first += rows_in_sector; @@ -792,7 +792,7 @@ static int psoc6_program_row(struct flash_bank *bank, uint32_t data_out; int hr = ERROR_OK; - LOG_DEBUG("Programming ROW @%08X", addr); + LOG_DEBUG("Programming ROW @%08" PRIX32, addr); hr = target_alloc_working_area(target, psoc6_info->row_sz + 32, &wa); if (hr != ERROR_OK) @@ -833,7 +833,7 @@ exit: * @brief Performs Program operation * @param bank current flash bank * @param buffer pointer to the buffer with data - * @param offset starting offset in falsh bank + * @param offset starting offset in flash bank * @param count number of bytes in buffer * @return ERROR_OK in case of success, ERROR_XXX code otherwise *************************************************************************************************/ @@ -863,7 +863,7 @@ static int psoc6_program(struct flash_bank *bank, hr = psoc6_program_row(bank, aligned_addr, page_buf, is_sflash); if (hr != ERROR_OK) { - LOG_ERROR("Failed to program Flash at address 0x%08X", aligned_addr); + LOG_ERROR("Failed to program Flash at address 0x%08" PRIX32, aligned_addr); goto exit; } @@ -954,16 +954,16 @@ int handle_reset_halt(struct target *target) const struct armv7m_common *cm = target_to_armv7m(target); - /* PSoC6 reboots immediatelly after issuing SYSRESETREQ / VECTRESET + /* PSoC6 reboots immediately after issuing SYSRESETREQ / VECTRESET * this disables SWD/JTAG pins momentarily and may break communication * Ignoring return value of mem_ap_write_atomic_u32 seems to be ok here */ if (is_cm0) { /* Reset the CM0 by asserting SYSRESETREQ. This will also reset CM4 */ - LOG_INFO("psoc6.cm0: bkpt @0x%08X, issuing SYSRESETREQ", reset_addr); + LOG_INFO("psoc6.cm0: bkpt @0x%08" PRIX32 ", issuing SYSRESETREQ", reset_addr); mem_ap_write_atomic_u32(cm->debug_ap, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ); } else { - LOG_INFO("psoc6.cm4: bkpt @0x%08X, issuing VECTRESET", reset_addr); + LOG_INFO("psoc6.cm4: bkpt @0x%08" PRIX32 ", issuing VECTRESET", reset_addr); mem_ap_write_atomic_u32(cm->debug_ap, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_VECTRESET); } diff --git a/src/flash/nor/renesas_rpchf.c b/src/flash/nor/renesas_rpchf.c index 3f03f9275..f99749f3d 100644 --- a/src/flash/nor/renesas_rpchf.c +++ b/src/flash/nor/renesas_rpchf.c @@ -451,8 +451,8 @@ static int rpchf_spansion_write_words(struct flash_bank *bank, const uint8_t *wo /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" - PRId32, wordcount, buffersize); + LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %" + PRIu32, wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } @@ -497,7 +497,6 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t int align; /* number of unaligned bytes */ uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being *programmed */ - int i; int retval; if (bank->target->state != TARGET_HALTED) { @@ -523,14 +522,13 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t return retval; /* replace only bytes that must be written */ - for (i = align; - (i < bank->bus_width) && (count > 0); - i++, count--) + for (unsigned int i = align; (i < bank->bus_width) && (count > 0); i++, count--) { if (cfi_info->data_swap) /* data bytes are swapped (reverse endianness) */ current_word[bank->bus_width - i] = *buffer++; else current_word[i] = *buffer++; + } retval = cfi_write_word(bank, current_word, write_p); if (retval != ERROR_OK) @@ -547,12 +545,12 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t /* fall back to memory writes */ while (count >= (uint32_t)bank->bus_width) { - int fallback; + bool fallback; if ((write_p & 0xff) == 0) { LOG_INFO("Programming at 0x%08" PRIx32 ", count 0x%08" PRIx32 " bytes remaining", write_p, count); } - fallback = 1; + fallback = true; if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask)) { retval = rpchf_write_words(bank, buffer, bufferwsize, write_p); @@ -560,13 +558,13 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t buffer += buffersize; write_p += buffersize; count -= buffersize; - fallback = 0; + fallback = false; } else if (retval != ERROR_FLASH_OPER_UNSUPPORTED) return retval; } /* try the slow way? */ if (fallback) { - for (i = 0; i < bank->bus_width; i++) + for (unsigned int i = 0; i < bank->bus_width; i++) current_word[i] = *buffer++; retval = cfi_write_word(bank, current_word, write_p); @@ -585,7 +583,7 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t /* handle unaligned tail bytes */ if (count > 0) { - LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count); + LOG_INFO("Fixup %" PRIu32 " unaligned tail bytes", count); /* read a complete word from flash */ retval = cfi_target_read_memory(bank, write_p, 1, current_word); @@ -593,7 +591,7 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t return retval; /* replace only bytes that must be written */ - for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--) + for (unsigned int i = 0; (i < bank->bus_width) && (count > 0); i++, count--) if (cfi_info->data_swap) /* data bytes are swapped (reverse endianness) */ current_word[bank->bus_width - i] = *buffer++; @@ -614,7 +612,7 @@ static int rpchf_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; - LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32, + LOG_DEBUG("reading buffer of %" PRIu32 " byte at 0x%8.8" PRIx32, count, offset); if (bank->target->state != TARGET_HALTED) { diff --git a/src/flash/nor/sh_qspi.c b/src/flash/nor/sh_qspi.c index 862e43aae..4ec7ebe65 100644 --- a/src/flash/nor/sh_qspi.c +++ b/src/flash/nor/sh_qspi.c @@ -77,7 +77,7 @@ struct sh_qspi_flash_bank { const struct flash_device *dev; uint32_t io_base; - int probed; + bool probed; struct working_area *io_algorithm; struct working_area *source; unsigned int buffer_size; @@ -437,21 +437,21 @@ static int sh_qspi_erase_sector(struct flash_bank *bank, int sector) return wait_till_ready(bank, 3000); } -static int sh_qspi_erase(struct flash_bank *bank, int first, int last) +static int sh_qspi_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct sh_qspi_flash_bank *info = bank->driver_priv; int retval = ERROR_OK; - int sector; - LOG_DEBUG("%s: from sector %d to sector %d", __func__, first, last); + LOG_DEBUG("%s: from sector %u to sector %u", __func__, first, last); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -464,14 +464,14 @@ static int sh_qspi_erase(struct flash_bank *bank, int first, int last) if (info->dev->erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { retval = sh_qspi_erase_sector(bank, sector); if (retval != ERROR_OK) break; @@ -493,7 +493,6 @@ static int sh_qspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t chunk; bool addr4b = !!(info->dev->size_in_bytes > (1UL << 24)); int ret = ERROR_OK; - int sector; LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32, __func__, offset, count); @@ -509,13 +508,13 @@ static int sh_qspi_write(struct flash_bank *bank, const uint8_t *buffer, } if (offset & 0xff) { - LOG_ERROR("sh_qspi_write_page: unaligned write address: %08x", + LOG_ERROR("sh_qspi_write_page: unaligned write address: %08" PRIx32, offset); return ERROR_FAIL; } /* Check sector protection */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start offset in or before this sector? */ /* End offset in or behind this sector? */ struct flash_sector *bs = &bank->sectors[sector]; @@ -523,7 +522,7 @@ static int sh_qspi_write(struct flash_bank *bank, const uint8_t *buffer, if ((offset < (bs->offset + bs->size)) && ((offset + count - 1) >= bs->offset) && bs->is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -685,11 +684,9 @@ static int read_flash_id(struct flash_bank *bank, uint32_t *id) } static int sh_qspi_protect(struct flash_bank *bank, int set, - int first, int last) + unsigned int first, unsigned int last) { - int sector; - - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_protected = set; return ERROR_OK; @@ -758,7 +755,7 @@ static int sh_qspi_probe(struct flash_bank *bank) if (info->probed) free(bank->sectors); - info->probed = 0; + info->probed = false; for (target_device = target_devices; target_device->name; ++target_device) @@ -820,7 +817,7 @@ static int sh_qspi_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = 0; @@ -828,7 +825,7 @@ static int sh_qspi_probe(struct flash_bank *bank) } bank->sectors = sectors; - info->probed = 1; + info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c index 4e39705fd..76280f1ab 100644 --- a/src/flash/nor/sim3x.c +++ b/src/flash/nor/sim3x.c @@ -250,7 +250,7 @@ static int sim3x_erase_page(struct flash_bank *bank, uint32_t addr) if (ret != ERROR_OK) return ret; - /* Write the inital unlock value to KEY */ + /* Write the initial unlock value to KEY */ ret = target_write_u32(target, FLASHCTRL0_KEY, FLASHCTRL0_KEY_INITIAL_UNLOCK); if (ret != ERROR_OK) @@ -277,9 +277,10 @@ static int sim3x_erase_page(struct flash_bank *bank, uint32_t addr) return ERROR_FAIL; } -static int sim3x_flash_erase(struct flash_bank *bank, int first, int last) +static int sim3x_flash_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int ret, i; + int ret; uint32_t temp; struct sim3x_info *sim3x_info; struct target *target; @@ -302,7 +303,7 @@ static int sim3x_flash_erase(struct flash_bank *bank, int first, int last) } /* erase pages */ - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { ret = sim3x_erase_page(bank, bank->sectors[i].offset); if (ret != ERROR_OK) return ret; @@ -311,7 +312,7 @@ static int sim3x_flash_erase(struct flash_bank *bank, int first, int last) target = bank->target; /* Wait until busy */ - for (i = 0; i < FLASH_BUSY_TIMEOUT; i++) { + for (unsigned int i = 0; i < FLASH_BUSY_TIMEOUT; i++) { ret = target_read_u32(target, FLASHCTRL0_CONFIG_ALL, &temp); if (ret != ERROR_OK) return ret; @@ -489,7 +490,7 @@ static int sim3x_flash_write(struct flash_bank *bank, const uint8_t *buffer, uin sim3x_info = bank->driver_priv; if (sim3x_info->flash_locked) { - LOG_ERROR("Falsh is locked"); + LOG_ERROR("Flash is locked"); return ERROR_FAIL; } @@ -547,7 +548,7 @@ static int sim3x_flash_lock_check(struct flash_bank *bank) static int sim3x_flash_protect_check(struct flash_bank *bank) { - int ret, i; + int ret; struct sim3x_info *sim3x_info; /* Check if target is halted */ @@ -562,13 +563,14 @@ static int sim3x_flash_protect_check(struct flash_bank *bank) sim3x_info = bank->driver_priv; - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = sim3x_info->flash_locked; return ERROR_OK; } -static int sim3x_flash_protect(struct flash_bank *bank, int set, int first, int last) +static int sim3x_flash_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { int ret; uint8_t lock_word[4]; @@ -799,10 +801,7 @@ static int sim3x_probe(struct flash_bank *bank) if (ret != ERROR_OK) return ret; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->base = FLASH_BASE_ADDRESS; bank->size = sim3x_info->flash_size_kb * SIM3X_FLASH_PAGE_SIZE; @@ -1030,7 +1029,7 @@ COMMAND_HANDLER(sim3x_lock) ret = target_read_u32(target, CPUID, &val); /* if correct value is read, then it will continue */ if (ret != ERROR_OK || (val & CPUID_CHECK_VALUE_MASK) != CPUID_CHECK_VALUE) { - /* if correct value is'n read, then it will check SIM3X_AP_INIT_STAT register */ + /* if correct value isn't read, then it will check SIM3X_AP_INIT_STAT register */ ret = ap_read_register(dap, SIM3X_AP_INIT_STAT, &val); if (ret != ERROR_OK) return ret; diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c index 6a03414c0..627bb416d 100644 --- a/src/flash/nor/spi.c +++ b/src/flash/nor/spi.c @@ -88,6 +88,8 @@ const struct flash_device flash_devices[] = { FLASH_ID("mac 25r1635f", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001528c2, 0x100, 0x10000, 0x200000), FLASH_ID("mac 25r3235f", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001628c2, 0x100, 0x10000, 0x400000), FLASH_ID("mac 25r6435f", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001728c2, 0x100, 0x10000, 0x800000), + FLASH_ID("mac 25u1635e", 0x03, 0xeb, 0x02, 0x20, 0xc7, 0x003525c2, 0x100, 0x1000, 0x100000), + FLASH_ID("micron n25q032", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0016ba20, 0x100, 0x10000, 0x400000), FLASH_ID("micron n25q064", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0017ba20, 0x100, 0x10000, 0x800000), FLASH_ID("micron n25q128", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0018ba20, 0x100, 0x10000, 0x1000000), FLASH_ID("micron n25q256 3v", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019ba20, 0x100, 0x10000, 0x2000000), diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c index 9c4c4bc89..55b99de3f 100644 --- a/src/flash/nor/stellaris.c +++ b/src/flash/nor/stellaris.c @@ -487,7 +487,7 @@ static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size) if (stellaris_info->did1 == 0) return ERROR_FLASH_BANK_NOT_PROBED; - /* Read main and master clock freqency register */ + /* Read main and master clock frequency register */ stellaris_read_clock_info(bank); printed = snprintf(buf, @@ -533,7 +533,7 @@ static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size) * chip identification and status * ***************************************************************************/ -/* Set the flash timimg register to match current clocking */ +/* Set the flash timing register to match current clocking */ static void stellaris_set_flash_timing(struct flash_bank *bank) { struct stellaris_flash_bank *stellaris_info = bank->driver_priv; @@ -803,12 +803,11 @@ static int stellaris_protect_check(struct flash_bank *bank) stellaris->num_pages; uint32_t fmppe_addr; int status = ERROR_OK; - unsigned i; if (stellaris->did1 == 0) return ERROR_FLASH_BANK_NOT_PROBED; - for (i = 0; i < (unsigned) bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = -1; /* Read each Flash Memory Protection Program Enable (FMPPE) register @@ -828,7 +827,7 @@ static int stellaris_protect_check(struct flash_bank *bank) uint32_t fmppe; target_read_u32(target, fmppe_addr, &fmppe); - for (i = 0; i < 32 && lockbitnum + i < lockbitcnt; i++) { + for (unsigned int i = 0; i < 32 && lockbitnum + i < lockbitcnt; i++) { bool protect = !(fmppe & (1 << i)); if (bits_per_page) { bank->sectors[page++].is_protected = protect; @@ -844,9 +843,9 @@ static int stellaris_protect_check(struct flash_bank *bank) return status; } -static int stellaris_erase(struct flash_bank *bank, int first, int last) +static int stellaris_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { - int banknr; uint32_t flash_fmc, flash_cris; struct stellaris_flash_bank *stellaris_info = bank->driver_priv; struct target *target = bank->target; @@ -859,10 +858,10 @@ static int stellaris_erase(struct flash_bank *bank, int first, int last) if (stellaris_info->did1 == 0) return ERROR_FLASH_BANK_NOT_PROBED; - if ((first < 0) || (last < first) || (last >= (int)stellaris_info->num_pages)) + if ((last < first) || (last >= stellaris_info->num_pages)) return ERROR_FLASH_SECTOR_INVALID; - if ((first == 0) && (last == ((int)stellaris_info->num_pages-1))) + if ((first == 0) && (last == (stellaris_info->num_pages - 1))) return stellaris_mass_erase(bank); /* Refresh flash controller timing */ @@ -877,7 +876,7 @@ static int stellaris_erase(struct flash_bank *bank, int first, int last) * it might want to process those IRQs. */ - for (banknr = first; banknr <= last; banknr++) { + for (unsigned int banknr = first; banknr <= last; banknr++) { /* Address is first word in page */ target_write_u32(target, FLASH_FMA, banknr * stellaris_info->pagesize); /* Write erase command */ @@ -887,7 +886,7 @@ static int stellaris_erase(struct flash_bank *bank, int first, int last) target_read_u32(target, FLASH_FMC, &flash_fmc); } while (flash_fmc & FMC_ERASE); - /* Check acess violations */ + /* Check access violations */ target_read_u32(target, FLASH_CRIS, &flash_cris); if (flash_cris & (AMASK)) { LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "", @@ -902,7 +901,8 @@ static int stellaris_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int stellaris_protect(struct flash_bank *bank, int set, int first, int last) +static int stellaris_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { struct stellaris_flash_bank *stellaris = bank->driver_priv; struct target *target = bank->target; @@ -952,7 +952,7 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la else fmppe_addr = SCB_BASE | FMPPE; - int page = 0; + unsigned int page = 0; unsigned int lockbitnum, lockbitcnt = flash_sizek / 2; /* Every lock bit always corresponds to a 2k region */ for (lockbitnum = 0; lockbitnum < lockbitcnt; lockbitnum += 32) { @@ -998,7 +998,7 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la return ERROR_OK; } -/* see contib/loaders/flash/stellaris.s for src */ +/* see contrib/loaders/flash/stellaris.s for src */ static const uint8_t stellaris_write_code[] = { /* write: */ @@ -1170,7 +1170,7 @@ static int stellaris_write(struct flash_bank *bank, const uint8_t *buffer, if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { LOG_DEBUG("writing flash word-at-a-time"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { - /* if an error occured, we examine the reason, and quit */ + /* if an error occurred, we examine the reason, and quit */ target_read_u32(target, FLASH_CRIS, &flash_cris); LOG_ERROR("flash writing failed with CRIS: 0x%" PRIx32 "", flash_cris); @@ -1250,16 +1250,13 @@ static int stellaris_probe(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); /* provide this for the benefit of the NOR flash framework */ bank->size = stellaris_info->num_pages * stellaris_info->pagesize; bank->num_sectors = stellaris_info->num_pages; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * stellaris_info->pagesize; bank->sectors[i].size = stellaris_info->pagesize; bank->sectors[i].is_erased = -1; @@ -1321,8 +1318,6 @@ static int stellaris_mass_erase(struct flash_bank *bank) COMMAND_HANDLER(stellaris_handle_mass_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; @@ -1333,7 +1328,7 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command) if (stellaris_mass_erase(bank) == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "stellaris mass erase complete"); diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index 990b48aeb..78efc8b47 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -359,13 +359,14 @@ static int stm32x_protect_check(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - for (int i = 0; i < bank->num_prot_blocks; i++) + for (unsigned int i = 0; i < bank->num_prot_blocks; i++) bank->prot_blocks[i].is_protected = (protection & (1 << i)) ? 0 : 1; return ERROR_OK; } -static int stm32x_erase(struct flash_bank *bank, int first, int last) +static int stm32x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; @@ -385,7 +386,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER); if (retval != ERROR_OK) return retval; @@ -412,7 +413,8 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) +static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct stm32x_flash_bank *stm32x_info = bank->driver_priv; @@ -432,7 +434,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return retval; } - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { if (set) stm32x_info->option_bytes.protection &= ~(1 << i); else @@ -615,9 +617,7 @@ reset_pg_and_lock: retval = retval2; cleanup: - if (new_buffer) - free(new_buffer); - + free(new_buffer); return retval; } @@ -870,15 +870,11 @@ static int stm32x_probe(struct flash_bank *bank) /* check that calculation result makes sense */ assert(num_pages > 0); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); + bank->sectors = NULL; - if (bank->prot_blocks) { - free(bank->prot_blocks); - bank->prot_blocks = NULL; - } + free(bank->prot_blocks); + bank->prot_blocks = NULL; bank->base = base_address; bank->size = (num_pages * page_size); @@ -1499,7 +1495,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) retval = stm32x_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "stm32x mass erase complete"); diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index c1283bb3f..e3625f322 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -55,7 +55,7 @@ * can be very different. * * To reduce testing complexity and dangers of regressions, - * a seperate file is used for stm32fx2x. + * a separate file is used for stm32fx2x. * * Sector sizes in kiBytes: * 1 MiByte part with 4 x 16, 1 x 64, 7 x 128. @@ -204,7 +204,7 @@ struct stm32x_flash_bank { bool has_extra_options; /* F42x/43x/469/479/7xx */ bool has_boot_addr; /* F7xx */ bool has_optcr2_pcrop; /* F72x/73x */ - int protection_bits; /* F413/423 */ + unsigned int protection_bits; /* F413/423 */ uint32_t user_bank_size; }; @@ -230,7 +230,7 @@ static int stm32x_otp_disable(struct flash_bank *bank) { struct stm32x_flash_bank *stm32x_info = bank->driver_priv; - LOG_INFO("OTP memory bank #%d is disabled for write commands.", + LOG_INFO("OTP memory bank #%u is disabled for write commands.", bank->bank_number); stm32x_info->otp_unlocked = false; return ERROR_OK; @@ -241,11 +241,11 @@ static int stm32x_otp_enable(struct flash_bank *bank) struct stm32x_flash_bank *stm32x_info = bank->driver_priv; if (!stm32x_info->otp_unlocked) { - LOG_INFO("OTP memory bank #%d is is enabled for write commands.", + LOG_INFO("OTP memory bank #%u is is enabled for write commands.", bank->bank_number); stm32x_info->otp_unlocked = true; } else { - LOG_WARNING("OTP memory bank #%d is is already enabled for write commands.", + LOG_WARNING("OTP memory bank #%u is is already enabled for write commands.", bank->bank_number); } return ERROR_OK; @@ -292,7 +292,7 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout) retval = stm32x_get_flash_status(bank, &status); if (retval != ERROR_OK) return retval; - LOG_DEBUG("status: 0x%" PRIx32 "", status); + LOG_DEBUG("status: 0x%" PRIx32, status); if ((status & FLASH_BSY) == 0) break; if (timeout-- <= 0) { @@ -349,7 +349,7 @@ static int stm32x_unlock_reg(struct target *target) return retval; if (ctrl & FLASH_LOCK) { - LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl); + LOG_ERROR("flash not unlocked STM32_FLASH_CR: 0x%" PRIx32, ctrl); return ERROR_TARGET_FAILURE; } @@ -381,7 +381,7 @@ static int stm32x_unlock_option_reg(struct target *target) return retval; if (ctrl & OPTCR_LOCK) { - LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %" PRIx32, ctrl); + LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: 0x%" PRIx32, ctrl); return ERROR_TARGET_FAILURE; } @@ -419,7 +419,7 @@ static int stm32x_read_options(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - /* FLASH_OPTCR1 has quite diffent meanings ... */ + /* FLASH_OPTCR1 has quite different meanings ... */ if (stm32x_info->has_boot_addr) { /* for F7xx it contains boot0 and boot1 */ stm32x_info->option_bytes.boot_addr = optiondata; @@ -522,13 +522,13 @@ static int stm32x_otp_read_protect(struct flash_bank *bank) { struct target *target = bank->target; uint32_t lock_base; - int i, retval; + int retval; uint8_t lock; lock_base = stm32x_otp_is_f7(bank) ? STM32F7_OTP_LOCK_BASE : STM32F2_OTP_LOCK_BASE; - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { retval = target_read_u8(target, lock_base + i, &lock); if (retval != ERROR_OK) return retval; @@ -538,14 +538,15 @@ static int stm32x_otp_read_protect(struct flash_bank *bank) return ERROR_OK; } -static int stm32x_otp_protect(struct flash_bank *bank, int first, int last) +static int stm32x_otp_protect(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; uint32_t lock_base; int i, retval; uint8_t lock; - assert((0 <= first) && (first <= last) && (last < bank->num_sectors)); + assert((first <= last) && (last < bank->num_sectors)); lock_base = stm32x_otp_is_f7(bank) ? STM32F7_OTP_LOCK_BASE : STM32F2_OTP_LOCK_BASE; @@ -570,7 +571,7 @@ static int stm32x_protect_check(struct flash_bank *bank) { struct stm32x_flash_bank *stm32x_info = bank->driver_priv; struct flash_sector *prot_blocks; - int num_prot_blocks; + unsigned int num_prot_blocks; int retval; /* if it's the OTP bank, look at the lock bits there */ @@ -592,25 +593,25 @@ static int stm32x_protect_check(struct flash_bank *bank) prot_blocks = bank->sectors; } - for (int i = 0; i < num_prot_blocks; i++) + for (unsigned int i = 0; i < num_prot_blocks; i++) prot_blocks[i].is_protected = ~(stm32x_info->option_bytes.protection >> i) & 1; return ERROR_OK; } -static int stm32x_erase(struct flash_bank *bank, int first, int last) +static int stm32x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct stm32x_flash_bank *stm32x_info = bank->driver_priv; struct target *target = bank->target; - int i; if (stm32x_is_otp(bank)) { LOG_ERROR("Cannot erase OTP memory"); return ERROR_FAIL; } - assert((0 <= first) && (first <= last) && (last < bank->num_sectors)); + assert((first <= last) && (last < bank->num_sectors)); if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -633,7 +634,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) 4. Wait for the BSY bit to be cleared */ - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { unsigned int snb; if (stm32x_info->has_large_mem && i >= 12) snb = (i - 12) | 0x10; @@ -659,7 +660,8 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } -static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) +static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct stm32x_flash_bank *stm32x_info = bank->driver_priv; @@ -683,7 +685,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return retval; } - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { if (set) stm32x_info->option_bytes.protection &= ~(1 << i); else @@ -776,7 +778,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, LOG_ERROR("flash memory write protected"); if (error != 0) { - LOG_ERROR("flash write failed = %08" PRIx32, error); + LOG_ERROR("flash write failed = 0x%08" PRIx32, error); /* Clear but report errors */ target_write_u32(target, STM32_FLASH_SR, error); retval = ERROR_FAIL; @@ -894,18 +896,18 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer, return target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); } -static void setup_sector(struct flash_bank *bank, int i, int size) +static void setup_sector(struct flash_bank *bank, unsigned int i, + unsigned int size) { assert(i < bank->num_sectors); bank->sectors[i].offset = bank->size; bank->sectors[i].size = size; bank->size += bank->sectors[i].size; - LOG_DEBUG("sector %d: %dkBytes", i, size >> 10); + LOG_DEBUG("sector %u: %ukBytes", i, size >> 10); } -static uint16_t sector_size_in_kb(int i, uint16_t max_sector_size_in_kb) +static uint16_t sector_size_in_kb(unsigned int i, uint16_t max_sector_size_in_kb) { - assert(i >= 0); if (i < 4) return max_sector_size_in_kb / 8; if (i == 4) @@ -913,13 +915,13 @@ static uint16_t sector_size_in_kb(int i, uint16_t max_sector_size_in_kb) return max_sector_size_in_kb; } -static int calculate_number_of_sectors(struct flash_bank *bank, +static unsigned int calculate_number_of_sectors(struct flash_bank *bank, uint16_t flash_size_in_kb, uint16_t max_sector_size_in_kb) { struct stm32x_flash_bank *stm32x_info = bank->driver_priv; uint16_t remaining_flash_size_in_kb = flash_size_in_kb; - int nr_sectors; + unsigned int nr_sectors; /* Dual Bank Flash has two identically-arranged banks of sectors. */ if (stm32x_info->has_large_mem) @@ -940,11 +942,11 @@ static int calculate_number_of_sectors(struct flash_bank *bank, return stm32x_info->has_large_mem ? nr_sectors*2 : nr_sectors; } -static void setup_bank(struct flash_bank *bank, int start, +static void setup_bank(struct flash_bank *bank, unsigned int start, uint16_t flash_size_in_kb, uint16_t max_sector_size_in_kb) { uint16_t remaining_flash_size_in_kb = flash_size_in_kb; - int sector_index = 0; + unsigned int sector_index = 0; while (remaining_flash_size_in_kb > 0) { uint16_t size_in_kb = sector_size_in_kb(sector_index, max_sector_size_in_kb); if (size_in_kb > remaining_flash_size_in_kb) { @@ -993,7 +995,7 @@ static int stm32x_probe(struct flash_bank *bank) { struct target *target = bank->target; struct stm32x_flash_bank *stm32x_info = bank->driver_priv; - int i, num_prot_blocks, num_sectors; + unsigned int num_prot_blocks, num_sectors; uint16_t flash_size_in_kb; uint16_t otp_size_in_b; uint16_t otp_sector_size; @@ -1011,19 +1013,15 @@ static int stm32x_probe(struct flash_bank *bank) stm32x_info->protection_bits = 12; /* max. number of nWRPi bits (in FLASH_OPTCR !!!) */ num_prot_blocks = 0; - if (bank->sectors) { - free(bank->sectors); - bank->num_sectors = 0; - bank->sectors = NULL; - } + free(bank->sectors); + bank->num_sectors = 0; + bank->sectors = NULL; - if (bank->prot_blocks) { - free(bank->prot_blocks); - bank->num_prot_blocks = 0; - bank->prot_blocks = NULL; - } + free(bank->prot_blocks); + bank->num_prot_blocks = 0; + bank->prot_blocks = NULL; - /* if explicitely called out as OTP bank, short circuit probe */ + /* if explicitly called out as OTP bank, short circuit probe */ if (stm32x_is_otp(bank)) { if (stm32x_otp_is_f7(bank)) { otp_size_in_b = STM32F7_OTP_SIZE; @@ -1034,7 +1032,7 @@ static int stm32x_probe(struct flash_bank *bank) } num_sectors = otp_size_in_b / otp_sector_size; - LOG_INFO("flash size = %d bytes", otp_size_in_b); + LOG_INFO("flash size = %" PRIu16 " bytes", otp_size_in_b); assert(num_sectors > 0); @@ -1046,7 +1044,7 @@ static int stm32x_probe(struct flash_bank *bank) else bank->size = STM32F2_OTP_SIZE; - for (i = 0; i < num_sectors; i++) { + for (unsigned int i = 0; i < num_sectors; i++) { bank->sectors[i].offset = i * otp_sector_size; bank->sectors[i].size = otp_sector_size; bank->sectors[i].is_erased = 1; @@ -1061,7 +1059,7 @@ static int stm32x_probe(struct flash_bank *bank) int retval = stm32x_get_device_id(bank, &device_id); if (retval != ERROR_OK) return retval; - LOG_INFO("device id = 0x%08" PRIx32 "", device_id); + LOG_INFO("device id = 0x%08" PRIx32, device_id); device_id &= 0xfff; /* only bits 0-11 are used further on */ /* set max flash size depending on family, id taken from AN2606 */ @@ -1134,7 +1132,7 @@ static int stm32x_probe(struct flash_bank *bank) /* failed reading flash size or flash size invalid (early silicon), * default to max target family */ if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) { - LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash", + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %" PRIu16 "k flash", max_flash_size_in_kb); flash_size_in_kb = max_flash_size_in_kb; } @@ -1146,7 +1144,7 @@ static int stm32x_probe(struct flash_bank *bank) flash_size_in_kb = stm32x_info->user_bank_size / 1024; } - LOG_INFO("flash size = %d kbytes", flash_size_in_kb); + LOG_INFO("flash size = %" PRIu16 " kbytes", flash_size_in_kb); /* did we assign flash size? */ assert(flash_size_in_kb != 0xffff); @@ -1161,10 +1159,10 @@ static int stm32x_probe(struct flash_bank *bank) } if ((flash_size_in_kb > 1024) || (optiondata & OPTCR_DB1M)) { stm32x_info->has_large_mem = true; - LOG_INFO("Dual Bank %d kiB STM32F42x/43x/469/479 found", flash_size_in_kb); + LOG_INFO("Dual Bank %" PRIu16 " kiB STM32F42x/43x/469/479 found", flash_size_in_kb); } else { stm32x_info->has_large_mem = false; - LOG_INFO("Single Bank %d kiB STM32F42x/43x/469/479 found", flash_size_in_kb); + LOG_INFO("Single Bank %" PRIu16 " kiB STM32F42x/43x/469/479 found", flash_size_in_kb); } } @@ -1178,27 +1176,27 @@ static int stm32x_probe(struct flash_bank *bank) } if (optiondata & OPTCR_NDBANK) { stm32x_info->has_large_mem = false; - LOG_INFO("Single Bank %d kiB STM32F76x/77x found", flash_size_in_kb); + LOG_INFO("Single Bank %" PRIu16 " kiB STM32F76x/77x found", flash_size_in_kb); } else { stm32x_info->has_large_mem = true; max_sector_size_in_kb >>= 1; /* sector size divided by 2 in dual-bank mode */ - LOG_INFO("Dual Bank %d kiB STM32F76x/77x found", flash_size_in_kb); + LOG_INFO("Dual Bank %" PRIu16 " kiB STM32F76x/77x found", flash_size_in_kb); } } /* calculate numbers of pages */ - int num_pages = calculate_number_of_sectors( + unsigned int num_pages = calculate_number_of_sectors( bank, flash_size_in_kb, max_sector_size_in_kb); bank->base = base_address; bank->num_sectors = num_pages; bank->sectors = calloc(num_pages, sizeof(struct flash_sector)); - for (i = 0; i < num_pages; i++) { + for (unsigned int i = 0; i < num_pages; i++) { bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 0; } bank->size = 0; - LOG_DEBUG("allocated %d sectors", num_pages); + LOG_DEBUG("allocated %u sectors", num_pages); /* F76x/77x in dual bank mode */ if ((device_id == 0x451) && stm32x_info->has_large_mem) @@ -1206,9 +1204,9 @@ static int stm32x_probe(struct flash_bank *bank) if (num_prot_blocks) { bank->prot_blocks = malloc(sizeof(struct flash_sector) * num_prot_blocks); - for (i = 0; i < num_prot_blocks; i++) + for (unsigned int i = 0; i < num_prot_blocks; i++) bank->prot_blocks[i].is_protected = 0; - LOG_DEBUG("allocated %d prot blocks", num_prot_blocks); + LOG_DEBUG("allocated %u prot blocks", num_prot_blocks); } if (stm32x_info->has_large_mem) { @@ -1219,7 +1217,7 @@ static int stm32x_probe(struct flash_bank *bank) /* F767x/F77x in dual mode, one protection bit refers to two adjacent sectors */ if (device_id == 0x451) { - for (i = 0; i < num_prot_blocks; i++) { + for (unsigned int i = 0; i < num_prot_blocks; i++) { bank->prot_blocks[i].offset = bank->sectors[i << 1].offset; bank->prot_blocks[i].size = bank->sectors[i << 1].size + bank->sectors[(i << 1) + 1].size; @@ -1231,7 +1229,7 @@ static int stm32x_probe(struct flash_bank *bank) /* F413/F423, sectors 14 and 15 share one common protection bit */ if (device_id == 0x463) { - for (i = 0; i < num_prot_blocks; i++) { + for (unsigned int i = 0; i < num_prot_blocks; i++) { bank->prot_blocks[i].offset = bank->sectors[i].offset; bank->prot_blocks[i].size = bank->sectors[i].size; } @@ -1425,7 +1423,7 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size) if (rev_str != NULL) snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str); else - snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id); + snprintf(buf, buf_size, "%s - Rev: unknown (0x%04" PRIx16 ")", device_str, rev_id); return ERROR_OK; } @@ -1559,8 +1557,6 @@ static int stm32x_mass_erase(struct flash_bank *bank) COMMAND_HANDLER(stm32x_handle_mass_erase_command) { - int i; - if (CMD_ARGC < 1) { command_print(CMD, "stm32x mass_erase "); return ERROR_COMMAND_SYNTAX_ERROR; @@ -1574,7 +1570,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) retval = stm32x_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "stm32x mass erase complete"); @@ -1609,20 +1605,20 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command) if (stm32x_info->has_boot_addr) { uint32_t boot_addr = stm32x_info->option_bytes.boot_addr; - command_print(CMD, "stm32f2x user_options 0x%03X," - " boot_add0 0x%04X, boot_add1 0x%04X", + command_print(CMD, "stm32f2x user_options 0x%03" PRIX16 "," + " boot_add0 0x%04" PRIX32 ", boot_add1 0x%04" PRIX32, stm32x_info->option_bytes.user_options, boot_addr & 0xffff, (boot_addr & 0xffff0000) >> 16); if (stm32x_info->has_optcr2_pcrop) { - command_print(CMD, "stm32f2x optcr2_pcrop 0x%08X", + command_print(CMD, "stm32f2x optcr2_pcrop 0x%08" PRIX32, stm32x_info->option_bytes.optcr2_pcrop); } } else { - command_print(CMD, "stm32f2x user_options 0x%03X", + command_print(CMD, "stm32f2x user_options 0x%03" PRIX16, stm32x_info->option_bytes.user_options); } } else { - command_print(CMD, "stm32f2x user_options 0x%02X", + command_print(CMD, "stm32f2x user_options 0x%02" PRIX16, stm32x_info->option_bytes.user_options); } @@ -1752,7 +1748,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command) stm32x_otp_disable(bank); } else if (strcmp(CMD_ARGV[1], "show") == 0) { command_print(CMD, - "OTP memory bank #%d is %s for write commands.", + "OTP memory bank #%u is %s for write commands.", bank->bank_number, stm32x_is_otp_unlocked(bank) ? "enabled" : "disabled"); } else { diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index 7b6fdb39c..52e3e0e87 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -147,7 +147,11 @@ static const struct stm32h7x_rev stm32_480_revs[] = { { 0x1000, "A"}, }; -static uint32_t stm32x_compute_flash_cr_450(uint32_t cmd, int snb) +static const struct stm32h7x_rev stm32_483_revs[] = { + { 0x1000, "A" }, { 0x1001, "Z" }, +}; + +static uint32_t stm32x_compute_flash_cr_450_483(uint32_t cmd, int snb) { return cmd | (snb << 8); } @@ -177,7 +181,7 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = { .fsize_addr = 0x1FF1E880, .wps_group_size = 1, .wps_mask = 0xFF, - .compute_flash_cr = stm32x_compute_flash_cr_450, + .compute_flash_cr = stm32x_compute_flash_cr_450_483, }, { .id = 0x480, @@ -194,6 +198,21 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = { .wps_mask = 0xFFFFFFFF, .compute_flash_cr = stm32x_compute_flash_cr_480, }, + { + .id = 0x483, + .revs = stm32_483_revs, + .num_revs = ARRAY_SIZE(stm32_483_revs), + .device_str = "STM32H72x/73x", + .page_size_kb = 128, + .block_size = 32, + .max_flash_size_kb = 1024, + .max_bank_size_kb = 1024, + .has_dual_bank = false, + .fsize_addr = 0x1FF1E880, + .wps_group_size = 1, + .wps_mask = 0xFF, + .compute_flash_cr = stm32x_compute_flash_cr_450_483, + }, }; /* flash bank stm32x 0 0 */ @@ -262,7 +281,7 @@ static int stm32x_wait_flash_op_queue(struct flash_bank *bank, int timeout) break; if (timeout-- <= 0) { - LOG_ERROR("wait_flash_op_queue, time out expired, status: 0x%" PRIx32 "", status); + LOG_ERROR("wait_flash_op_queue, time out expired, status: 0x%" PRIx32, status); return ERROR_FAIL; } alive_sleep(1); @@ -311,7 +330,7 @@ static int stm32x_unlock_reg(struct flash_bank *bank) return retval; if (ctrl & FLASH_LOCK) { - LOG_ERROR("flash not unlocked STM32_FLASH_CRx: %" PRIx32, ctrl); + LOG_ERROR("flash not unlocked STM32_FLASH_CRx: 0x%" PRIx32, ctrl); return ERROR_TARGET_FAILURE; } return ERROR_OK; @@ -342,7 +361,7 @@ static int stm32x_unlock_option_reg(struct flash_bank *bank) return retval; if (ctrl & OPT_LOCK) { - LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %" PRIx32, ctrl); + LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: 0x%" PRIx32, ctrl); return ERROR_TARGET_FAILURE; } @@ -396,7 +415,7 @@ static int stm32x_write_option(struct flash_bank *bank, uint32_t reg_offset, uin break; if (timeout-- <= 0) { - LOG_ERROR("waiting for OBL launch, time out expired, OPTSR: 0x%" PRIx32 "", status); + LOG_ERROR("waiting for OBL launch, time out expired, OPTSR: 0x%" PRIx32, status); retval = ERROR_FAIL; goto flash_options_lock; } @@ -441,13 +460,14 @@ static int stm32x_protect_check(struct flash_bank *bank) return retval; } - for (int i = 0; i < bank->num_prot_blocks; i++) + for (unsigned int i = 0; i < bank->num_prot_blocks; i++) bank->prot_blocks[i].is_protected = protection & (1 << i) ? 0 : 1; return ERROR_OK; } -static int stm32x_erase(struct flash_bank *bank, int first, int last) +static int stm32x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv; int retval, retval2; @@ -472,24 +492,24 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) 3. Set the STRT bit in the FLASH_CR register 4. Wait for flash operations completion */ - for (int i = first; i <= last; i++) { - LOG_DEBUG("erase sector %d", i); + for (unsigned int i = first; i <= last; i++) { + LOG_DEBUG("erase sector %u", i); retval = stm32x_write_flash_reg(bank, FLASH_CR, stm32x_info->part_info->compute_flash_cr(FLASH_SER | FLASH_PSIZE_64, i)); if (retval != ERROR_OK) { - LOG_ERROR("Error erase sector %d", i); + LOG_ERROR("Error erase sector %u", i); goto flash_lock; } retval = stm32x_write_flash_reg(bank, FLASH_CR, stm32x_info->part_info->compute_flash_cr(FLASH_SER | FLASH_PSIZE_64 | FLASH_START, i)); if (retval != ERROR_OK) { - LOG_ERROR("Error erase sector %d", i); + LOG_ERROR("Error erase sector %u", i); goto flash_lock; } retval = stm32x_wait_flash_op_queue(bank, FLASH_ERASE_TIMEOUT); if (retval != ERROR_OK) { - LOG_ERROR("erase time-out or operation error sector %d", i); + LOG_ERROR("erase time-out or operation error sector %u", i); goto flash_lock; } bank->sectors[i].is_erased = 1; @@ -503,7 +523,8 @@ flash_lock: return (retval == ERROR_OK) ? retval2 : retval; } -static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) +static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; uint32_t protection; @@ -520,7 +541,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return retval; } - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { if (set) protection &= ~(1 << i); else @@ -624,7 +645,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, LOG_ERROR("flash memory write protected"); if ((flash_sr & FLASH_ERROR) != 0) { - LOG_ERROR("flash write failed, FLASH_SR = %08" PRIx32, flash_sr); + LOG_ERROR("flash write failed, FLASH_SR = 0x%08" PRIx32, flash_sr); /* Clear error + EOP flags but report errors */ stm32x_write_flash_reg(bank, FLASH_CCR, flash_sr); retval = ERROR_FAIL; @@ -745,7 +766,7 @@ static int stm32x_probe(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - LOG_DEBUG("device id = 0x%08" PRIx32 "", stm32x_info->idcode); + LOG_DEBUG("device id = 0x%08" PRIx32, stm32x_info->idcode); device_id = stm32x_info->idcode & 0xfff; @@ -766,7 +787,7 @@ static int stm32x_probe(struct flash_bank *bank) else if (bank->base == FLASH_BANK1_ADDRESS) stm32x_info->flash_regs_base = FLASH_REG_BASE_B1; else { - LOG_WARNING("Flash register base not defined for bank %d", bank->bank_number); + LOG_WARNING("Flash register base not defined for bank %u", bank->bank_number); return ERROR_FAIL; } LOG_DEBUG("flash_regs_base: 0x%" PRIx32, stm32x_info->flash_regs_base); @@ -777,7 +798,7 @@ static int stm32x_probe(struct flash_bank *bank) /* read error when device has invalid value, set max flash size */ flash_size_in_kb = stm32x_info->part_info->max_flash_size_kb; } else - LOG_INFO("flash size probed value %d", flash_size_in_kb); + LOG_INFO("flash size probed value %" PRIu16, flash_size_in_kb); @@ -802,6 +823,8 @@ static int stm32x_probe(struct flash_bank *bank) /* flash size is 2M or 1M */ flash_size_in_kb /= 2; break; + case 0x483: + break; default: LOG_ERROR("unsupported device"); return ERROR_FAIL; @@ -828,8 +851,8 @@ static int stm32x_probe(struct flash_bank *bank) } } - LOG_INFO("Bank (%d) size is %d kb, base address is 0x%" PRIx32, - bank->bank_number, flash_size_in_kb, (uint32_t) bank->base); + LOG_INFO("Bank (%u) size is %" PRIu16 " kb, base address is " TARGET_ADDR_FMT, + bank->bank_number, flash_size_in_kb, bank->base); /* if the user sets the size manually then ignore the probed value * this allows us to work around devices that have an invalid flash size register value */ @@ -851,8 +874,7 @@ static int stm32x_probe(struct flash_bank *bank) bank->num_sectors = flash_size_in_kb / stm32x_info->part_info->page_size_kb; assert(bank->num_sectors > 0); - if (bank->sectors) - free(bank->sectors); + free(bank->sectors); bank->sectors = alloc_block_array(0, stm32x_info->part_info->page_size_kb * 1024, bank->num_sectors); @@ -869,8 +891,7 @@ static int stm32x_probe(struct flash_bank *bank) bank->num_prot_blocks = bank->num_sectors / wpsn; assert(bank->num_prot_blocks > 0); - if (bank->prot_blocks) - free(bank->prot_blocks); + free(bank->prot_blocks); bank->prot_blocks = alloc_block_array(0, stm32x_info->part_info->page_size_kb * wpsn * 1024, bank->num_prot_blocks); @@ -880,7 +901,7 @@ static int stm32x_probe(struct flash_bank *bank) return ERROR_FAIL; } - stm32x_info->probed = 1; + stm32x_info->probed = true; return ERROR_OK; } @@ -921,7 +942,7 @@ static int stm32x_get_info(struct flash_bank *bank, char *buf, int buf_size) stm32x_info->part_info->device_str, rev_str); } else { snprintf(buf, buf_size, - "%s - Rev: unknown (0x%04x)", + "%s - Rev: unknown (0x%04" PRIx16 ")", stm32x_info->part_info->device_str, rev_id); } } else { @@ -1068,7 +1089,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) retval = stm32x_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "stm32h7x mass erase complete"); @@ -1098,7 +1119,7 @@ COMMAND_HANDLER(stm32x_handle_option_read_command) if (ERROR_OK != retval) return retval; - command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", + command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32, stm32x_get_flash_reg(bank, reg_offset), value); return retval; diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 94fcd3226..379f1b4b3 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -129,7 +129,7 @@ struct stm32l4_part_info { struct stm32l4_flash_bank { bool probed; uint32_t idcode; - int bank1_sectors; + unsigned int bank1_sectors; bool dual_bank_mode; int hole_sectors; uint32_t user_bank_size; @@ -534,7 +534,7 @@ static int stm32l4_protect_check(struct flash_bank *bank) stm32l4_read_flash_reg(bank, STM32_FLASH_WRP2AR, &wrp2ar); stm32l4_read_flash_reg(bank, STM32_FLASH_WRP2BR, &wrp2br); } else { - /* prevent unintialized errors */ + /* prevent uninitialized errors */ wrp2ar = 0; wrp2br = 0; } @@ -548,7 +548,7 @@ static int stm32l4_protect_check(struct flash_bank *bank) const uint8_t wrp2b_start = wrp2br & stm32l4_info->wrpxxr_mask; const uint8_t wrp2b_end = (wrp2br >> 16) & stm32l4_info->wrpxxr_mask; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i < stm32l4_info->bank1_sectors) { if (((i >= wrp1a_start) && (i <= wrp1a_end)) || @@ -573,13 +573,13 @@ static int stm32l4_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int stm32l4_erase(struct flash_bank *bank, int first, int last) +static int stm32l4_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; - int i; int retval, retval2; - assert((0 <= first) && (first <= last) && (last < bank->num_sectors)); + assert((first <= last) && (last < bank->num_sectors)); if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -601,7 +601,7 @@ static int stm32l4_erase(struct flash_bank *bank, int first, int last) 4. Wait for the BSY bit to be cleared */ - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { uint32_t erase_flags; erase_flags = FLASH_PER | FLASH_STRT; @@ -631,7 +631,8 @@ err_lock: return retval2; } -static int stm32l4_protect(struct flash_bank *bank, int set, int first, int last) +static int stm32l4_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; @@ -1014,7 +1015,7 @@ static int stm32l4_probe(struct flash_bank *bank) const int gap_size_kb = stm32l4_info->hole_sectors * page_size_kb; if (gap_size_kb != 0) { - LOG_INFO("gap detected from 0x%08" PRIx32 " to 0x%08" PRIx32, + LOG_INFO("gap detected from 0x%08x to 0x%08x", STM32_FLASH_BANK_BASE + stm32l4_info->bank1_sectors * page_size_kb * 1024, STM32_FLASH_BANK_BASE + (stm32l4_info->bank1_sectors @@ -1039,10 +1040,7 @@ static int stm32l4_probe(struct flash_bank *bank) assert((stm32l4_info->wrpxxr_mask & 0xFFFF0000) == 0); LOG_DEBUG("WRPxxR mask 0x%04" PRIx16, (uint16_t)stm32l4_info->wrpxxr_mask); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->size = (flash_size_kb + gap_size_kb) * 1024; bank->base = STM32_FLASH_BANK_BASE; @@ -1053,7 +1051,7 @@ static int stm32l4_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * page_size_kb * 1024; /* in dual bank configuration, if there is a gap between banks * we fix up the sector offset to consider this gap */ @@ -1169,7 +1167,7 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command) retval = stm32l4_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "stm32l4x mass erase complete"); diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index c3f9c7249..3cb1a4998 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -319,7 +319,7 @@ COMMAND_HANDLER(stm32lx_handle_mass_erase_command) retval = stm32lx_mass_erase(bank); if (retval == ERROR_OK) { /* set all sectors as erased */ - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "stm32lx mass erase complete"); @@ -387,7 +387,7 @@ static int stm32lx_protect_check(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (wrpr & (1 << i)) bank->sectors[i].is_protected = 1; else @@ -396,7 +396,8 @@ static int stm32lx_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int stm32lx_erase(struct flash_bank *bank, int first, int last) +static int stm32lx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval; @@ -413,7 +414,7 @@ static int stm32lx_erase(struct flash_bank *bank, int first, int last) /* * Loop over the selected sectors and erase them */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = stm32lx_erase_sector(bank, i); if (retval != ERROR_OK) return retval; @@ -445,7 +446,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff /* Make sure we're performing a half-page aligned write. */ if (count % hp_nb) { - LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIi32 "B)", hp_nb, count); + LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIu32 "B)", hp_nb, count); return ERROR_FAIL; } @@ -628,7 +629,7 @@ static int stm32lx_write(struct flash_bank *bank, const uint8_t *buffer, if (retval != ERROR_OK) return retval; - /* first we need to write any unaligned head bytes upto + /* first we need to write any unaligned head bytes up to * the next 128 byte page */ if (offset % hp_nb) @@ -819,7 +820,7 @@ static int stm32lx_probe(struct flash_bank *bank) bank->base, base_address, second_bank_base); return ERROR_FAIL; } - LOG_INFO("STM32L flash has dual banks. Bank (%d) size is %dkb, base address is 0x%" PRIx32, + LOG_INFO("STM32L flash has dual banks. Bank (%u) size is %dkb, base address is 0x%" PRIx32, bank->bank_number, flash_size_in_kb, base_address); } else { LOG_INFO("STM32L flash size is %dkb, base address is 0x%" PRIx32, flash_size_in_kb, base_address); @@ -833,12 +834,9 @@ static int stm32lx_probe(struct flash_bank *bank) } /* calculate numbers of sectors (4kB per sector) */ - int num_sectors = (flash_size_in_kb * 1024) / FLASH_SECTOR_SIZE; + unsigned int num_sectors = (flash_size_in_kb * 1024) / FLASH_SECTOR_SIZE; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->size = flash_size_in_kb * 1024; bank->base = base_address; @@ -849,7 +847,7 @@ static int stm32lx_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int i = 0; i < num_sectors; i++) { + for (unsigned int i = 0; i < num_sectors; i++) { bank->sectors[i].offset = i * FLASH_SECTOR_SIZE; bank->sectors[i].size = FLASH_SECTOR_SIZE; bank->sectors[i].is_erased = -1; diff --git a/src/flash/nor/stmsmi.c b/src/flash/nor/stmsmi.c index f56b9b7be..278c73e7f 100644 --- a/src/flash/nor/stmsmi.c +++ b/src/flash/nor/stmsmi.c @@ -115,7 +115,7 @@ #define SMI_MAX_TIMEOUT (3000) struct stmsmi_flash_bank { - int probed; + bool probed; uint32_t io_base; uint32_t bank_num; const struct flash_device *dev; @@ -151,7 +151,7 @@ FLASH_BANK_COMMAND_HANDLER(stmsmi_flash_bank_command) } bank->driver_priv = stmsmi_info; - stmsmi_info->probed = 0; + stmsmi_info->probed = false; return ERROR_OK; } @@ -313,22 +313,22 @@ static int smi_erase_sector(struct flash_bank *bank, int sector) return ERROR_OK; } -static int stmsmi_erase(struct flash_bank *bank, int first, int last) +static int stmsmi_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv; uint32_t io_base = stmsmi_info->io_base; int retval = ERROR_OK; - int sector; - LOG_DEBUG("%s: from sector %d to sector %d", __func__, first, last); + LOG_DEBUG("%s: from sector %u to sector %u", __func__, first, last); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + if ((last < first) || (last >= bank->num_sectors)) { LOG_ERROR("Flash sector invalid"); return ERROR_FLASH_SECTOR_INVALID; } @@ -338,9 +338,9 @@ static int stmsmi_erase(struct flash_bank *bank, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; } - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -348,7 +348,7 @@ static int stmsmi_erase(struct flash_bank *bank, int first, int last) if (stmsmi_info->dev->erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; - for (sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { retval = smi_erase_sector(bank, sector); if (retval != ERROR_OK) break; @@ -361,11 +361,9 @@ static int stmsmi_erase(struct flash_bank *bank, int first, int last) } static int stmsmi_protect(struct flash_bank *bank, int set, - int first, int last) + unsigned int first, unsigned int last) { - int sector; - - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_protected = set; return ERROR_OK; } @@ -402,7 +400,6 @@ static int stmsmi_write(struct flash_bank *bank, const uint8_t *buffer, struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv; uint32_t io_base = stmsmi_info->io_base; uint32_t cur_count, page_size, page_offset; - int sector; int retval = ERROR_OK; LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32, @@ -419,14 +416,14 @@ static int stmsmi_write(struct flash_bank *bank, const uint8_t *buffer, } /* Check sector protection */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { /* Start offset in or before this sector? */ /* End offset in or behind this sector? */ if ((offset < (bank->sectors[sector].offset + bank->sectors[sector].size)) && ((offset + count - 1) >= bank->sectors[sector].offset) && bank->sectors[sector].is_protected) { - LOG_ERROR("Flash sector %d protected", sector); + LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; } } @@ -534,7 +531,7 @@ static int stmsmi_probe(struct flash_bank *bank) if (stmsmi_info->probed) free(bank->sectors); - stmsmi_info->probed = 0; + stmsmi_info->probed = false; for (target_device = target_devices ; target_device->name ; ++target_device) if (target_device->tap_idcode == target->tap->idcode) @@ -609,7 +606,7 @@ static int stmsmi_probe(struct flash_bank *bank) return ERROR_FAIL; } - for (int sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { sectors[sector].offset = sector * sectorsize; sectors[sector].size = sectorsize; sectors[sector].is_erased = -1; @@ -617,7 +614,7 @@ static int stmsmi_probe(struct flash_bank *bank) } bank->sectors = sectors; - stmsmi_info->probed = 1; + stmsmi_info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c index eaef1970e..e028c1ffd 100644 --- a/src/flash/nor/str7x.c +++ b/src/flash/nor/str7x.c @@ -138,7 +138,7 @@ static int str7x_build_block_list(struct flash_bank *bank) struct str7x_flash_bank *str7x_info = bank->driver_priv; int i; - int num_sectors; + unsigned int num_sectors; int b0_sectors = 0, b1_sectors = 0; switch (bank->size) { @@ -306,7 +306,6 @@ static int str7x_protect_check(struct flash_bank *bank) struct str7x_flash_bank *str7x_info = bank->driver_priv; struct target *target = bank->target; - int i; uint32_t flash_flags; if (bank->target->state != TARGET_HALTED) { @@ -319,7 +318,7 @@ static int str7x_protect_check(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (flash_flags & str7x_info->sector_bits[i]) bank->sectors[i].is_protected = 0; else @@ -329,12 +328,12 @@ static int str7x_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int str7x_erase(struct flash_bank *bank, int first, int last) +static int str7x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct str7x_flash_bank *str7x_info = bank->driver_priv; struct target *target = bank->target; - int i; uint32_t cmd; uint32_t sectors = 0; int err; @@ -344,7 +343,7 @@ static int str7x_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - for (i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) sectors |= str7x_info->sector_bits[i]; LOG_DEBUG("sectors: 0x%" PRIx32 "", sectors); @@ -377,17 +376,17 @@ static int str7x_erase(struct flash_bank *bank, int first, int last) if (err != ERROR_OK) return err; - for (i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) bank->sectors[i].is_erased = 1; return ERROR_OK; } -static int str7x_protect(struct flash_bank *bank, int set, int first, int last) +static int str7x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct str7x_flash_bank *str7x_info = bank->driver_priv; struct target *target = bank->target; - int i; uint32_t cmd; uint32_t protect_blocks; @@ -399,7 +398,7 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last) protect_blocks = 0xFFFFFFFF; if (set) { - for (i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) protect_blocks &= ~(str7x_info->sector_bits[i]); } @@ -453,7 +452,7 @@ static int str7x_write_block(struct flash_bank *bank, const uint8_t *buffer, struct arm_algorithm arm_algo; int retval = ERROR_OK; - /* see contib/loaders/flash/str7x.s for src */ + /* see contrib/loaders/flash/str7x.s for src */ static const uint32_t str7x_flash_write_code[] = { /* write: */ @@ -568,7 +567,6 @@ static int str7x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t cmd; int retval; uint32_t check_address = offset; - int i; if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -580,7 +578,7 @@ static int str7x_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { uint32_t sec_start = bank->sectors[i].offset; uint32_t sec_end = sec_start + bank->sectors[i].size; diff --git a/src/flash/nor/str9x.c b/src/flash/nor/str9x.c index 85cbe6a4f..87ffec877 100644 --- a/src/flash/nor/str9x.c +++ b/src/flash/nor/str9x.c @@ -68,7 +68,7 @@ static int str9x_build_block_list(struct flash_bank *bank) struct str9x_flash_bank *str9x_info = bank->driver_priv; int i; - int num_sectors; + unsigned int num_sectors; int b0_sectors = 0, b1_sectors = 0; uint32_t offset = 0; @@ -164,7 +164,6 @@ static int str9x_protect_check(struct flash_bank *bank) struct str9x_flash_bank *str9x_info = bank->driver_priv; struct target *target = bank->target; - int i; uint32_t adr; uint32_t status = 0; uint16_t hstatus = 0; @@ -211,7 +210,7 @@ static int str9x_protect_check(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (status & str9x_info->sector_bits[i]) bank->sectors[i].is_protected = 1; else @@ -221,10 +220,10 @@ static int str9x_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int str9x_erase(struct flash_bank *bank, int first, int last) +static int str9x_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; - int i; uint32_t adr; uint8_t status; uint8_t erase_cmd; @@ -250,7 +249,7 @@ static int str9x_erase(struct flash_bank *bank, int first, int last) /* this is so the compiler can *know* */ assert(total_timeout > 0); - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { int retval; adr = bank->base + bank->sectors[i].offset; @@ -301,17 +300,16 @@ static int str9x_erase(struct flash_bank *bank, int first, int last) break; } - for (i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) bank->sectors[i].is_erased = 1; return ERROR_OK; } -static int str9x_protect(struct flash_bank *bank, - int set, int first, int last) +static int str9x_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct target *target = bank->target; - int i; uint32_t adr; uint8_t status; @@ -320,7 +318,7 @@ static int str9x_protect(struct flash_bank *bank, return ERROR_TARGET_NOT_HALTED; } - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { /* Level One Protection */ adr = bank->base + bank->sectors[i].offset; @@ -356,7 +354,7 @@ static int str9x_write_block(struct flash_bank *bank, struct arm_algorithm arm_algo; int retval = ERROR_OK; - /* see contib/loaders/flash/str9x.s for src */ + /* see contrib/loaders/flash/str9x.s for src */ static const uint32_t str9x_flash_write_code[] = { /* write: */ @@ -468,7 +466,6 @@ static int str9x_write(struct flash_bank *bank, int retval; uint32_t check_address = offset; uint32_t bank_adr; - int i; if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -480,7 +477,7 @@ static int str9x_write(struct flash_bank *bank, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { uint32_t sec_start = bank->sectors[i].offset; uint32_t sec_end = sec_start + bank->sectors[i].size; diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c index 6e1ecf347..9946b06fb 100644 --- a/src/flash/nor/str9xpec.c +++ b/src/flash/nor/str9xpec.c @@ -74,7 +74,8 @@ struct str9xpec_flash_controller { uint8_t options[8]; }; -static int str9xpec_erase_area(struct flash_bank *bank, int first, int last); +static int str9xpec_erase_area(struct flash_bank *bank, unsigned int first, + unsigned int last); static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector); static int str9xpec_write_options(struct flash_bank *bank); @@ -210,7 +211,7 @@ static int str9xpec_build_block_list(struct flash_bank *bank) struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv; int i; - int num_sectors; + unsigned int num_sectors; int b0_sectors = 0, b1_sectors = 0; uint32_t offset = 0; int b1_size = 0x2000; @@ -303,12 +304,12 @@ FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command) return ERROR_OK; } -static int str9xpec_blank_check(struct flash_bank *bank, int first, int last) +static int str9xpec_blank_check(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct scan_field field; uint8_t status; struct jtag_tap *tap; - int i; uint8_t *buffer = NULL; struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv; @@ -323,9 +324,9 @@ static int str9xpec_blank_check(struct flash_bank *bank, int first, int last) buffer = calloc(DIV_ROUND_UP(64, 8), 1); - LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last); + LOG_DEBUG("blank check: first_bank: %u, last_bank: %u", first, last); - for (i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1); /* execute ISC_BLANK_CHECK command */ @@ -348,7 +349,7 @@ static int str9xpec_blank_check(struct flash_bank *bank, int first, int last) status = str9xpec_isc_status(tap); - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1)) bank->sectors[i].is_erased = 0; else @@ -367,13 +368,12 @@ static int str9xpec_blank_check(struct flash_bank *bank, int first, int last) static int str9xpec_protect_check(struct flash_bank *bank) { uint8_t status; - int i; struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv; status = str9xpec_read_config(bank); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1)) bank->sectors[i].is_protected = 1; else @@ -385,12 +385,12 @@ static int str9xpec_protect_check(struct flash_bank *bank) return ERROR_OK; } -static int str9xpec_erase_area(struct flash_bank *bank, int first, int last) +static int str9xpec_erase_area(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct scan_field field; uint8_t status; struct jtag_tap *tap; - int i; uint8_t *buffer = NULL; struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv; @@ -405,17 +405,17 @@ static int str9xpec_erase_area(struct flash_bank *bank, int first, int last) buffer = calloc(DIV_ROUND_UP(64, 8), 1); - LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last); + LOG_DEBUG("erase: first_bank: %u, last_bank: %u", first, last); /* last bank: 0xFF signals a full erase (unlock complete device) */ /* last bank: 0xFE signals a option byte erase */ if (last == 0xFF) { - for (i = 0; i < 64; i++) + for (unsigned int i = 0; i < 64; i++) buf_set_u32(buffer, i, 1, 1); } else if (last == 0xFE) buf_set_u32(buffer, 49, 1, 1); else { - for (i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1); } @@ -444,7 +444,8 @@ static int str9xpec_erase_area(struct flash_bank *bank, int first, int last) return status; } -static int str9xpec_erase(struct flash_bank *bank, int first, int last) +static int str9xpec_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int status; @@ -504,10 +505,10 @@ static int str9xpec_unlock_device(struct flash_bank *bank) return status; } -static int str9xpec_protect(struct flash_bank *bank, int set, int first, int last) +static int str9xpec_protect(struct flash_bank *bank, int set, + unsigned int first, unsigned int last) { uint8_t status; - int i; struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv; @@ -516,7 +517,7 @@ static int str9xpec_protect(struct flash_bank *bank, int set, int first, int las if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS) return ERROR_FLASH_OPERATION_FAILED; - LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last); + LOG_DEBUG("protect: first_bank: %u, last_bank: %u", first, last); /* last bank: 0xFF signals a full device protect */ if (last == 0xFF) { @@ -527,7 +528,7 @@ static int str9xpec_protect(struct flash_bank *bank, int set, int first, int las status = str9xpec_unlock_device(bank); } } else { - for (i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { if (set) buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1); else @@ -575,9 +576,8 @@ static int str9xpec_write(struct flash_bank *bank, const uint8_t *buffer, struct jtag_tap *tap; struct scan_field field; uint8_t *scanbuf; - int i; - int first_sector = 0; - int last_sector = 0; + unsigned int first_sector = 0; + unsigned int last_sector = 0; tap = str9xpec_info->tap; @@ -592,7 +592,7 @@ static int str9xpec_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { uint32_t sec_start = bank->sectors[i].offset; uint32_t sec_end = sec_start + bank->sectors[i].size; @@ -621,7 +621,7 @@ static int str9xpec_write(struct flash_bank *bank, const uint8_t *buffer, LOG_DEBUG("ISC_PROGRAM"); - for (i = first_sector; i <= last_sector; i++) { + for (unsigned int i = first_sector; i <= last_sector; i++) { str9xpec_set_address(bank, str9xpec_info->sector_bits[i]); dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) diff --git a/src/flash/nor/swm050.c b/src/flash/nor/swm050.c index 241207d87..98361eb91 100644 --- a/src/flash/nor/swm050.c +++ b/src/flash/nor/swm050.c @@ -38,11 +38,11 @@ #define SWM050_SYSCTL_CFG_0 0x400F0000 #define SWM050_SYSCTL_DBLF 0x400F0008 -static int swm050_erase(struct flash_bank *bank, int first, int last) +static int swm050_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; - int retval, curr_page; - uint32_t curr_addr; + int retval; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -54,8 +54,8 @@ static int swm050_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - for (curr_page = first; curr_page <= last; curr_page++) { - curr_addr = bank->base + (SWM050_FLASH_PAGE_SIZE * curr_page); + for (unsigned int curr_page = first; curr_page <= last; curr_page++) { + uint32_t curr_addr = bank->base + (SWM050_FLASH_PAGE_SIZE * curr_page); /* Perform write */ retval = target_write_u32(target, curr_addr, SWM050_FLASH_KEY); if (retval != ERROR_OK) @@ -156,10 +156,7 @@ COMMAND_HANDLER(swm050_handle_mass_erase_command) FLASH_BANK_COMMAND_HANDLER(swm050_flash_bank_command) { - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); bank->write_start_alignment = 4; bank->write_end_alignment = 4; bank->size = SWM050_FLASH_PAGE_SIZE * SWM050_FLASH_PAGES; @@ -169,7 +166,7 @@ FLASH_BANK_COMMAND_HANDLER(swm050_flash_bank_command) if (!bank->sectors) return ERROR_FAIL; - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = 0; return ERROR_OK; diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c index 741bb5e9e..fbb602b73 100644 --- a/src/flash/nor/tcl.c +++ b/src/flash/nor/tcl.c @@ -112,8 +112,8 @@ COMMAND_HANDLER(handle_flash_info_command) LOG_INFO("Flash protection check is not implemented."); command_print(CMD, - "#%d : %s at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 - ", buswidth %i, chipwidth %i", + "#%u : %s at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 + ", buswidth %u, chipwidth %u", p->bank_number, p->driver->name, p->base, @@ -141,7 +141,7 @@ COMMAND_HANDLER(handle_flash_info_command) protect_state = "protection state unknown"; command_print(CMD, - "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", + "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIu32 "kB) %s", j, block_array[j].offset, block_array[j].size, @@ -199,7 +199,6 @@ COMMAND_HANDLER(handle_flash_erase_check_command) if (ERROR_OK != retval) return retval; - int j; retval = p->driver->erase_check(p); if (retval == ERROR_OK) command_print(CMD, "successfully checked erase state"); @@ -211,7 +210,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command) p->base); } - for (j = 0; j < p->num_sectors; j++) { + for (unsigned int j = 0; j < p->num_sectors; j++) { char *erase_state; if (p->sectors[j].is_erased == 0) @@ -223,7 +222,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command) blank = false; command_print(CMD, - "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", + "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIu32 "kB) %s", j, p->sectors[j].offset, p->sectors[j].size, @@ -289,8 +288,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command) retval = flash_erase_address_range(target, do_pad, address, length); if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { - command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %" - PRIi32 ")" + command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %" PRIu32 ")" " in %fs (%0.3f KiB/s)", address, length, duration_elapsed(&bench), duration_kbps(&bench, length)); } @@ -325,9 +323,9 @@ COMMAND_HANDLER(handle_flash_erase_command) return ERROR_FAIL; } - if (!(last <= (uint32_t)(p->num_sectors - 1))) { + if (!(last <= (p->num_sectors - 1))) { command_print(CMD, "ERROR: " - "last sector must be <= %" PRIu32, + "last sector must be <= %u", p->num_sectors - 1); return ERROR_FAIL; } @@ -339,7 +337,7 @@ COMMAND_HANDLER(handle_flash_erase_command) if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "erased sectors %" PRIu32 " " - "through %" PRIu32 " on flash bank %d " + "through %" PRIu32 " on flash bank %u " "in %fs", first, last, p->bank_number, duration_elapsed(&bench)); } @@ -385,7 +383,7 @@ COMMAND_HANDLER(handle_flash_protect_command) if (!(last <= (uint32_t)(num_blocks - 1))) { command_print(CMD, "ERROR: " - "last %s must be <= %" PRIu32, + "last %s must be <= %d", (p->num_prot_blocks) ? "block" : "sector", num_blocks - 1); return ERROR_FAIL; @@ -542,7 +540,7 @@ COMMAND_HANDLER(handle_flash_fill_command) LOG_WARNING("Start address " TARGET_ADDR_FMT " breaks the required alignment of flash bank %s", address, bank->name); - LOG_WARNING("Padding %" PRId32 " bytes from " TARGET_ADDR_FMT, + LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT, padding_at_start, aligned_start); } @@ -572,7 +570,7 @@ COMMAND_HANDLER(handle_flash_fill_command) if (padding_at_end) { memset(ptr, bank->default_padded_value, padding_at_end); - LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRId32 + LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRIu32 " bytes (bank write end alignment)", end_addr + 1, padding_at_end); } @@ -761,7 +759,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command) LOG_WARNING("Start offset 0x%08" PRIx32 " breaks the required alignment of flash bank %s", offset, bank->name); - LOG_WARNING("Padding %" PRId32 " bytes from " TARGET_ADDR_FMT, + LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT, padding_at_start, aligned_start); } @@ -783,7 +781,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command) if (padding_at_end) { memset(ptr, bank->default_padded_value, padding_at_end); - LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRId32 + LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRIu32 " bytes (bank write end alignment)", end_addr + 1, padding_at_end); } @@ -990,7 +988,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command) for (t = 0; t < length; t++) { if (buffer_flash[t] == buffer_file[t]) continue; - command_print(CMD, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x", + command_print(CMD, "diff %d address 0x%08" PRIx32 ". Was 0x%02x instead of 0x%02x", diffs, t + offset, buffer_flash[t], buffer_file[t]); if (diffs++ >= 127) { command_print(CMD, "More than 128 errors, the rest are not printed."); @@ -1008,11 +1006,10 @@ COMMAND_HANDLER(handle_flash_verify_bank_command) void flash_set_dirty(void) { struct flash_bank *c; - int i; /* set all flash to require erasing */ for (c = flash_bank_list(); c; c = c->next) { - for (i = 0; i < c->num_sectors; i++) + for (unsigned int i = 0; i < c->num_sectors; i++) c->sectors[i].is_erased = 0; } } @@ -1244,8 +1241,8 @@ COMMAND_HANDLER(handle_flash_bank_command) c->driver = driver; COMMAND_PARSE_NUMBER(target_addr, CMD_ARGV[1], c->base); COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], c->size); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], c->chip_width); - COMMAND_PARSE_NUMBER(int, CMD_ARGV[4], c->bus_width); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[3], c->chip_width); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[4], c->bus_width); c->default_padded_value = c->erased_value = 0xff; c->minimal_write_gap = FLASH_WRITE_GAP_SECTOR; diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c index bc16acab5..3004682b8 100644 --- a/src/flash/nor/tms470.c +++ b/src/flash/nor/tms470.c @@ -148,11 +148,9 @@ static int tms470_read_part_info(struct flash_bank *bank) rom_flash = (device_ident_reg >> 10) & 1; part_number = (device_ident_reg >> 3) & 0x7f; - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - bank->num_sectors = 0; - } + free(bank->sectors); + bank->sectors = NULL; + bank->num_sectors = 0; /* * If the part number is known, determine if the flash bank is valid @@ -722,7 +720,7 @@ static int tms470_erase_sector(struct flash_bank *bank, int sector) bank->sectors[sector].is_protected = 0; /* - * clear status regiser, sent erase command, kickoff erase + * clear status register, sent erase command, kickoff erase */ target_write_u16(target, flashAddr, 0x0040); LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flashAddr); @@ -801,10 +799,11 @@ static const struct command_registration tms470_command_handlers[] = { /* ---------------------------------------------------------------------- */ -static int tms470_erase(struct flash_bank *bank, int first, int last) +static int tms470_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct tms470_flash_bank *tms470_info = bank->driver_priv; - int sector, result = ERROR_OK; + int result = ERROR_OK; if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -813,9 +812,9 @@ static int tms470_erase(struct flash_bank *bank, int first, int last) tms470_read_part_info(bank); - if ((first < 0) || (first >= bank->num_sectors) || (last < 0) || - (last >= bank->num_sectors) || (first > last)) { - LOG_ERROR("Sector range %d to %d invalid.", first, last); + if ((first >= bank->num_sectors) || (last >= bank->num_sectors) || + (first > last)) { + LOG_ERROR("Sector range %u to %u invalid.", first, last); return ERROR_FLASH_SECTOR_INVALID; } @@ -823,8 +822,8 @@ static int tms470_erase(struct flash_bank *bank, int first, int last) if (result != ERROR_OK) return result; - for (sector = first; sector <= last; sector++) { - LOG_INFO("Erasing tms470 bank %d sector %d...", tms470_info->ordinal, sector); + for (unsigned int sector = first; sector <= last; sector++) { + LOG_INFO("Erasing tms470 bank %u sector %u...", tms470_info->ordinal, sector); result = tms470_erase_sector(bank, sector); @@ -840,12 +839,12 @@ static int tms470_erase(struct flash_bank *bank, int first, int last) /* ---------------------------------------------------------------------- */ -static int tms470_protect(struct flash_bank *bank, int set, int first, int last) +static int tms470_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct tms470_flash_bank *tms470_info = bank->driver_priv; struct target *target = bank->target; uint32_t fmmac2, fmbsea, fmbseb; - int sector; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -854,9 +853,9 @@ static int tms470_protect(struct flash_bank *bank, int set, int first, int last) tms470_read_part_info(bank); - if ((first < 0) || (first >= bank->num_sectors) || (last < 0) || - (last >= bank->num_sectors) || (first > last)) { - LOG_ERROR("Sector range %d to %d invalid.", first, last); + if ((first >= bank->num_sectors) || (last >= bank->num_sectors) || + (first > last)) { + LOG_ERROR("Sector range %u to %u invalid.", first, last); return ERROR_FLASH_SECTOR_INVALID; } @@ -864,11 +863,11 @@ static int tms470_protect(struct flash_bank *bank, int set, int first, int last) target_read_u32(target, 0xFFE8BC04, &fmmac2); target_write_u32(target, 0xFFE8BC04, (fmmac2 & ~7) | tms470_info->ordinal); - /* get the original sector proection flags for this bank */ + /* get the original sector protection flags for this bank */ target_read_u32(target, 0xFFE88008, &fmbsea); target_read_u32(target, 0xFFE8800C, &fmbseb); - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { if (sector < 16) { fmbsea = set ? fmbsea & ~(1 << sector) : fmbsea | (1 << sector); bank->sectors[sector].is_protected = set ? 1 : 0; @@ -902,7 +901,7 @@ static int tms470_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t tms470_read_part_info(bank); - LOG_INFO("Writing %" PRId32 " bytes starting at " TARGET_ADDR_FMT, + LOG_INFO("Writing %" PRIu32 " bytes starting at " TARGET_ADDR_FMT, count, bank->base + offset); /* set GLBCTRL.4 */ @@ -1004,7 +1003,7 @@ static int tms470_erase_check(struct flash_bank *bank) { struct target *target = bank->target; struct tms470_flash_bank *tms470_info = bank->driver_priv; - int sector, result = ERROR_OK; + int result = ERROR_OK; uint32_t fmmac2, fmbac2, glbctrl, orig_fmregopt; static uint8_t buffer[64 * 1024]; @@ -1043,10 +1042,10 @@ static int tms470_erase_check(struct flash_bank *bank) * word at a time. Here we read an entire sector and inspect it in * an attempt to reduce the JTAG overhead. */ - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { uint32_t i, addr = bank->base + bank->sectors[sector].offset; - LOG_INFO("checking flash bank %d sector %d", tms470_info->ordinal, sector); + LOG_INFO("checking flash bank %u sector %u", tms470_info->ordinal, sector); target_read_buffer(target, addr, bank->sectors[sector].size, buffer); @@ -1079,7 +1078,7 @@ static int tms470_protect_check(struct flash_bank *bank) { struct target *target = bank->target; struct tms470_flash_bank *tms470_info = bank->driver_priv; - int sector, result = ERROR_OK; + int result = ERROR_OK; uint32_t fmmac2, fmbsea, fmbseb; if (target->state != TARGET_HALTED) { @@ -1097,7 +1096,7 @@ static int tms470_protect_check(struct flash_bank *bank) target_read_u32(target, 0xFFE88008, &fmbsea); target_read_u32(target, 0xFFE8800C, &fmbseb); - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { int protected; if (sector < 16) { @@ -1108,7 +1107,7 @@ static int tms470_protect_check(struct flash_bank *bank) bank->sectors[sector].is_protected = protected; } - LOG_DEBUG("bank %d sector %d is %s", + LOG_DEBUG("bank %u sector %u is %s", tms470_info->ordinal, sector, protected ? "protected" : "not protected"); diff --git a/src/flash/nor/virtual.c b/src/flash/nor/virtual.c index fa5153740..1aa12fecd 100644 --- a/src/flash/nor/virtual.c +++ b/src/flash/nor/virtual.c @@ -75,39 +75,33 @@ FLASH_BANK_COMMAND_HANDLER(virtual_flash_bank_command) return ERROR_OK; } -static int virtual_protect(struct flash_bank *bank, int set, int first, int last) +static int virtual_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { struct flash_bank *master_bank = virtual_get_master_bank(bank); - int retval; if (master_bank == NULL) return ERROR_FLASH_OPERATION_FAILED; - /* call master handler */ - retval = master_bank->driver->protect(master_bank, set, first, last); - if (retval != ERROR_OK) - return retval; - - return ERROR_OK; + return flash_driver_protect(master_bank, set, first, last); } static int virtual_protect_check(struct flash_bank *bank) { struct flash_bank *master_bank = virtual_get_master_bank(bank); - int retval; if (master_bank == NULL) return ERROR_FLASH_OPERATION_FAILED; - /* call master handler */ - retval = master_bank->driver->protect_check(master_bank); - if (retval != ERROR_OK) - return retval; + if (master_bank->driver->protect_check == NULL) + return ERROR_FLASH_OPER_UNSUPPORTED; - return ERROR_OK; + /* call master handler */ + return master_bank->driver->protect_check(master_bank); } -static int virtual_erase(struct flash_bank *bank, int first, int last) +static int virtual_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; diff --git a/src/flash/nor/w600.c b/src/flash/nor/w600.c index 3a6f3ff83..2506f2b55 100644 --- a/src/flash/nor/w600.c +++ b/src/flash/nor/w600.c @@ -87,7 +87,7 @@ static const struct w600_flash_param w600_param[] = { }; struct w600_flash_bank { - int probed; + bool probed; uint32_t id; const struct w600_flash_param *param; @@ -107,7 +107,7 @@ FLASH_BANK_COMMAND_HANDLER(w600_flash_bank_command) w600_info = malloc(sizeof(struct w600_flash_bank)); bank->driver_priv = w600_info; - w600_info->probed = 0; + w600_info->probed = false; w600_info->register_base = QFLASH_REGBASE; w600_info->user_bank_size = bank->size; @@ -204,7 +204,8 @@ static int w600_start(struct flash_bank *bank, uint32_t cmd, uint32_t addr, return retval; } -static int w600_erase(struct flash_bank *bank, int first, int last) +static int w600_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { int retval = ERROR_OK; @@ -217,7 +218,7 @@ static int w600_erase(struct flash_bank *bank, int first, int last) return ERROR_FAIL; } - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { retval = w600_start(bank, QFLASH_CMD_SE, QFLASH_ADDR(bank->sectors[i].offset), 0); if (retval != ERROR_OK) @@ -239,13 +240,13 @@ static int w600_write(struct flash_bank *bank, const uint8_t *buffer, } if ((offset % W600_FLASH_PAGESIZE) != 0) { - LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment", + LOG_WARNING("offset 0x%" PRIx32 " breaks required %d-byte alignment", offset, W600_FLASH_PAGESIZE); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } if ((count % W600_FLASH_PAGESIZE) != 0) { - LOG_WARNING("count 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment", + LOG_WARNING("count 0x%" PRIx32 " breaks required %d-byte alignment", offset, W600_FLASH_PAGESIZE); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -286,7 +287,7 @@ static int w600_probe(struct flash_bank *bank) uint32_t flash_id; size_t i; - w600_info->probed = 0; + w600_info->probed = false; /* read stm32 device id register */ int retval = w600_get_flash_id(bank, &flash_id); @@ -322,7 +323,7 @@ static int w600_probe(struct flash_bank *bank) flash_size = 1 << flash_size; } - LOG_INFO("flash size = %dkbytes", flash_size / 1024); + LOG_INFO("flash size = %" PRIu32 "kbytes", flash_size / 1024); /* calculate numbers of pages */ size_t num_pages = flash_size / W600_FLASH_SECSIZE; @@ -330,10 +331,8 @@ static int w600_probe(struct flash_bank *bank) /* check that calculation result makes sense */ assert(num_pages > 0); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); + bank->sectors = NULL; bank->base = W600_FLASH_BASE; bank->size = num_pages * W600_FLASH_SECSIZE; @@ -346,11 +345,11 @@ static int w600_probe(struct flash_bank *bank) bank->sectors[i].offset = i * W600_FLASH_SECSIZE; bank->sectors[i].size = W600_FLASH_SECSIZE; bank->sectors[i].is_erased = -1; - /* offset 0 to W600_FLASH_PROTECT_SIZE shoule be protected */ + /* offset 0 to W600_FLASH_PROTECT_SIZE should be protected */ bank->sectors[i].is_protected = (i < W600_FLASH_PROTECT_SIZE / W600_FLASH_SECSIZE); } - w600_info->probed = 1; + w600_info->probed = true; return ERROR_OK; } diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c index ba35c2c10..29eef2dc3 100644 --- a/src/flash/nor/xcf.c +++ b/src/flash/nor/xcf.c @@ -114,13 +114,11 @@ static void fill_sector_table(struct flash_bank *bank) /* Note: is_erased and is_protected fields must be set here to an unknown * state, they will be correctly filled from other API calls. */ - int i = 0; - - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = -1; } - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].size = XCF_DATA_SECTOR_SIZE; bank->sectors[i].offset = i * XCF_DATA_SECTOR_SIZE; } @@ -218,10 +216,10 @@ static int sector_state(uint8_t wrpt, int sector) return 1; } -static uint8_t fill_select_block(int first, int last) +static uint8_t fill_select_block(unsigned int first, unsigned int last) { uint8_t ret = 0; - for (int i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) ret |= 1 << i; return ret; } @@ -319,23 +317,26 @@ static int isc_program_register(struct flash_bank *bank, const uint8_t *cmd, return isc_wait_erase_program(bank, timeout_ms); } -static int isc_clear_protect(struct flash_bank *bank, int first, int last) +static int isc_clear_protect(struct flash_bank *bank, unsigned int first, + unsigned int last) { uint8_t select_block[3] = {0x0, 0x0, 0x0}; select_block[0] = fill_select_block(first, last); return isc_set_register(bank, CMD_XSC_UNLOCK, select_block, 24, 0); } -static int isc_set_protect(struct flash_bank *bank, int first, int last) +static int isc_set_protect(struct flash_bank *bank, unsigned int first, + unsigned int last) { uint8_t wrpt[2] = {0xFF, 0xFF}; - for (int i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) wrpt[0] &= ~(1 << i); return isc_program_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16, 0); } -static int isc_erase_sectors(struct flash_bank *bank, int first, int last) +static int isc_erase_sectors(struct flash_bank *bank, unsigned int first, + unsigned int last) { uint8_t select_block[3] = {0, 0, 0}; select_block[0] = fill_select_block(first, last); @@ -438,7 +439,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer, goto EXIT; } - if ((offset + count) > (uint32_t)(bank->num_sectors * XCF_DATA_SECTOR_SIZE)) { + if ((offset + count) > (bank->num_sectors * XCF_DATA_SECTOR_SIZE)) { ret = ERROR_FLASH_DST_OUT_OF_BANK; goto EXIT; } @@ -491,7 +492,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer, /* Set 'done' flags for all data sectors because driver supports * only single revision. */ if (write_flag) { - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { ret = isc_set_data_done(bank, i); if (ERROR_OK != ret) goto EXIT; @@ -511,12 +512,12 @@ static uint16_t isc_read_ccb(struct flash_bank *bank) return le_to_h_u16(ccb); } -static int gucr_num(const struct flash_bank *bank) +static unsigned int gucr_num(const struct flash_bank *bank) { return bank->num_sectors; } -static int sucr_num(const struct flash_bank *bank) +static unsigned int sucr_num(const struct flash_bank *bank) { return bank->num_sectors + 1; } @@ -623,7 +624,7 @@ static int xcf_probe(struct flash_bank *bank) bank->num_sectors = 4; break; default: - LOG_ERROR("Unknown flash device ID 0x%X", id); + LOG_ERROR("Unknown flash device ID 0x%" PRIX32, id); return ERROR_FAIL; } @@ -639,10 +640,10 @@ static int xcf_probe(struct flash_bank *bank) bank->driver_priv = priv; LOG_INFO("product name: %s", product_name(bank)); - LOG_INFO("device id = 0x%X ", bank->target->tap->idcode); + LOG_INFO("device id = 0x%" PRIX32, bank->target->tap->idcode); LOG_INFO("flash size = %d configuration bits", bank->num_sectors * XCF_DATA_SECTOR_SIZE * 8); - LOG_INFO("number of sectors = %d", bank->num_sectors); + LOG_INFO("number of sectors = %u", bank->num_sectors); return ERROR_OK; } @@ -665,7 +666,7 @@ static int xcf_protect_check(struct flash_bank *bank) isc_read_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16); isc_leave(bank); - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = sector_state(wrpt[0], i); return ERROR_OK; @@ -696,13 +697,14 @@ static int xcf_erase_check(struct flash_bank *bank) isc_leave(bank); - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = sector_state(blankreg, i); return ERROR_OK; } -static int xcf_erase(struct flash_bank *bank, int first, int last) +static int xcf_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { if ((first >= bank->num_sectors) || (last >= bank->num_sectors) @@ -728,7 +730,8 @@ static int xcf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of return read_write_data(bank, buffer, NULL, true, offset, count); } -static int xcf_protect(struct flash_bank *bank, int set, int first, int last) +static int xcf_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { int ret; diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c index 758977190..757dd952f 100644 --- a/src/flash/nor/xmc1xxx.c +++ b/src/flash/nor/xmc1xxx.c @@ -76,19 +76,20 @@ static int xmc1xxx_nvm_check_idle(struct target *target) return retval; } -static int xmc1xxx_erase(struct flash_bank *bank, int first, int last) +static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct working_area *workarea; struct reg_param reg_params[3]; struct armv7m_algorithm armv7m_algo; unsigned i; - int retval, sector; + int retval; const uint8_t erase_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/erase.inc" }; - LOG_DEBUG("Infineon XMC1000 erase sectors %d to %d", first, last); + LOG_DEBUG("Infineon XMC1000 erase sectors %u to %u", first, last); if (bank->target->state != TARGET_HALTED) { LOG_WARNING("Cannot communicate... target not halted."); @@ -139,7 +140,7 @@ static int xmc1xxx_erase(struct flash_bank *bank, int first, int last) goto err_run; } - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_erased = 1; err_run: @@ -161,7 +162,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank) struct armv7m_algorithm armv7m_algo; uint16_t val; unsigned i; - int retval, sector; + int retval; const uint8_t erase_check_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/erase_check.inc" }; @@ -192,7 +193,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank) buf_set_u32(reg_params[0].value, 0, 32, NVM_BASE); - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { uint32_t start = bank->base + bank->sectors[sector].offset; buf_set_u32(reg_params[1].value, 0, 32, start); buf_set_u32(reg_params[2].value, 0, 32, start + bank->sectors[sector].size); @@ -252,7 +253,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, #include "../../../contrib/loaders/flash/xmc1xxx/write.inc" }; - LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRId32 " bytes)", + LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)", offset, byte_count); if (offset & (NVM_BLOCK_SIZE - 1)) { @@ -261,7 +262,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } if (byte_count & (NVM_BLOCK_SIZE - 1)) { - LOG_WARNING("length %" PRId32 " is not block aligned, rounding up", + LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up", byte_count); } @@ -305,7 +306,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t blocks = MIN(block_count, data_workarea->size / NVM_BLOCK_SIZE); uint32_t addr = bank->base + offset; - LOG_DEBUG("copying %" PRId32 " bytes to SRAM " TARGET_ADDR_FMT, + LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT, MIN(blocks * NVM_BLOCK_SIZE, byte_count), data_workarea->address); @@ -328,7 +329,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, } } - LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)", + LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)", addr, addr + blocks * NVM_BLOCK_SIZE - 1, blocks); retval = xmc1xxx_nvm_check_idle(target); @@ -379,7 +380,8 @@ err_alloc_code: static int xmc1xxx_protect_check(struct flash_bank *bank) { uint32_t nvmconf; - int i, num_protected, retval; + unsigned int num_protected; + int retval; if (bank->target->state != TARGET_HALTED) { LOG_WARNING("Cannot communicate... target not halted."); @@ -395,7 +397,7 @@ static int xmc1xxx_protect_check(struct flash_bank *bank) num_protected = (nvmconf >> 4) & 0xff; - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = (i < num_protected) ? 1 : 0; return ERROR_OK; @@ -427,7 +429,7 @@ static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_ } LOG_DEBUG("ID[7] = %08" PRIX32, chipid[7]); - snprintf(buf, buf_size, "XMC%" PRIx32 "00 %X flash %uKB ROM %uKB SRAM %uKB", + snprintf(buf, buf_size, "XMC%" PRIx32 "00 %" PRIX32 " flash %" PRIu32 "KB ROM %" PRIu32 "KB SRAM %" PRIu32 "KB", (chipid[0] >> 12) & 0xff, 0xAA + (chipid[7] >> 28) - 1, (((chipid[6] >> 12) & 0x3f) - 1) * 4, @@ -442,7 +444,7 @@ static int xmc1xxx_probe(struct flash_bank *bank) struct xmc1xxx_flash_bank *xmc_bank = bank->driver_priv; uint32_t flash_addr = bank->base; uint32_t idchip, flsize; - int i, retval; + int retval; if (xmc_bank->probed) return ERROR_OK; @@ -475,7 +477,7 @@ static int xmc1xxx_probe(struct flash_bank *bank) bank->size = bank->num_sectors * 4 * 1024; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i == 0) { bank->sectors[i].size = 0x200; bank->sectors[i].offset = 0xE00; diff --git a/src/flash/nor/xmc4xxx.c b/src/flash/nor/xmc4xxx.c index d6a1ad453..a032e4d46 100644 --- a/src/flash/nor/xmc4xxx.c +++ b/src/flash/nor/xmc4xxx.c @@ -280,7 +280,7 @@ static int xmc4xxx_load_bank_layout(struct flash_bank *bank) /* At this point, we know which flash controller ID we're * talking to and simply need to fill out the bank structure accordingly */ - LOG_DEBUG("%d sectors", bank->num_sectors); + LOG_DEBUG("%u sectors", bank->num_sectors); switch (bank->num_sectors) { case 8: @@ -296,7 +296,7 @@ static int xmc4xxx_load_bank_layout(struct flash_bank *bank) capacity = sector_capacity_16; break; default: - LOG_ERROR("Unexpected number of sectors, %d\n", + LOG_ERROR("Unexpected number of sectors, %u\n", bank->num_sectors); return ERROR_FAIL; } @@ -307,7 +307,7 @@ static int xmc4xxx_load_bank_layout(struct flash_bank *bank) uint32_t total_offset = 0; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].size = capacity[i] * 1024; bank->sectors[i].offset = total_offset; bank->sectors[i].is_erased = -1; @@ -408,7 +408,7 @@ static int xmc4xxx_probe(struct flash_bank *bank) } static int xmc4xxx_get_sector_start_addr(struct flash_bank *bank, - int sector, uint32_t *ret_addr) + unsigned int sector, uint32_t *ret_addr) { /* Make sure we understand this sector */ if (sector > bank->num_sectors) @@ -538,7 +538,8 @@ static int xmc4xxx_erase_sector(struct flash_bank *bank, uint32_t address, return res; } -static int xmc4xxx_erase(struct flash_bank *bank, int first, int last) +static int xmc4xxx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct xmc4xxx_flash_bank *fb = bank->driver_priv; int res; @@ -556,14 +557,14 @@ static int xmc4xxx_erase(struct flash_bank *bank, int first, int last) uint32_t tmp_addr; /* Loop through the sectors and erase each one */ - for (int i = first; i <= last; i++) { + for (unsigned int i = first; i <= last; i++) { res = xmc4xxx_get_sector_start_addr(bank, i, &tmp_addr); if (res != ERROR_OK) { - LOG_ERROR("Invalid sector %d", i); + LOG_ERROR("Invalid sector %u", i); return res; } - LOG_DEBUG("Erasing sector %d @ 0x%08"PRIx32, i, tmp_addr); + LOG_DEBUG("Erasing sector %u @ 0x%08"PRIx32, i, tmp_addr); res = xmc4xxx_erase_sector(bank, tmp_addr, false); if (res != ERROR_OK) { @@ -925,7 +926,7 @@ static int xmc4xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_ snprintf(prot_str, sizeof(prot_str), "\nFlash is read protected"); bool otp_enabled = false; - for (int i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) if (fb->write_prot_otp[i]) otp_enabled = true; @@ -934,7 +935,7 @@ static int xmc4xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_ char otp_str[14]; if (otp_enabled) { strcat(prot_str, "\nOTP Protection is enabled for sectors:\n"); - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (fb->write_prot_otp[i]) { snprintf(otp_str, sizeof(otp_str), "- %d\n", i); strncat(prot_str, otp_str, sizeof(prot_str) - strlen(prot_str) - 1); @@ -1028,7 +1029,7 @@ static int xmc4xxx_flash_unprotect(struct flash_bank *bank, int32_t level) /* Reference: "XMC4500 Flash Protection.pptx" app note */ static int xmc4xxx_flash_protect(struct flash_bank *bank, int level, bool read_protect, - int first, int last) + unsigned int first, unsigned int last) { /* User configuration block buffers */ uint8_t ucp0_buf[8 * sizeof(uint32_t)] = {0}; @@ -1087,7 +1088,7 @@ static int xmc4xxx_flash_protect(struct flash_bank *bank, int level, bool read_p /* We need to fill out the procon register representation * that we will be writing to the device */ - for (int i = first; i <= last; i++) + for (unsigned int i = first; i <= last; i++) procon |= 1 << i; /* If read protection is requested, set the appropriate bit @@ -1144,7 +1145,8 @@ static int xmc4xxx_flash_protect(struct flash_bank *bank, int level, bool read_p return ERROR_OK; } -static int xmc4xxx_protect(struct flash_bank *bank, int set, int first, int last) +static int xmc4xxx_protect(struct flash_bank *bank, int set, unsigned int first, + unsigned int last) { int ret; struct xmc4xxx_flash_bank *fb = bank->driver_priv; @@ -1193,15 +1195,15 @@ static int xmc4xxx_protect_check(struct flash_bank *bank) return ret; } - int sectors = bank->num_sectors; + unsigned int sectors = bank->num_sectors; - /* On devices with 12 sectors, sectors 10 & 11 are ptected + /* On devices with 12 sectors, sectors 10 & 11 are protected * together instead of individually */ if (sectors == 12) sectors--; /* Clear the protection status */ - for (int i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].is_protected = 0; fb->write_prot_otp[i] = false; } @@ -1214,7 +1216,7 @@ static int xmc4xxx_protect_check(struct flash_bank *bank) /* Check for write protection on every available * sector */ - for (int j = 0; j < sectors; j++) { + for (unsigned int j = 0; j < sectors; j++) { int set = (protection[i] & (1 << j)) ? 1 : 0; bank->sectors[j].is_protected |= set; @@ -1235,7 +1237,7 @@ static int xmc4xxx_protect_check(struct flash_bank *bank) } } - /* XMC4xxx also supports read proptection, make a note + /* XMC4xxx also supports read protection, make a note * in the private driver structure */ if (protection[0] & PROCON_RPRO_MASK) fb->read_protected = true; diff --git a/src/helper/bin2char.sh b/src/helper/bin2char.sh index 85a0fd6a8..128ea9af6 100755 --- a/src/helper/bin2char.sh +++ b/src/helper/bin2char.sh @@ -4,7 +4,7 @@ echo "Usage: $0" echo echo "Read binary data from standard input and write it as a comma separated" - echo "list of hexadecimal byte values to standard ouput. The output is usable" + echo "list of hexadecimal byte values to standard output. The output is usable" echo "as a C array initializer. It is terminated with a comma so it can be" echo "continued e.g. for zero termination." exit 1 diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 76f657f8d..44d139f58 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -199,45 +199,20 @@ static int ceil_f_to_u32(float x) return y; } -char *buf_to_str(const void *_buf, unsigned buf_len, unsigned radix) +char *buf_to_hex_str(const void *_buf, unsigned buf_len) { - float factor; - switch (radix) { - case 16: - factor = 2.0; /* log(256) / log(16) = 2.0 */ - break; - case 10: - factor = 2.40824; /* log(256) / log(10) = 2.40824 */ - break; - case 8: - factor = 2.66667; /* log(256) / log(8) = 2.66667 */ - break; - default: - return NULL; - } - - unsigned str_len = ceil_f_to_u32(DIV_ROUND_UP(buf_len, 8) * factor); - char *str = calloc(str_len + 1, 1); + unsigned len_bytes = DIV_ROUND_UP(buf_len, 8); + char *str = calloc(len_bytes * 2 + 1, 1); const uint8_t *buf = _buf; - int b256_len = DIV_ROUND_UP(buf_len, 8); - for (int i = b256_len - 1; i >= 0; i--) { - uint32_t tmp = buf[i]; - if (((unsigned)i == (buf_len / 8)) && (buf_len % 8)) + for (unsigned i = 0; i < len_bytes; i++) { + uint8_t tmp = buf[len_bytes - i - 1]; + if ((i == 0) && (buf_len % 8)) tmp &= (0xff >> (8 - (buf_len % 8))); - - /* base-256 digits */ - for (unsigned j = str_len; j > 0; j--) { - tmp += (uint32_t)str[j-1] * 256; - str[j-1] = (uint8_t)(tmp % radix); - tmp /= radix; - } + str[2 * i] = hex_digits[tmp >> 4]; + str[2 * i + 1] = hex_digits[tmp & 0xf]; } - const char * const DIGITS = "0123456789ABCDEF"; - for (unsigned j = 0; j < str_len; j++) - str[j] = DIGITS[(int)str[j]]; - return str; } diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h index 3f2481d9a..36d6adc6f 100644 --- a/src/helper/binarybuffer.h +++ b/src/helper/binarybuffer.h @@ -201,7 +201,7 @@ void *buf_set_buf(const void *src, unsigned src_start, int str_to_buf(const char *str, unsigned len, void *bin_buf, unsigned buf_size, unsigned radix); -char *buf_to_str(const void *buf, unsigned size, unsigned radix); +char *buf_to_hex_str(const void *buf, unsigned size); /* read a uint32_t from a buffer in target memory endianness */ static inline uint32_t fast_target_buffer_get_u32(const void *p, bool le) diff --git a/src/helper/command.h b/src/helper/command.h index 886bde86b..b0c84bb43 100644 --- a/src/helper/command.h +++ b/src/helper/command.h @@ -168,7 +168,7 @@ struct command_invocation { * * This is *especially* important for commands such as writing * to flash or verifying memory. The reason is that those commands - * can be used by programs to determine if the operation succeded + * can be used by programs to determine if the operation succeeded * or not. If the operation failed, then a program can try * an alternative approach. * @@ -199,7 +199,7 @@ struct command { * Commands should be registered by filling in one or more of these * structures and passing them to [un]register_commands(). * - * A conventioal format should be used for help strings, to provide both + * A conventional format should be used for help strings, to provide both * usage and basic information: * @code * "@ ... - some explanation text" @@ -252,7 +252,7 @@ int register_commands(struct command_context *cmd_ctx, struct command *parent, const struct command_registration *cmds); /** - * Unregisters all commands from the specfied context. + * Unregisters all commands from the specified context. * @param cmd_ctx The context that will be cleared of registered commands. * @param parent If given, only clear commands from under this one command. * @returns ERROR_OK on success, or an error code. @@ -265,7 +265,7 @@ struct command *command_find_in_context(struct command_context *cmd_ctx, /** * Update the private command data field for a command and all descendents. - * This is used when creating a new heirarchy of commands that depends + * This is used when creating a new hierarchy of commands that depends * on obtaining a dynamically created context. The value will be available * in command handlers by using the CMD_DATA macro. * @param c The command (group) whose data pointer(s) will be updated. @@ -362,7 +362,7 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t); * * This function may cause the calling function to return immediately, * so it should be used carefully to avoid leaking resources. In most - * situations, parsing should be completed in full before proceding + * situations, parsing should be completed in full before proceeding * to allocate resources, and this strategy will most prevents leaks. */ #define COMMAND_PARSE_NUMBER(type, in, out) \ diff --git a/src/helper/ioutil.c b/src/helper/ioutil.c index c103ce173..ffdeca898 100644 --- a/src/helper/ioutil.c +++ b/src/helper/ioutil.c @@ -230,8 +230,7 @@ COMMAND_HANDLER(handle_cp_command) else command_print(CMD, "copy failed"); - if (data != NULL) - free(data); + free(data); if (f != NULL) fclose(f); diff --git a/src/helper/jim-nvp.h b/src/helper/jim-nvp.h index 7b4a491d3..4c4dc8ff4 100644 --- a/src/helper/jim-nvp.h +++ b/src/helper/jim-nvp.h @@ -127,7 +127,7 @@ void Jim_SetResult_NvpUnknown(Jim_Interp *interp, /** Debug: convert argc/argv into a printable string for printf() debug * - * \param interp - the interpeter + * \param interp - the interpreter * \param argc - arg count * \param argv - the objects * @@ -150,7 +150,7 @@ const char *Jim_Debug_ArgvString(Jim_Interp *interp, int argc, Jim_Obj *const *a * Some TCL objects have various "configuration" values. * For example - in Tcl/Tk the "buttons" have many options. * - * Usefull when dealing with command options. + * Useful when dealing with command options. * that may come in any order... * * Does not support "-foo = 123" type options. diff --git a/src/helper/log.c b/src/helper/log.c index 31122554e..7440b70f6 100644 --- a/src/helper/log.c +++ b/src/helper/log.c @@ -40,7 +40,7 @@ #endif #endif -int debug_level = -1; +int debug_level = LOG_LVL_INFO; static FILE *log_output; static struct log_callback *log_callbacks; @@ -91,6 +91,14 @@ static void log_puts(enum log_levels level, const char *string) { char *f; + + if (!log_output) { + /* log_init() not called yet; print on stderr */ + fputs(string, stderr); + fflush(stderr); + return; + } + if (level == LOG_LVL_OUTPUT) { /* do not prepend any headers, just print out what we were given and return */ fputs(string, log_output); @@ -277,9 +285,6 @@ void log_init(void) { /* set defaults for daemon configuration, * if not set by cmdline or cfgfile */ - if (debug_level == -1) - debug_level = LOG_LVL_INFO; - char *debug_env = getenv("OPENOCD_DEBUG_LEVEL"); if (NULL != debug_env) { int value; @@ -464,7 +469,7 @@ void kept_alive(void) gdb_timeout_warning(delta_time); } -/* if we sleep for extended periods of time, we must invoke keep_alive() intermittantly */ +/* if we sleep for extended periods of time, we must invoke keep_alive() intermittently */ void alive_sleep(uint64_t ms) { uint64_t napTime = 10; @@ -488,7 +493,7 @@ void busy_sleep(uint64_t ms) } } -/* Maximum size of socket error message retreived from operation system */ +/* Maximum size of socket error message retrieved from operation system */ #define MAX_SOCKET_ERR_MSG_LENGTH 256 /* Provide log message for the last socket error. diff --git a/src/helper/log.h b/src/helper/log.h index c16543281..f2ba0daa6 100644 --- a/src/helper/log.h +++ b/src/helper/log.h @@ -40,7 +40,7 @@ * LOG_LVL_SILENT - turn off all output. In lieu of try + catch this can be used as a * feeble ersatz. * LOG_LVL_USER - user messages. Could be anything from information - * to progress messags. These messages do not represent + * to progress messages. These messages do not represent * incorrect or unexpected behaviour, just normal execution. * LOG_LVL_ERROR - fatal errors, that are likely to cause program abort * LOG_LVL_WARNING - non-fatal errors, that may be resolved later diff --git a/src/helper/options.c b/src/helper/options.c index 6622ece6c..0ccbf5642 100644 --- a/src/helper/options.c +++ b/src/helper/options.c @@ -178,6 +178,63 @@ static char *find_relative_path(const char *from, const char *to) return relpath; } +static void add_user_dirs(void) +{ + char *path; + +#if IS_WIN32 + const char *appdata = getenv("APPDATA"); + + if (appdata) { + path = alloc_printf("%s/OpenOCD", appdata); + if (path) { + /* Convert path separators to UNIX style, should work on Windows also. */ + for (char *p = path; *p; p++) { + if (*p == '\\') + *p = '/'; + } + add_script_search_dir(path); + free(path); + } + } + /* WIN32 may also have HOME defined, particularly under Cygwin, so add those paths below too */ +#endif + + const char *home = getenv("HOME"); +#if IS_DARWIN + if (home) { + path = alloc_printf("%s/Library/Preferences/org.openocd", home); + if (path) { + add_script_search_dir(path); + free(path); + } + } +#endif + const char *xdg_config = getenv("XDG_CONFIG_HOME"); + + if (xdg_config) { + path = alloc_printf("%s/openocd", xdg_config); + if (path) { + add_script_search_dir(path); + free(path); + } + } else if (home) { + path = alloc_printf("%s/.config/openocd", home); + if (path) { + add_script_search_dir(path); + free(path); + } + } + + if (home) { + path = alloc_printf("%s/.openocd", home); + if (path) { + add_script_search_dir(path); + free(path); + } + } +} + static void add_default_dirs(void) { char *path; @@ -194,32 +251,11 @@ static void add_default_dirs(void) * listed last in the built-in search order, so the user can * override these scripts with site-specific customizations. */ - const char *home = getenv("HOME"); - - if (home) { - path = alloc_printf("%s/.openocd", home); - if (path) { - add_script_search_dir(path); - free(path); - } - } - path = getenv("OPENOCD_SCRIPTS"); - if (path) add_script_search_dir(path); -#ifdef _WIN32 - const char *appdata = getenv("APPDATA"); - - if (appdata) { - path = alloc_printf("%s/OpenOCD", appdata); - if (path) { - add_script_search_dir(path); - free(path); - } - } -#endif + add_user_dirs(); path = alloc_printf("%s/%s/%s", exepath, bin2data, "site"); if (path) { diff --git a/src/helper/update_jep106.pl b/src/helper/update_jep106.pl index caec0664f..561e04b00 100755 --- a/src/helper/update_jep106.pl +++ b/src/helper/update_jep106.pl @@ -6,7 +6,7 @@ use File::Basename; if (@ARGV != 1) { die "Usage: $0 \n\n" . "Convert the JEDEC document containing manufacturer identification codes\n" - . "to an array initializer suitable for incusion into jep106.c. The latest\n" + . "to an array initializer suitable for inclusion into jep106.c. The latest\n" . "version of the document can be found here:\n" . "http://www.jedec.org/standards-documents/results/jep106\n"; }; diff --git a/src/helper/util.c b/src/helper/util.c index 56baf95d1..dcd59e6ea 100644 --- a/src/helper/util.c +++ b/src/helper/util.c @@ -47,7 +47,7 @@ static const struct command_registration util_command_handlers[] = { .mode = COMMAND_ANY, .jim_handler = util_Jim_Command_ms, .help = - "Returns ever increasing milliseconds. Used to calculuate differences in time.", + "Returns ever increasing milliseconds. Used to calculate differences in time.", .usage = "", }, COMMAND_REGISTRATION_DONE diff --git a/src/jtag/aice/aice_interface.c b/src/jtag/aice/aice_interface.c index 90871a138..160eb1105 100644 --- a/src/jtag/aice/aice_interface.c +++ b/src/jtag/aice/aice_interface.c @@ -252,8 +252,8 @@ int aice_scan_jtag_chain(void) return res; } - for (uint32_t i = 0; i < num_of_idcode; i++) - LOG_DEBUG("id_codes[%d] = 0x%x", i, aice_target_id_codes[i]); + for (unsigned int i = 0; i < num_of_idcode; i++) + LOG_DEBUG("id_codes[%u] = 0x%" PRIx32, i, aice_target_id_codes[i]); /* Update tap idcode */ for (target = all_targets; target; target = target->next) @@ -422,83 +422,83 @@ static const struct command_registration aice_subcommand_handlers[] = { .handler = &aice_handle_aice_info_command, .mode = COMMAND_EXEC, .help = "show aice info", - .usage = "aice info", + .usage = "", }, { .name = "port", .handler = &aice_handle_aice_port_command, .mode = COMMAND_CONFIG, .help = "set the port of the AICE", - .usage = "aice port ['aice_pipe'|'aice_usb']", + .usage = "['aice_pipe'|'aice_usb']", }, { .name = "desc", .handler = &aice_handle_aice_desc_command, .mode = COMMAND_CONFIG, .help = "set the aice device description", - .usage = "aice desc [desciption string]", + .usage = "[desciption string]", }, { .name = "serial", .handler = &aice_handle_aice_serial_command, .mode = COMMAND_CONFIG, .help = "set the serial number of the AICE device", - .usage = "aice serial [serial string]", + .usage = "[serial string]", }, { .name = "vid_pid", .handler = &aice_handle_aice_vid_pid_command, .mode = COMMAND_CONFIG, .help = "the vendor and product ID of the AICE device", - .usage = "aice vid_pid (vid pid)*", + .usage = "(vid pid)*", }, { .name = "adapter", .handler = &aice_handle_aice_adapter_command, .mode = COMMAND_CONFIG, .help = "set the file name of adapter", - .usage = "aice adapter [adapter name]", + .usage = "[adapter name]", }, { .name = "retry_times", .handler = &aice_handle_aice_retry_times_command, .mode = COMMAND_CONFIG, .help = "set retry times as AICE timeout", - .usage = "aice retry_times num_of_retry", + .usage = "num_of_retry", }, { .name = "count_to_check_dbger", .handler = &aice_handle_aice_count_to_check_dbger_command, .mode = COMMAND_CONFIG, .help = "set retry times as checking $DBGER status", - .usage = "aice count_to_check_dbger count_of_checking", + .usage = "count_of_checking", }, { .name = "custom_srst_script", .handler = &aice_handle_aice_custom_srst_script_command, .mode = COMMAND_CONFIG, - .usage = "custom_srst_script script_file_name", + .usage = "script_file_name", .help = "set custom srst script", }, { .name = "custom_trst_script", .handler = &aice_handle_aice_custom_trst_script_command, .mode = COMMAND_CONFIG, - .usage = "custom_trst_script script_file_name", + .usage = "script_file_name", .help = "set custom trst script", }, { .name = "custom_restart_script", .handler = &aice_handle_aice_custom_restart_script_command, .mode = COMMAND_CONFIG, - .usage = "custom_restart_script script_file_name", + .usage = "script_file_name", .help = "set custom restart script", }, { .name = "reset", .handler = &aice_handle_aice_reset_command, .mode = COMMAND_EXEC, - .usage = "aice reset", + .usage = "", .help = "reset AICE", }, COMMAND_REGISTRATION_DONE @@ -509,7 +509,7 @@ static const struct command_registration aice_command_handlers[] = { .name = "aice", .mode = COMMAND_ANY, .help = "perform aice management", - .usage = "aice [subcommand]", + .usage = "[subcommand]", .chain = aice_subcommand_handlers, }, COMMAND_REGISTRATION_DONE diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c index 442754209..7144632df 100644 --- a/src/jtag/aice/aice_usb.c +++ b/src/jtag/aice/aice_usb.c @@ -40,16 +40,16 @@ static int aice_max_retry_times = 50; static enum aice_target_endian data_endian; /* Constants for AICE command format length */ -static const int32_t AICE_FORMAT_HTDA = 3; -static const int32_t AICE_FORMAT_HTDC = 7; -static const int32_t AICE_FORMAT_HTDMA = 4; -static const int32_t AICE_FORMAT_HTDMB = 8; -static const int32_t AICE_FORMAT_HTDMC = 8; -static const int32_t AICE_FORMAT_HTDMD = 12; -static const int32_t AICE_FORMAT_DTHA = 6; -static const int32_t AICE_FORMAT_DTHB = 2; -static const int32_t AICE_FORMAT_DTHMA = 8; -static const int32_t AICE_FORMAT_DTHMB = 4; +#define AICE_FORMAT_HTDA (3) +#define AICE_FORMAT_HTDC (7) +#define AICE_FORMAT_HTDMA (4) +#define AICE_FORMAT_HTDMB (8) +#define AICE_FORMAT_HTDMC (8) +#define AICE_FORMAT_HTDMD (12) +#define AICE_FORMAT_DTHA (6) +#define AICE_FORMAT_DTHB (2) +#define AICE_FORMAT_DTHMA (8) +#define AICE_FORMAT_DTHMB (4) /* Constants for AICE command */ static const uint8_t AICE_CMD_SCAN_CHAIN = 0x00; @@ -421,10 +421,10 @@ static int aice_usb_write(uint8_t *out_buffer, int out_length) /* Read data from USB into in_buffer. */ static int aice_usb_read(uint8_t *in_buffer, int expected_size) { - int32_t result = usb_bulk_read_ex(aice_handler.usb_handle, aice_handler.usb_read_ep, + int result = usb_bulk_read_ex(aice_handler.usb_handle, aice_handler.usb_read_ep, (char *)in_buffer, expected_size, AICE_USB_TIMEOUT); - LOG_DEBUG_IO("aice_usb_read, result = %" PRId32, result); + LOG_DEBUG_IO("aice_usb_read, result = %d", result); return result; } @@ -554,7 +554,6 @@ static int aice_reset_box(void) static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -569,9 +568,9 @@ static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) LOG_DEBUG("SCAN_CHAIN, length: 0x0F"); /** TODO: modify receive length */ - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA); if (AICE_FORMAT_DTHA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHA, result); return ERROR_FAIL; } @@ -614,8 +613,6 @@ static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) int aice_read_ctrl(uint32_t address, uint32_t *data) { - int32_t result; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || (AICE_COMMAND_MODE_BATCH == aice_command_mode)) aice_usb_packet_flush(); @@ -626,9 +623,9 @@ int aice_read_ctrl(uint32_t address, uint32_t *data) LOG_DEBUG("READ_CTRL, address: 0x%" PRIx32, address); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA); if (AICE_FORMAT_DTHA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHA, result); return ERROR_FAIL; } @@ -650,8 +647,6 @@ int aice_read_ctrl(uint32_t address, uint32_t *data) int aice_write_ctrl(uint32_t address, uint32_t data) { - int32_t result; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { aice_usb_packet_flush(); } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { @@ -666,9 +661,9 @@ int aice_write_ctrl(uint32_t address, uint32_t data) LOG_DEBUG("WRITE_CTRL, address: 0x%" PRIx32 ", data: 0x%" PRIx32, address, data); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHB); if (AICE_FORMAT_DTHB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHB, result); return ERROR_FAIL; } @@ -690,7 +685,6 @@ int aice_write_ctrl(uint32_t address, uint32_t data) int aice_read_dtr(uint8_t target_id, uint32_t *data) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -704,9 +698,9 @@ int aice_read_dtr(uint8_t target_id, uint32_t *data) LOG_DEBUG("READ_DTR, COREID: %" PRIu8, target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); if (AICE_FORMAT_DTHMA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; } @@ -741,7 +735,6 @@ int aice_read_dtr(uint8_t target_id, uint32_t *data) int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -759,9 +752,9 @@ int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx) LOG_DEBUG("READ_DTR_TO_BUFFER, COREID: %" PRIu8, target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result); + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -793,7 +786,6 @@ int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx) int aice_write_dtr(uint8_t target_id, uint32_t data) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -811,9 +803,9 @@ int aice_write_dtr(uint8_t target_id, uint32_t data) LOG_DEBUG("WRITE_DTR, COREID: %" PRIu8 ", data: 0x%" PRIx32, target_id, data); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result); + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -846,7 +838,6 @@ int aice_write_dtr(uint8_t target_id, uint32_t data) int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -864,9 +855,9 @@ int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx) LOG_DEBUG("WRITE_DTR_FROM_BUFFER, COREID: %" PRIu8 "", target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result); + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -898,7 +889,6 @@ int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx) int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -912,9 +902,9 @@ int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MISC, COREID: %" PRIu8 ", address: 0x%" PRIx32, target_id, address); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); if (AICE_FORMAT_DTHMA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_AICE_DISCONNECT; } @@ -948,7 +938,6 @@ int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data) int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -969,9 +958,9 @@ int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data) LOG_DEBUG("WRITE_MISC, COREID: %" PRIu8 ", address: 0x%" PRIx32 ", data: 0x%" PRIx32, target_id, address, data); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1005,7 +994,6 @@ int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data) int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -1019,9 +1007,9 @@ int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_EDMSR, COREID: %" PRIu8 ", address: 0x%" PRIx32, target_id, address); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); if (AICE_FORMAT_DTHMA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; } @@ -1056,7 +1044,6 @@ int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data) int aice_write_edmsr(uint8_t target_id, uint32_t address, uint32_t data) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -1077,9 +1064,9 @@ int aice_write_edmsr(uint8_t target_id, uint32_t address, uint32_t data) LOG_DEBUG("WRITE_EDMSR, COREID: %" PRIu8 ", address: 0x%" PRIx32 ", data: 0x%" PRIx32, target_id, address, data); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1128,7 +1115,6 @@ static int aice_switch_to_big_endian(uint32_t *word, uint8_t num_of_words) static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_words) { - int32_t result; uint32_t big_endian_word[4]; int retry_times = 0; @@ -1161,9 +1147,9 @@ static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_word big_endian_word[2], big_endian_word[3]); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result); + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1198,7 +1184,6 @@ static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_word static int aice_do_execute(uint8_t target_id) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -1217,9 +1202,9 @@ static int aice_do_execute(uint8_t target_id) LOG_DEBUG("EXECUTE, COREID: %" PRIu8 "", target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1253,7 +1238,6 @@ static int aice_do_execute(uint8_t target_id) int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data) { - int32_t result; int retry_times = 0; LOG_DEBUG("WRITE_MEM_B, COREID: %" PRIu8 ", ADDRESS %08" PRIx32 " VALUE %08" PRIx32, @@ -1273,10 +1257,9 @@ int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data) address, data & 0x000000FF, data_endian); aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 - ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result); + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1309,7 +1292,6 @@ int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data) int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data) { - int32_t result; int retry_times = 0; LOG_DEBUG("WRITE_MEM_H, COREID: %" PRIu8 ", ADDRESS %08" PRIx32 " VALUE %08" PRIx32, @@ -1329,9 +1311,9 @@ int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data) (address >> 1) & 0x7FFFFFFF, data & 0x0000FFFF, data_endian); aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1365,7 +1347,6 @@ int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data) int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data) { - int32_t result; int retry_times = 0; LOG_DEBUG("WRITE_MEM, COREID: %" PRIu8 ", ADDRESS %08" PRIx32 " VALUE %08" PRIx32, @@ -1385,9 +1366,9 @@ int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data) (address >> 2) & 0x3FFFFFFF, data, data_endian); aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1421,7 +1402,6 @@ int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data) int aice_fastread_mem(uint8_t target_id, uint8_t *word, uint32_t num_of_words) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -1436,9 +1416,9 @@ int aice_fastread_mem(uint8_t target_id, uint8_t *word, uint32_t num_of_words) LOG_DEBUG("FASTREAD_MEM, COREID: %" PRIu8 ", # of DATA %08" PRIx32, target_id, num_of_words); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA + (num_of_words - 1) * 4); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA + (num_of_words - 1) * 4); if (result < 0) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%d)", AICE_FORMAT_DTHMA + (num_of_words - 1) * 4, result); return ERROR_FAIL; } @@ -1472,7 +1452,6 @@ int aice_fastread_mem(uint8_t target_id, uint8_t *word, uint32_t num_of_words) int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t num_of_words) { - int32_t result; int retry_times = 0; if (AICE_COMMAND_MODE_PACK == aice_command_mode) { @@ -1494,9 +1473,9 @@ int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t num_of_w LOG_DEBUG("FASTWRITE_MEM, COREID: %" PRIu8 ", # of DATA %08" PRIx32, target_id, num_of_words); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1529,7 +1508,6 @@ int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t num_of_w int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -1543,9 +1521,9 @@ int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MEM_B, COREID: %" PRIu8 "", target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); if (AICE_FORMAT_DTHMA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; } @@ -1580,7 +1558,6 @@ int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data) int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -1594,9 +1571,9 @@ int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MEM_H, CORE_ID: %" PRIu8 "", target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); if (AICE_FORMAT_DTHMA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; } @@ -1631,7 +1608,6 @@ int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data) int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data) { - int32_t result; int retry_times = 0; if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || @@ -1646,9 +1622,9 @@ int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MEM, COREID: %" PRIu8 "", target_id); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); if (AICE_FORMAT_DTHMA != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; } @@ -1683,7 +1659,6 @@ int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data) int aice_batch_buffer_read(uint8_t buf_index, uint32_t *word, uint32_t num_of_words) { - int32_t result; int retry_times = 0; do { @@ -1693,9 +1668,9 @@ int aice_batch_buffer_read(uint8_t buf_index, uint32_t *word, uint32_t num_of_wo LOG_DEBUG("BATCH_BUFFER_READ, # of DATA %08" PRIx32, num_of_words); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA + (num_of_words - 1) * 4); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA + (num_of_words - 1) * 4); if (result < 0) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%d)", AICE_FORMAT_DTHMA + (num_of_words - 1) * 4, result); return ERROR_FAIL; } @@ -1729,7 +1704,6 @@ int aice_batch_buffer_read(uint8_t buf_index, uint32_t *word, uint32_t num_of_wo int aice_batch_buffer_write(uint8_t buf_index, const uint8_t *word, uint32_t num_of_words) { - int32_t result; int retry_times = 0; if (num_of_words == 0) @@ -1747,9 +1721,9 @@ int aice_batch_buffer_write(uint8_t buf_index, const uint8_t *word, uint32_t num LOG_DEBUG("BATCH_BUFFER_WRITE, # of DATA %08" PRIx32, num_of_words); - result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); + int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); if (AICE_FORMAT_DTHMB != result) { - LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", + LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -2563,15 +2537,9 @@ static int aice_usb_close(void) { jtag_libusb_close(aice_handler.usb_handle); - if (custom_srst_script) - free(custom_srst_script); - - if (custom_trst_script) - free(custom_trst_script); - - if (custom_restart_script) - free(custom_restart_script); - + free(custom_srst_script); + free(custom_trst_script); + free(custom_restart_script); return ERROR_OK; } diff --git a/src/jtag/commands.c b/src/jtag/commands.c index e88a3b74f..cafb05b5b 100644 --- a/src/jtag/commands.c +++ b/src/jtag/commands.c @@ -214,10 +214,10 @@ int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer) for (i = 0; i < cmd->num_fields; i++) { if (cmd->fields[i].out_value) { if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) { - char *char_buf = buf_to_str(cmd->fields[i].out_value, + char *char_buf = buf_to_hex_str(cmd->fields[i].out_value, (cmd->fields[i].num_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ - : cmd->fields[i].num_bits, 16); + : cmd->fields[i].num_bits); LOG_DEBUG("fields[%i].out_value[%i]: 0x%s", i, cmd->fields[i].num_bits, char_buf); @@ -257,10 +257,10 @@ int jtag_read_buffer(uint8_t *buffer, const struct scan_command *cmd) malloc(DIV_ROUND_UP(num_bits, 8)), 0, num_bits); if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) { - char *char_buf = buf_to_str(captured, + char *char_buf = buf_to_hex_str(captured, (num_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ - : num_bits, 16); + : num_bits); LOG_DEBUG("fields[%i].in_value[%i]: 0x%s", i, num_bits, char_buf); diff --git a/src/jtag/core.c b/src/jtag/core.c index 1d424b2e4..03a26bec2 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -891,8 +891,8 @@ static int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value, /* NOTE: we've lost diagnostic context here -- 'which tap' */ - captured_str = buf_to_str(captured, bits, 16); - in_check_value_str = buf_to_str(in_check_value, bits, 16); + captured_str = buf_to_hex_str(captured, bits); + in_check_value_str = buf_to_hex_str(in_check_value, bits); LOG_WARNING("Bad value '%s' captured during DR or IR scan:", captured_str); @@ -904,7 +904,7 @@ static int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value, if (in_check_mask) { char *in_check_mask_str; - in_check_mask_str = buf_to_str(in_check_mask, bits, 16); + in_check_mask_str = buf_to_hex_str(in_check_mask, bits); LOG_WARNING(" check_mask: 0x%s", in_check_mask_str); free(in_check_mask_str); } @@ -960,7 +960,7 @@ int default_interface_jtag_execute_queue(void) * jtag/Makefile.am if MINIDRIVER_DUMMY || !MINIDRIVER, but those variables * aren't accessible here. */ struct jtag_command *cmd = jtag_command_queue; - while (debug_level >= LOG_LVL_DEBUG && cmd) { + while (debug_level >= LOG_LVL_DEBUG_IO && cmd) { switch (cmd->type) { case JTAG_SCAN: LOG_DEBUG_IO("JTAG %s SCAN to %s", @@ -969,12 +969,12 @@ int default_interface_jtag_execute_queue(void) for (int i = 0; i < cmd->cmd.scan->num_fields; i++) { struct scan_field *field = cmd->cmd.scan->fields + i; if (field->out_value) { - char *str = buf_to_str(field->out_value, field->num_bits, 16); + char *str = buf_to_hex_str(field->out_value, field->num_bits); LOG_DEBUG_IO(" %db out: %s", field->num_bits, str); free(str); } if (field->in_value) { - char *str = buf_to_str(field->in_value, field->num_bits, 16); + char *str = buf_to_hex_str(field->in_value, field->num_bits); LOG_DEBUG_IO(" %db in: %s", field->num_bits, str); free(str); } @@ -1290,7 +1290,7 @@ static int jtag_examine_chain(void) if ((idcode & 1) == 0) { /* Zero for LSB indicates a device in bypass */ - LOG_INFO("TAP %s does not have valid IDCODE (idcode=0x%x)", + LOG_INFO("TAP %s does not have valid IDCODE (idcode=0x%" PRIx32 ")", tap->dotted_name, idcode); tap->hasidcode = false; tap->idcode = 0; @@ -1436,7 +1436,7 @@ static int jtag_validate_ircapture(void) /* verify the '11' sentinel we wrote is returned at the end */ val = buf_get_u64(ir_test, chain_pos, 2); if (val != 0x3) { - char *cbuf = buf_to_str(ir_test, total_ir_length, 16); + char *cbuf = buf_to_hex_str(ir_test, total_ir_length); LOG_ERROR("IR capture error at bit %d, saw 0x%s not 0x...3", chain_pos, cbuf); diff --git a/src/jtag/drivers/Makefile.am b/src/jtag/drivers/Makefile.am index 07824f678..e8d20ccf8 100644 --- a/src/jtag/drivers/Makefile.am +++ b/src/jtag/drivers/Makefile.am @@ -38,6 +38,11 @@ if USE_LIBFTDI %C%_libocdjtagdrivers_la_LIBADD += $(LIBFTDI_LIBS) endif +if USE_LIBGPIOD +%C%_libocdjtagdrivers_la_CPPFLAGS += $(LIBGPIOD_CFLAGS) +%C%_libocdjtagdrivers_la_LIBADD += $(LIBGPIOD_LIBS) +endif + if USE_HIDAPI %C%_libocdjtagdrivers_la_CPPFLAGS += $(HIDAPI_CFLAGS) %C%_libocdjtagdrivers_la_LIBADD += $(HIDAPI_LIBS) @@ -71,9 +76,15 @@ endif if FTDI DRIVERFILES += %D%/ftdi.c %D%/mpsse.c endif +if LINUXGPIOD +DRIVERFILES += %D%/linuxgpiod.c +endif if JTAG_VPI DRIVERFILES += %D%/jtag_vpi.c endif +if JTAG_DPI +DRIVERFILES += %D%/jtag_dpi.c +endif if USB_BLASTER_DRIVER %C%_libocdjtagdrivers_la_LIBADD += %D%/usb_blaster/libocdusbblaster.la include %D%/usb_blaster/Makefile.am @@ -129,10 +140,15 @@ endif if REMOTE_BITBANG DRIVERFILES += %D%/remote_bitbang.c endif -if HLADAPTER +if HLADAPTER_STLINK DRIVERFILES += %D%/stlink_usb.c +endif +if HLADAPTER_ICDI DRIVERFILES += %D%/ti_icdi_usb.c endif +if HLADAPTER_NULINK +DRIVERFILES += %D%/nulink_usb.c +endif if RSHIM DRIVERFILES += %D%/rshim.c endif diff --git a/src/jtag/drivers/OpenULINK/include/io.h b/src/jtag/drivers/OpenULINK/include/io.h index a4a8b8acd..497c235a2 100644 --- a/src/jtag/drivers/OpenULINK/include/io.h +++ b/src/jtag/drivers/OpenULINK/include/io.h @@ -74,7 +74,7 @@ #define PIN_RXD0 PINC0 #define PIN_TXD0 OUTC1 #define PIN_RESET_2 PINC2 -/* PC3 Not Connecte */ +/* PC3 Not Connected */ /* PC4 Not Connected */ #define PIN_RTCK PINC5 #define PIN_WR OUTC6 diff --git a/src/jtag/drivers/OpenULINK/src/jtag.c b/src/jtag/drivers/OpenULINK/src/jtag.c index 413945566..ecf98a08c 100644 --- a/src/jtag/drivers/OpenULINK/src/jtag.c +++ b/src/jtag/drivers/OpenULINK/src/jtag.c @@ -208,7 +208,7 @@ void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset) * * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO * data is not sampled. - * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state. + * The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state. * * Maximum achievable TCK frequency is 142 kHz for ULINK clocked at 24 MHz. * @@ -283,7 +283,7 @@ void jtag_scan_out(uint8_t out_offset) * * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO * data is not sampled. - * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state. + * The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state. * * Maximum achievable TCK frequency is 97 kHz for ULINK clocked at 24 MHz. * @@ -368,7 +368,7 @@ void jtag_slow_scan_out(uint8_t out_offset) * * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO * data is sampled and stored in the EP2 IN buffer. - * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state. + * The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state. * * Maximum achievable TCK frequency is 100 kHz for ULINK clocked at 24 MHz. * @@ -460,7 +460,7 @@ void jtag_scan_io(uint8_t out_offset, uint8_t in_offset) * * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO * data is sampled and stored in the EP2 IN buffer. - * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state. + * The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state. * * Maximum achievable TCK frequency is 78 kHz for ULINK clocked at 24 MHz. * @@ -562,7 +562,7 @@ void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset) * * Maximum achievable TCK frequency is 375 kHz for ULINK clocked at 24 MHz. * - * @param count number of TCK clock cyclces to generate. + * @param count number of TCK clock cycles to generate. */ void jtag_clock_tck(uint16_t count) { @@ -578,9 +578,9 @@ void jtag_clock_tck(uint16_t count) /** * Generate TCK clock cycles at variable frequency. * - * Maximum achieveable TCK frequency is 166.6 kHz for ULINK clocked at 24 MHz. + * Maximum achievable TCK frequency is 166.6 kHz for ULINK clocked at 24 MHz. * - * @param count number of TCK clock cyclces to generate. + * @param count number of TCK clock cycles to generate. */ void jtag_slow_clock_tck(uint16_t count) { diff --git a/src/jtag/drivers/OpenULINK/src/protocol.c b/src/jtag/drivers/OpenULINK/src/protocol.c index 901f52482..f8f84ed48 100644 --- a/src/jtag/drivers/OpenULINK/src/protocol.c +++ b/src/jtag/drivers/OpenULINK/src/protocol.c @@ -86,7 +86,7 @@ bool execute_command(void) /* Most commands do not transfer IN data. To save code space, we write 0 to * usb_in_bytecount here, then modify it in the switch statement below where - * neccessary */ + * necessary */ usb_in_bytecount = 0; switch (OUT2BUF[cmd_id_index] /* Command ID */) { diff --git a/src/jtag/drivers/OpenULINK/src/usb.c b/src/jtag/drivers/OpenULINK/src/usb.c index fb77f6482..032b23b57 100644 --- a/src/jtag/drivers/OpenULINK/src/usb.c +++ b/src/jtag/drivers/OpenULINK/src/usb.c @@ -38,7 +38,7 @@ volatile bool EP2_in; volatile __xdata __at 0x7FE8 struct setup_data setup_data; /* Define number of endpoints (except Control Endpoint 0) in a central place. - * Be sure to include the neccessary endpoint descriptors! */ + * Be sure to include the necessary endpoint descriptors! */ #define NUM_ENDPOINTS 2 __code struct usb_device_descriptor device_descriptor = { diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c index f5918a055..e9ff8dfa1 100644 --- a/src/jtag/drivers/amt_jtagaccel.c +++ b/src/jtag/drivers/amt_jtagaccel.c @@ -370,11 +370,10 @@ static int amt_jtagaccel_execute_queue(void) amt_jtagaccel_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size); if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK) retval = ERROR_JTAG_QUEUE_FAILED; - if (buffer) - free(buffer); + free(buffer); break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %" PRIi32, cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); jtag_sleep(cmd->cmd.sleep->us); break; default: diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c index 405278b9a..40d52acb9 100644 --- a/src/jtag/drivers/arm-jtag-ew.c +++ b/src/jtag/drivers/arm-jtag-ew.c @@ -160,7 +160,7 @@ static int armjtagew_execute_queue(void) break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); armjtagew_tap_execute(); jtag_sleep(cmd->cmd.sleep->us); break; @@ -664,8 +664,7 @@ static int armjtagew_tap_execute(void) return ERROR_JTAG_QUEUE_FAILED; } - if (pending_scan_result->buffer != NULL) - free(pending_scan_result->buffer); + free(pending_scan_result->buffer); } } else { LOG_ERROR("armjtagew_tap_execute, wrong result %d, expected %d", diff --git a/src/jtag/drivers/at91rm9200.c b/src/jtag/drivers/at91rm9200.c index 1026847fe..bccb9bb23 100644 --- a/src/jtag/drivers/at91rm9200.c +++ b/src/jtag/drivers/at91rm9200.c @@ -231,14 +231,14 @@ static int at91rm9200_init(void) dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC); if (dev_mem_fd < 0) { - perror("open"); + LOG_ERROR("open: %s", strerror(errno)); return ERROR_JTAG_INIT_FAILED; } sys_controller = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, dev_mem_fd, AT91C_BASE_SYS); if (sys_controller == MAP_FAILED) { - perror("mmap"); + LOG_ERROR("mmap: %s", strerror(errno)); close(dev_mem_fd); return ERROR_JTAG_INIT_FAILED; } diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c index df557c5c6..40cb5aa0b 100644 --- a/src/jtag/drivers/bcm2835gpio.c +++ b/src/jtag/drivers/bcm2835gpio.c @@ -24,6 +24,7 @@ #endif #include +#include #include "bitbang.h" #include @@ -54,6 +55,7 @@ static int bcm2835gpio_write(int tck, int tms, int tdi); static int bcm2835_swdio_read(void); static void bcm2835_swdio_drive(bool is_output); +static int bcm2835gpio_swd_write(int swclk, int swdio); static int bcm2835gpio_init(void); static int bcm2835gpio_quit(void); @@ -63,6 +65,7 @@ static struct bitbang_interface bcm2835gpio_bitbang = { .write = bcm2835gpio_write, .swdio_read = bcm2835_swdio_read, .swdio_drive = bcm2835_swdio_drive, + .swd_write = bcm2835gpio_swd_write, .blink = NULL }; @@ -108,10 +111,10 @@ static int bcm2835gpio_write(int tck, int tms, int tdi) return ERROR_OK; } -static int bcm2835gpio_swd_write(int tck, int tms, int tdi) +static int bcm2835gpio_swd_write(int swclk, int swdio) { - uint32_t set = tck<cmd.scan) != ERROR_OK) retval = ERROR_JTAG_QUEUE_FAILED; - if (buffer) - free(buffer); + free(buffer); break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %" PRIi32, cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); jtag_sleep(cmd->cmd.sleep->us); break; case JTAG_TMS: @@ -382,28 +381,29 @@ int bitbang_execute_queue(void) return retval; } - -bool swd_mode; static int queued_retval; static int bitbang_swd_init(void) { LOG_DEBUG("bitbang_swd_init"); - swd_mode = true; return ERROR_OK; } -static void bitbang_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt) +static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt) { - LOG_DEBUG("bitbang_exchange"); - int tdi; + LOG_DEBUG("bitbang_swd_exchange"); + + if (bitbang_interface->blink) { + /* FIXME: we should manage errors */ + bitbang_interface->blink(1); + } for (unsigned int i = offset; i < bit_cnt + offset; i++) { int bytec = i/8; int bcval = 1 << (i % 8); - tdi = !rnw && (buf[bytec] & bcval); + int swdio = !rnw && (buf[bytec] & bcval); - bitbang_interface->write(0, 0, tdi); + bitbang_interface->swd_write(0, swdio); if (rnw && buf) { if (bitbang_interface->swdio_read()) @@ -412,26 +412,31 @@ static void bitbang_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsig buf[bytec] &= ~bcval; } - bitbang_interface->write(1, 0, tdi); + bitbang_interface->swd_write(1, swdio); + } + + if (bitbang_interface->blink) { + /* FIXME: we should manage errors */ + bitbang_interface->blink(0); } } -int bitbang_swd_switch_seq(enum swd_special_seq seq) +static int bitbang_swd_switch_seq(enum swd_special_seq seq) { LOG_DEBUG("bitbang_swd_switch_seq"); switch (seq) { case LINE_RESET: LOG_DEBUG("SWD line reset"); - bitbang_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len); + bitbang_swd_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len); break; case JTAG_TO_SWD: LOG_DEBUG("JTAG-to-SWD"); - bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len); + bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len); break; case SWD_TO_JTAG: LOG_DEBUG("SWD-to-JTAG"); - bitbang_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len); + bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len); break; default: LOG_ERROR("Sequence %d not supported", seq); @@ -441,12 +446,6 @@ int bitbang_swd_switch_seq(enum swd_special_seq seq) return ERROR_OK; } -void bitbang_switch_to_swd(void) -{ - LOG_DEBUG("bitbang_switch_to_swd"); - bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len); -} - static void swd_clear_sticky_errors(void) { bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT), @@ -467,10 +466,10 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)]; cmd |= SWD_CMD_START | (1 << 7); - bitbang_exchange(false, &cmd, 0, 8); + bitbang_swd_exchange(false, &cmd, 0, 8); bitbang_interface->swdio_drive(false); - bitbang_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1); + bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1); bitbang_interface->swdio_drive(true); int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3); @@ -494,7 +493,7 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay if (value) *value = data; if (cmd & SWD_CMD_APnDP) - bitbang_exchange(true, NULL, 0, ap_delay_clk); + bitbang_swd_exchange(true, NULL, 0, ap_delay_clk); return; case SWD_ACK_WAIT: LOG_DEBUG("SWD_ACK_WAIT"); @@ -528,12 +527,12 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1 + 32, 1, parity_u32(value)); cmd |= SWD_CMD_START | (1 << 7); - bitbang_exchange(false, &cmd, 0, 8); + bitbang_swd_exchange(false, &cmd, 0, 8); bitbang_interface->swdio_drive(false); - bitbang_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1); + bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1); bitbang_interface->swdio_drive(true); - bitbang_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1); + bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1); int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3); LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, @@ -546,7 +545,7 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay switch (ack) { case SWD_ACK_OK: if (cmd & SWD_CMD_APnDP) - bitbang_exchange(true, NULL, 0, ap_delay_clk); + bitbang_swd_exchange(true, NULL, 0, ap_delay_clk); return; case SWD_ACK_WAIT: LOG_DEBUG("SWD_ACK_WAIT"); @@ -569,7 +568,7 @@ static int bitbang_swd_run_queue(void) LOG_DEBUG("bitbang_swd_run_queue"); /* A transaction must be followed by another transaction or at least 8 idle cycles to * ensure that data is clocked through the AP. */ - bitbang_exchange(true, NULL, 0, 8); + bitbang_swd_exchange(true, NULL, 0, 8); int retval = queued_retval; queued_retval = ERROR_OK; diff --git a/src/jtag/drivers/bitbang.h b/src/jtag/drivers/bitbang.h index bbbc693df..bc2c506bc 100644 --- a/src/jtag/drivers/bitbang.h +++ b/src/jtag/drivers/bitbang.h @@ -38,32 +38,39 @@ typedef enum { * sample requests together. Not waiting for a value to come back can greatly * increase throughput. */ struct bitbang_interface { - /** Sample TDO. */ + /** Sample TDO and return the value. */ bb_value_t (*read)(void); /** The number of TDO samples that can be buffered up before the caller has * to call read_sample. */ size_t buf_size; + /** Sample TDO and put the result in a buffer. */ int (*sample)(void); + /** Return the next unread value from the buffer. */ bb_value_t (*read_sample)(void); /** Set TCK, TMS, and TDI to the given values. */ int (*write)(int tck, int tms, int tdi); + + /** Blink led (optional). */ int (*blink)(int on); + + /** Sample SWDIO and return the value. */ int (*swdio_read)(void); + + /** Set direction of SWDIO. */ void (*swdio_drive)(bool on); + + /** Set SWCLK and SWDIO to the given value. */ + int (*swd_write)(int swclk, int swdio); }; extern const struct swd_driver bitbang_swd; -extern bool swd_mode; - int bitbang_execute_queue(void); extern struct bitbang_interface *bitbang_interface; -void bitbang_switch_to_swd(void); -int bitbang_swd_switch_seq(enum swd_special_seq seq); #endif /* OPENOCD_JTAG_DRIVERS_BITBANG_H */ diff --git a/src/jtag/drivers/bitq.c b/src/jtag/drivers/bitq.c index 9b4eeed72..97734a92e 100644 --- a/src/jtag/drivers/bitq.c +++ b/src/jtag/drivers/bitq.c @@ -245,7 +245,7 @@ int bitq_execute_queue(void) case JTAG_TLR_RESET: LOG_DEBUG_IO("statemove end in %i", cmd->cmd.statemove->end_state); bitq_end_state(cmd->cmd.statemove->end_state); - bitq_state_move(tap_get_end_state()); /* uncoditional TAP move */ + bitq_state_move(tap_get_end_state()); /* unconditional TAP move */ break; case JTAG_PATHMOVE: @@ -264,7 +264,7 @@ int bitq_execute_queue(void) break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); bitq_interface->sleep(cmd->cmd.sleep->us); if (bitq_interface->in_rdy()) bitq_in_proc(); diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c index 020c4ce39..12bb81e39 100644 --- a/src/jtag/drivers/buspirate.c +++ b/src/jtag/drivers/buspirate.c @@ -214,7 +214,7 @@ static int buspirate_execute_queue(void) break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); buspirate_tap_execute(); jtag_sleep(cmd->cmd.sleep->us); break; @@ -352,10 +352,8 @@ static int buspirate_quit(void) buspirate_serial_close(buspirate_fd); - if (buspirate_port) { - free(buspirate_port); - buspirate_port = NULL; - } + free(buspirate_port); + buspirate_port = NULL; return ERROR_OK; } @@ -1049,7 +1047,7 @@ static void buspirate_jtag_reset(int fd) tmp[0] = 0x00; /* exit OCD1 mode */ buspirate_serial_write(fd, tmp, 1); usleep(10000); - /* We ignore the return value here purposly, nothing we can do */ + /* We ignore the return value here on purpose, nothing we can do */ buspirate_serial_read(fd, tmp, 5); if (strncmp((char *)tmp, "BBIO1", 5) == 0) { tmp[0] = 0x0F; /* reset BP */ @@ -1538,5 +1536,3 @@ static int buspirate_swd_run_queue(void) LOG_DEBUG("SWD queue return value: %02x", retval); return retval; } - - diff --git a/src/jtag/drivers/cmsis_dap_usb.c b/src/jtag/drivers/cmsis_dap_usb.c index ee1cb533c..6d55392d5 100644 --- a/src/jtag/drivers/cmsis_dap_usb.c +++ b/src/jtag/drivers/cmsis_dap_usb.c @@ -229,14 +229,16 @@ static int cmsis_dap_usb_open(void) int i; struct hid_device_info *devs, *cur_dev; unsigned short target_vid, target_pid; - wchar_t *target_serial = NULL; - bool found = false; - bool serial_found = false; target_vid = 0; target_pid = 0; + if (hid_init() != 0) { + LOG_ERROR("unable to open HIDAPI"); + return ERROR_FAIL; + } + /* * The CMSIS-DAP specification stipulates: * "The Product String must contain "CMSIS-DAP" somewhere in the string. This is used by the @@ -268,12 +270,15 @@ static int cmsis_dap_usb_open(void) found = true; } + /* LPC-LINK2 has cmsis-dap on interface 0 and other HID functions on other interfaces */ + if (cur_dev->vendor_id == 0x1fc9 && cur_dev->product_id == 0x0090 && cur_dev->interface_number != 0) + found = false; + if (found) { /* we have found an adapter, so exit further checks */ /* check serial number matches if given */ if (cmsis_dap_serial != NULL) { if ((cur_dev->serial_number != NULL) && wcscmp(cmsis_dap_serial, cur_dev->serial_number) == 0) { - serial_found = true; break; } } else @@ -288,23 +293,16 @@ static int cmsis_dap_usb_open(void) if (NULL != cur_dev) { target_vid = cur_dev->vendor_id; target_pid = cur_dev->product_id; - if (serial_found) - target_serial = cmsis_dap_serial; } - hid_free_enumeration(devs); - if (target_vid == 0 && target_pid == 0) { LOG_ERROR("unable to find CMSIS-DAP device"); + hid_free_enumeration(devs); return ERROR_FAIL; } - if (hid_init() != 0) { - LOG_ERROR("unable to open HIDAPI"); - return ERROR_FAIL; - } - - dev = hid_open(target_vid, target_pid, target_serial); + dev = hid_open_path(cur_dev->path); + hid_free_enumeration(devs); if (dev == NULL) { LOG_ERROR("unable to open CMSIS-DAP device 0x%x:0x%x", target_vid, target_pid); @@ -335,7 +333,7 @@ static int cmsis_dap_usb_open(void) * board */ /* TODO: HID report descriptor should be parsed instead of * hardcoding a match by VID */ - if (target_vid == 0x03eb && target_pid != 0x2145) + if (target_vid == 0x03eb && target_pid != 0x2145 && target_pid != 0x2175) packet_size = 512 + 1; cmsis_dap_handle->packet_buffer = malloc(packet_size); @@ -1005,7 +1003,7 @@ static int cmsis_dap_init(void) LOG_INFO("CMSIS-DAP: Interface Initialised (JTAG)"); } - /* Be conservative and supress submiting multiple HID requests + /* Be conservative and suppress submitting multiple HID requests * until we get packet count info from the adaptor */ cmsis_dap_handle->packet_count = 1; pending_queue_len = 12; diff --git a/src/jtag/drivers/ep93xx.c b/src/jtag/drivers/ep93xx.c index 5e0e62afa..94d65505f 100644 --- a/src/jtag/drivers/ep93xx.c +++ b/src/jtag/drivers/ep93xx.c @@ -127,7 +127,7 @@ static int set_gonk_mode(void) syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, dev_mem_fd, 0x80930000); if (syscon == MAP_FAILED) { - perror("mmap"); + LOG_ERROR("mmap: %s", strerror(errno)); return ERROR_JTAG_INIT_FAILED; } @@ -151,14 +151,14 @@ static int ep93xx_init(void) dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC); if (dev_mem_fd < 0) { - perror("open"); + LOG_ERROR("open: %s", strerror(errno)); return ERROR_JTAG_INIT_FAILED; } gpio_controller = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, dev_mem_fd, 0x80840000); if (gpio_controller == MAP_FAILED) { - perror("mmap"); + LOG_ERROR("mmap: %s", strerror(errno)); close(dev_mem_fd); return ERROR_JTAG_INIT_FAILED; } diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c index c9ed304a8..d97db56a6 100644 --- a/src/jtag/drivers/ft232r.c +++ b/src/jtag/drivers/ft232r.c @@ -886,12 +886,11 @@ static int syncbb_execute_queue(void) syncbb_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size); if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK) retval = ERROR_JTAG_QUEUE_FAILED; - if (buffer) - free(buffer); + free(buffer); break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %" PRIi32, cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); jtag_sleep(cmd->cmd.sleep->us); break; diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c index 34b42b81b..a92f1665d 100644 --- a/src/jtag/drivers/ftdi.c +++ b/src/jtag/drivers/ftdi.c @@ -620,11 +620,11 @@ static int ftdi_reset(int trst, int srst) static void ftdi_execute_sleep(struct jtag_command *cmd) { - LOG_DEBUG_IO("sleep %" PRIi32, cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); mpsse_flush(mpsse_ctx); jtag_sleep(cmd->cmd.sleep->us); - LOG_DEBUG_IO("sleep %" PRIi32 " usec while in %s", + LOG_DEBUG_IO("sleep %" PRIu32 " usec while in %s", cmd->cmd.sleep->us, tap_state_name(tap_get_state())); } @@ -1041,8 +1041,7 @@ static void oscan1_reset_online_activate(void) COMMAND_HANDLER(ftdi_handle_device_desc_command) { if (CMD_ARGC == 1) { - if (ftdi_device_desc) - free(ftdi_device_desc); + free(ftdi_device_desc); ftdi_device_desc = strdup(CMD_ARGV[0]); } else { LOG_ERROR("expected exactly one argument to ftdi_device_desc "); @@ -1054,8 +1053,7 @@ COMMAND_HANDLER(ftdi_handle_device_desc_command) COMMAND_HANDLER(ftdi_handle_serial_command) { if (CMD_ARGC == 1) { - if (ftdi_serial) - free(ftdi_serial); + free(ftdi_serial); ftdi_serial = strdup(CMD_ARGV[0]); } else { return ERROR_COMMAND_SYNTAX_ERROR; diff --git a/src/jtag/drivers/gw16012.c b/src/jtag/drivers/gw16012.c index d1699ef01..ef4b5d929 100644 --- a/src/jtag/drivers/gw16012.c +++ b/src/jtag/drivers/gw16012.c @@ -327,11 +327,10 @@ static int gw16012_execute_queue(void) gw16012_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size); if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK) retval = ERROR_JTAG_QUEUE_FAILED; - if (buffer) - free(buffer); + free(buffer); break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); jtag_sleep(cmd->cmd.sleep->us); break; default: diff --git a/src/jtag/drivers/imx_gpio.c b/src/jtag/drivers/imx_gpio.c index 7dcfb6790..39b463d31 100644 --- a/src/jtag/drivers/imx_gpio.c +++ b/src/jtag/drivers/imx_gpio.c @@ -22,6 +22,7 @@ #endif #include +#include #include "bitbang.h" #include @@ -87,6 +88,7 @@ static int imx_gpio_write(int tck, int tms, int tdi); static int imx_gpio_swdio_read(void); static void imx_gpio_swdio_drive(bool is_output); +static int imx_gpio_swd_write(int swclk, int swdio); static int imx_gpio_init(void); static int imx_gpio_quit(void); @@ -96,6 +98,7 @@ static struct bitbang_interface imx_gpio_bitbang = { .write = imx_gpio_write, .swdio_read = imx_gpio_swdio_read, .swdio_drive = imx_gpio_swdio_drive, + .swd_write = imx_gpio_swd_write, .blink = NULL }; @@ -143,10 +146,10 @@ static int imx_gpio_write(int tck, int tms, int tdi) return ERROR_OK; } -static int imx_gpio_swd_write(int tck, int tms, int tdi) +static int imx_gpio_swd_write(int swclk, int swdio) { - tdi ? gpio_set(swdio_gpio) : gpio_clear(swdio_gpio); - tck ? gpio_set(swclk_gpio) : gpio_clear(swclk_gpio); + swdio ? gpio_set(swdio_gpio) : gpio_clear(swdio_gpio); + swclk ? gpio_set(swclk_gpio) : gpio_clear(swclk_gpio); for (unsigned int i = 0; i < jtag_delay; i++) asm volatile (""); @@ -476,25 +479,22 @@ static int imx_gpio_init(void) LOG_INFO("imx_gpio GPIO JTAG/SWD bitbang driver"); - if (imx_gpio_jtag_mode_possible()) { - if (imx_gpio_swd_mode_possible()) - LOG_INFO("JTAG and SWD modes enabled"); - else - LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)"); - } else if (imx_gpio_swd_mode_possible()) { - LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)"); - } else { - LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode"); + if (transport_is_jtag() && !imx_gpio_jtag_mode_possible()) { + LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode"); + return ERROR_JTAG_INIT_FAILED; + } + + if (transport_is_swd() && !imx_gpio_swd_mode_possible()) { + LOG_ERROR("Require swclk and swdio gpio for SWD mode"); return ERROR_JTAG_INIT_FAILED; } dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC); if (dev_mem_fd < 0) { - perror("open"); + LOG_ERROR("open: %s", strerror(errno)); return ERROR_JTAG_INIT_FAILED; } - LOG_INFO("imx_gpio mmap: pagesize: %u, regionsize: %u", (unsigned int) sysconf(_SC_PAGE_SIZE), IMX_GPIO_REGS_COUNT * IMX_GPIO_SIZE); pio_base = mmap(NULL, IMX_GPIO_REGS_COUNT * IMX_GPIO_SIZE, @@ -502,7 +502,7 @@ static int imx_gpio_init(void) MAP_SHARED, dev_mem_fd, imx_gpio_peri_base); if (pio_base == MAP_FAILED) { - perror("mmap"); + LOG_ERROR("mmap: %s", strerror(errno)); close(dev_mem_fd); return ERROR_JTAG_INIT_FAILED; } @@ -511,7 +511,7 @@ static int imx_gpio_init(void) * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high. */ - if (imx_gpio_jtag_mode_possible()) { + if (transport_is_jtag()) { tdo_gpio_mode = gpio_mode_get(tdo_gpio); tdi_gpio_mode = gpio_mode_get(tdi_gpio); tck_gpio_mode = gpio_mode_get(tck_gpio); @@ -525,8 +525,15 @@ static int imx_gpio_init(void) gpio_mode_output_set(tdi_gpio); gpio_mode_output_set(tck_gpio); gpio_mode_output_set(tms_gpio); + + if (trst_gpio != -1) { + trst_gpio_mode = gpio_mode_get(trst_gpio); + gpio_set(trst_gpio); + gpio_mode_output_set(trst_gpio); + } } - if (imx_gpio_swd_mode_possible()) { + + if (transport_is_swd()) { swclk_gpio_mode = gpio_mode_get(swclk_gpio); swdio_gpio_mode = gpio_mode_get(swdio_gpio); @@ -535,11 +542,7 @@ static int imx_gpio_init(void) gpio_mode_output_set(swclk_gpio); gpio_mode_output_set(swdio_gpio); } - if (trst_gpio != -1) { - trst_gpio_mode = gpio_mode_get(trst_gpio); - gpio_set(trst_gpio); - gpio_mode_output_set(trst_gpio); - } + if (srst_gpio != -1) { srst_gpio_mode = gpio_mode_get(srst_gpio); gpio_set(srst_gpio); @@ -550,28 +553,26 @@ static int imx_gpio_init(void) "tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode, tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode); - if (swd_mode) { - imx_gpio_bitbang.write = imx_gpio_swd_write; - bitbang_switch_to_swd(); - } - return ERROR_OK; } static int imx_gpio_quit(void) { - if (imx_gpio_jtag_mode_possible()) { + if (transport_is_jtag()) { gpio_mode_set(tdo_gpio, tdo_gpio_mode); gpio_mode_set(tdi_gpio, tdi_gpio_mode); gpio_mode_set(tck_gpio, tck_gpio_mode); gpio_mode_set(tms_gpio, tms_gpio_mode); + + if (trst_gpio != -1) + gpio_mode_set(trst_gpio, trst_gpio_mode); } - if (imx_gpio_swd_mode_possible()) { + + if (transport_is_swd()) { gpio_mode_set(swclk_gpio, swclk_gpio_mode); gpio_mode_set(swdio_gpio, swdio_gpio_mode); } - if (trst_gpio != -1) - gpio_mode_set(trst_gpio, trst_gpio_mode); + if (srst_gpio != -1) gpio_mode_set(srst_gpio, srst_gpio_mode); diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index 1baf3454e..ae8ce49c6 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -254,7 +254,7 @@ static void jlink_execute_scan(struct jtag_command *cmd) static void jlink_execute_sleep(struct jtag_command *cmd) { - LOG_DEBUG_IO("sleep %" PRIi32 "", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32 "", cmd->cmd.sleep->us); jlink_flush(); jtag_sleep(cmd->cmd.sleep->us); } @@ -480,7 +480,7 @@ static bool adjust_swd_buffer_size(void) } if (tmp < 143) { - LOG_ERROR("Not enough free device internal memory: %u bytes.", tmp); + LOG_ERROR("Not enough free device internal memory: %" PRIu32 " bytes.", tmp); return false; } @@ -1049,7 +1049,7 @@ COMMAND_HANDLER(jlink_handle_free_memory_command) return ERROR_FAIL; } - command_print(CMD, "Device has %u bytes of free memory.", tmp); + command_print(CMD, "Device has %" PRIu32 " bytes of free memory.", tmp); return ERROR_OK; } @@ -1269,17 +1269,14 @@ static uint32_t calculate_trace_buffer_size(void) static bool calculate_swo_prescaler(unsigned int traceclkin_freq, uint32_t trace_freq, uint16_t *prescaler) { - unsigned int presc; - double deviation; - - presc = ((1.0 - SWO_MAX_FREQ_DEV) * traceclkin_freq) / trace_freq + 1; - + unsigned int presc = (traceclkin_freq + trace_freq / 2) / trace_freq; if (presc > TPIU_ACPR_MAX_SWOSCALER) return false; - deviation = fabs(1.0 - ((double)trace_freq * presc / traceclkin_freq)); - - if (deviation > SWO_MAX_FREQ_DEV) + /* Probe's UART speed must be within 3% of the TPIU's SWO baud rate. */ + unsigned int max_deviation = (traceclkin_freq * 3) / 100; + if (presc * trace_freq < traceclkin_freq - max_deviation || + presc * trace_freq > traceclkin_freq + max_deviation) return false; *prescaler = presc; @@ -1288,7 +1285,7 @@ static bool calculate_swo_prescaler(unsigned int traceclkin_freq, } static bool detect_swo_freq_and_prescaler(struct jaylink_swo_speed speed, - unsigned int traceclkin_freq, uint32_t *trace_freq, + unsigned int traceclkin_freq, unsigned int *trace_freq, uint16_t *prescaler) { uint32_t divider; @@ -1378,11 +1375,11 @@ static int config_trace(bool enabled, enum tpiu_pin_protocol pin_protocol, max_freq = speed.freq / speed.min_div; if (*trace_freq > max_freq) { - LOG_INFO("Given SWO frequency too high, using %u Hz instead.", + LOG_INFO("Given SWO frequency too high, using %" PRIu32 " Hz instead.", max_freq); *trace_freq = max_freq; } else if (*trace_freq < min_freq) { - LOG_INFO("Given SWO frequency too low, using %u Hz instead.", + LOG_INFO("Given SWO frequency too low, using %" PRIu32 " Hz instead.", min_freq); *trace_freq = min_freq; } else if (*trace_freq != speed.freq / divider) { @@ -1420,7 +1417,7 @@ static int config_trace(bool enabled, enum tpiu_pin_protocol pin_protocol, return ERROR_FAIL; } - LOG_DEBUG("Using %u bytes device memory for trace capturing.", + LOG_DEBUG("Using %" PRIu32 " bytes device memory for trace capturing.", buffer_size); /* @@ -1807,7 +1804,7 @@ COMMAND_HANDLER(jlink_handle_emucom_read_command) return ERROR_FAIL; } else if (ret == JAYLINK_ERR_DEV_NOT_AVAILABLE) { LOG_ERROR("Channel is not available for the requested amount of data. " - "%" PRIu32 " bytes are avilable.", length); + "%" PRIu32 " bytes are available.", length); free(buf); return ERROR_FAIL; } else if (ret != JAYLINK_OK) { diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c new file mode 100644 index 000000000..575c6bce2 --- /dev/null +++ b/src/jtag/drivers/jtag_dpi.c @@ -0,0 +1,407 @@ +/* + * JTAG to DPI driver + * + * Copyright (C) 2013 Franck Jullien, + * + * Copyright (C) 2019-2020, Ampere Computing LLC + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#ifdef HAVE_ARPA_INET_H +#include +#endif + +#ifndef _WIN32 +#include +#endif + +#define SERVER_ADDRESS "127.0.0.1" +#define SERVER_PORT 5555 + +static uint16_t server_port = SERVER_PORT; +static char *server_address; + +static int sockfd; +static struct sockaddr_in serv_addr; + +static uint8_t *last_ir_buf; +static int last_ir_num_bits; + +static int write_sock(char *buf, size_t len) +{ + if (buf == NULL) { + LOG_ERROR("%s: NULL 'buf' argument, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + if (write(sockfd, buf, len) != (ssize_t)len) { + LOG_ERROR("%s: %s, file %s, line %d", __func__, + strerror(errno), __FILE__, __LINE__); + return ERROR_FAIL; + } + return ERROR_OK; +} + +static int read_sock(char *buf, size_t len) +{ + if (buf == NULL) { + LOG_ERROR("%s: NULL 'buf' argument, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + if (read(sockfd, buf, len) != (ssize_t)len) { + LOG_ERROR("%s: %s, file %s, line %d", __func__, + strerror(errno), __FILE__, __LINE__); + return ERROR_FAIL; + } + return ERROR_OK; +} + +/** + * jtag_dpi_reset - ask to reset the JTAG device + * @trst: 1 if TRST is to be asserted + * @srst: 1 if SRST is to be asserted + */ +static int jtag_dpi_reset(int trst, int srst) +{ + char *buf = "reset\n"; + int ret = ERROR_OK; + + LOG_DEBUG_IO("JTAG DRIVER DEBUG: reset trst: %i srst %i", trst, srst); + + if (trst == 1) { + /* reset the JTAG TAP controller */ + ret = write_sock(buf, strlen(buf)); + if (ret != ERROR_OK) { + LOG_ERROR("write_sock() fail, file %s, line %d", + __FILE__, __LINE__); + } + } + + if (srst == 1) { + /* System target reset not supported */ + LOG_ERROR("DPI SRST not supported"); + ret = ERROR_FAIL; + } + + return ret; +} + +/** + * jtag_dpi_scan - launches a DR-scan or IR-scan + * @cmd: the command to launch + * + * Launch a JTAG IR-scan or DR-scan + * + * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occured. + */ +static int jtag_dpi_scan(struct scan_command *cmd) +{ + char buf[20]; + uint8_t *data_buf; + int num_bits, bytes; + int ret = ERROR_OK; + + num_bits = jtag_build_buffer(cmd, &data_buf); + if (data_buf == NULL) { + LOG_ERROR("jtag_build_buffer call failed, data_buf == NULL, " + "file %s, line %d", __FILE__, __LINE__); + return ERROR_FAIL; + } + + bytes = DIV_ROUND_UP(num_bits, 8); + if (cmd->ir_scan) { + free(last_ir_buf); + last_ir_buf = (uint8_t *)malloc(bytes * sizeof(uint8_t)); + if (last_ir_buf == NULL) { + LOG_ERROR("%s: malloc fail, file %s, line %d", + __func__, __FILE__, __LINE__); + ret = ERROR_FAIL; + goto out; + } + memcpy(last_ir_buf, data_buf, bytes); + last_ir_num_bits = num_bits; + } + snprintf(buf, sizeof(buf), "%s %d\n", cmd->ir_scan ? "ib" : "db", num_bits); + ret = write_sock(buf, strlen(buf)); + if (ret != ERROR_OK) { + LOG_ERROR("write_sock() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + ret = write_sock((char *)data_buf, bytes); + if (ret != ERROR_OK) { + LOG_ERROR("write_sock() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + ret = read_sock((char *)data_buf, bytes); + if (ret != ERROR_OK) { + LOG_ERROR("read_sock() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + + ret = jtag_read_buffer(data_buf, cmd); + if (ret != ERROR_OK) { + LOG_ERROR("jtag_read_buffer() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + +out: + free(data_buf); + return ret; +} + +static int jtag_dpi_runtest(int cycles) +{ + char buf[20]; + uint8_t *data_buf = last_ir_buf, *read_scan; + int num_bits = last_ir_num_bits, bytes; + int ret = ERROR_OK; + + if (data_buf == NULL) { + LOG_ERROR("%s: NULL 'data_buf' argument, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + if (num_bits <= 0) { + LOG_ERROR("%s: 'num_bits' invalid value, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + + bytes = DIV_ROUND_UP(num_bits, 8); + read_scan = (uint8_t *)malloc(bytes * sizeof(uint8_t)); + if (read_scan == NULL) { + LOG_ERROR("%s: malloc fail, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + snprintf(buf, sizeof(buf), "ib %d\n", num_bits); + while (cycles > 0) { + ret = write_sock(buf, strlen(buf)); + if (ret != ERROR_OK) { + LOG_ERROR("write_sock() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + ret = write_sock((char *)data_buf, bytes); + if (ret != ERROR_OK) { + LOG_ERROR("write_sock() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + ret = read_sock((char *)read_scan, bytes); + if (ret != ERROR_OK) { + LOG_ERROR("read_sock() fail, file %s, line %d", + __FILE__, __LINE__); + goto out; + } + + cycles -= num_bits + 6; + } + +out: + free(read_scan); + return ret; +} + +static int jtag_dpi_stableclocks(int cycles) +{ + return jtag_dpi_runtest(cycles); +} + +static int jtag_dpi_execute_queue(void) +{ + struct jtag_command *cmd; + int ret = ERROR_OK; + + for (cmd = jtag_command_queue; ret == ERROR_OK && cmd != NULL; + cmd = cmd->next) { + switch (cmd->type) { + case JTAG_RUNTEST: + ret = jtag_dpi_runtest(cmd->cmd.runtest->num_cycles); + break; + case JTAG_STABLECLOCKS: + ret = jtag_dpi_stableclocks(cmd->cmd.stableclocks->num_cycles); + break; + case JTAG_TLR_RESET: + /* Enter Test-Logic-Reset state by asserting TRST */ + if (cmd->cmd.statemove->end_state == TAP_RESET) + jtag_dpi_reset(1, 0); + break; + case JTAG_PATHMOVE: + /* unsupported */ + break; + case JTAG_TMS: + /* unsupported */ + break; + case JTAG_SLEEP: + jtag_sleep(cmd->cmd.sleep->us); + break; + case JTAG_SCAN: + ret = jtag_dpi_scan(cmd->cmd.scan); + break; + default: + LOG_ERROR("BUG: unknown JTAG command type 0x%X", + cmd->type); + ret = ERROR_FAIL; + break; + } + } + + return ret; +} + +static int jtag_dpi_init(void) +{ + sockfd = socket(AF_INET, SOCK_STREAM, 0); + if (sockfd < 0) { + LOG_ERROR("socket: %s, function %s, file %s, line %d", + strerror(errno), __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + + memset(&serv_addr, 0, sizeof(serv_addr)); + + serv_addr.sin_family = AF_INET; + serv_addr.sin_port = htons(server_port); + + if (server_address == NULL) { + server_address = strdup(SERVER_ADDRESS); + if (server_address == NULL) { + LOG_ERROR("%s: strdup fail, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + } + + serv_addr.sin_addr.s_addr = inet_addr(server_address); + + if (serv_addr.sin_addr.s_addr == INADDR_NONE) { + LOG_ERROR("inet_addr error occured"); + return ERROR_FAIL; + } + + if (connect(sockfd, (struct sockaddr *)&serv_addr, sizeof(serv_addr)) < 0) { + close(sockfd); + LOG_ERROR("Can't connect to %s : %" PRIu16, server_address, server_port); + return ERROR_FAIL; + } + if (serv_addr.sin_addr.s_addr == htonl(INADDR_LOOPBACK)) { + /* This increases performance dramatically for local + * connections, which is the most likely arrangement + * for a DPI connection. */ + int flag = 1; + setsockopt(sockfd, IPPROTO_TCP, TCP_NODELAY, (char *)&flag, sizeof(int)); + } + + LOG_INFO("Connection to %s : %" PRIu16 " succeed", server_address, server_port); + + return ERROR_OK; +} + +static int jtag_dpi_quit(void) +{ + free(server_address); + server_address = NULL; + + return close(sockfd); +} + +COMMAND_HANDLER(jtag_dpi_set_port) +{ + if (CMD_ARGC > 1) + return ERROR_COMMAND_SYNTAX_ERROR; + else if (CMD_ARGC == 0) + LOG_INFO("Using server port %" PRIu16, server_port); + else { + COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], server_port); + LOG_INFO("Set server port to %" PRIu16, server_port); + } + + return ERROR_OK; +} + +COMMAND_HANDLER(jtag_dpi_set_address) +{ + if (CMD_ARGC > 1) + return ERROR_COMMAND_SYNTAX_ERROR; + else if (CMD_ARGC == 0) { + if (server_address == NULL) { + server_address = strdup(SERVER_ADDRESS); + if (server_address == NULL) { + LOG_ERROR("%s: strdup fail, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + } + LOG_INFO("Using server address %s", server_address); + } else { + free(server_address); + server_address = strdup(CMD_ARGV[0]); + if (server_address == NULL) { + LOG_ERROR("%s: strdup fail, file %s, line %d", + __func__, __FILE__, __LINE__); + return ERROR_FAIL; + } + LOG_INFO("Set server address to %s", server_address); + } + + return ERROR_OK; +} + +static const struct command_registration jtag_dpi_command_handlers[] = { + { + .name = "jtag_dpi_set_port", + .handler = &jtag_dpi_set_port, + .mode = COMMAND_CONFIG, + .help = "set the port of the DPI server", + .usage = "[port]", + }, + { + .name = "jtag_dpi_set_address", + .handler = &jtag_dpi_set_address, + .mode = COMMAND_CONFIG, + .help = "set the address of the DPI server", + .usage = "[address]", + }, + COMMAND_REGISTRATION_DONE +}; + +static struct jtag_interface jtag_dpi_interface = { + .supported = DEBUG_CAP_TMS_SEQ, + .execute_queue = jtag_dpi_execute_queue, +}; + +struct adapter_driver jtag_dpi_adapter_driver = { + .name = "jtag_dpi", + .transports = jtag_only, + .commands = jtag_dpi_command_handlers, + .init = jtag_dpi_init, + .quit = jtag_dpi_quit, + .reset = jtag_dpi_reset, + .jtag_ops = &jtag_dpi_interface, +}; diff --git a/src/jtag/drivers/jtag_usb_common.c b/src/jtag/drivers/jtag_usb_common.c index 6337272fb..969ea8406 100644 --- a/src/jtag/drivers/jtag_usb_common.c +++ b/src/jtag/drivers/jtag_usb_common.c @@ -23,8 +23,7 @@ void jtag_usb_set_location(const char *location) JTAG_USB_MAX_LOCATION_LENGTH) LOG_WARNING("usb location string is too long!!\n"); - if (jtag_usb_location) - free(jtag_usb_location); + free(jtag_usb_location); jtag_usb_location = strndup(location, JTAG_USB_MAX_LOCATION_LENGTH); } diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c index a5a95a5a3..32a43f8bf 100644 --- a/src/jtag/drivers/jtag_vpi.c +++ b/src/jtag/drivers/jtag_vpi.c @@ -103,11 +103,10 @@ static int jtag_vpi_send_cmd(struct vpi_cmd *vpi) if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) { if (vpi->nb_bits > 0) { /* command with a non-empty data payload */ - char *char_buf = buf_to_str(vpi->buffer_out, + char *char_buf = buf_to_hex_str(vpi->buffer_out, (vpi->nb_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ - : vpi->nb_bits, - 16); + : vpi->nb_bits); LOG_DEBUG_IO("sending JTAG VPI cmd: cmd=%s, " "length=%" PRIu32 ", " "nb_bits=%" PRIu32 ", " @@ -227,7 +226,7 @@ static int jtag_vpi_reset(int trst, int srst) * @bits: TMS bits to be written (bit0, bit1 .. bitN) * @nb_bits: number of TMS bits (between 1 and 8) * - * Write a serie of TMS transitions, where each transition consists in : + * Write a series of TMS transitions, where each transition consists in : * - writing out TCK=0, TMS=, TDI= * - writing out TCK=1, TMS=, TDI= which triggers the transition * The function ensures that at the end of the sequence, the clock (TCK) is put @@ -253,7 +252,7 @@ static int jtag_vpi_tms_seq(const uint8_t *bits, int nb_bits) * jtag_vpi_path_move - ask a TMS sequence transition to JTAG * @cmd: path transition * - * Write a serie of TMS transitions, where each transition consists in : + * Write a series of TMS transitions, where each transition consists in : * - writing out TCK=0, TMS=, TDI= * - writing out TCK=1, TMS=, TDI= which triggers the transition * The function ensures that at the end of the sequence, the clock (TCK) is put @@ -328,9 +327,8 @@ static int jtag_vpi_queue_tdi_xfer(uint8_t *bits, int nb_bits, int tap_shift) /* Optional low-level JTAG debug */ if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) { - char *char_buf = buf_to_str(vpi.buffer_in, - (nb_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ : nb_bits, - 16); + char *char_buf = buf_to_hex_str(vpi.buffer_in, + (nb_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ : nb_bits); LOG_DEBUG_IO("recvd JTAG VPI data: nb_bits=%d, buf_in=0x%s%s", nb_bits, char_buf, (nb_bits > DEBUG_JTAG_IOZ) ? "(...)" : ""); free(char_buf); @@ -392,7 +390,7 @@ static int jtag_vpi_clock_tms(int tms) * * Launch a JTAG IR-scan or DR-scan * - * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occured. + * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occurred. */ static int jtag_vpi_scan(struct scan_command *cmd) { @@ -441,8 +439,7 @@ static int jtag_vpi_scan(struct scan_command *cmd) if (retval != ERROR_OK) return retval; - if (buf) - free(buf); + free(buf); if (cmd->end_state != TAP_DRSHIFT) { retval = jtag_vpi_state_move(cmd->end_state); @@ -558,7 +555,7 @@ static int jtag_vpi_init(void) serv_addr.sin_addr.s_addr = inet_addr(server_address); if (serv_addr.sin_addr.s_addr == INADDR_NONE) { - LOG_ERROR("inet_addr error occured"); + LOG_ERROR("inet_addr error occurred"); return ERROR_FAIL; } @@ -569,7 +566,7 @@ static int jtag_vpi_init(void) } if (serv_addr.sin_addr.s_addr == htonl(INADDR_LOOPBACK)) { - /* This increases performance drematically for local + /* This increases performance dramatically for local * connections, which is the most likely arrangement * for a VPI connection. */ setsockopt(sockfd, IPPROTO_TCP, TCP_NODELAY, (char *)&flag, sizeof(int)); diff --git a/src/jtag/drivers/kitprog.c b/src/jtag/drivers/kitprog.c index efb8da2cd..5538bcd73 100644 --- a/src/jtag/drivers/kitprog.c +++ b/src/jtag/drivers/kitprog.c @@ -227,18 +227,11 @@ static int kitprog_quit(void) { kitprog_usb_close(); - if (kitprog_handle->packet_buffer != NULL) - free(kitprog_handle->packet_buffer); - if (kitprog_handle->serial != NULL) - free(kitprog_handle->serial); - if (kitprog_handle != NULL) - free(kitprog_handle); - - if (kitprog_serial != NULL) - free(kitprog_serial); - - if (pending_transfers != NULL) - free(pending_transfers); + free(kitprog_handle->packet_buffer); + free(kitprog_handle->serial); + free(kitprog_handle); + free(kitprog_serial); + free(pending_transfers); return ERROR_OK; } @@ -606,7 +599,7 @@ static int kitprog_generic_acquire(void) for (uint8_t j = 0; j < sizeof(devices) && acquire_count == i; j++) { retval = kitprog_acquire_psoc(devices[j], ACQUIRE_MODE_RESET, 3); if (retval != ERROR_OK) { - LOG_DEBUG("Aquisition function failed for device 0x%02x.", devices[j]); + LOG_DEBUG("Acquisition function failed for device 0x%02x.", devices[j]); return retval; } @@ -746,7 +739,7 @@ static int kitprog_swd_run_queue(void) * size (64 bytes) as required by the USB specification. * Therefore libusb would wait for continuation of transmission. * Workaround: Limit bulk read size to expected number of bytes - * for problematic tranfer sizes. Otherwise use the maximum buffer + * for problematic transfer sizes. Otherwise use the maximum buffer * size here because the KitProg sometimes doesn't like bulk reads * of fewer than 62 bytes. (?!?!) */ diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c new file mode 100644 index 000000000..99422a116 --- /dev/null +++ b/src/jtag/drivers/linuxgpiod.c @@ -0,0 +1,633 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Bitbang driver for Linux GPIO descriptors through libgpiod + * Copyright (C) 2020 Antonio Borneo + * + * Largely based on sysfsgpio driver + * Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au + * Copyright (C) 2014 by Jean-Christian de Rivaz + * Copyright (C) 2014 by Paul Fertser + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include "bitbang.h" + +/* gpio numbers for each gpio. Negative values are invalid */ +static int tck_gpio = -1; +static int tms_gpio = -1; +static int tdi_gpio = -1; +static int tdo_gpio = -1; +static int trst_gpio = -1; +static int srst_gpio = -1; +static int swclk_gpio = -1; +static int swdio_gpio = -1; +static int led_gpio = -1; +static int gpiochip = -1; + +static struct gpiod_chip *gpiod_chip; +static struct gpiod_line *gpiod_tck; +static struct gpiod_line *gpiod_tms; +static struct gpiod_line *gpiod_tdi; +static struct gpiod_line *gpiod_tdo; +static struct gpiod_line *gpiod_trst; +static struct gpiod_line *gpiod_swclk; +static struct gpiod_line *gpiod_swdio; +static struct gpiod_line *gpiod_srst; +static struct gpiod_line *gpiod_led; + +static int last_swclk; +static int last_swdio; +static bool last_stored; +static bool swdio_input; + +/* Bitbang interface read of TDO */ +static bb_value_t linuxgpiod_read(void) +{ + int retval; + + retval = gpiod_line_get_value(gpiod_tdo); + if (retval < 0) { + LOG_WARNING("reading tdo failed"); + return 0; + } + + return retval ? BB_HIGH : BB_LOW; +} + +/* + * Bitbang interface write of TCK, TMS, TDI + * + * Seeing as this is the only function where the outputs are changed, + * we can cache the old value to avoid needlessly writing it. + */ +static int linuxgpiod_write(int tck, int tms, int tdi) +{ + static int last_tck; + static int last_tms; + static int last_tdi; + + static int first_time; + + int retval; + + if (!first_time) { + last_tck = !tck; + last_tms = !tms; + last_tdi = !tdi; + first_time = 1; + } + + if (tdi != last_tdi) { + retval = gpiod_line_set_value(gpiod_tdi, tdi); + if (retval < 0) + LOG_WARNING("writing tdi failed"); + } + + if (tms != last_tms) { + retval = gpiod_line_set_value(gpiod_tms, tms); + if (retval < 0) + LOG_WARNING("writing tms failed"); + } + + /* write clk last */ + if (tck != last_tck) { + retval = gpiod_line_set_value(gpiod_tck, tck); + if (retval < 0) + LOG_WARNING("writing tck failed"); + } + + last_tdi = tdi; + last_tms = tms; + last_tck = tck; + + return ERROR_OK; +} + +static int linuxgpiod_swdio_read(void) +{ + int retval; + + retval = gpiod_line_get_value(gpiod_swdio); + if (retval < 0) { + LOG_WARNING("Fail read swdio"); + return 0; + } + + return retval; +} + +static void linuxgpiod_swdio_drive(bool is_output) +{ + int retval; + + /* + * FIXME: change direction requires release and re-require the line + * https://stackoverflow.com/questions/58735140/ + * this would change in future libgpiod + */ + gpiod_line_release(gpiod_swdio); + + if (is_output) { + retval = gpiod_line_request_output(gpiod_swdio, "OpenOCD", 1); + if (retval < 0) + LOG_WARNING("Fail request_output line swdio"); + } else { + retval = gpiod_line_request_input(gpiod_swdio, "OpenOCD"); + if (retval < 0) + LOG_WARNING("Fail request_input line swdio"); + } + + last_stored = false; + swdio_input = !is_output; +} + +static int linuxgpiod_swd_write(int swclk, int swdio) +{ + int retval; + + if (!swdio_input) { + if (!last_stored || (swdio != last_swdio)) { + retval = gpiod_line_set_value(gpiod_swdio, swdio); + if (retval < 0) + LOG_WARNING("Fail set swdio"); + } + } + + /* write swclk last */ + if (!last_stored || (swclk != last_swclk)) { + retval = gpiod_line_set_value(gpiod_swclk, swclk); + if (retval < 0) + LOG_WARNING("Fail set swclk"); + } + + last_swdio = swdio; + last_swclk = swclk; + last_stored = true; + + return ERROR_OK; +} + +static int linuxgpiod_blink(int on) +{ + int retval; + + if (!gpiod_led) + return ERROR_OK; + + retval = gpiod_line_set_value(gpiod_led, on); + if (retval < 0) + LOG_WARNING("Fail set led"); + return retval; +} + +static struct bitbang_interface linuxgpiod_bitbang = { + .read = linuxgpiod_read, + .write = linuxgpiod_write, + .swdio_read = linuxgpiod_swdio_read, + .swdio_drive = linuxgpiod_swdio_drive, + .swd_write = linuxgpiod_swd_write, + .blink = linuxgpiod_blink, +}; + +/* + * Bitbang interface to manipulate reset lines SRST and TRST + * + * (1) assert or (0) deassert reset lines + */ +static int linuxgpiod_reset(int trst, int srst) +{ + int retval1 = 0, retval2 = 0; + + LOG_DEBUG("linuxgpiod_reset"); + + /* assume active low */ + if (gpiod_srst != NULL) { + retval1 = gpiod_line_set_value(gpiod_srst, srst ? 0 : 1); + if (retval1 < 0) + LOG_WARNING("set srst value failed"); + } + + /* assume active low */ + if (gpiod_trst != NULL) { + retval2 = gpiod_line_set_value(gpiod_trst, trst ? 0 : 1); + if (retval2 < 0) + LOG_WARNING("set trst value failed"); + } + + return ((retval1 < 0) || (retval2 < 0)) ? ERROR_FAIL : ERROR_OK; +} + +/* + * Helper function to determine if gpio number is valid + * + * Assume here that there will be less than 10000 gpios per gpiochip + */ +static bool is_gpio_valid(int gpio) +{ + return gpio >= 0 && gpio < 10000; +} + +static bool linuxgpiod_jtag_mode_possible(void) +{ + if (!is_gpio_valid(tck_gpio)) + return false; + if (!is_gpio_valid(tms_gpio)) + return false; + if (!is_gpio_valid(tdi_gpio)) + return false; + if (!is_gpio_valid(tdo_gpio)) + return false; + return true; +} + +static bool linuxgpiod_swd_mode_possible(void) +{ + if (!is_gpio_valid(swclk_gpio)) + return false; + if (!is_gpio_valid(swdio_gpio)) + return false; + return true; +} + +static inline void helper_release(struct gpiod_line *line) +{ + if (line) + gpiod_line_release(line); +} + +static int linuxgpiod_quit(void) +{ + helper_release(gpiod_led); + helper_release(gpiod_srst); + helper_release(gpiod_swdio); + helper_release(gpiod_swclk); + helper_release(gpiod_trst); + helper_release(gpiod_tms); + helper_release(gpiod_tck); + helper_release(gpiod_tdi); + helper_release(gpiod_tdo); + + gpiod_chip_close(gpiod_chip); + + return ERROR_OK; +} + +static struct gpiod_line *helper_get_input_line(const char *label, unsigned int offset) +{ + struct gpiod_line *line; + int retval; + + line = gpiod_chip_get_line(gpiod_chip, offset); + if (line == NULL) { + LOG_ERROR("Error get line %s", label); + return NULL; + } + + retval = gpiod_line_request_input(line, "OpenOCD"); + if (retval < 0) { + LOG_ERROR("Error request_input line %s", label); + return NULL; + } + + return line; +} + +static struct gpiod_line *helper_get_output_line(const char *label, unsigned int offset, int val) +{ + struct gpiod_line *line; + int retval; + + line = gpiod_chip_get_line(gpiod_chip, offset); + if (line == NULL) { + LOG_ERROR("Error get line %s", label); + return NULL; + } + + retval = gpiod_line_request_output(line, "OpenOCD", val); + if (retval < 0) { + LOG_ERROR("Error request_output line %s", label); + return NULL; + } + + return line; +} + +static int linuxgpiod_init(void) +{ + LOG_INFO("Linux GPIOD JTAG/SWD bitbang driver"); + + bitbang_interface = &linuxgpiod_bitbang; + + gpiod_chip = gpiod_chip_open_by_number(gpiochip); + if (gpiod_chip == NULL) { + LOG_ERROR("Cannot open LinuxGPIOD gpiochip %d", gpiochip); + return ERROR_JTAG_INIT_FAILED; + } + + /* + * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST + * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high. + * For SWD, SWCLK and SWDIO are configures as output high. + */ + + if (transport_is_jtag()) { + if (!linuxgpiod_jtag_mode_possible()) { + LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode"); + goto out_error; + } + + gpiod_tdo = helper_get_input_line("tdo", tdo_gpio); + if (gpiod_tdo == NULL) + goto out_error; + + gpiod_tdi = helper_get_output_line("tdi", tdi_gpio, 0); + if (gpiod_tdi == NULL) + goto out_error; + + gpiod_tck = helper_get_output_line("tck", tck_gpio, 0); + if (gpiod_tck == NULL) + goto out_error; + + gpiod_tms = helper_get_output_line("tms", tms_gpio, 1); + if (gpiod_tms == NULL) + goto out_error; + + if (is_gpio_valid(trst_gpio)) { + gpiod_trst = helper_get_output_line("trst", trst_gpio, 1); + if (gpiod_trst == NULL) + goto out_error; + } + } + + if (transport_is_swd()) { + if (!linuxgpiod_swd_mode_possible()) { + LOG_ERROR("Require swclk and swdio gpio for SWD mode"); + goto out_error; + } + + gpiod_swclk = helper_get_output_line("swclk", swclk_gpio, 1); + if (gpiod_swclk == NULL) + goto out_error; + + gpiod_swdio = helper_get_output_line("swdio", swdio_gpio, 1); + if (gpiod_swdio == NULL) + goto out_error; + } + + if (is_gpio_valid(srst_gpio)) { + gpiod_srst = helper_get_output_line("srst", srst_gpio, 1); + if (gpiod_srst == NULL) + goto out_error; + } + + if (is_gpio_valid(led_gpio)) { + gpiod_led = helper_get_output_line("led", led_gpio, 0); + if (gpiod_led == NULL) + goto out_error; + } + + return ERROR_OK; + +out_error: + linuxgpiod_quit(); + + return ERROR_JTAG_INIT_FAILED; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionums) +{ + if (CMD_ARGC == 4) { + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio); + } else if (CMD_ARGC != 0) { + return ERROR_COMMAND_SYNTAX_ERROR; + } + + command_print(CMD, + "LinuxGPIOD nums: tck = %d, tms = %d, tdi = %d, tdo = %d", + tck_gpio, tms_gpio, tdi_gpio, tdo_gpio); + + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tck) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio); + + command_print(CMD, "LinuxGPIOD num: tck = %d", tck_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tms) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tms_gpio); + + command_print(CMD, "LinuxGPIOD num: tms = %d", tms_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tdo) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdo_gpio); + + command_print(CMD, "LinuxGPIOD num: tdo = %d", tdo_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tdi) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdi_gpio); + + command_print(CMD, "LinuxGPIOD num: tdi = %d", tdi_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_srst) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], srst_gpio); + + command_print(CMD, "LinuxGPIOD num: srst = %d", srst_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_trst) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], trst_gpio); + + command_print(CMD, "LinuxGPIOD num: trst = %d", trst_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_swd_gpionums) +{ + if (CMD_ARGC == 2) { + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio); + } else if (CMD_ARGC != 0) { + return ERROR_COMMAND_SYNTAX_ERROR; + } + + command_print(CMD, + "LinuxGPIOD nums: swclk = %d, swdio = %d", + swclk_gpio, swdio_gpio); + + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swclk) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio); + + command_print(CMD, "LinuxGPIOD num: swclk = %d", swclk_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swdio) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio); + + command_print(CMD, "LinuxGPIOD num: swdio = %d", swdio_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_gpionum_led) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], led_gpio); + + command_print(CMD, "LinuxGPIOD num: led = %d", led_gpio); + return ERROR_OK; +} + +COMMAND_HANDLER(linuxgpiod_handle_gpiochip) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], gpiochip); + + command_print(CMD, "LinuxGPIOD gpiochip = %d", gpiochip); + return ERROR_OK; +} + +static const struct command_registration linuxgpiod_command_handlers[] = { + { + .name = "linuxgpiod_jtag_nums", + .handler = linuxgpiod_handle_jtag_gpionums, + .mode = COMMAND_CONFIG, + .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)", + .usage = "tck tms tdi tdo", + }, + { + .name = "linuxgpiod_tck_num", + .handler = linuxgpiod_handle_jtag_gpionum_tck, + .mode = COMMAND_CONFIG, + .help = "gpio number for tck.", + .usage = "tck", + }, + { + .name = "linuxgpiod_tms_num", + .handler = linuxgpiod_handle_jtag_gpionum_tms, + .mode = COMMAND_CONFIG, + .help = "gpio number for tms.", + .usage = "tms", + }, + { + .name = "linuxgpiod_tdo_num", + .handler = linuxgpiod_handle_jtag_gpionum_tdo, + .mode = COMMAND_CONFIG, + .help = "gpio number for tdo.", + .usage = "tdo", + }, + { + .name = "linuxgpiod_tdi_num", + .handler = linuxgpiod_handle_jtag_gpionum_tdi, + .mode = COMMAND_CONFIG, + .help = "gpio number for tdi.", + .usage = "tdi", + }, + { + .name = "linuxgpiod_srst_num", + .handler = linuxgpiod_handle_jtag_gpionum_srst, + .mode = COMMAND_CONFIG, + .help = "gpio number for srst.", + .usage = "srst", + }, + { + .name = "linuxgpiod_trst_num", + .handler = linuxgpiod_handle_jtag_gpionum_trst, + .mode = COMMAND_CONFIG, + .help = "gpio number for trst.", + .usage = "trst", + }, + { + .name = "linuxgpiod_swd_nums", + .handler = linuxgpiod_handle_swd_gpionums, + .mode = COMMAND_CONFIG, + .help = "gpio numbers for swclk, swdio. (in that order)", + .usage = "swclk swdio", + }, + { + .name = "linuxgpiod_swclk_num", + .handler = linuxgpiod_handle_swd_gpionum_swclk, + .mode = COMMAND_CONFIG, + .help = "gpio number for swclk.", + .usage = "swclk", + }, + { + .name = "linuxgpiod_swdio_num", + .handler = linuxgpiod_handle_swd_gpionum_swdio, + .mode = COMMAND_CONFIG, + .help = "gpio number for swdio.", + .usage = "swdio", + }, + { + .name = "linuxgpiod_led_num", + .handler = linuxgpiod_handle_gpionum_led, + .mode = COMMAND_CONFIG, + .help = "gpio number for LED.", + .usage = "led", + }, + { + .name = "linuxgpiod_gpiochip", + .handler = linuxgpiod_handle_gpiochip, + .mode = COMMAND_CONFIG, + .help = "number of the gpiochip.", + .usage = "gpiochip", + }, + COMMAND_REGISTRATION_DONE +}; + +static const char *const linuxgpiod_transport[] = { "swd", "jtag", NULL }; + +static struct jtag_interface linuxgpiod_interface = { + .supported = DEBUG_CAP_TMS_SEQ, + .execute_queue = bitbang_execute_queue, +}; + +struct adapter_driver linuxgpiod_adapter_driver = { + .name = "linuxgpiod", + .transports = linuxgpiod_transport, + .commands = linuxgpiod_command_handlers, + + .init = linuxgpiod_init, + .quit = linuxgpiod_quit, + .reset = linuxgpiod_reset, + + .jtag_ops = &linuxgpiod_interface, + .swd_ops = &bitbang_swd, +}; diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c index 7488d9dd8..fe8b6b82c 100644 --- a/src/jtag/drivers/mpsse.c +++ b/src/jtag/drivers/mpsse.c @@ -404,13 +404,10 @@ void mpsse_close(struct mpsse_ctx *ctx) if (ctx->usb_ctx) libusb_exit(ctx->usb_ctx); bit_copy_discard(&ctx->read_queue); - if (ctx->write_buffer) - free(ctx->write_buffer); - if (ctx->read_buffer) - free(ctx->read_buffer); - if (ctx->read_chunk) - free(ctx->read_chunk); + free(ctx->write_buffer); + free(ctx->read_buffer); + free(ctx->read_chunk); free(ctx); } diff --git a/src/jtag/drivers/nulink_usb.c b/src/jtag/drivers/nulink_usb.c new file mode 100644 index 000000000..5fdbed3fc --- /dev/null +++ b/src/jtag/drivers/nulink_usb.c @@ -0,0 +1,1181 @@ +/*************************************************************************** + * Copyright (C) 2016-2017 by Nuvoton * + * Zale Yu * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * + ***************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* project specific includes */ +#include +#include +#include +#include +#include +#include + +#include + +#include + +#define NULINK_READ_TIMEOUT 1000 + +#define NULINK_HID_MAX_SIZE (64) +#define NULINK2_HID_MAX_SIZE (1024) +#define V6M_MAX_COMMAND_LENGTH (NULINK_HID_MAX_SIZE - 2) +#define V7M_MAX_COMMAND_LENGTH (NULINK_HID_MAX_SIZE - 3) + +#define NULINK2_USB_PID1 (0x5200) +#define NULINK2_USB_PID2 (0x5201) + +struct nulink_usb_handle_s { + hid_device *dev_handle; + uint16_t max_packet_size; + uint8_t usbcmdidx; + uint8_t cmdidx; + uint8_t cmdsize; + uint8_t cmdbuf[NULINK2_HID_MAX_SIZE + 1]; + uint8_t tempbuf[NULINK2_HID_MAX_SIZE]; + uint8_t databuf[NULINK2_HID_MAX_SIZE]; + uint32_t max_mem_packet; + uint16_t hardware_config; /* bit 0: 1:Nu-Link-Pro, 0:Nu-Link */ + + int (*xfer)(void *handle, uint8_t *buf, int size); + void (*init_buffer)(void *handle, uint32_t size); +}; + +/* ICE Command */ +#define CMD_READ_REG 0xB5UL +#define CMD_READ_RAM 0xB1UL +#define CMD_WRITE_REG 0xB8UL +#define CMD_WRITE_RAM 0xB9UL +#define CMD_CHECK_ID 0xA3UL +#define CMD_MCU_RESET 0xE2UL +#define CMD_CHECK_MCU_STOP 0xD8UL +#define CMD_MCU_STEP_RUN 0xD1UL +#define CMD_MCU_STOP_RUN 0xD2UL +#define CMD_MCU_FREE_RUN 0xD3UL +#define CMD_SET_CONFIG 0xA2UL + +#define ARM_SRAM_BASE 0x20000000UL + +#define HARDWARE_CONFIG_NULINKPRO 1 +#define HARDWARE_CONFIG_NULINK2 2 + +enum nulink_reset { + RESET_AUTO = 0, + RESET_HW = 1, + RESET_SYSRESETREQ = 2, + RESET_VECTRESET = 3, + RESET_FAST_RESCUE = 4, /* Rescue and erase the chip, need very fast speed */ +}; + +enum nulink_connect { + CONNECT_NORMAL = 0, /* Support all reset method */ + CONNECT_PRE_RESET = 1, /* Support all reset method */ + CONNECT_UNDER_RESET = 2, /* Support all reset method */ + CONNECT_NONE = 3, /* Support RESET_HW, (RESET_AUTO = RESET_HW) */ + CONNECT_DISCONNECT = 4, /* Support RESET_NONE, (RESET_AUTO = RESET_NONE) */ + CONNECT_ICP_MODE = 5 /* Support NUC505 ICP mode*/ +}; + +static int nulink_usb_xfer_rw(void *handle, uint8_t *buf) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + int ret = hid_write(h->dev_handle, h->cmdbuf, h->max_packet_size + 1); + if (ret < 0) { + LOG_ERROR("hid_write"); + return ERROR_FAIL; + } + + ret = hid_read_timeout(h->dev_handle, buf, h->max_packet_size, NULINK_READ_TIMEOUT); + if (ret < 0) { + LOG_ERROR("hid_read_timeout"); + return ERROR_FAIL; + } + return ERROR_OK; +} + +static int nulink1_usb_xfer(void *handle, uint8_t *buf, int size) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + int err = nulink_usb_xfer_rw(h, h->tempbuf); + + memcpy(buf, h->tempbuf + 2, V6M_MAX_COMMAND_LENGTH); + + return err; +} + +static int nulink2_usb_xfer(void *handle, uint8_t *buf, int size) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + int err = nulink_usb_xfer_rw(h, h->tempbuf); + + memcpy(buf, h->tempbuf + 3, V7M_MAX_COMMAND_LENGTH); + + return err; +} + +static void nulink1_usb_init_buffer(void *handle, uint32_t size) +{ + struct nulink_usb_handle_s *h = handle; + + h->cmdidx = 0; + + memset(h->cmdbuf, 0, h->max_packet_size + 1); + memset(h->tempbuf, 0, h->max_packet_size); + memset(h->databuf, 0, h->max_packet_size); + + h->cmdbuf[0] = 0; /* report number */ + h->cmdbuf[1] = ++h->usbcmdidx & 0x7F; + h->cmdbuf[2] = size; + h->cmdidx += 3; +} + +static void nulink2_usb_init_buffer(void *handle, uint32_t size) +{ + struct nulink_usb_handle_s *h = handle; + + h->cmdidx = 0; + + memset(h->cmdbuf, 0, h->max_packet_size + 1); + memset(h->tempbuf, 0, h->max_packet_size); + memset(h->databuf, 0, h->max_packet_size); + + h->cmdbuf[0] = 0; /* report number */ + h->cmdbuf[1] = ++h->usbcmdidx & 0x7F; + h_u16_to_le(h->cmdbuf + 2, size); + h->cmdidx += 4; +} + +static inline int nulink_usb_xfer(void *handle, uint8_t *buf, int size) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + return h->xfer(handle, buf, size); +} + +static inline void nulink_usb_init_buffer(void *handle, uint32_t size) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + h->init_buffer(handle, size); +} + +static int nulink_usb_version(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_version"); + + assert(handle); + + nulink_usb_init_buffer(handle, V6M_MAX_COMMAND_LENGTH); + + memset(h->cmdbuf + h->cmdidx, 0xFF, V6M_MAX_COMMAND_LENGTH); + h->cmdbuf[h->cmdidx + 4] = 0xA1; /* host_rev_num: 6561 */; + h->cmdbuf[h->cmdidx + 5] = 0x19; + + int res = nulink_usb_xfer(handle, h->databuf, h->cmdsize); + if (res != ERROR_OK) + return res; + + LOG_INFO("Nu-Link firmware_version %" PRIu32 ", product_id (0x%08" PRIx32 ")", + le_to_h_u32(h->databuf), + le_to_h_u32(h->databuf + 4 * 1)); + + const bool is_nulinkpro = !!(le_to_h_u32(h->databuf + 4 * 2) & 1); + if (is_nulinkpro) { + LOG_INFO("Adapter is Nu-Link-Pro, target_voltage_mv(%" PRIu16 "), usb_voltage_mv(%" PRIu16 ")", + le_to_h_u16(h->databuf + 4 * 3 + 0), + le_to_h_u16(h->databuf + 4 * 3 + 2)); + + h->hardware_config |= HARDWARE_CONFIG_NULINKPRO; + } else { + LOG_INFO("Adapter is Nu-Link"); + } + + return ERROR_OK; +} + +static int nulink_usb_idcode(void *handle, uint32_t *idcode) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_idcode"); + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_CHECK_ID); + h->cmdidx += 4; + + int res = nulink_usb_xfer(handle, h->databuf, 4 * 2); + if (res != ERROR_OK) + return res; + + *idcode = le_to_h_u32(h->databuf + 4 * 1); + + LOG_INFO("IDCODE: 0x%08" PRIX32, *idcode); + + return ERROR_OK; +} + +static int nulink_usb_write_debug_reg(void *handle, uint32_t addr, uint32_t val) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_write_debug_reg 0x%08" PRIX32 "0x%08" PRIX32, addr, val); + + nulink_usb_init_buffer(handle, 8 + 12 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_RAM); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = 1; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + /* u32Data */ + h_u32_to_le(h->cmdbuf + h->cmdidx, val); + h->cmdidx += 4; + /* u32Mask */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0x00000000UL); + h->cmdidx += 4; + + return nulink_usb_xfer(handle, h->databuf, 4 * 2); +} + +static enum target_state nulink_usb_state(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_CHECK_MCU_STOP); + h->cmdidx += 4; + + int res = nulink_usb_xfer(handle, h->databuf, 4 * 4); + if (res != ERROR_OK) + return TARGET_UNKNOWN; + + if (!le_to_h_u32(h->databuf + 4 * 2)) + return TARGET_HALTED; + else + return TARGET_RUNNING; +} + +static int nulink_usb_assert_srst(void *handle, int srst) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_assert_srst"); + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 4); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_MCU_RESET); + h->cmdidx += 4; + /* set reset type */ + h_u32_to_le(h->cmdbuf + h->cmdidx, RESET_SYSRESETREQ); + h->cmdidx += 4; + /* set connect type */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CONNECT_NORMAL); + h->cmdidx += 4; + /* set extMode */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + + return nulink_usb_xfer(handle, h->databuf, 4 * 4); +} + +static int nulink_usb_reset(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_reset"); + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 4); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_MCU_RESET); + h->cmdidx += 4; + /* set reset type */ + h_u32_to_le(h->cmdbuf + h->cmdidx, RESET_HW); + h->cmdidx += 4; + /* set connect type */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CONNECT_NORMAL); + h->cmdidx += 4; + /* set extMode */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + + return nulink_usb_xfer(handle, h->databuf, 4 * 4); +} + +static int nulink_usb_run(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_run"); + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_MCU_FREE_RUN); + h->cmdidx += 4; + + return nulink_usb_xfer(handle, h->databuf, 4 * 4); +} + +static int nulink_usb_halt(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_halt"); + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_MCU_STOP_RUN); + h->cmdidx += 4; + + int res = nulink_usb_xfer(handle, h->databuf, 4 * 4); + + LOG_DEBUG("Nu-Link stop_pc 0x%08" PRIx32, le_to_h_u32(h->databuf + 4)); + + return res; +} + +static int nulink_usb_step(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_step"); + + assert(handle); + + nulink_usb_init_buffer(handle, 4 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_MCU_STEP_RUN); + h->cmdidx += 4; + + int res = nulink_usb_xfer(handle, h->databuf, 4 * 4); + + LOG_DEBUG("Nu-Link pc 0x%08" PRIx32, le_to_h_u32(h->databuf + 4)); + + return res; +} + +static int nulink_usb_read_reg(void *handle, int num, uint32_t *val) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + nulink_usb_init_buffer(handle, 8 + 12 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_REG); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = 1; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0xFF; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, num); + h->cmdidx += 4; + /* u32Data */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + /* u32Mask */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFFFFFFFFUL); + h->cmdidx += 4; + + int res = nulink_usb_xfer(handle, h->databuf, 4 * 2); + + *val = le_to_h_u32(h->databuf + 4 * 1); + + return res; +} + +static int nulink_usb_write_reg(void *handle, int num, uint32_t val) +{ + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + nulink_usb_init_buffer(handle, 8 + 12 * 1); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_REG); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = 1; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, num); + h->cmdidx += 4; + /* u32Data */ + h_u32_to_le(h->cmdbuf + h->cmdidx, val); + h->cmdidx += 4; + /* u32Mask */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0x00000000UL); + h->cmdidx += 4; + + return nulink_usb_xfer(handle, h->databuf, 4 * 2); +} + +static int nulink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len, + uint8_t *buffer) +{ + int res = ERROR_OK; + uint32_t offset = 0; + uint32_t bytes_remaining = 12; + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_read_mem8: addr 0x%08" PRIx32 ", len %" PRId16, addr, len); + + assert(handle); + + /* check whether data is word aligned */ + if (addr % 4) { + uint32_t aligned_addr = addr / 4; + aligned_addr = aligned_addr * 4; + offset = addr - aligned_addr; + LOG_DEBUG("nulink_usb_read_mem8: unaligned address addr 0x%08" PRIx32 + "/aligned addr 0x%08" PRIx32 "offset %" PRIu32, + addr, aligned_addr, offset); + + addr = aligned_addr; + } + + while (len) { + unsigned int count; + + if (len < bytes_remaining) + bytes_remaining = len; + + if (len < 4) + count = 1; + else + count = 2; + + nulink_usb_init_buffer(handle, 8 + 12 * count); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_RAM); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = count; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0xFF; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + + for (unsigned int i = 0; i < count; i++) { + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + /* u32Data */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + /* u32Mask */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFFFFFFFFUL); + h->cmdidx += 4; + /* proceed to the next one */ + addr += 4; + } + + res = nulink_usb_xfer(handle, h->databuf, 4 * count * 2); + if (res != ERROR_OK) + break; + + /* fill in the output buffer */ + for (unsigned int i = 0; i < count; i++) { + if (i == 0) + memcpy(buffer, h->databuf + 4 + offset, len); + else + memcpy(buffer + 2 * i, h->databuf + 4 * (2 * i + 1), len - 2); + } + + if (len >= bytes_remaining) + len -= bytes_remaining; + } + + return res; +} + +static int nulink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len, + const uint8_t *buffer) +{ + int res = ERROR_OK; + uint32_t offset = 0; + uint32_t bytes_remaining = 12; + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_write_mem8: addr 0x%08" PRIx32 ", len %" PRIu16, addr, len); + + assert(handle); + + /* check whether data is word aligned */ + if (addr % 4) { + uint32_t aligned_addr = addr / 4; + aligned_addr = aligned_addr * 4; + offset = addr - aligned_addr; + LOG_DEBUG("nulink_usb_write_mem8: address not aligned. addr(0x%08" PRIx32 + ")/aligned_addr(0x%08" PRIx32 ")/offset(%" PRIu32 ")", + addr, aligned_addr, offset); + + addr = aligned_addr; + } + + while (len) { + unsigned int count; + + if (len < bytes_remaining) + bytes_remaining = len; + + if (len < 4) + count = 1; + else + count = 2; + + nulink_usb_init_buffer(handle, 8 + 12 * count); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_RAM); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = count; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + + for (unsigned int i = 0; i < count; i++) { + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + /* u32Data */ + uint32_t u32buffer = buf_get_u32(buffer, 0, len * 8); + u32buffer = (u32buffer << offset * 8); + h_u32_to_le(h->cmdbuf + h->cmdidx, u32buffer); + h->cmdidx += 4; + /* u32Mask */ + if (i == 0) { + if (offset == 0) { + if (len == 1) { + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFFFFFF00UL); + LOG_DEBUG("nulink_usb_write_mem8: count(%u), mask: 0xFFFFFF00", i); + } else { + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFFFF0000UL); + LOG_DEBUG("nulink_usb_write_mem8: count(%u), mask: 0xFFFF0000", i); + } + } else { + if (len == 1) { + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFF00FFFFUL); + LOG_DEBUG("nulink_usb_write_mem8: count(%u), mask: 0xFF00FFFF", i); + + } else { + h_u32_to_le(h->cmdbuf + h->cmdidx, 0x0000FFFFUL); + LOG_DEBUG("nulink_usb_write_mem8: count(%u), mask: 0x0000FFFF", i); + } + } + } else { + if (len == 4) { + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFFFF0000UL); + LOG_DEBUG("nulink_usb_write_mem8: count(%u), mask: 0xFFFF0000", i); + } else { + h_u32_to_le(h->cmdbuf + h->cmdidx, 0x00000000UL); + LOG_DEBUG("nulink_usb_write_mem8: count(%u), mask: 0x00000000", i); + } + } + h->cmdidx += 4; + + /* proceed to the next one */ + addr += 4; + buffer += 4; + } + + res = nulink_usb_xfer(handle, h->databuf, 4 * count * 2); + if (res != ERROR_OK) + break; + + if (len >= bytes_remaining) + len -= bytes_remaining; + } + + return res; +} + +static int nulink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len, + uint8_t *buffer) +{ + int res = ERROR_OK; + uint32_t bytes_remaining = 12; + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + /* data must be a multiple of 4 and word aligned */ + if (len % 4 || addr % 4) { + LOG_ERROR("Invalid data alignment"); + return ERROR_TARGET_UNALIGNED_ACCESS; + } + + while (len) { + if (len < bytes_remaining) + bytes_remaining = len; + + unsigned int count = bytes_remaining / 4; + + nulink_usb_init_buffer(handle, 8 + 12 * count); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_RAM); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = count; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0xFF; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + + for (unsigned int i = 0; i < count; i++) { + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + /* u32Data */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + /* u32Mask */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0xFFFFFFFFUL); + h->cmdidx += 4; + /* proceed to the next one */ + addr += 4; + } + + res = nulink_usb_xfer(handle, h->databuf, 4 * count * 2); + + /* fill in the output buffer */ + for (unsigned int i = 0; i < count; i++) { + memcpy(buffer, h->databuf + 4 * (2 * i + 1), 4); + buffer += 4; + } + + if (len >= bytes_remaining) + len -= bytes_remaining; + else + len = 0; + } + + return res; +} + +static int nulink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len, + const uint8_t *buffer) +{ + int res = ERROR_OK; + uint32_t bytes_remaining = 12; + struct nulink_usb_handle_s *h = handle; + + assert(handle); + + /* data must be a multiple of 4 and word aligned */ + if (len % 4 || addr % 4) { + LOG_ERROR("Invalid data alignment"); + return ERROR_TARGET_UNALIGNED_ACCESS; + } + + while (len) { + if (len < bytes_remaining) + bytes_remaining = len; + + unsigned int count = bytes_remaining / 4; + + nulink_usb_init_buffer(handle, 8 + 12 * count); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_WRITE_RAM); + h->cmdidx += 4; + /* Count of registers */ + h->cmdbuf[h->cmdidx] = count; + h->cmdidx += 1; + /* Array of bool value (u8ReadOld) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* Array of bool value (u8Verify) */ + h->cmdbuf[h->cmdidx] = 0x00; + h->cmdidx += 1; + /* ignore */ + h->cmdbuf[h->cmdidx] = 0; + h->cmdidx += 1; + + for (unsigned int i = 0; i < count; i++) { + /* u32Addr */ + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + /* u32Data */ + uint32_t u32buffer = buf_get_u32(buffer, 0, 32); + h_u32_to_le(h->cmdbuf + h->cmdidx, u32buffer); + h->cmdidx += 4; + /* u32Mask */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0x00000000); + h->cmdidx += 4; + + /* proceed to the next one */ + addr += 4; + buffer += 4; + } + + res = nulink_usb_xfer(handle, h->databuf, 4 * count * 2); + + if (len >= bytes_remaining) + len -= bytes_remaining; + else + len = 0; + } + + return res; +} + +static uint32_t nulink_max_block_size(uint32_t tar_autoincr_block, uint32_t address) +{ + uint32_t max_tar_block = (tar_autoincr_block - ((tar_autoincr_block - 1) & address)); + + if (max_tar_block == 0) + max_tar_block = 4; + + return max_tar_block; +} + +static int nulink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, + uint32_t count, uint8_t *buffer) +{ + int retval = ERROR_OK; + struct nulink_usb_handle_s *h = handle; + + /* calculate byte count */ + count *= size; + + while (count) { + uint32_t bytes_remaining = nulink_max_block_size(h->max_mem_packet, addr); + + if (count < bytes_remaining) + bytes_remaining = count; + + if (bytes_remaining >= 4) + size = 4; + + /* the nulink only supports 8/32bit memory read/writes + * honour 32bit, all others will be handled as 8bit access */ + if (size == 4) { + /* When in jtag mode the nulink uses the auto-increment functinality. + * However it expects us to pass the data correctly, this includes + * alignment and any page boundaries. We already do this as part of the + * adi_v5 implementation, but the nulink is a hla adapter and so this + * needs implementiong manually. + * currently this only affects jtag mode, they do single + * access in SWD mode - but this may change and so we do it for both modes */ + + /* we first need to check for any unaligned bytes */ + if (addr % 4) { + uint32_t head_bytes = 4 - (addr % 4); + retval = nulink_usb_read_mem8(handle, addr, head_bytes, buffer); + if (retval != ERROR_OK) + return retval; + buffer += head_bytes; + addr += head_bytes; + count -= head_bytes; + bytes_remaining -= head_bytes; + } + + if (bytes_remaining % 4) + retval = nulink_usb_read_mem(handle, addr, 1, bytes_remaining, buffer); + else + retval = nulink_usb_read_mem32(handle, addr, bytes_remaining, buffer); + } else { + retval = nulink_usb_read_mem8(handle, addr, bytes_remaining, buffer); + } + + if (retval != ERROR_OK) + return retval; + + buffer += bytes_remaining; + addr += bytes_remaining; + count -= bytes_remaining; + } + + return retval; +} + +static int nulink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, + uint32_t count, const uint8_t *buffer) +{ + int retval = ERROR_OK; + struct nulink_usb_handle_s *h = handle; + + if (addr < ARM_SRAM_BASE) { + LOG_DEBUG("nulink_usb_write_mem: address below ARM_SRAM_BASE, not supported.\n"); + return retval; + } + + /* calculate byte count */ + count *= size; + + while (count) { + uint32_t bytes_remaining = nulink_max_block_size(h->max_mem_packet, addr); + + if (count < bytes_remaining) + bytes_remaining = count; + + if (bytes_remaining >= 4) + size = 4; + + /* the nulink only supports 8/32bit memory read/writes + * honour 32bit, all others will be handled as 8bit access */ + if (size == 4) { + /* When in jtag mode the nulink uses the auto-increment functinality. + * However it expects us to pass the data correctly, this includes + * alignment and any page boundaries. We already do this as part of the + * adi_v5 implementation, but the nulink is a hla adapter and so this + * needs implementiong manually. + * currently this only affects jtag mode, do single + * access in SWD mode - but this may change and so we do it for both modes */ + + /* we first need to check for any unaligned bytes */ + if (addr % 4) { + uint32_t head_bytes = 4 - (addr % 4); + retval = nulink_usb_write_mem8(handle, addr, head_bytes, buffer); + if (retval != ERROR_OK) + return retval; + buffer += head_bytes; + addr += head_bytes; + count -= head_bytes; + bytes_remaining -= head_bytes; + } + + if (bytes_remaining % 4) + retval = nulink_usb_write_mem(handle, addr, 1, bytes_remaining, buffer); + else + retval = nulink_usb_write_mem32(handle, addr, bytes_remaining, buffer); + + } else { + retval = nulink_usb_write_mem8(handle, addr, bytes_remaining, buffer); + } + + if (retval != ERROR_OK) + return retval; + + buffer += bytes_remaining; + addr += bytes_remaining; + count -= bytes_remaining; + } + + return retval; +} + +static int nulink_usb_override_target(const char *targetname) +{ + LOG_DEBUG("nulink_usb_override_target"); + + return !strcmp(targetname, "cortex_m"); +} + +static int nulink_speed(void *handle, int khz, bool query) +{ + struct nulink_usb_handle_s *h = handle; + unsigned long max_ice_clock = khz; + + LOG_DEBUG("nulink_speed: query %s", query ? "yes" : "no"); + + if (max_ice_clock > 12000) + max_ice_clock = 12000; + else if ((max_ice_clock == 3 * 512) || (max_ice_clock == 1500)) + max_ice_clock = 1500; + else if (max_ice_clock >= 1000) + max_ice_clock = max_ice_clock / 1000 * 1000; + else + max_ice_clock = max_ice_clock / 100 * 100; + + LOG_DEBUG("Nu-Link nulink_speed: %lu", max_ice_clock); + + if (!query) { + nulink_usb_init_buffer(handle, 4 * 6); + /* set command ID */ + h_u32_to_le(h->cmdbuf + h->cmdidx, CMD_SET_CONFIG); + h->cmdidx += 4; + /* set max SWD clock */ + h_u32_to_le(h->cmdbuf + h->cmdidx, max_ice_clock); + h->cmdidx += 4; + /* chip type: NUC_CHIP_TYPE_GENERAL_V6M */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + /* IO voltage */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 5000); + h->cmdidx += 4; + /* If supply voltage to target or not */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 0); + h->cmdidx += 4; + /* USB_FUNC_E: USB_FUNC_HID_BULK */ + h_u32_to_le(h->cmdbuf + h->cmdidx, 2); + h->cmdidx += 4; + + nulink_usb_xfer(handle, h->databuf, 4 * 3); + + LOG_DEBUG("nulink_speed: h->hardware_config(%" PRId16 ")", h->hardware_config); + if (h->hardware_config & HARDWARE_CONFIG_NULINKPRO) + LOG_INFO("Nu-Link target_voltage_mv[0](%04" PRIx16 "), target_voltage_mv[1](%04" PRIx16 + "), target_voltage_mv[2](%04" PRIx16 "), if_target_power_supplied(%d)", + le_to_h_u16(h->databuf + 4 * 1 + 0), + le_to_h_u16(h->databuf + 4 * 1 + 2), + le_to_h_u16(h->databuf + 4 * 2 + 0), + le_to_h_u16(h->databuf + 4 * 2 + 2) & 1); + } + + return max_ice_clock; +} + +static int nulink_usb_close(void *handle) +{ + struct nulink_usb_handle_s *h = handle; + + LOG_DEBUG("nulink_usb_close"); + + if (h && h->dev_handle) + hid_close(h->dev_handle); + + free(h); + + hid_exit(); + + return ERROR_OK; +} + +static int nulink_usb_open(struct hl_interface_param_s *param, void **fd) +{ + struct hid_device_info *devs, *cur_dev; + uint16_t target_vid = 0; + uint16_t target_pid = 0; + wchar_t *target_serial = NULL; + + LOG_DEBUG("nulink_usb_open"); + + if (param->transport != HL_TRANSPORT_SWD) + return TARGET_UNKNOWN; + + if (!param->vid[0] && !param->pid[0]) { + LOG_ERROR("Missing vid/pid"); + return ERROR_FAIL; + } + + if (hid_init() != 0) { + LOG_ERROR("unable to open HIDAPI"); + return ERROR_FAIL; + } + + struct nulink_usb_handle_s *h = calloc(1, sizeof(*h)); + if (!h) { + LOG_ERROR("Out of memory"); + goto error_open; + } + + if (param->serial) { + size_t len = mbstowcs(NULL, param->serial, 0); + + target_serial = calloc(len + 1, sizeof(wchar_t)); + if (!target_serial) { + LOG_ERROR("Out of memory"); + goto error_open; + } + + if (mbstowcs(target_serial, param->serial, len + 1) == (size_t)(-1)) { + LOG_WARNING("unable to convert serial"); + free(target_serial); + target_serial = NULL; + } + } + + devs = hid_enumerate(0, 0); + cur_dev = devs; + while (cur_dev) { + bool found = false; + + for (unsigned int i = 0; param->vid[i] || param->pid[i]; i++) { + if (param->vid[i] == cur_dev->vendor_id && param->pid[i] == cur_dev->product_id) { + found = true; + break; + } + } + + if (found) { + if (!target_serial) + break; + if (cur_dev->serial_number && wcscmp(target_serial, cur_dev->serial_number) == 0) + break; + } + + cur_dev = cur_dev->next; + } + if (cur_dev) { + target_vid = cur_dev->vendor_id; + target_pid = cur_dev->product_id; + } + + hid_free_enumeration(devs); + + if (target_vid == 0 && target_pid == 0) { + LOG_ERROR("unable to find Nu-Link"); + goto error_open; + } + + hid_device *dev = hid_open(target_vid, target_pid, target_serial); + if (!dev) { + LOG_ERROR("unable to open Nu-Link device 0x%" PRIx16 ":0x%" PRIx16, target_vid, target_pid); + goto error_open; + } + + h->dev_handle = dev; + h->usbcmdidx = 0; + + switch (target_pid) { + case NULINK2_USB_PID1: + case NULINK2_USB_PID2: + h->hardware_config = HARDWARE_CONFIG_NULINK2; + h->max_packet_size = NULINK2_HID_MAX_SIZE; + h->init_buffer = nulink2_usb_init_buffer; + h->xfer = nulink2_usb_xfer; + break; + default: + h->hardware_config = 0; + h->max_packet_size = NULINK_HID_MAX_SIZE; + h->init_buffer = nulink1_usb_init_buffer; + h->xfer = nulink1_usb_xfer; + break; + } + + /* get the device version */ + h->cmdsize = 4 * 5; + int err = nulink_usb_version(h); + if (err != ERROR_OK) { + LOG_DEBUG("nulink_usb_version failed with cmdSize(4 * 5)"); + h->cmdsize = 4 * 6; + err = nulink_usb_version(h); + if (err != ERROR_OK) + LOG_DEBUG("nulink_usb_version failed with cmdSize(4 * 6)"); + } + + /* SWD clock rate : 1MHz */ + nulink_speed(h, 1000, false); + + /* get cpuid, so we can determine the max page size + * start with a safe default */ + h->max_mem_packet = (1 << 10); + + LOG_DEBUG("nulink_usb_open: we manually perform nulink_usb_reset"); + nulink_usb_reset(h); + + *fd = h; + + free(target_serial); + return ERROR_OK; + +error_open: + nulink_usb_close(h); + free(target_serial); + + return ERROR_FAIL; +} + +struct hl_layout_api_s nulink_usb_layout_api = { + .open = nulink_usb_open, + .close = nulink_usb_close, + .idcode = nulink_usb_idcode, + .state = nulink_usb_state, + .reset = nulink_usb_reset, + .assert_srst = nulink_usb_assert_srst, + .run = nulink_usb_run, + .halt = nulink_usb_halt, + .step = nulink_usb_step, + .read_reg = nulink_usb_read_reg, + .write_reg = nulink_usb_write_reg, + .read_mem = nulink_usb_read_mem, + .write_mem = nulink_usb_write_mem, + .write_debug_reg = nulink_usb_write_debug_reg, + .override_target = nulink_usb_override_target, + .speed = nulink_speed, +}; diff --git a/src/jtag/drivers/opendous.c b/src/jtag/drivers/opendous.c index bb223f417..f0e4f566d 100644 --- a/src/jtag/drivers/opendous.c +++ b/src/jtag/drivers/opendous.c @@ -310,7 +310,7 @@ static int opendous_execute_queue(void) break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %" PRIi32, cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); opendous_tap_execute(); jtag_sleep(cmd->cmd.sleep->us); break; @@ -386,25 +386,17 @@ static int opendous_quit(void) { opendous_usb_close(opendous_jtag_handle); - if (usb_out_buffer) { - free(usb_out_buffer); - usb_out_buffer = NULL; - } + free(usb_out_buffer); + usb_out_buffer = NULL; - if (usb_in_buffer) { - free(usb_in_buffer); - usb_in_buffer = NULL; - } + free(usb_in_buffer); + usb_in_buffer = NULL; - if (pending_scan_results_buffer) { - free(pending_scan_results_buffer); - pending_scan_results_buffer = NULL; - } + free(pending_scan_results_buffer); + pending_scan_results_buffer = NULL; - if (opendous_type) { - free(opendous_type); - opendous_type = NULL; - } + free(opendous_type); + opendous_type = NULL; return ERROR_OK; } @@ -596,7 +588,7 @@ void opendous_tap_append_step(int tms, int tdi) if (!bits) tms_buffer[tap_index] = 0; - tms_buffer[tap_index] |= (_tdi << bits)|(_tms << (bits + 1)) ; + tms_buffer[tap_index] |= (_tdi << bits)|(_tms << (bits + 1)); tap_length++; } else LOG_ERROR("opendous_tap_append_step, overflow"); @@ -697,8 +689,7 @@ int opendous_tap_execute(void) return ERROR_JTAG_QUEUE_FAILED; } - if (pending_scan_result->buffer != NULL) - free(pending_scan_result->buffer); + free(pending_scan_result->buffer); } opendous_tap_init(); diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c index 7eab5c130..2cf5751d6 100644 --- a/src/jtag/drivers/openjtag.c +++ b/src/jtag/drivers/openjtag.c @@ -591,8 +591,7 @@ static int openjtag_execute_tap_queue(void) #endif jtag_read_buffer(buffer, openjtag_scan_result_buffer[res_count].command); - if (openjtag_scan_result_buffer[res_count].buffer) - free(openjtag_scan_result_buffer[res_count].buffer); + free(openjtag_scan_result_buffer[res_count].buffer); res_count++; } diff --git a/src/jtag/drivers/osbdm.c b/src/jtag/drivers/osbdm.c index dc236660e..5c43d3244 100644 --- a/src/jtag/drivers/osbdm.c +++ b/src/jtag/drivers/osbdm.c @@ -274,7 +274,7 @@ static int osbdm_swap(struct osbdm *osbdm, void *tms, void *tdi, return ERROR_FAIL; } - /* Copy TDO responce + /* Copy TDO response */ uint8_t *buffer = osbdm->buffer + 4; for (int bit_idx = 0; bit_idx < length; ) { diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c index b3abd1205..b203c828b 100644 --- a/src/jtag/drivers/parport.c +++ b/src/jtag/drivers/parport.c @@ -392,10 +392,8 @@ static int parport_quit(void) parport_write_data(); } - if (parport_cable) { - free(parport_cable); - parport_cable = NULL; - } + free(parport_cable); + parport_cable = NULL; return ERROR_OK; } diff --git a/src/jtag/drivers/presto.c b/src/jtag/drivers/presto.c index 3849a27f9..6c3a187db 100644 --- a/src/jtag/drivers/presto.c +++ b/src/jtag/drivers/presto.c @@ -351,7 +351,7 @@ static int presto_bitq_out(int tms, int tdi, int tdo_req) unsigned char cmd; if (presto->jtag_tck == 0) - presto_sendbyte(0xA4); /* LED idicator - JTAG active */ + presto_sendbyte(0xA4); /* LED indicator - JTAG active */ else if (presto->jtag_speed == 0 && !tdo_req && tms == presto->jtag_tms) { presto->jtag_tdi_data |= (tdi != 0) << presto->jtag_tdi_count; @@ -392,7 +392,7 @@ static int presto_bitq_flush(void) presto_tdi_flush(); presto_tck_idle(); - presto_sendbyte(0xA0); /* LED idicator - JTAG idle */ + presto_sendbyte(0xA0); /* LED indicator - JTAG idle */ return presto_flush(); } @@ -511,8 +511,7 @@ static char *presto_serial; COMMAND_HANDLER(presto_handle_serial_command) { if (CMD_ARGC == 1) { - if (presto_serial) - free(presto_serial); + free(presto_serial); presto_serial = strdup(CMD_ARGV[0]); } else return ERROR_COMMAND_SYNTAX_ERROR; @@ -553,10 +552,8 @@ static int presto_jtag_quit(void) presto_close(); LOG_INFO("PRESTO closed"); - if (presto_serial) { - free(presto_serial); - presto_serial = NULL; - } + free(presto_serial); + presto_serial = NULL; return ERROR_OK; } diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c index e0533997c..be4ad08bf 100644 --- a/src/jtag/drivers/rlink.c +++ b/src/jtag/drivers/rlink.c @@ -564,7 +564,7 @@ static struct { } dtc_queue; /* - * The tap state queue is for accumulating TAP state changes wiithout needlessly + * The tap state queue is for accumulating TAP state changes without needlessly * flushing the dtc_queue. When it fills or is run, it adds the accumulated bytes to * the dtc_queue. */ @@ -1340,7 +1340,7 @@ static int rlink_execute_queue(void) retval = ERROR_FAIL; break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); jtag_sleep(cmd->cmd.sleep->us); break; default: @@ -1358,7 +1358,7 @@ static int rlink_execute_queue(void) retval = tmp_retval; #ifndef AUTOMATIC_BUSY_LED - /* turn LED onff */ + /* turn LED off */ ep1_generic_commandl(pHDev, 2, EP1_CMD_SET_PORTD_LEDS, ~0 diff --git a/src/jtag/drivers/rshim.c b/src/jtag/drivers/rshim.c index c718af5d2..246e931c2 100644 --- a/src/jtag/drivers/rshim.c +++ b/src/jtag/drivers/rshim.c @@ -409,7 +409,7 @@ static int rshim_connect(struct adiv5_dap *dap) } /* - * Set read/write operation via the device file. Funtion pointers + * Set read/write operation via the device file. Function pointers * are used here so more ways like remote accessing via socket could * be added later. */ diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 72975d5ac..ce55b94a5 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -218,7 +218,7 @@ struct stlink_usb_handle_s { uint32_t address STLINK_SWIM_RESET - send syncronization seq (16us low, response 64 clocks low) + send synchronization seq (16us low, response 64 clocks low) */ #define STLINK_SWIM_ENTER 0x00 #define STLINK_SWIM_EXIT 0x01 @@ -1465,7 +1465,7 @@ static int stlink_swim_status(void *handle) } /* the purpose of this function is unknown... - capabilites? anyway for swim v6 it returns + capabilities? anyway for swim v6 it returns 0001020600000000 */ __attribute__((unused)) @@ -1559,7 +1559,7 @@ static int stlink_swim_generate_rst(void *handle) } /* - send resyncronize sequence + send resynchronize sequence swim is pulled low for 16us reply is 64 clks low */ @@ -3092,7 +3092,7 @@ static int stlink_read_dap_register(void *handle, unsigned short dap_port, retval = stlink_usb_xfer_errcheck(handle, h->databuf, 8); *val = le_to_h_u32(h->databuf + 4); - LOG_DEBUG_IO("dap_port_read = %d, addr = 0x%x, value = 0x%x", dap_port, addr, *val); + LOG_DEBUG_IO("dap_port_read = %d, addr = 0x%x, value = 0x%" PRIx32, dap_port, addr, *val); return retval; } @@ -3107,7 +3107,7 @@ static int stlink_write_dap_register(void *handle, unsigned short dap_port, if (!(h->version.flags & STLINK_F_HAS_DAP_REG)) return ERROR_COMMAND_NOTFOUND; - LOG_DEBUG_IO("dap_write port = %d, addr = 0x%x, value = 0x%x", dap_port, addr, val); + LOG_DEBUG_IO("dap_write port = %d, addr = 0x%x, value = 0x%" PRIx32, dap_port, addr, val); stlink_usb_init_buffer(handle, h->rx_ep, 16); h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND; h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITE_DAP_REG; @@ -3531,7 +3531,7 @@ static int stlink_swim_op_read_mem(uint32_t addr, uint32_t size, int retval; uint32_t bytes_remaining; - LOG_DEBUG_IO("read at 0x%08x len %d*0x%08x", addr, size, count); + LOG_DEBUG_IO("read at 0x%08" PRIx32 " len %" PRIu32 "*0x%08" PRIx32, addr, size, count); count *= size; while (count) { @@ -3554,7 +3554,7 @@ static int stlink_swim_op_write_mem(uint32_t addr, uint32_t size, int retval; uint32_t bytes_remaining; - LOG_DEBUG_IO("write at 0x%08x len %d*0x%08x", addr, size, count); + LOG_DEBUG_IO("write at 0x%08" PRIx32 " len %" PRIu32 "*0x%08" PRIx32, addr, size, count); count *= size; while (count) { diff --git a/src/jtag/drivers/sysfsgpio.c b/src/jtag/drivers/sysfsgpio.c index a4d7ad9ec..78a4c5b77 100644 --- a/src/jtag/drivers/sysfsgpio.c +++ b/src/jtag/drivers/sysfsgpio.c @@ -29,7 +29,7 @@ * * A gpio is required for tck, tms, tdi and tdo. One or both of srst and trst * must be also be specified. The required jtag gpios are specified via the - * sysfsgpio_jtag_nums command or the relevant sysfsgpio_XXX_num commang. + * sysfsgpio_jtag_nums command or the relevant sysfsgpio_XXX_num commands. * The srst and trst gpios are set via the sysfsgpio_srst_num and * sysfsgpio_trst_num respectively. GPIO numbering follows the kernel * convention of starting from 0. @@ -54,6 +54,7 @@ #include #include +#include #include "bitbang.h" /* @@ -126,7 +127,7 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high) LOG_WARNING("gpio %d is already exported", gpio); } else { LOG_ERROR("Couldn't export gpio %d", gpio); - perror("sysfsgpio: "); + LOG_ERROR("sysfsgpio: %s", strerror(errno)); return ERROR_FAIL; } } @@ -146,7 +147,7 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high) } if (ret < 0) { LOG_ERROR("Couldn't set direction for gpio %d", gpio); - perror("sysfsgpio: "); + LOG_ERROR("sysfsgpio: %s", strerror(errno)); unexport_sysfs_gpio(gpio); return ERROR_FAIL; } @@ -163,7 +164,7 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high) } if (ret < 0) { LOG_ERROR("Couldn't open value for gpio %d", gpio); - perror("sysfsgpio: "); + LOG_ERROR("sysfsgpio: %s", strerror(errno)); unexport_sysfs_gpio(gpio); } @@ -207,7 +208,7 @@ static void sysfsgpio_swdio_drive(bool is_output) ret = open_write_close(buf, is_output ? "high" : "in"); if (ret < 0) { LOG_ERROR("Couldn't set direction for gpio %d", swdio_gpio); - perror("sysfsgpio: "); + LOG_ERROR("sysfsgpio: %s", strerror(errno)); } last_stored = false; @@ -230,7 +231,7 @@ static int sysfsgpio_swdio_read(void) return buf[0] != '0'; } -static void sysfsgpio_swdio_write(int swclk, int swdio) +static int sysfsgpio_swd_write(int swclk, int swdio) { const char one[] = "1"; const char zero[] = "0"; @@ -255,6 +256,8 @@ static void sysfsgpio_swdio_write(int swclk, int swdio) last_swdio = swdio; last_swclk = swclk; last_stored = true; + + return ERROR_OK; } /* @@ -287,11 +290,6 @@ static bb_value_t sysfsgpio_read(void) */ static int sysfsgpio_write(int tck, int tms, int tdi) { - if (swd_mode) { - sysfsgpio_swdio_write(tck, tdi); - return ERROR_OK; - } - const char one[] = "1"; const char zero[] = "0"; @@ -572,6 +570,7 @@ static struct bitbang_interface sysfsgpio_bitbang = { .write = sysfsgpio_write, .swdio_read = sysfsgpio_swdio_read, .swdio_drive = sysfsgpio_swdio_drive, + .swd_write = sysfsgpio_swd_write, .blink = 0 }; @@ -588,14 +587,18 @@ static void cleanup_fd(int fd, int gpio) static void cleanup_all_fds(void) { - cleanup_fd(tck_fd, tck_gpio); - cleanup_fd(tms_fd, tms_gpio); - cleanup_fd(tdi_fd, tdi_gpio); - cleanup_fd(tdo_fd, tdo_gpio); - cleanup_fd(trst_fd, trst_gpio); + if (transport_is_jtag()) { + cleanup_fd(tck_fd, tck_gpio); + cleanup_fd(tms_fd, tms_gpio); + cleanup_fd(tdi_fd, tdi_gpio); + cleanup_fd(tdo_fd, tdo_gpio); + cleanup_fd(trst_fd, trst_gpio); + } + if (transport_is_swd()) { + cleanup_fd(swclk_fd, swclk_gpio); + cleanup_fd(swdio_fd, swdio_gpio); + } cleanup_fd(srst_fd, srst_gpio); - cleanup_fd(swclk_fd, swclk_gpio); - cleanup_fd(swdio_fd, swdio_gpio); } static bool sysfsgpio_jtag_mode_possible(void) @@ -626,52 +629,54 @@ static int sysfsgpio_init(void) LOG_INFO("SysfsGPIO JTAG/SWD bitbang driver"); - if (sysfsgpio_jtag_mode_possible()) { - if (sysfsgpio_swd_mode_possible()) - LOG_INFO("JTAG and SWD modes enabled"); - else - LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)"); - } else if (sysfsgpio_swd_mode_possible()) { - LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)"); - } else { - LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode"); - return ERROR_JTAG_INIT_FAILED; - } - - /* * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high. * For SWD, SWCLK and SWDIO are configures as output high. */ - if (tck_gpio >= 0) { + + if (transport_is_jtag()) { + if (!sysfsgpio_jtag_mode_possible()) { + LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode"); + return ERROR_JTAG_INIT_FAILED; + } + tck_fd = setup_sysfs_gpio(tck_gpio, 1, 0); if (tck_fd < 0) goto out_error; - } - if (tms_gpio >= 0) { tms_fd = setup_sysfs_gpio(tms_gpio, 1, 1); if (tms_fd < 0) goto out_error; - } - if (tdi_gpio >= 0) { tdi_fd = setup_sysfs_gpio(tdi_gpio, 1, 0); if (tdi_fd < 0) goto out_error; - } - if (tdo_gpio >= 0) { tdo_fd = setup_sysfs_gpio(tdo_gpio, 0, 0); if (tdo_fd < 0) goto out_error; + + /* assume active low*/ + if (trst_gpio >= 0) { + trst_fd = setup_sysfs_gpio(trst_gpio, 1, 1); + if (trst_fd < 0) + goto out_error; + } } - /* assume active low*/ - if (trst_gpio >= 0) { - trst_fd = setup_sysfs_gpio(trst_gpio, 1, 1); - if (trst_fd < 0) + if (transport_is_swd()) { + if (!sysfsgpio_swd_mode_possible()) { + LOG_ERROR("Require swclk and swdio gpio for SWD mode"); + return ERROR_JTAG_INIT_FAILED; + } + + swclk_fd = setup_sysfs_gpio(swclk_gpio, 1, 0); + if (swclk_fd < 0) + goto out_error; + + swdio_fd = setup_sysfs_gpio(swdio_gpio, 1, 0); + if (swdio_fd < 0) goto out_error; } @@ -682,25 +687,6 @@ static int sysfsgpio_init(void) goto out_error; } - if (swclk_gpio >= 0) { - swclk_fd = setup_sysfs_gpio(swclk_gpio, 1, 0); - if (swclk_fd < 0) - goto out_error; - } - - if (swdio_gpio >= 0) { - swdio_fd = setup_sysfs_gpio(swdio_gpio, 1, 0); - if (swdio_fd < 0) - goto out_error; - } - - if (sysfsgpio_swd_mode_possible()) { - if (swd_mode) - bitbang_swd_switch_seq(JTAG_TO_SWD); - else - bitbang_swd_switch_seq(SWD_TO_JTAG); - } - return ERROR_OK; out_error: diff --git a/src/jtag/drivers/ti_icdi_usb.c b/src/jtag/drivers/ti_icdi_usb.c index f316c8256..d276e588f 100644 --- a/src/jtag/drivers/ti_icdi_usb.c +++ b/src/jtag/drivers/ti_icdi_usb.c @@ -662,14 +662,9 @@ static int icdi_usb_close(void *handle) if (h->usb_ctx) libusb_exit(h->usb_ctx); - if (h->read_buffer) - free(h->read_buffer); - - if (h->write_buffer) - free(h->write_buffer); - + free(h->read_buffer); + free(h->write_buffer); free(handle); - return ERROR_OK; } diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c index 242c04fe3..68249dcfe 100644 --- a/src/jtag/drivers/ulink.c +++ b/src/jtag/drivers/ulink.c @@ -1271,7 +1271,7 @@ int ulink_append_test_cmd(struct ulink *device) * 1. Maximum possible frequency without any artificial delay * 2. Variable frequency with artificial linear delay loop * - * To set the ULINK to maximum frequency, it is only neccessary to use the + * To set the ULINK to maximum frequency, it is only necessary to use the * corresponding command IDs. To set the ULINK to a lower frequency, the * delay loop top values have to be calculated first. Then, a * CMD_CONFIGURE_TCK_FREQ command needs to be sent to the ULINK device. diff --git a/src/jtag/drivers/usb_blaster/README.CheapClone b/src/jtag/drivers/usb_blaster/README.CheapClone index 983a441a1..bd048d5ca 100644 --- a/src/jtag/drivers/usb_blaster/README.CheapClone +++ b/src/jtag/drivers/usb_blaster/README.CheapClone @@ -47,11 +47,11 @@ Pinout Throughput considerations ========================= -Mesurements on a scope reveal that : - - for bitbang mode, the throughtput is 56.5 kbits/s - (as each clock transition is mesured at 17.7us) +Measurements on a scope reveal that : + - for bitbang mode, the throughput is 56.5 kbits/s + (as each clock transition is measured at 17.7us) - for byteshift mode, the throughput is 107.7 kbits/s - (as 63 bits TDI transmission is mesured in 585 us) + (as 63 bits TDI transmission is measured in 585 us) Let's suppose that to upload a 32 bits value, it is necessary to : - move from IDLE to DR-SHIFT : 3 bitbang (3 TMS transitions) @@ -62,8 +62,8 @@ So for this 32 bits of data, the time would be : = 53.1us + 222us + 88.5us = 363us -Throughtput in bit/s: 32 * (1 / 363E-6) = 88000 bits/s -Throughtput in bytes/s: 11kBytes/s +Throughput in bit/s: 32 * (1 / 363E-6) = 88000 bits/s +Throughput in bytes/s: 11kBytes/s Conclusion ========== diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c index e2556cec0..f8ff66e2f 100644 --- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c +++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c @@ -219,7 +219,7 @@ static int ublast2_libusb_init(struct ublast_lowlevel *low) while (jtag_libusb_open(vids_renum, pids_renum, NULL, &low->libusb_dev, NULL) != ERROR_OK && retry--) { usleep(1000000); - LOG_INFO("Waiting for renumerate..."); + LOG_INFO("Waiting for reenumerate..."); } if (!retry) { diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c index d30483b63..9648ba2e2 100644 --- a/src/jtag/drivers/usb_blaster/usb_blaster.c +++ b/src/jtag/drivers/usb_blaster/usb_blaster.c @@ -174,7 +174,7 @@ static int ublast_buf_read(uint8_t *buf, unsigned size, uint32_t *bytes_read) int ret = info.drv->read(info.drv, buf, size, bytes_read); char *str = hexdump(buf, *bytes_read); - LOG_DEBUG_IO("(size=%d, buf=[%s]) -> %u", size, str, + LOG_DEBUG_IO("(size=%d, buf=[%s]) -> %" PRIu32, size, str, *bytes_read); free(str); return ret; @@ -185,7 +185,7 @@ static int ublast_buf_write(uint8_t *buf, int size, uint32_t *bytes_written) int ret = info.drv->write(info.drv, buf, size, bytes_written); char *str = hexdump(buf, *bytes_written); - LOG_DEBUG_IO("(size=%d, buf=[%s]) -> %u", size, str, + LOG_DEBUG_IO("(size=%d, buf=[%s]) -> %" PRIu32, size, str, *bytes_written); free(str); return ret; @@ -198,7 +198,7 @@ static int nb_buf_remaining(void) static void ublast_flush_buffer(void) { - unsigned int retlen; + uint32_t retlen; int nb = info.bufidx, ret = ERROR_OK; while (ret == ERROR_OK && nb > 0) { @@ -366,10 +366,10 @@ static void ublast_idle_clock(void) * Output a TDI bit and assert clock to push it into the JTAG device : * - writing out TCK=0, TMS==0, TDI= * - writing out TCK=1, TMS=, TDI= which triggers the JTAG - * device aquiring the data. + * device acquiring the data. * * If a TDO is to be read back, the required read is requested (bitbang mode), - * and the USB Blaster will send back a byte with bit0 reprensenting the TDO. + * and the USB Blaster will send back a byte with bit0 representing the TDO. */ static void ublast_clock_tdi(int tdi, enum scan_type type) { @@ -391,7 +391,7 @@ static void ublast_clock_tdi(int tdi, enum scan_type type) * @type: scan type (ie. does a readback of TDO is required) * * This function is the same as ublast_clock_tdi(), but it changes also the TMS - * while outputing the TDI. This should be the last TDI output of a TDI + * while output the TDI. This should be the last TDI output of a TDI * sequence, which will change state from : * - IRSHIFT -> IREXIT1 * - or DRSHIFT -> DREXIT1 @@ -447,7 +447,7 @@ static void ublast_queue_bytes(uint8_t *bytes, int nb_bytes) * @nb_bits: number of TMS bits (between 1 and 8) * @skip: number of TMS bits to skip at the beginning of the series * - * Write a serie of TMS transitions, where each transition consists in : + * Write a series of TMS transitions, where each transition consists in : * - writing out TCK=0, TMS=, TDI= * - writing out TCK=1, TMS=, TDI= which triggers the transition * The function ensures that at the end of the sequence, the clock (TCK) is put @@ -477,7 +477,7 @@ static void ublast_tms(struct tms_command *cmd) * ublast_path_move - write a TMS sequence transition to JTAG * @cmd: path transition * - * Write a serie of TMS transitions, where each transition consists in : + * Write a series of TMS transitions, where each transition consists in : * - writing out TCK=0, TMS=, TDI= * - writing out TCK=1, TMS=, TDI= which triggers the transition * The function ensures that at the end of the sequence, the clock (TCK) is put @@ -534,11 +534,11 @@ static void ublast_state_move(tap_state_t state, int skip) * bit0), second bit in (byte0, bit1), ...), which is what we want to return, * simply read bytes from USB interface and store them. * - * Returns ERROR_OK if OK, ERROR_xxx if a read error occured + * Returns ERROR_OK if OK, ERROR_xxx if a read error occurred */ static int ublast_read_byteshifted_tdos(uint8_t *buf, int nb_bytes) { - unsigned int retlen; + uint32_t retlen; int ret = ERROR_OK; LOG_DEBUG_IO("%s(buf=%p, num_bits=%d)", __func__, buf, nb_bytes * 8); @@ -564,13 +564,13 @@ static int ublast_read_byteshifted_tdos(uint8_t *buf, int nb_bytes) * - ninth bit is sotred in byte1, bit 0 * - etc ... * - * Returns ERROR_OK if OK, ERROR_xxx if a read error occured + * Returns ERROR_OK if OK, ERROR_xxx if a read error occurred */ static int ublast_read_bitbang_tdos(uint8_t *buf, int nb_bits) { int nb1 = nb_bits; int i, ret = ERROR_OK; - unsigned int retlen; + uint32_t retlen; uint8_t tmp[8]; LOG_DEBUG_IO("%s(buf=%p, num_bits=%d)", __func__, buf, nb_bits); @@ -596,7 +596,7 @@ static int ublast_read_bitbang_tdos(uint8_t *buf, int nb_bits) * @nb_bits: number of bits * @scan: scan type (ie. if TDO read back is required or not) * - * Outputs a serie of TDI bits on TDI. + * Outputs a series of TDI bits on TDI. * As a side effect, the last TDI bit is sent along a TMS=1, and triggers a JTAG * TAP state shift if input bits were non NULL. * @@ -707,7 +707,7 @@ static void ublast_stableclocks(int cycles) * * Launch a JTAG IR-scan or DR-scan * - * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occured. + * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occurred. */ static int ublast_scan(struct scan_command *cmd) { @@ -736,8 +736,7 @@ static int ublast_scan(struct scan_command *cmd) ublast_queue_tdi(buf, scan_bits, type); ret = jtag_read_buffer(buf, cmd); - if (buf) - free(buf); + free(buf); /* * ublast_queue_tdi sends the last bit with TMS=1. We are therefore * already in Exit1-DR/IR and have to skip the first step on our way @@ -902,7 +901,7 @@ static int ublast_init(void) static int ublast_quit(void) { uint8_t byte0 = 0; - unsigned int retlen; + uint32_t retlen; ublast_buf_write(&byte0, 1, &retlen); return info.drv->close(info.drv); diff --git a/src/jtag/drivers/usbprog.c b/src/jtag/drivers/usbprog.c index 7b27eaff2..627e4653d 100644 --- a/src/jtag/drivers/usbprog.c +++ b/src/jtag/drivers/usbprog.c @@ -137,11 +137,10 @@ static int usbprog_execute_queue(void) usbprog_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size); if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK) return ERROR_JTAG_QUEUE_FAILED; - if (buffer) - free(buffer); + free(buffer); break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); jtag_sleep(cmd->cmd.sleep->us); break; default: @@ -403,11 +402,11 @@ static void usbprog_jtag_init(struct usbprog_jtag *usbprog_jtag) static void usbprog_jtag_write_and_read(struct usbprog_jtag *usbprog_jtag, char *buffer, int size) { - char tmp[64]; /* fastes packet size for usb controller */ + char tmp[64]; /* fastest packet size for usb controller */ int send_bits, bufindex = 0, fillindex = 0, i, loops; char swap; - /* 61 byte can be transfered (488 bit) */ + /* 61 byte can be transferred (488 bit) */ while (size > 0) { if (size > 488) { @@ -449,11 +448,11 @@ static void usbprog_jtag_write_and_read(struct usbprog_jtag *usbprog_jtag, char static void usbprog_jtag_read_tdo(struct usbprog_jtag *usbprog_jtag, char *buffer, int size) { - char tmp[64]; /* fastes packet size for usb controller */ + char tmp[64]; /* fastest packet size for usb controller */ int send_bits, fillindex = 0, i, loops; char swap; - /* 61 byte can be transfered (488 bit) */ + /* 61 byte can be transferred (488 bit) */ while (size > 0) { if (size > 488) { @@ -490,10 +489,10 @@ static void usbprog_jtag_read_tdo(struct usbprog_jtag *usbprog_jtag, char *buffe static void usbprog_jtag_write_tdi(struct usbprog_jtag *usbprog_jtag, char *buffer, int size) { - char tmp[64]; /* fastes packet size for usb controller */ + char tmp[64]; /* fastest packet size for usb controller */ int send_bits, bufindex = 0, i, loops; - /* 61 byte can be transfered (488 bit) */ + /* 61 byte can be transferred (488 bit) */ while (size > 0) { if (size > 488) { send_bits = 488; diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h index e40667e91..36988869a 100644 --- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h +++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h @@ -76,7 +76,7 @@ #define USB_TO_POLL_CHECKFAIL 0x03 #define USB_TO_POLL_VERIFYBUFF 0x04 -/* USB_TO_XXX Replys */ +/* USB_TO_XXX Replies */ #define USB_TO_XXX_OK 0x00 #define USB_TO_XXX_FAILED 0x01 #define USB_TO_XXX_TIME_OUT 0x02 diff --git a/src/jtag/drivers/versaloon/versaloon.c b/src/jtag/drivers/versaloon/versaloon.c index 146383961..8efe44353 100644 --- a/src/jtag/drivers/versaloon/versaloon.c +++ b/src/jtag/drivers/versaloon/versaloon.c @@ -248,7 +248,7 @@ RESULT versaloon_init(void) /* connect to versaloon */ timeout_tmp = versaloon_usb_to; - /* not output error message when connectting */ + /* not output error message when connecting */ /* 100ms delay when connect */ versaloon_usb_to = 100; for (retry = 0; retry < VERSALOON_RETRY_CNT; retry++) { @@ -299,14 +299,11 @@ RESULT versaloon_fini(void) versaloon_usb_device_handle = NULL; - if (versaloon_buf != NULL) { - free(versaloon_buf); - versaloon_buf = NULL; - } - if (versaloon_cmd_buf != NULL) { - free(versaloon_cmd_buf); - versaloon_cmd_buf = NULL; - } + free(versaloon_buf); + versaloon_buf = NULL; + + free(versaloon_cmd_buf); + versaloon_cmd_buf = NULL; } return ERROR_OK; diff --git a/src/jtag/drivers/versaloon/versaloon_include.h b/src/jtag/drivers/versaloon/versaloon_include.h index 089056d02..901402520 100644 --- a/src/jtag/drivers/versaloon/versaloon_include.h +++ b/src/jtag/drivers/versaloon/versaloon_include.h @@ -41,7 +41,7 @@ #define ERRMSG_INVALID_USAGE "Invalid usage of %s" #define ERRMSG_INVALID_TARGET "Invalid %s" #define ERRMSG_INVALID_PARAMETER "Invalid parameter of %s." -#define ERRMSG_INVALID_INTERFACE_NUM "invalid inteface %d" +#define ERRMSG_INVALID_INTERFACE_NUM "invalid interface %d" #define ERRMSG_INVALID_BUFFER "Buffer %s is not valid." #define ERRCODE_INVALID_BUFFER ERROR_FAIL #define ERRCODE_INVALID_PARAMETER ERROR_FAIL diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c index 5fb9bcdcc..9aaed36b7 100644 --- a/src/jtag/drivers/vsllink.c +++ b/src/jtag/drivers/vsllink.c @@ -165,7 +165,7 @@ static int vsllink_execute_queue(void) break; case JTAG_SLEEP: - LOG_DEBUG_IO("sleep %i", cmd->cmd.sleep->us); + LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us); vsllink_tap_execute(); jtag_sleep(cmd->cmd.sleep->us); break; @@ -245,18 +245,14 @@ static int vsllink_speed_div(int jtag_speed, int *khz) static void vsllink_free_buffer(void) { - if (tdi_buffer != NULL) { - free(tdi_buffer); - tdi_buffer = NULL; - } - if (tdo_buffer != NULL) { - free(tdo_buffer); - tdo_buffer = NULL; - } - if (tms_buffer != NULL) { - free(tms_buffer); - tms_buffer = NULL; - } + free(tdi_buffer); + tdi_buffer = NULL; + + free(tdo_buffer); + tdo_buffer = NULL; + + free(tms_buffer); + tms_buffer = NULL; } static int vsllink_quit(void) @@ -676,8 +672,7 @@ static int vsllink_jtag_execute(void) return ERROR_JTAG_QUEUE_FAILED; } - if (pending_scan_result->buffer != NULL) - free(pending_scan_result->buffer); + free(pending_scan_result->buffer); } } } else { diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c index 5e4df93c2..fb04d51a4 100644 --- a/src/jtag/drivers/xds110.c +++ b/src/jtag/drivers/xds110.c @@ -655,7 +655,7 @@ static bool xds_execute(uint32_t out_length, uint32_t in_length, if (bytes_read != in_length) { /* Unexpected amount of data returned */ success = false; - LOG_DEBUG("XDS110: command 0x%02x return %d bytes, expected %d", + LOG_DEBUG("XDS110: command 0x%02x return %" PRIu32 " bytes, expected %" PRIu32, xds110.write_payload[0], bytes_read, in_length); } else { /* Extract error code from return packet */ @@ -1129,7 +1129,7 @@ static int xds110_swd_switch_seq(enum swd_special_seq seq) xds110.is_cmapi_acquired = false; /* Run sequence to put target in SWD mode */ success = swd_connect(); - /* Re-iniitialize CMAPI API for DAP access */ + /* Re-initialize CMAPI API for DAP access */ if (success) { xds110.is_swd_mode = true; success = cmapi_connect(&idcode); @@ -1389,7 +1389,7 @@ static void xds110_show_info(void) uint32_t firmware = xds110.firmware; LOG_INFO("XDS110: vid/pid = %04x/%04x", xds110.vid, xds110.pid); - LOG_INFO("XDS110: firmware version = %d.%d.%d.%d", + LOG_INFO("XDS110: firmware version = %" PRIu32 ".%" PRIu32 ".%" PRIu32 ".%" PRIu32, (((firmware >> 28) & 0xf) * 10) + ((firmware >> 24) & 0xf), (((firmware >> 20) & 0xf) * 10) + ((firmware >> 16) & 0xf), (((firmware >> 12) & 0xf) * 10) + ((firmware >> 8) & 0xf), @@ -1399,10 +1399,10 @@ static void xds110_show_info(void) LOG_INFO("XDS110: serial number = %s", xds110.serial); if (xds110.is_swd_mode) { LOG_INFO("XDS110: connected to target via SWD"); - LOG_INFO("XDS110: SWCLK set to %d kHz", xds110.speed); + LOG_INFO("XDS110: SWCLK set to %" PRIu32 " kHz", xds110.speed); } else { LOG_INFO("XDS110: connected to target via JTAG"); - LOG_INFO("XDS110: TCK set to %d kHz", xds110.speed); + LOG_INFO("XDS110: TCK set to %" PRIu32 " kHz", xds110.speed); } /* Alert user that there's a better firmware to use */ @@ -1756,7 +1756,7 @@ static void xds110_queue_scan(struct jtag_command *cmd) /* Check if this single request is too large to fit */ if ((1 + total_bytes + sizeof(end_state) + 1) > MAX_DATA_BLOCK) { - LOG_ERROR("BUG: JTAG scan request is too large to handle (%d bits)", + LOG_ERROR("BUG: JTAG scan request is too large to handle (%" PRIu32 " bits)", total_bits); /* Failing to run this scan mucks up debug on this target */ exit(-1); @@ -2057,7 +2057,7 @@ COMMAND_HANDLER(xds110_handle_supply_voltage_command) uint32_t voltage = 0; if (CMD_ARGC == 1) { - COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], voltage); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], voltage); if (voltage == 0 || (voltage >= XDS110_MIN_VOLTAGE && voltage <= XDS110_MAX_VOLTAGE)) { /* Requested voltage is in range */ diff --git a/src/jtag/drivers/xlnx-pcie-xvc.c b/src/jtag/drivers/xlnx-pcie-xvc.c index 17438593a..2423a9f05 100644 --- a/src/jtag/drivers/xlnx-pcie-xvc.c +++ b/src/jtag/drivers/xlnx-pcie-xvc.c @@ -37,6 +37,9 @@ #define XLNX_XVC_VSEC_ID 0x8 #define XLNX_XVC_MAX_BITS 0x20 +#define MASK_ACK(x) (((x) >> 9) & 0x7) +#define MASK_PAR(x) ((int)((x) & 0x1)) + struct xlnx_pcie_xvc { int fd; unsigned offset; @@ -51,7 +54,7 @@ static int xlnx_pcie_xvc_read_reg(const int offset, uint32_t *val) uint32_t res; int err; - /* Note: This should be ok endianess-wise because by going + /* Note: This should be ok endianness-wise because by going * through sysfs the kernel does the conversion in the config * space accessor functions */ @@ -72,14 +75,14 @@ static int xlnx_pcie_xvc_write_reg(const int offset, const uint32_t val) { int err; - /* Note: This should be ok endianess-wise because by going + /* Note: This should be ok endianness-wise because by going * through sysfs the kernel does the conversion in the config * space accessor functions */ err = pwrite(xlnx_pcie_xvc->fd, &val, sizeof(val), xlnx_pcie_xvc->offset + offset); if (err != sizeof(val)) { - LOG_ERROR("Failed to write offset: %x with value: %x", + LOG_ERROR("Failed to write offset: %x with value: %" PRIx32, offset, val); return ERROR_JTAG_DEVICE_ERROR; } @@ -109,10 +112,10 @@ static int xlnx_pcie_xvc_transact(size_t num_bits, uint32_t tms, uint32_t tdi, return err; if (tdo) - LOG_DEBUG_IO("Transact num_bits: %zu, tms: %x, tdi: %x, tdo: %x", + LOG_DEBUG_IO("Transact num_bits: %zu, tms: %" PRIx32 ", tdi: %" PRIx32 ", tdo: %" PRIx32, num_bits, tms, tdi, *tdo); else - LOG_DEBUG_IO("Transact num_bits: %zu, tms: %x, tdi: %x, tdo: ", + LOG_DEBUG_IO("Transact num_bits: %zu, tms: %" PRIx32 ", tdi: %" PRIx32 ", tdo: ", num_bits, tms, tdi); return ERROR_OK; } @@ -279,8 +282,7 @@ static int xlnx_pcie_xvc_execute_scan(struct jtag_command *cmd) }; err = jtag_read_buffer(buf, cmd->cmd.scan); - if (buf) - free(buf); + free(buf); if (tap_get_state() != tap_get_end_state()) err = xlnx_pcie_xvc_execute_statemove(1); @@ -288,8 +290,7 @@ static int xlnx_pcie_xvc_execute_scan(struct jtag_command *cmd) return err; out_err: - if (buf) - free(buf); + free(buf); return err; } @@ -301,7 +302,7 @@ static void xlnx_pcie_xvc_execute_reset(struct jtag_command *cmd) static void xlnx_pcie_xvc_execute_sleep(struct jtag_command *cmd) { - LOG_DEBUG("sleep %" PRIi32 "", cmd->cmd.sleep->us); + LOG_DEBUG("sleep %" PRIu32 "", cmd->cmd.sleep->us); usleep(cmd->cmd.sleep->us); } @@ -402,7 +403,7 @@ static int xlnx_pcie_xvc_init(void) err = xlnx_pcie_xvc_read_reg(XLNX_XVC_EXT_CAP, &cap); if (err != ERROR_OK) return err; - LOG_DEBUG("Checking capability at 0x%x; id=0x%04x version=0x%x next=0x%x", + LOG_DEBUG("Checking capability at 0x%x; id=0x%04" PRIx32 " version=0x%" PRIx32 " next=0x%" PRIx32, xlnx_pcie_xvc->offset, PCI_EXT_CAP_ID(cap), PCI_EXT_CAP_VER(cap), @@ -411,7 +412,7 @@ static int xlnx_pcie_xvc_init(void) err = xlnx_pcie_xvc_read_reg(XLNX_XVC_VSEC_HDR, &vh); if (err != ERROR_OK) return err; - LOG_DEBUG("Checking possible match at 0x%x; id: 0x%x; rev: 0x%x; length: 0x%x", + LOG_DEBUG("Checking possible match at 0x%x; id: 0x%" PRIx32 "; rev: 0x%" PRIx32 "; length: 0x%" PRIx32, xlnx_pcie_xvc->offset, PCI_VNDR_HEADER_ID(vh), PCI_VNDR_HEADER_REV(vh), @@ -453,8 +454,7 @@ COMMAND_HANDLER(xlnx_pcie_xvc_handle_config_command) * limit the memory we're leaking by freeing the old one first * before allocating a new one ... */ - if (xlnx_pcie_xvc->device) - free(xlnx_pcie_xvc->device); + free(xlnx_pcie_xvc->device); xlnx_pcie_xvc->device = strdup(CMD_ARGV[0]); return ERROR_OK; @@ -471,17 +471,224 @@ static const struct command_registration xlnx_pcie_xvc_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -static struct jtag_interface xlnx_pcie_xvc_interface = { +static struct jtag_interface xlnx_pcie_xvc_jtag_ops = { .execute_queue = &xlnx_pcie_xvc_execute_queue, }; +static int xlnx_pcie_xvc_swd_sequence(const uint8_t *seq, size_t length) +{ + size_t left, write; + uint32_t send; + int err; + + left = length; + while (left) { + write = MIN(XLNX_XVC_MAX_BITS, left); + send = buf_get_u32(seq, 0, write); + err = xlnx_pcie_xvc_transact(write, send, 0, NULL); + if (err != ERROR_OK) + return err; + left -= write; + seq += sizeof(uint32_t); + }; + + return ERROR_OK; +} + +static int xlnx_pcie_xvc_swd_switch_seq(enum swd_special_seq seq) +{ + switch (seq) { + case LINE_RESET: + LOG_DEBUG("SWD line reset"); + return xlnx_pcie_xvc_swd_sequence(swd_seq_line_reset, + swd_seq_line_reset_len); + case JTAG_TO_SWD: + LOG_DEBUG("JTAG-to-SWD"); + return xlnx_pcie_xvc_swd_sequence(swd_seq_jtag_to_swd, + swd_seq_jtag_to_swd_len); + case SWD_TO_JTAG: + LOG_DEBUG("SWD-to-JTAG"); + return xlnx_pcie_xvc_swd_sequence(swd_seq_swd_to_jtag, + swd_seq_swd_to_jtag_len); + default: + LOG_ERROR("Sequence %d not supported", seq); + return ERROR_FAIL; + } + + return ERROR_OK; +} + +static int queued_retval; + +static void xlnx_pcie_xvc_swd_write_reg(uint8_t cmd, uint32_t value, + uint32_t ap_delay_clk); + +static void swd_clear_sticky_errors(void) +{ + xlnx_pcie_xvc_swd_write_reg(swd_cmd(false, false, DP_ABORT), + STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0); +} + +static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value, + uint32_t ap_delay_clk) +{ + uint32_t res, ack, rpar; + int err; + + assert(cmd & SWD_CMD_RnW); + + cmd |= SWD_CMD_START | SWD_CMD_PARK; + /* cmd + ack */ + err = xlnx_pcie_xvc_transact(12, cmd, 0, &res); + if (err != ERROR_OK) + goto err_out; + + ack = MASK_ACK(res); + + /* read data */ + err = xlnx_pcie_xvc_transact(32, 0, 0, &res); + if (err != ERROR_OK) + goto err_out; + + /* parity + trn */ + err = xlnx_pcie_xvc_transact(2, 0, 0, &rpar); + if (err != ERROR_OK) + goto err_out; + + LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, + ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? + "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", + cmd & SWD_CMD_APnDP ? "AP" : "DP", + cmd & SWD_CMD_RnW ? "read" : "write", + (cmd & SWD_CMD_A32) >> 1, + res); + switch (ack) { + case SWD_ACK_OK: + if (MASK_PAR(rpar) != parity_u32(res)) { + LOG_DEBUG_IO("Wrong parity detected"); + queued_retval = ERROR_FAIL; + return; + } + if (value) + *value = res; + if (cmd & SWD_CMD_APnDP) + err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL); + queued_retval = err; + return; + case SWD_ACK_WAIT: + LOG_DEBUG_IO("SWD_ACK_WAIT"); + swd_clear_sticky_errors(); + return; + case SWD_ACK_FAULT: + LOG_DEBUG_IO("SWD_ACK_FAULT"); + queued_retval = ack; + return; + default: + LOG_DEBUG_IO("No valid acknowledge: ack=%02"PRIx32, ack); + queued_retval = ack; + return; + } +err_out: + queued_retval = err; +} + +static void xlnx_pcie_xvc_swd_write_reg(uint8_t cmd, uint32_t value, + uint32_t ap_delay_clk) +{ + uint32_t res, ack; + int err; + + assert(!(cmd & SWD_CMD_RnW)); + + cmd |= SWD_CMD_START | SWD_CMD_PARK; + /* cmd + trn + ack */ + err = xlnx_pcie_xvc_transact(13, cmd, 0, &res); + if (err != ERROR_OK) + goto err_out; + + ack = MASK_ACK(res); + + /* write data */ + err = xlnx_pcie_xvc_transact(32, value, 0, NULL); + if (err != ERROR_OK) + goto err_out; + + /* parity + trn */ + err = xlnx_pcie_xvc_transact(2, parity_u32(value), 0, NULL); + if (err != ERROR_OK) + goto err_out; + + LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, + ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? + "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", + cmd & SWD_CMD_APnDP ? "AP" : "DP", + cmd & SWD_CMD_RnW ? "read" : "write", + (cmd & SWD_CMD_A32) >> 1, + value); + + switch (ack) { + case SWD_ACK_OK: + if (cmd & SWD_CMD_APnDP) + err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL); + queued_retval = err; + return; + case SWD_ACK_WAIT: + LOG_DEBUG_IO("SWD_ACK_WAIT"); + swd_clear_sticky_errors(); + return; + case SWD_ACK_FAULT: + LOG_DEBUG_IO("SWD_ACK_FAULT"); + queued_retval = ack; + return; + default: + LOG_DEBUG_IO("No valid acknowledge: ack=%02"PRIx32, ack); + queued_retval = ack; + return; + } + +err_out: + queued_retval = err; +} + +static int xlnx_pcie_xvc_swd_run_queue(void) +{ + int err; + + /* we want at least 8 idle cycles between each transaction */ + err = xlnx_pcie_xvc_transact(8, 0, 0, NULL); + if (err != ERROR_OK) + return err; + + err = queued_retval; + queued_retval = ERROR_OK; + LOG_DEBUG("SWD queue return value: %02x", err); + + return err; +} + +static int xlnx_pcie_xvc_swd_init(void) +{ + return ERROR_OK; +} + +static const struct swd_driver xlnx_pcie_xvc_swd_ops = { + .init = xlnx_pcie_xvc_swd_init, + .switch_seq = xlnx_pcie_xvc_swd_switch_seq, + .read_reg = xlnx_pcie_xvc_swd_read_reg, + .write_reg = xlnx_pcie_xvc_swd_write_reg, + .run = xlnx_pcie_xvc_swd_run_queue, +}; + +static const char * const xlnx_pcie_xvc_transports[] = { "jtag", "swd", NULL }; + struct adapter_driver xlnx_pcie_xvc_adapter_driver = { .name = "xlnx_pcie_xvc", - .transports = jtag_only, + .transports = xlnx_pcie_xvc_transports, .commands = xlnx_pcie_xvc_command_handlers, .init = &xlnx_pcie_xvc_init, .quit = &xlnx_pcie_xvc_quit, - .jtag_ops = &xlnx_pcie_xvc_interface, + .jtag_ops = &xlnx_pcie_xvc_jtag_ops, + .swd_ops = &xlnx_pcie_xvc_swd_ops, }; diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c index 6d5cdc5e7..490eb9f4d 100644 --- a/src/jtag/hla/hla_interface.c +++ b/src/jtag/hla/hla_interface.c @@ -312,7 +312,7 @@ static const struct command_registration hl_interface_command_handlers[] = { .name = "hla_device_desc", .handler = &hl_interface_handle_device_desc_command, .mode = COMMAND_CONFIG, - .help = "set the a device description of the adapter", + .help = "set the device description of the adapter", .usage = "description_string", }, { @@ -341,7 +341,7 @@ static const struct command_registration hl_interface_command_handlers[] = { .handler = &interface_handle_hla_command, .mode = COMMAND_EXEC, .help = "execute a custom adapter-specific command", - .usage = "hla_command ", + .usage = "", }, COMMAND_REGISTRATION_DONE }; diff --git a/src/jtag/hla/hla_layout.c b/src/jtag/hla/hla_layout.c index c5e35182d..cf51a6713 100644 --- a/src/jtag/hla/hla_layout.c +++ b/src/jtag/hla/hla_layout.c @@ -57,18 +57,30 @@ static int hl_layout_close(struct hl_interface_s *adapter) } static const struct hl_layout hl_layouts[] = { +#if BUILD_HLADAPTER_STLINK { .name = "stlink", .open = hl_layout_open, .close = hl_layout_close, .api = &stlink_usb_layout_api, }, +#endif +#if BUILD_HLADAPTER_ICDI { .name = "ti-icdi", .open = hl_layout_open, .close = hl_layout_close, .api = &icdi_usb_layout_api, }, +#endif +#if BUILD_HLADAPTER_NULINK + { + .name = "nulink", + .open = hl_layout_open, + .close = hl_layout_close, + .api = &nulink_usb_layout_api, + }, +#endif {.name = NULL, /* END OF TABLE */ }, }; diff --git a/src/jtag/hla/hla_layout.h b/src/jtag/hla/hla_layout.h index 1d759e17d..e0bbd0fed 100644 --- a/src/jtag/hla/hla_layout.h +++ b/src/jtag/hla/hla_layout.h @@ -31,37 +31,38 @@ struct hl_interface_param_s; /** */ extern struct hl_layout_api_s stlink_usb_layout_api; extern struct hl_layout_api_s icdi_usb_layout_api; +extern struct hl_layout_api_s nulink_usb_layout_api; /** */ struct hl_layout_api_s { /** */ - int (*open) (struct hl_interface_param_s *param, void **handle); + int (*open)(struct hl_interface_param_s *param, void **handle); /** */ - int (*close) (void *handle); + int (*close)(void *handle); /** */ - int (*reset) (void *handle); + int (*reset)(void *handle); /** */ - int (*assert_srst) (void *handle, int srst); + int (*assert_srst)(void *handle, int srst); /** */ - int (*run) (void *handle); + int (*run)(void *handle); /** */ - int (*halt) (void *handle); + int (*halt)(void *handle); /** */ - int (*step) (void *handle); + int (*step)(void *handle); /** */ - int (*read_regs) (void *handle); + int (*read_regs)(void *handle); /** */ - int (*read_reg) (void *handle, int num, uint32_t *val); + int (*read_reg)(void *handle, int num, uint32_t *val); /** */ - int (*write_reg) (void *handle, int num, uint32_t val); + int (*write_reg)(void *handle, int num, uint32_t val); /** */ - int (*read_mem) (void *handle, uint32_t addr, uint32_t size, + int (*read_mem)(void *handle, uint32_t addr, uint32_t size, uint32_t count, uint8_t *buffer); /** */ - int (*write_mem) (void *handle, uint32_t addr, uint32_t size, + int (*write_mem)(void *handle, uint32_t addr, uint32_t size, uint32_t count, const uint8_t *buffer); /** */ - int (*write_debug_reg) (void *handle, uint32_t addr, uint32_t val); + int (*write_debug_reg)(void *handle, uint32_t addr, uint32_t val); /** * Read the idcode of the target connected to the adapter * @@ -72,11 +73,11 @@ struct hl_layout_api_s { * @param idcode Storage for the detected idcode * @returns ERROR_OK on success, or an error code on failure. */ - int (*idcode) (void *handle, uint32_t *idcode); + int (*idcode)(void *handle, uint32_t *idcode); /** */ - int (*override_target) (const char *targetname); + int (*override_target)(const char *targetname); /** */ - int (*custom_command) (void *handle, const char *command); + int (*custom_command)(void *handle, const char *command); /** */ int (*speed)(void *handle, int khz, bool query); /** @@ -107,7 +108,7 @@ struct hl_layout_api_s { */ int (*poll_trace)(void *handle, uint8_t *buf, size_t *size); /** */ - enum target_state (*state) (void *fd); + enum target_state (*state)(void *fd); }; /** */ @@ -115,9 +116,9 @@ struct hl_layout { /** */ char *name; /** */ - int (*open) (struct hl_interface_s *adapter); + int (*open)(struct hl_interface_s *adapter); /** */ - int (*close) (struct hl_interface_s *adapter); + int (*close)(struct hl_interface_s *adapter); /** */ struct hl_layout_api_s *api; }; diff --git a/src/jtag/hla/hla_transport.c b/src/jtag/hla/hla_transport.c index fbdddfd65..10028260d 100644 --- a/src/jtag/hla/hla_transport.c +++ b/src/jtag/hla/hla_transport.c @@ -46,7 +46,29 @@ COMMAND_HANDLER(hl_transport_reset_command) } static const struct command_registration -hl_transport_stlink_subcommand_handlers[] = { +hl_swd_transport_subcommand_handlers[] = { + { + .name = "newdap", + .mode = COMMAND_CONFIG, + .jim_handler = jim_hl_newtap, + .help = "declare a new SWD DAP", + }, + COMMAND_REGISTRATION_DONE +}; + +static const struct command_registration hl_swd_transport_command_handlers[] = { + { + .name = "swd", + .mode = COMMAND_ANY, + .help = "SWD command group", + .usage = "", + .chain = hl_swd_transport_subcommand_handlers, + }, + COMMAND_REGISTRATION_DONE +}; + +static const struct command_registration +hl_transport_jtag_subcommand_handlers[] = { { .name = "newtap", .mode = COMMAND_CONFIG, @@ -56,12 +78,6 @@ hl_transport_stlink_subcommand_handlers[] = { .usage = "basename tap_type '-irlen' count " "['-expected_id' number] ", }, - - COMMAND_REGISTRATION_DONE -}; - -static const struct command_registration -hl_transport_jtag_subcommand_handlers[] = { { .name = "init", .mode = COMMAND_ANY, @@ -117,18 +133,11 @@ hl_transport_jtag_subcommand_handlers[] = { COMMAND_REGISTRATION_DONE }; -static const struct command_registration stlink_transport_command_handlers[] = { - - { - .name = "hla", - .mode = COMMAND_ANY, - .help = "perform hl adapter actions", - .usage = "", - .chain = hl_transport_stlink_subcommand_handlers, - }, +static const struct command_registration hl_jtag_transport_command_handlers[] = { { .name = "jtag", .mode = COMMAND_ANY, + .help = "perform jtag tap actions", .usage = "", .chain = hl_transport_jtag_subcommand_handlers, }, @@ -141,11 +150,6 @@ static const struct command_registration stlink_transport_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -static int hl_transport_register_commands(struct command_context *cmd_ctx) -{ - return register_commands(cmd_ctx, NULL, - stlink_transport_command_handlers); -} static int hl_transport_init(struct command_context *cmd_ctx) { @@ -184,34 +188,35 @@ static int hl_transport_init(struct command_context *cmd_ctx) return hl_interface_init_target(t); } -static int hl_transport_select(struct command_context *ctx) +static int hl_jtag_transport_select(struct command_context *cmd_ctx) { - LOG_DEBUG("hl_transport_select"); - - int retval; + LOG_DEBUG("hl_jtag_transport_select"); /* NOTE: interface init must already have been done. * That works with only C code ... no Tcl glue required. */ - retval = hl_transport_register_commands(ctx); + return register_commands(cmd_ctx, NULL, + hl_jtag_transport_command_handlers); +} - if (retval != ERROR_OK) - return retval; - - return ERROR_OK; +static int hl_swd_transport_select(struct command_context *cmd_ctx) +{ + LOG_DEBUG("hl_swd_transport_select"); + return register_commands(cmd_ctx, NULL, + hl_swd_transport_command_handlers); } static struct transport hl_swd_transport = { .name = "hla_swd", - .select = hl_transport_select, + .select = hl_swd_transport_select, .init = hl_transport_init, .override_target = hl_interface_override_target, }; static struct transport hl_jtag_transport = { .name = "hla_jtag", - .select = hl_transport_select, + .select = hl_jtag_transport_select, .init = hl_transport_init, .override_target = hl_interface_override_target, }; diff --git a/src/jtag/interface.h b/src/jtag/interface.h index 42598c1ae..0884868a8 100644 --- a/src/jtag/interface.h +++ b/src/jtag/interface.h @@ -273,7 +273,7 @@ struct adapter_driver { int (*speed)(int speed); /** - * Returns JTAG maxium speed for KHz. 0 = RTCK. The function returns + * Returns JTAG maximum speed for KHz. 0 = RTCK. The function returns * a failure if it can't support the KHz/RTCK. * * WARNING!!!! if RTCK is *slow* then think carefully about diff --git a/src/jtag/interfaces.c b/src/jtag/interfaces.c index 7d3f8a8ca..2fa53be2b 100644 --- a/src/jtag/interfaces.c +++ b/src/jtag/interfaces.c @@ -12,6 +12,8 @@ * Copyright (C) 2009 Zachary T Welch * * zw@superlucidity.net * * * + * Copyright (C) 2020, Ampere Computing LLC * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -60,6 +62,9 @@ extern struct adapter_driver usb_blaster_adapter_driver; #if BUILD_JTAG_VPI == 1 extern struct adapter_driver jtag_vpi_adapter_driver; #endif +#if BUILD_JTAG_DPI == 1 +extern struct adapter_driver jtag_dpi_adapter_driver; +#endif #if BUILD_FT232R == 1 extern struct adapter_driver ft232r_adapter_driver; #endif @@ -117,6 +122,9 @@ extern struct adapter_driver opendous_adapter_driver; #if BUILD_SYSFSGPIO == 1 extern struct adapter_driver sysfsgpio_adapter_driver; #endif +#if BUILD_LINUXGPIOD == 1 +extern struct adapter_driver linuxgpiod_adapter_driver; +#endif #if BUILD_XLNX_PCIE_XVC == 1 extern struct adapter_driver xlnx_pcie_xvc_adapter_driver; #endif @@ -138,7 +146,7 @@ extern struct adapter_driver imx_gpio_adapter_driver; #if BUILD_XDS110 == 1 extern struct adapter_driver xds110_adapter_driver; #endif -#if BUILD_HLADAPTER == 1 +#if BUILD_HLADAPTER_STLINK == 1 extern struct adapter_driver stlink_dap_adapter_driver; #endif #if BUILD_RSHIM == 1 @@ -174,6 +182,9 @@ struct adapter_driver *adapter_drivers[] = { #if BUILD_JTAG_VPI == 1 &jtag_vpi_adapter_driver, #endif +#if BUILD_JTAG_DPI == 1 + &jtag_dpi_adapter_driver, +#endif #if BUILD_FT232R == 1 &ft232r_adapter_driver, #endif @@ -231,6 +242,9 @@ struct adapter_driver *adapter_drivers[] = { #if BUILD_SYSFSGPIO == 1 &sysfsgpio_adapter_driver, #endif +#if BUILD_LINUXGPIOD == 1 + &linuxgpiod_adapter_driver, +#endif #if BUILD_XLNX_PCIE_XVC == 1 &xlnx_pcie_xvc_adapter_driver, #endif @@ -252,7 +266,7 @@ struct adapter_driver *adapter_drivers[] = { #if BUILD_XDS110 == 1 &xds110_adapter_driver, #endif -#if BUILD_HLADAPTER == 1 +#if BUILD_HLADAPTER_STLINK == 1 &stlink_dap_adapter_driver, #endif #if BUILD_RSHIM == 1 diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h index 7f033e0e7..2fa580223 100644 --- a/src/jtag/jtag.h +++ b/src/jtag/jtag.h @@ -210,11 +210,11 @@ struct jtag_tap_event_action { }; /** - * Defines the function signature requide for JTAG event callback + * Defines the function signature required for JTAG event callback * functions, which are added with jtag_register_event_callback() * and removed jtag_unregister_event_callback(). * @param event The event to handle. - * @param prive A pointer to data that was passed to + * @param priv A pointer to data that was passed to * jtag_register_event_callback(). * @returns Must return ERROR_OK on success, or an error code on failure. * @@ -249,7 +249,7 @@ int jtag_config_khz(unsigned khz); */ int jtag_config_rclk(unsigned fallback_speed_khz); -/** Retreives the clock speed of the JTAG interface in KHz. */ +/** Retrieves the clock speed of the JTAG interface in KHz. */ unsigned jtag_get_speed_khz(void); enum reset_types { @@ -392,7 +392,7 @@ typedef intptr_t jtag_callback_data_t; typedef void (*jtag_callback1_t)(jtag_callback_data_t data0); /** A simpler version of jtag_add_callback4(). */ -void jtag_add_callback(jtag_callback1_t, jtag_callback_data_t data0); +void jtag_add_callback(jtag_callback1_t f, jtag_callback_data_t data0); /** @@ -407,7 +407,7 @@ void jtag_add_callback(jtag_callback1_t, jtag_callback_data_t data0); * assumptions about what the callback does or what its arguments are. * These callbacks are typically executed *after* the *entire* JTAG * queue has been executed for e.g. USB interfaces, and they are - * guaranteeed to be invoked in the order that they were queued. + * guaranteed to be invoked in the order that they were queued. * * If the execution of the queue fails before the callbacks, then -- * depending on driver implementation -- the callbacks may or may not be @@ -457,7 +457,7 @@ void jtag_add_tlr(void); * path when transitioning to/from end * state. * - * A list of unambigious single clock state transitions, not + * A list of unambiguous single clock state transitions, not * all drivers can support this, but it is required for e.g. * XScale and Xilinx support * diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h index 688c39630..ad830cc13 100644 --- a/src/jtag/minidriver.h +++ b/src/jtag/minidriver.h @@ -74,7 +74,7 @@ int interface_add_tms_seq(unsigned num_bits, * trst. * * the higher level jtag_add_reset will invoke jtag_add_tlr() if - * approperiate + * appropriate */ int interface_jtag_add_reset(int trst, int srst); int interface_jtag_add_sleep(uint32_t us); diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl index f8c4ca0bf..82327a39b 100644 --- a/src/jtag/startup.tcl +++ b/src/jtag/startup.tcl @@ -115,7 +115,7 @@ proc jtag_ntrst_assert_width args { # BEGIN MIGRATION AIDS ... these adapter operations originally had # JTAG-specific names despite the fact that the operations were not -# specific to JTAG, or otherewise had troublesome/misleading names. +# specific to JTAG, or otherwise had troublesome/misleading names. # # FIXME phase these aids out after about April 2011 # @@ -226,4 +226,13 @@ proc xds110_supply_voltage args { eval xds110 supply $args } +proc hla {cmd args} { + tailcall "hla $cmd" {*}$args +} + +proc "hla newtap" {args} { + echo "DEPRECATED! use 'swj_newdap' not 'hla newtap'" + eval swj_newdap $args +} + # END MIGRATION AIDS diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index d2f1f0db5..153a98e1b 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -204,7 +204,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args char *str; Jim_GetLong(interp, args[i], &bits); - str = buf_to_str(fields[field_count].in_value, bits, 16); + str = buf_to_hex_str(fields[field_count].in_value, bits); free(fields[field_count].in_value); Jim_ListAppendElement(interp, list, Jim_NewStringObj(interp, str, strlen(str))); @@ -689,8 +689,9 @@ static int jim_jtag_arp_init(Jim_Interp *interp, int argc, Jim_Obj *const *argv) int e = jtag_init_inner(context); if (e != ERROR_OK) { Jim_Obj *eObj = Jim_NewIntObj(goi.interp, e); + Jim_IncrRefCount(eObj); Jim_SetResultFormatted(goi.interp, "error: %#s", eObj); - Jim_FreeNewObj(goi.interp, eObj); + Jim_DecrRefCount(goi.interp, eObj); return JIM_ERR; } return JIM_OK; @@ -713,8 +714,9 @@ static int jim_jtag_arp_init_reset(Jim_Interp *interp, int argc, Jim_Obj *const if (e != ERROR_OK) { Jim_Obj *eObj = Jim_NewIntObj(goi.interp, e); + Jim_IncrRefCount(eObj); Jim_SetResultFormatted(goi.interp, "error: %#s", eObj); - Jim_FreeNewObj(goi.interp, eObj); + Jim_DecrRefCount(goi.interp, eObj); return JIM_ERR; } return JIM_OK; @@ -1153,10 +1155,8 @@ COMMAND_HANDLER(handle_irscan_command) retval = jtag_execute_queue(); error_return: - for (i = 0; i < num_fields; i++) { - if (NULL != fields[i].out_value) - free((void *)fields[i].out_value); - } + for (i = 0; i < num_fields; i++) + free((void *)fields[i].out_value); free(fields); diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c index 37af2f7ae..669e6f45c 100644 --- a/src/jtag/zy1000/zy1000.c +++ b/src/jtag/zy1000/zy1000.c @@ -674,7 +674,7 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, uint32_t opcode, - const uint32_t *data, + uint32_t *data, size_t count) { /* bypass bits before and after */ @@ -684,8 +684,8 @@ int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, post_bits += 2; if ((pre_bits > 32) || (post_bits > 32)) { - int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, - uint32_t, const uint32_t *, size_t); + int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *tap, + uint32_t opcode, uint32_t *data, size_t count); return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count); } else { static const uint8_t zero; diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c index a975a7a0c..f83d8942d 100644 --- a/src/pld/xilinx_bit.c +++ b/src/pld/xilinx_bit.c @@ -119,7 +119,7 @@ int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename) if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK) return ERROR_PLD_FILE_LOAD_FAILED; - LOG_DEBUG("bit_file: %s %s %s,%s %" PRIi32 "", bit_file->source_file, bit_file->part_name, + LOG_DEBUG("bit_file: %s %s %s,%s %" PRIu32 "", bit_file->source_file, bit_file->part_name, bit_file->date, bit_file->time, bit_file->length); fclose(input_file); diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c index c45d9d645..ee9b48bb9 100644 --- a/src/rtos/FreeRTOS.c +++ b/src/rtos/FreeRTOS.c @@ -37,6 +37,11 @@ #define FreeRTOS_STRUCT(int_type, ptr_type, list_prev_offset) +/* FIXME: none of the _width parameters are actually observed properly! + * you WILL need to edit more if you actually attempt to target a 8/16/64 + * bit target! + */ + struct FreeRTOS_params { const char *target_name; const unsigned char thread_count_width; @@ -158,7 +163,7 @@ static const struct symbols FreeRTOS_symbol_list[] = { static int FreeRTOS_update_threads(struct rtos *rtos) { int retval; - int tasks_found = 0; + unsigned int tasks_found = 0; const struct FreeRTOS_params *param; if (rtos->rtos_specific_params == NULL) @@ -176,12 +181,11 @@ static int FreeRTOS_update_threads(struct rtos *rtos) return -2; } - int thread_list_size = 0; - retval = target_read_buffer(rtos->target, + uint32_t thread_list_size = 0; + retval = target_read_u32(rtos->target, rtos->symbols[FreeRTOS_VAL_uxCurrentNumberOfTasks].address, - param->thread_count_width, - (uint8_t *)&thread_list_size); - LOG_DEBUG("FreeRTOS: Read uxCurrentNumberOfTasks at 0x%" PRIx64 ", value %d\r\n", + &thread_list_size); + LOG_DEBUG("FreeRTOS: Read uxCurrentNumberOfTasks at 0x%" PRIx64 ", value %" PRIu32, rtos->symbols[FreeRTOS_VAL_uxCurrentNumberOfTasks].address, thread_list_size); @@ -194,15 +198,16 @@ static int FreeRTOS_update_threads(struct rtos *rtos) rtos_free_threadlist(rtos); /* read the current thread */ - retval = target_read_buffer(rtos->target, + uint32_t pointer_casts_are_bad; + retval = target_read_u32(rtos->target, rtos->symbols[FreeRTOS_VAL_pxCurrentTCB].address, - param->pointer_width, - (uint8_t *)&rtos->current_thread); + &pointer_casts_are_bad); if (retval != ERROR_OK) { LOG_ERROR("Error reading current thread in FreeRTOS thread list"); return retval; } - LOG_DEBUG("FreeRTOS: Read pxCurrentTCB at 0x%" PRIx64 ", value 0x%" PRIx64 "\r\n", + rtos->current_thread = pointer_casts_are_bad; + LOG_DEBUG("FreeRTOS: Read pxCurrentTCB at 0x%" PRIx64 ", value 0x%" PRIx64, rtos->symbols[FreeRTOS_VAL_pxCurrentTCB].address, rtos->current_thread); @@ -244,20 +249,17 @@ static int FreeRTOS_update_threads(struct rtos *rtos) LOG_ERROR("FreeRTOS: uxTopUsedPriority is not defined, consult the OpenOCD manual for a work-around"); return ERROR_FAIL; } - uint64_t top_used_priority = 0; - /* FIXME: endianess error on almost all target_read_buffer(), see also - * other rtoses */ - retval = target_read_buffer(rtos->target, + uint32_t top_used_priority = 0; + retval = target_read_u32(rtos->target, rtos->symbols[FreeRTOS_VAL_uxTopUsedPriority].address, - param->pointer_width, - (uint8_t *)&top_used_priority); + &top_used_priority); if (retval != ERROR_OK) return retval; - LOG_DEBUG("FreeRTOS: Read uxTopUsedPriority at 0x%" PRIx64 ", value %" PRIu64 "\r\n", + LOG_DEBUG("FreeRTOS: Read uxTopUsedPriority at 0x%" PRIx64 ", value %" PRIu32, rtos->symbols[FreeRTOS_VAL_uxTopUsedPriority].address, top_used_priority); if (top_used_priority > FREERTOS_MAX_PRIORITIES) { - LOG_ERROR("FreeRTOS top used priority is unreasonably big, not proceeding: %" PRIu64, + LOG_ERROR("FreeRTOS top used priority is unreasonably big, not proceeding: %" PRIu32, top_used_priority); return ERROR_FAIL; } @@ -292,35 +294,33 @@ static int FreeRTOS_update_threads(struct rtos *rtos) continue; /* Read the number of threads in this list */ - int64_t list_thread_count = 0; - retval = target_read_buffer(rtos->target, + uint32_t list_thread_count = 0; + retval = target_read_u32(rtos->target, list_of_lists[i], - param->thread_count_width, - (uint8_t *)&list_thread_count); + &list_thread_count); if (retval != ERROR_OK) { LOG_ERROR("Error reading number of threads in FreeRTOS thread list"); free(list_of_lists); return retval; } - LOG_DEBUG("FreeRTOS: Read thread count for list %u at 0x%" PRIx64 ", value %" PRId64 "\r\n", + LOG_DEBUG("FreeRTOS: Read thread count for list %u at 0x%" PRIx64 ", value %" PRIu32, i, list_of_lists[i], list_thread_count); if (list_thread_count == 0) continue; /* Read the location of first list item */ - uint64_t prev_list_elem_ptr = -1; - uint64_t list_elem_ptr = 0; - retval = target_read_buffer(rtos->target, + uint32_t prev_list_elem_ptr = -1; + uint32_t list_elem_ptr = 0; + retval = target_read_u32(rtos->target, list_of_lists[i] + param->list_next_offset, - param->pointer_width, - (uint8_t *)&list_elem_ptr); + &list_elem_ptr); if (retval != ERROR_OK) { LOG_ERROR("Error reading first thread item location in FreeRTOS thread list"); free(list_of_lists); return retval; } - LOG_DEBUG("FreeRTOS: Read first item for list %u at 0x%" PRIx64 ", value 0x%" PRIx64 "\r\n", + LOG_DEBUG("FreeRTOS: Read first item for list %u at 0x%" PRIx64 ", value 0x%" PRIx32, i, list_of_lists[i] + param->list_next_offset, list_elem_ptr); while ((list_thread_count > 0) && (list_elem_ptr != 0) && @@ -328,16 +328,16 @@ static int FreeRTOS_update_threads(struct rtos *rtos) (tasks_found < thread_list_size)) { /* Get the location of the thread structure. */ rtos->thread_details[tasks_found].threadid = 0; - retval = target_read_buffer(rtos->target, + retval = target_read_u32(rtos->target, list_elem_ptr + param->list_elem_content_offset, - param->pointer_width, - (uint8_t *)&(rtos->thread_details[tasks_found].threadid)); + &pointer_casts_are_bad); if (retval != ERROR_OK) { LOG_ERROR("Error reading thread list item object in FreeRTOS thread list"); free(list_of_lists); return retval; } - LOG_DEBUG("FreeRTOS: Read Thread ID at 0x%" PRIx64 ", value 0x%" PRIx64 "\r\n", + rtos->thread_details[tasks_found].threadid = pointer_casts_are_bad; + LOG_DEBUG("FreeRTOS: Read Thread ID at 0x%" PRIx32 ", value 0x%" PRIx64, list_elem_ptr + param->list_elem_content_offset, rtos->thread_details[tasks_found].threadid); @@ -357,7 +357,7 @@ static int FreeRTOS_update_threads(struct rtos *rtos) return retval; } tmp_str[FREERTOS_THREAD_NAME_STR_SIZE-1] = '\x00'; - LOG_DEBUG("FreeRTOS: Read Thread Name at 0x%" PRIx64 ", value \"%s\"\r\n", + LOG_DEBUG("FreeRTOS: Read Thread Name at 0x%" PRIx64 ", value '%s'", rtos->thread_details[tasks_found].threadid + param->thread_name_offset, tmp_str); @@ -383,16 +383,15 @@ static int FreeRTOS_update_threads(struct rtos *rtos) prev_list_elem_ptr = list_elem_ptr; list_elem_ptr = 0; - retval = target_read_buffer(rtos->target, + retval = target_read_u32(rtos->target, prev_list_elem_ptr + param->list_elem_next_offset, - param->pointer_width, - (uint8_t *)&list_elem_ptr); + &list_elem_ptr); if (retval != ERROR_OK) { LOG_ERROR("Error reading next thread item location in FreeRTOS thread list"); free(list_of_lists); return retval; } - LOG_DEBUG("FreeRTOS: Read next thread location at 0x%" PRIx64 ", value 0x%" PRIx64 "\r\n", + LOG_DEBUG("FreeRTOS: Read next thread location at 0x%" PRIx32 ", value 0x%" PRIx32, prev_list_elem_ptr + param->list_elem_next_offset, list_elem_ptr); } @@ -422,15 +421,16 @@ static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, param = (const struct FreeRTOS_params *) rtos->rtos_specific_params; /* Read the stack pointer */ - retval = target_read_buffer(rtos->target, + uint32_t pointer_casts_are_bad; + retval = target_read_u32(rtos->target, thread_id + param->thread_stack_offset, - param->pointer_width, - (uint8_t *)&stack_ptr); + &pointer_casts_are_bad); if (retval != ERROR_OK) { LOG_ERROR("Error reading stack frame from FreeRTOS thread"); return retval; } - LOG_DEBUG("FreeRTOS: Read stack pointer at 0x%" PRIx64 ", value 0x%" PRIx64 "\r\n", + stack_ptr = pointer_casts_are_bad; + LOG_DEBUG("FreeRTOS: Read stack pointer at 0x%" PRIx64 ", value 0x%" PRIx64, thread_id + param->thread_stack_offset, stack_ptr); @@ -459,12 +459,11 @@ static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, if (cm4_fpu_enabled == 1) { /* Read the LR to decide between stacking with or without FPU */ uint32_t LR_svc = 0; - retval = target_read_buffer(rtos->target, + retval = target_read_u32(rtos->target, stack_ptr + 0x20, - param->pointer_width, - (uint8_t *)&LR_svc); + &LR_svc); if (retval != ERROR_OK) { - LOG_OUTPUT("Error reading stack frame from FreeRTOS thread\r\n"); + LOG_OUTPUT("Error reading stack frame from FreeRTOS thread"); return retval; } if ((LR_svc & 0x10) == 0) diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am index 8097c303b..2cb8bd147 100644 --- a/src/rtos/Makefile.am +++ b/src/rtos/Makefile.am @@ -7,6 +7,7 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/rtos_embkernel_stackings.c \ %D%/rtos_mqx_stackings.c \ %D%/rtos_ucos_iii_stackings.c \ + %D%/rtos_riot_stackings.c \ %D%/FreeRTOS.c \ %D%/ThreadX.c \ %D%/eCos.c \ @@ -19,6 +20,7 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/uCOS-III.c \ %D%/nuttx.c \ %D%/hwthread.c \ + %D%/riot.c \ %D%/rtos.h \ %D%/rtos_standard_stackings.h \ %D%/rtos_ecos_stackings.h \ @@ -26,6 +28,7 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/rtos_chibios_stackings.h \ %D%/rtos_embkernel_stackings.h \ %D%/rtos_mqx_stackings.h \ + %D%/rtos_riot_stackings.h \ %D%/rtos_ucos_iii_stackings.h \ %D%/nuttx_header.h \ %D%/riscv_debug.h diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c index 9605533aa..302641bae 100644 --- a/src/rtos/ThreadX.c +++ b/src/rtos/ThreadX.c @@ -248,7 +248,7 @@ static const struct rtos_register_stacking *get_stacking_info_arm926ejs(const st LOG_DEBUG(" solicited stack"); return param->stacking_info + 0; } else { - LOG_DEBUG(" interrupt stack: %u", flag); + LOG_DEBUG(" interrupt stack: %" PRIu32, flag); return param->stacking_info + 1; } } diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c index 4d2b1b2d7..a56d3ce05 100644 --- a/src/rtos/chibios.c +++ b/src/rtos/chibios.c @@ -150,10 +150,8 @@ static int chibios_update_memory_signature(struct rtos *rtos) param = (struct chibios_params *) rtos->rtos_specific_params; /* Free existing memory description.*/ - if (param->signature) { - free(param->signature); - param->signature = 0; - } + free(param->signature); + param->signature = NULL; signature = malloc(sizeof(*signature)); if (!signature) { diff --git a/src/rtos/chromium-ec.c b/src/rtos/chromium-ec.c index 92ed2cbad..ae12a3bf5 100644 --- a/src/rtos/chromium-ec.c +++ b/src/rtos/chromium-ec.c @@ -306,7 +306,7 @@ static int chromium_ec_update_threads(struct rtos *rtos) LOG_ERROR("Failed to get task %d's runtime", t); runtime = target_buffer_get_u64(rtos->target, runtime_buf); - /* Priority is simply the positon in the array */ + /* Priority is simply the position in the array */ if (thread_ptr == current_task) snprintf(thread_str_buf, sizeof(thread_str_buf), "State: Running, Priority: %u, Events: %" PRIx32 ", Runtime: %" PRIu64 "\n", diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c index 65b89c402..773a87d47 100644 --- a/src/rtos/hwthread.c +++ b/src/rtos/hwthread.c @@ -291,7 +291,7 @@ static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id, struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true); if (!reg) { - LOG_ERROR("Couldn't find register %d in thread %" PRId64 ".", reg_num, + LOG_ERROR("Couldn't find register %" PRIu32 " in thread %" PRId64 ".", reg_num, thread_id); return ERROR_FAIL; } diff --git a/src/rtos/linux.c b/src/rtos/linux.c index 63659bb05..44e132d36 100644 --- a/src/rtos/linux.c +++ b/src/rtos/linux.c @@ -188,7 +188,7 @@ static int linux_os_thread_reg_list(struct rtos *rtos, return ERROR_FAIL; } - /* search target to perfom the access */ + /* search target to perform the access */ struct reg **gdb_reg_list; struct target_list *head; head = target->head; @@ -627,8 +627,7 @@ struct threads *liste_del_task(struct threads *task_list, struct threads **t, task_list = (*t)->next; /* free content of threads */ - if ((*t)->context) - free((*t)->context); + free((*t)->context); free(*t); *t = prev ? prev : task_list; @@ -781,8 +780,7 @@ static int clean_threadlist(struct target *target) while (temp != NULL) { old = temp; - if (temp->context) - free(temp->context); + free(temp->context); temp = temp->next; free(old); @@ -931,10 +929,8 @@ static int linux_task_update(struct target *target, int context) while (thread_list != NULL) { thread_list->status = 0; /*setting all tasks to dead state*/ - if (thread_list->context) { - free(thread_list->context); - thread_list->context = NULL; - } + free(thread_list->context); + thread_list->context = NULL; thread_list = thread_list->next; } @@ -1487,13 +1483,13 @@ static char *linux_ps_command(struct target *target) if (temp->context) tmp += sprintf(tmp, - "%" PRId32 "\t\t%" PRId32 "\t\t%" PRIx32 "\t\t%s\n", + "%" PRIu32 "\t\t%" PRIu32 "\t\t%" PRIx32 "\t\t%s\n", temp->pid, temp->oncpu, temp->asid, temp->name); else tmp += sprintf(tmp, - "%" PRId32 "\t\t%" PRId32 "\t\t%" PRIx32 "\t\t%s\n", + "%" PRIu32 "\t\t%" PRIu32 "\t\t%" PRIx32 "\t\t%s\n", temp->pid, temp->oncpu, temp->asid, temp->name); } diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c index 322c7d19b..3c9062516 100644 --- a/src/rtos/nuttx.c +++ b/src/rtos/nuttx.c @@ -174,7 +174,7 @@ static int rcmd_offset(const char *cmd, const char *name) static int nuttx_thread_packet(struct connection *connection, char const *packet, int packet_size) { - char cmd[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for nul-termination */ + char cmd[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for null-termination */ if (!strncmp(packet, "qRcmd", 5)) { size_t len = unhexify((uint8_t *)cmd, packet + 6, sizeof(cmd)); diff --git a/src/rtos/riot.c b/src/rtos/riot.c new file mode 100644 index 000000000..15cbb0f85 --- /dev/null +++ b/src/rtos/riot.c @@ -0,0 +1,428 @@ +/*************************************************************************** + * Copyright (C) 2015 by Daniel Krebs * + * Daniel Krebs - github@daniel-krebs.net * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * + ***************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include "target/target.h" +#include "target/target_type.h" +#include "rtos.h" +#include "helper/log.h" +#include "helper/types.h" +#include "target/armv7m.h" +#include "rtos_riot_stackings.h" + +static bool riot_detect_rtos(struct target *target); +static int riot_create(struct target *target); +static int riot_update_threads(struct rtos *rtos); +static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, + struct rtos_reg **reg_list, int *num_regs); +static int riot_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]); + +struct riot_thread_state { + int value; + const char *desc; +}; + +/* refer RIOT sched.h */ +static const struct riot_thread_state riot_thread_states[] = { + { 0, "Stopped" }, + { 1, "Zombie" }, + { 2, "Sleeping" }, + { 3, "Blocked mutex" }, + { 4, "Blocked receive" }, + { 5, "Blocked send" }, + { 6, "Blocked reply" }, + { 7, "Blocked any flag" }, + { 8, "Blocked all flags" }, + { 9, "Blocked mbox" }, + { 10, "Blocked condition" }, + { 11, "Running" }, + { 12, "Pending" }, +}; +#define RIOT_NUM_STATES ARRAY_SIZE(riot_thread_states) + +struct riot_params { + const char *target_name; + unsigned char thread_sp_offset; + unsigned char thread_status_offset; +}; + +static const struct riot_params riot_params_list[] = { + { + "cortex_m", /* target_name */ + 0x00, /* thread_sp_offset */ + 0x04, /* thread_status_offset */ + }, + { /* STLink */ + "hla_target", /* target_name */ + 0x00, /* thread_sp_offset */ + 0x04, /* thread_status_offset */ + } +}; +#define RIOT_NUM_PARAMS ARRAY_SIZE(riot_params_list) + +/* Initialize in riot_create() depending on architecture */ +static const struct rtos_register_stacking *stacking_info; + +enum riot_symbol_values { + RIOT_THREADS_BASE = 0, + RIOT_NUM_THREADS, + RIOT_ACTIVE_PID, + RIOT_MAX_THREADS, + RIOT_NAME_OFFSET, +}; + +/* refer RIOT core/sched.c */ +static const char *const riot_symbol_list[] = { + "sched_threads", + "sched_num_threads", + "sched_active_pid", + "max_threads", + "_tcb_name_offset", + NULL +}; + +/* Define which symbols are not mandatory */ +static const enum riot_symbol_values riot_optional_symbols[] = { + RIOT_NAME_OFFSET, +}; + +const struct rtos_type riot_rtos = { + .name = "RIOT", + .detect_rtos = riot_detect_rtos, + .create = riot_create, + .update_threads = riot_update_threads, + .get_thread_reg_list = riot_get_thread_reg_list, + .get_symbol_list_to_lookup = riot_get_symbol_list_to_lookup, +}; + +static int riot_update_threads(struct rtos *rtos) +{ + int retval; + unsigned int tasks_found = 0; + const struct riot_params *param; + + if (rtos == NULL) + return ERROR_FAIL; + + if (rtos->rtos_specific_params == NULL) + return ERROR_FAIL; + + param = (const struct riot_params *)rtos->rtos_specific_params; + + if (rtos->symbols == NULL) { + LOG_ERROR("No symbols for RIOT"); + return ERROR_FAIL; + } + + if (rtos->symbols[RIOT_THREADS_BASE].address == 0) { + LOG_ERROR("Can't find symbol `%s`", + riot_symbol_list[RIOT_THREADS_BASE]); + return ERROR_FAIL; + } + + /* wipe out previous thread details if any */ + rtos_free_threadlist(rtos); + + /* Reset values */ + rtos->current_thread = 0; + rtos->thread_count = 0; + + /* read the current thread id */ + int16_t active_pid = 0; + retval = target_read_u16(rtos->target, + rtos->symbols[RIOT_ACTIVE_PID].address, + (uint16_t *)&active_pid); + if (retval != ERROR_OK) { + LOG_ERROR("Can't read symbol `%s`", + riot_symbol_list[RIOT_ACTIVE_PID]); + return retval; + } + rtos->current_thread = active_pid; + + /* read the current thread count + * It's `int` in RIOT, but this is Cortex M* only anyway */ + int32_t thread_count = 0; + retval = target_read_u16(rtos->target, + rtos->symbols[RIOT_NUM_THREADS].address, + (uint16_t *)&thread_count); + if (retval != ERROR_OK) { + LOG_ERROR("Can't read symbol `%s`", + riot_symbol_list[RIOT_NUM_THREADS]); + return retval; + } + rtos->thread_count = thread_count; + + /* read the maximum number of threads */ + uint8_t max_threads = 0; + retval = target_read_u8(rtos->target, + rtos->symbols[RIOT_MAX_THREADS].address, + &max_threads); + if (retval != ERROR_OK) { + LOG_ERROR("Can't read symbol `%s`", + riot_symbol_list[RIOT_MAX_THREADS]); + return retval; + } + + /* Base address of thread array */ + uint32_t threads_base = rtos->symbols[RIOT_THREADS_BASE].address; + + /* Try to get the offset of tcb_t::name, if absent RIOT wasn't compiled + * with DEVELHELP, so there are no thread names */ + uint8_t name_offset = 0; + if (rtos->symbols[RIOT_NAME_OFFSET].address != 0) { + retval = target_read_u8(rtos->target, + rtos->symbols[RIOT_NAME_OFFSET].address, + &name_offset); + if (retval != ERROR_OK) { + LOG_ERROR("Can't read symbol `%s`", + riot_symbol_list[RIOT_NAME_OFFSET]); + return retval; + } + } + + /* Allocate memory for thread description */ + rtos->thread_details = calloc(thread_count, sizeof(struct thread_detail)); + if (rtos->thread_details == NULL) { + LOG_ERROR("RIOT: out of memory"); + return ERROR_FAIL; + } + + /* Buffer for thread names, maximum to display is 32 */ + char buffer[32]; + + for (unsigned int i = 0; i < max_threads; i++) { + /* get pointer to tcb_t */ + uint32_t tcb_pointer = 0; + retval = target_read_u32(rtos->target, + threads_base + (i * 4), + &tcb_pointer); + if (retval != ERROR_OK) { + LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + goto error; + } + + if (tcb_pointer == 0) { + /* PID unused */ + continue; + } + + /* Index is PID */ + rtos->thread_details[tasks_found].threadid = i; + + /* read thread state */ + uint8_t status = 0; + retval = target_read_u8(rtos->target, + tcb_pointer + param->thread_status_offset, + &status); + if (retval != ERROR_OK) { + LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + goto error; + } + + /* Search for state */ + unsigned int k; + for (k = 0; k < RIOT_NUM_STATES; k++) { + if (riot_thread_states[k].value == status) + break; + } + + /* Copy state string */ + if (k >= RIOT_NUM_STATES) { + rtos->thread_details[tasks_found].extra_info_str = + strdup("unknown state"); + } else { + rtos->thread_details[tasks_found].extra_info_str = + strdup(riot_thread_states[k].desc); + } + + if (rtos->thread_details[tasks_found].extra_info_str == NULL) { + LOG_ERROR("RIOT: out of memory"); + retval = ERROR_FAIL; + goto error; + } + + /* Thread names are only available if compiled with DEVELHELP */ + if (name_offset != 0) { + uint32_t name_pointer = 0; + retval = target_read_u32(rtos->target, + tcb_pointer + name_offset, + &name_pointer); + if (retval != ERROR_OK) { + LOG_ERROR("Can't parse `%s`", + riot_symbol_list[RIOT_THREADS_BASE]); + goto error; + } + + /* read thread name */ + retval = target_read_buffer(rtos->target, + name_pointer, + sizeof(buffer), + (uint8_t *)&buffer); + if (retval != ERROR_OK) { + LOG_ERROR("Can't parse `%s`", + riot_symbol_list[RIOT_THREADS_BASE]); + goto error; + } + + /* Make sure the string in the buffer terminates */ + if (buffer[sizeof(buffer) - 1] != 0) + buffer[sizeof(buffer) - 1] = 0; + + /* Copy thread name */ + rtos->thread_details[tasks_found].thread_name_str = + strdup(buffer); + + } else { + rtos->thread_details[tasks_found].thread_name_str = + strdup("Enable DEVELHELP to see task names"); + } + + if (rtos->thread_details[tasks_found].thread_name_str == NULL) { + LOG_ERROR("RIOT: out of memory"); + retval = ERROR_FAIL; + goto error; + } + + rtos->thread_details[tasks_found].exists = true; + + tasks_found++; + } + + return ERROR_OK; + +error: + rtos_free_threadlist(rtos); + return retval; +} + +static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, + struct rtos_reg **reg_list, int *num_regs) +{ + int retval; + const struct riot_params *param; + + if (rtos == NULL) + return ERROR_FAIL; + + if (thread_id == 0) + return ERROR_FAIL; + + if (rtos->rtos_specific_params == NULL) + return ERROR_FAIL; + + param = (const struct riot_params *)rtos->rtos_specific_params; + + /* find the thread with given thread id */ + uint32_t threads_base = rtos->symbols[RIOT_THREADS_BASE].address; + uint32_t tcb_pointer = 0; + retval = target_read_u32(rtos->target, + threads_base + (thread_id * 4), + &tcb_pointer); + if (retval != ERROR_OK) { + LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + return retval; + } + + /* read stack pointer for that thread */ + uint32_t stackptr = 0; + retval = target_read_u32(rtos->target, + tcb_pointer + param->thread_sp_offset, + &stackptr); + if (retval != ERROR_OK) { + LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + return retval; + } + + return rtos_generic_stack_read(rtos->target, + stacking_info, + stackptr, + reg_list, + num_regs); +} + +static int riot_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]) +{ + *symbol_list = calloc(ARRAY_SIZE(riot_symbol_list), sizeof(symbol_table_elem_t)); + + if (*symbol_list == NULL) { + LOG_ERROR("RIOT: out of memory"); + return ERROR_FAIL; + } + + for (unsigned int i = 0; i < ARRAY_SIZE(riot_symbol_list); i++) { + (*symbol_list)[i].symbol_name = riot_symbol_list[i]; + (*symbol_list)[i].optional = false; + + /* Lookup if symbol is optional */ + for (unsigned int k = 0; k < sizeof(riot_optional_symbols); k++) { + if (i == riot_optional_symbols[k]) { + (*symbol_list)[i].optional = true; + break; + } + } + } + + return ERROR_OK; +} + +static bool riot_detect_rtos(struct target *target) +{ + if ((target->rtos->symbols != NULL) && + (target->rtos->symbols[RIOT_THREADS_BASE].address != 0)) { + /* looks like RIOT */ + return true; + } + return false; +} + +static int riot_create(struct target *target) +{ + unsigned int i = 0; + + /* lookup if target is supported by RIOT */ + while ((i < RIOT_NUM_PARAMS) && + (0 != strcmp(riot_params_list[i].target_name, target->type->name))) { + i++; + } + if (i >= RIOT_NUM_PARAMS) { + LOG_ERROR("Could not find target in RIOT compatibility list"); + return ERROR_FAIL; + } + + target->rtos->rtos_specific_params = (void *)&riot_params_list[i]; + target->rtos->current_thread = 0; + target->rtos->thread_details = NULL; + + /* Stacking is different depending on architecture */ + struct armv7m_common *armv7m_target = target_to_armv7m(target); + + if (armv7m_target->arm.is_armv6m) + stacking_info = &rtos_riot_cortex_m0_stacking; + else if (is_armv7m(armv7m_target)) + stacking_info = &rtos_riot_cortex_m34_stacking; + else { + LOG_ERROR("No stacking info for architecture"); + return ERROR_FAIL; + } + return ERROR_OK; +} diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c index 8c849148a..4798f047c 100644 --- a/src/rtos/rtos.c +++ b/src/rtos/rtos.c @@ -27,6 +27,7 @@ #include "server/gdb_server.h" /* RTOSs */ +extern struct rtos_type riscv_rtos; extern struct rtos_type FreeRTOS_rtos; extern struct rtos_type ThreadX_rtos; extern struct rtos_type eCos_rtos; @@ -38,9 +39,10 @@ extern struct rtos_type mqx_rtos; extern struct rtos_type uCOS_III_rtos; extern struct rtos_type nuttx_rtos; extern struct rtos_type hwthread_rtos; -extern struct rtos_type riscv_rtos; +extern struct rtos_type riot_rtos; static struct rtos_type *rtos_types[] = { + &riscv_rtos, &ThreadX_rtos, &FreeRTOS_rtos, &eCos_rtos, @@ -51,8 +53,9 @@ static struct rtos_type *rtos_types[] = { &mqx_rtos, &uCOS_III_rtos, &nuttx_rtos, + &riot_rtos, + /* keep this as last, as it always matches with rtos auto */ &hwthread_rtos, - &riscv_rtos, NULL }; @@ -100,9 +103,7 @@ static void os_free(struct target *target) if (!target->rtos) return; - if (target->rtos->symbols) - free(target->rtos->symbols); - + free(target->rtos->symbols); free(target->rtos); target->rtos = NULL; } @@ -231,7 +232,7 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s int rtos_detected = 0; uint64_t addr = 0; size_t reply_len; - char reply[GDB_BUFFER_SIZE + 1], cur_sym[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for nul-termination */ + char reply[GDB_BUFFER_SIZE + 1], cur_sym[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for null-termination */ symbol_table_elem_t *next_sym = NULL; struct target *target = get_target_from_connection(connection); struct rtos *os = target->rtos; @@ -646,10 +647,9 @@ int rtos_try_next(struct target *target) return 0; os->type = *type; - if (os->symbols) { - free(os->symbols); - os->symbols = NULL; - } + + free(os->symbols); + os->symbols = NULL; return 1; } diff --git a/src/rtos/rtos_mqx_stackings.c b/src/rtos/rtos_mqx_stackings.c index d18e59155..f2d3b2227 100644 --- a/src/rtos/rtos_mqx_stackings.c +++ b/src/rtos/rtos_mqx_stackings.c @@ -64,7 +64,7 @@ static const struct stack_register_offset rtos_mqx_arm_v7m_stack_offsets[ARMV7M_ { ARMV7M_R10, 0x20, 32 }, /* r10 */ { ARMV7M_R11, 0x24, 32 }, /* r11 */ { ARMV7M_R12, 0x3C, 32 }, /* r12 */ - { ARMV7M_R13, -2 , 32 }, /* sp */ + { ARMV7M_R13, -2, 32 }, /* sp */ { ARMV7M_R14, 0x28, 32 }, /* lr */ { ARMV7M_PC, 0x44, 32 }, /* pc */ { ARMV7M_xPSR, 0x48, 32 }, /* xPSR */ diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c new file mode 100644 index 000000000..23f4d1786 --- /dev/null +++ b/src/rtos/rtos_riot_stackings.c @@ -0,0 +1,95 @@ +/*************************************************************************** + * Copyright (C) 2015 by Daniel Krebs * + * Daniel Krebs - github@daniel-krebs.net * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * + ***************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "rtos.h" +#include "target/armv7m.h" +#include "rtos_standard_stackings.h" + +/* This works for the M0 and M34 stackings as xPSR is in a fixed + * location + */ +static int64_t rtos_riot_cortex_m_stack_align(struct target *target, + const uint8_t *stack_data, const struct rtos_register_stacking *stacking, + int64_t stack_ptr) +{ + const int XPSR_OFFSET = 0x40; + return rtos_Cortex_M_stack_align(target, stack_data, stacking, + stack_ptr, XPSR_OFFSET); +} + +/* see thread_arch.c */ +static const struct stack_register_offset rtos_riot_cortex_m0_stack_offsets[ARMV7M_NUM_CORE_REGS] = { + { ARMV7M_R0, 0x24, 32 }, /* r0 */ + { ARMV7M_R1, 0x28, 32 }, /* r1 */ + { ARMV7M_R2, 0x2c, 32 }, /* r2 */ + { ARMV7M_R3, 0x30, 32 }, /* r3 */ + { ARMV7M_R4, 0x14, 32 }, /* r4 */ + { ARMV7M_R5, 0x18, 32 }, /* r5 */ + { ARMV7M_R6, 0x1c, 32 }, /* r6 */ + { ARMV7M_R7, 0x20, 32 }, /* r7 */ + { ARMV7M_R8, 0x04, 32 }, /* r8 */ + { ARMV7M_R9, 0x08, 32 }, /* r9 */ + { ARMV7M_R10, 0x0c, 32 }, /* r10 */ + { ARMV7M_R11, 0x10, 32 }, /* r11 */ + { ARMV7M_R12, 0x34, 32 }, /* r12 */ + { ARMV7M_R13, -2, 32 }, /* sp */ + { ARMV7M_R14, 0x38, 32 }, /* lr */ + { ARMV7M_PC, 0x3c, 32 }, /* pc */ + { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */ +}; + +const struct rtos_register_stacking rtos_riot_cortex_m0_stacking = { + 0x44, /* stack_registers_size */ + -1, /* stack_growth_direction */ + ARMV7M_NUM_CORE_REGS, /* num_output_registers */ + rtos_riot_cortex_m_stack_align, /* stack_alignment */ + rtos_riot_cortex_m0_stack_offsets /* register_offsets */ +}; + +/* see thread_arch.c */ +static const struct stack_register_offset rtos_riot_cortex_m34_stack_offsets[ARMV7M_NUM_CORE_REGS] = { + { ARMV7M_R0, 0x24, 32 }, /* r0 */ + { ARMV7M_R1, 0x28, 32 }, /* r1 */ + { ARMV7M_R2, 0x2c, 32 }, /* r2 */ + { ARMV7M_R3, 0x30, 32 }, /* r3 */ + { ARMV7M_R4, 0x04, 32 }, /* r4 */ + { ARMV7M_R5, 0x08, 32 }, /* r5 */ + { ARMV7M_R6, 0x0c, 32 }, /* r6 */ + { ARMV7M_R7, 0x10, 32 }, /* r7 */ + { ARMV7M_R8, 0x14, 32 }, /* r8 */ + { ARMV7M_R9, 0x18, 32 }, /* r9 */ + { ARMV7M_R10, 0x1c, 32 }, /* r10 */ + { ARMV7M_R11, 0x20, 32 }, /* r11 */ + { ARMV7M_R12, 0x34, 32 }, /* r12 */ + { ARMV7M_R13, -2, 32 }, /* sp */ + { ARMV7M_R14, 0x38, 32 }, /* lr */ + { ARMV7M_PC, 0x3c, 32 }, /* pc */ + { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */ +}; + +const struct rtos_register_stacking rtos_riot_cortex_m34_stacking = { + 0x44, /* stack_registers_size */ + -1, /* stack_growth_direction */ + ARMV7M_NUM_CORE_REGS, /* num_output_registers */ + rtos_riot_cortex_m_stack_align, /* stack_alignment */ + rtos_riot_cortex_m34_stack_offsets /* register_offsets */ +}; diff --git a/src/rtos/rtos_riot_stackings.h b/src/rtos/rtos_riot_stackings.h new file mode 100644 index 000000000..c5b8f59e2 --- /dev/null +++ b/src/rtos/rtos_riot_stackings.h @@ -0,0 +1,32 @@ +/*************************************************************************** + * Copyright (C) 2015 by Daniel Krebs * + * Daniel Krebs - github@daniel-krebs.net * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * + ***************************************************************************/ + +#ifndef OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H +#define OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "rtos.h" + +extern const struct rtos_register_stacking rtos_riot_cortex_m0_stacking; +extern const struct rtos_register_stacking rtos_riot_cortex_m34_stacking; + +#endif /* OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H */ + diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c index c83347a94..c6c74c252 100644 --- a/src/server/gdb_server.c +++ b/src/server/gdb_server.c @@ -68,7 +68,7 @@ struct target_desc_format { /* private connection data for GDB */ struct gdb_connection { - char buffer[GDB_BUFFER_SIZE + 1]; /* Extra byte for nul-termination */ + char buffer[GDB_BUFFER_SIZE + 1]; /* Extra byte for null-termination */ char *buf_p; int buf_cnt; bool ctrl_c; @@ -994,8 +994,7 @@ static int gdb_new_connection(struct connection *connection) * This will cause an auto_probe to be invoked, which is either * a no-op or it will fail when the target isn't ready(e.g. not halted). */ - int i; - for (i = 0; i < flash_get_bank_count(); i++) { + for (unsigned int i = 0; i < flash_get_bank_count(); i++) { struct flash_bank *p; p = get_flash_bank_by_num_noprobe(i); if (p->target != target) @@ -1017,6 +1016,17 @@ static int gdb_new_connection(struct connection *connection) target_name(target), target_state_name(target)); + if (!target_was_examined(target)) { + LOG_ERROR("Target %s not examined yet, refuse gdb connection %d!", + target_name(target), gdb_actual_connections); + gdb_actual_connections--; + return ERROR_TARGET_NOT_EXAMINED; + } + + if (target->state != TARGET_HALTED) + LOG_WARNING("GDB connection %d on target %s not halted", + gdb_actual_connections, target_name(target)); + /* DANGER! If we fail subsequently, we must remove this handler, * otherwise we occasionally see crashes as the timer can invoke the * callback fn. @@ -1055,11 +1065,8 @@ static int gdb_connection_closed(struct connection *connection) /* if this connection registered a debug-message receiver delete it */ delete_debug_msg_receiver(connection->cmd_ctx, target); - if (connection->priv) { - free(connection->priv); - connection->priv = NULL; - } else - LOG_ERROR("BUG: connection->priv == NULL"); + free(connection->priv); + connection->priv = NULL; target_unregister_event_callback(gdb_target_callback_event_handler, connection); @@ -1379,8 +1386,8 @@ static int gdb_set_register_packet(struct connection *connection, } if (chars != (DIV_ROUND_UP(reg_list[reg_num]->size, 8) * 2)) { - LOG_ERROR("gdb sent %d bits for a %d-bit register (%s)", - (int) chars * 4, reg_list[reg_num]->size, reg_list[reg_num]->name); + LOG_ERROR("gdb sent %zu bits for a %" PRIu32 "-bit register (%s)", + chars * 4, reg_list[reg_num]->size, reg_list[reg_num]->name); free(bin_buf); free(reg_list); return ERROR_SERVER_REMOTE_CLOSED; @@ -1759,8 +1766,7 @@ static __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6))) void xml_printf( char *t = *xml; *xml = realloc(*xml, *size); if (*xml == NULL) { - if (t) - free(t); + free(t); *retval = ERROR_SERVER_REMOTE_CLOSED; return; } @@ -1842,8 +1848,7 @@ static int gdb_memory_map(struct connection *connection, int length; char *separator; target_addr_t ram_start = 0; - int i; - int target_flash_banks = 0; + unsigned int target_flash_banks = 0; /* skip command character */ packet += 23; @@ -1859,7 +1864,7 @@ static int gdb_memory_map(struct connection *connection, */ banks = malloc(sizeof(struct flash_bank *)*flash_get_bank_count()); - for (i = 0; i < flash_get_bank_count(); i++) { + for (unsigned int i = 0; i < flash_get_bank_count(); i++) { p = get_flash_bank_by_num_noprobe(i); if (p->target != target) continue; @@ -1875,8 +1880,7 @@ static int gdb_memory_map(struct connection *connection, qsort(banks, target_flash_banks, sizeof(struct flash_bank *), compare_bank); - for (i = 0; i < target_flash_banks; i++) { - int j; + for (unsigned int i = 0; i < target_flash_banks; i++) { unsigned sector_size = 0; unsigned group_len = 0; @@ -1894,7 +1898,7 @@ static int gdb_memory_map(struct connection *connection, * smaller ones at the end (maybe 32KB). STR7 will have * regions with 8KB, 32KB, and 64KB sectors; etc. */ - for (j = 0; j < p->num_sectors; j++) { + for (unsigned int j = 0; j < p->num_sectors; j++) { /* Maybe start a new group of sectors. */ if (sector_size == 0) { @@ -2057,7 +2061,7 @@ static int gdb_generate_reg_type_description(struct target *target, } /* */ xml_printf(&retval, tdesc, pos, size, - "\n", + "\n", type->id, type->reg_type_vector->type->id, type->reg_type_vector->count); @@ -2104,11 +2108,11 @@ static int gdb_generate_reg_type_description(struct target *target, * ... * */ xml_printf(&retval, tdesc, pos, size, - "\n", + "\n", type->id, type->reg_type_struct->size); while (field != NULL) { xml_printf(&retval, tdesc, pos, size, - "\n", + "\n", field->name, field->bitfield->start, field->bitfield->end, gdb_get_reg_type_name(field->bitfield->type)); @@ -2149,14 +2153,14 @@ static int gdb_generate_reg_type_description(struct target *target, * ... * */ xml_printf(&retval, tdesc, pos, size, - "\n", + "\n", type->id, type->reg_type_flags->size); struct reg_data_type_flags_field *field; field = type->reg_type_flags->fields; while (field != NULL) { xml_printf(&retval, tdesc, pos, size, - "\n", + "\n", field->name, field->bitfield->start, field->bitfield->end, gdb_get_reg_type_name(field->bitfield->type)); @@ -2381,9 +2385,9 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o xml_printf(&retval, &tdesc, &pos, &size, "name); xml_printf(&retval, &tdesc, &pos, &size, - " bitsize=\"%d\"", reg_list[i]->size); + " bitsize=\"%" PRIu32 "\"", reg_list[i]->size); xml_printf(&retval, &tdesc, &pos, &size, - " regnum=\"%d\"", reg_list[i]->number); + " regnum=\"%" PRIu32 "\"", reg_list[i]->number); if (reg_list[i]->caller_save) xml_printf(&retval, &tdesc, &pos, &size, " save-restore=\"yes\""); @@ -3216,7 +3220,7 @@ static int gdb_v_packet(struct connection *connection, target_call_event_callbacks(target, TARGET_EVENT_GDB_FLASH_WRITE_START); result = flash_write(target, gdb_connection->vflash_image, - &written, 0); + &written, false); target_call_event_callbacks(target, TARGET_EVENT_GDB_FLASH_WRITE_END); if (result != ERROR_OK) { @@ -3323,13 +3327,14 @@ static void gdb_sig_halted(struct connection *connection) static int gdb_input_inner(struct connection *connection) { /* Do not allocate this on the stack */ - static char gdb_packet_buffer[GDB_BUFFER_SIZE + 1]; /* Extra byte for nul-termination */ + static char gdb_packet_buffer[GDB_BUFFER_SIZE + 1]; /* Extra byte for null-termination */ struct target *target; char const *packet = gdb_packet_buffer; int packet_size; int retval; struct gdb_connection *gdb_con = connection->priv; + static bool warn_use_ext; target = get_target_from_connection(connection); @@ -3413,6 +3418,12 @@ static int gdb_input_inner(struct connection *connection) break; case '?': gdb_last_signal_packet(connection, packet, packet_size); + /* '?' is sent after the eventual '!' */ + if (!warn_use_ext && !gdb_con->extended_protocol) { + warn_use_ext = true; + LOG_WARNING("Prefer GDB command \"target extended-remote %s\" instead of \"target remote %s\"", + connection->service->port, connection->service->port); + } break; case 'c': case 's': @@ -3605,7 +3616,7 @@ static int gdb_target_start(struct target *target, const char *port) ret = add_service("gdb", port, 1, &gdb_new_connection, &gdb_input, &gdb_connection_closed, gdb_service); - /* initialialize all targets gdb service with the same pointer */ + /* initialize all targets gdb service with the same pointer */ { struct target_list *head; struct target *curr; diff --git a/src/server/server.c b/src/server/server.c index 19cf16a82..4e970fa8f 100644 --- a/src/server/server.c +++ b/src/server/server.c @@ -326,7 +326,7 @@ int add_service(char *name, #endif } else if (c->type == CONNECTION_PIPE) { #ifdef _WIN32 - /* we currenty do not support named pipes under win32 + /* we currently do not support named pipes under win32 * so exit openocd for now */ LOG_ERROR("Named pipes currently not supported under this os"); free_service(c); @@ -404,19 +404,14 @@ static int remove_services(void) remove_connections(c); - if (c->name) - free(c->name); + free(c->name); if (c->type == CONNECTION_PIPE) { if (c->fd != -1) close(c->fd); } - if (c->port) - free(c->port); - - if (c->priv) - free(c->priv); - + free(c->port); + free(c->priv); /* delete service */ free(c); diff --git a/src/server/server.h b/src/server/server.h index f4cc39d3a..ff2ada9cb 100644 --- a/src/server/server.h +++ b/src/server/server.h @@ -87,7 +87,7 @@ int server_preinit(void); int server_init(struct command_context *cmd_ctx); int server_quit(void); void server_free(void); -void exit_on_signal(int); +void exit_on_signal(int sig); int server_loop(struct command_context *command_context); diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c index d0583a9b3..0243c6328 100644 --- a/src/server/telnet_server.c +++ b/src/server/telnet_server.c @@ -451,8 +451,7 @@ static int telnet_input(struct connection *connection) if (*t_con->line && (prev_line == NULL || strcmp(t_con->line, prev_line))) { /* if the history slot is already taken, free it */ - if (t_con->history[t_con->next_history]) - free(t_con->history[t_con->next_history]); + free(t_con->history[t_con->next_history]); /* add line to history */ t_con->history[t_con->next_history] = strdup(t_con->line); @@ -465,8 +464,7 @@ static int telnet_input(struct connection *connection) t_con->current_history = t_con->next_history; - if (t_con->history[t_con->current_history]) - free(t_con->history[t_con->current_history]); + free(t_con->history[t_con->current_history]); t_con->history[t_con->current_history] = strdup(""); } @@ -647,29 +645,22 @@ static int telnet_connection_closed(struct connection *connection) log_remove_callback(telnet_log_callback, connection); - if (t_con->prompt) { - free(t_con->prompt); - t_con->prompt = NULL; - } + free(t_con->prompt); + t_con->prompt = NULL; /* save telnet history */ telnet_save_history(t_con); for (i = 0; i < TELNET_LINE_HISTORY_SIZE; i++) { - if (t_con->history[i]) { - free(t_con->history[i]); - t_con->history[i] = NULL; - } + free(t_con->history[i]); + t_con->history[i] = NULL; } /* if this connection registered a debug-message receiver delete it */ delete_debug_msg_receiver(connection->cmd_ctx, NULL); - if (connection->priv) { - free(connection->priv); - connection->priv = NULL; - } else - LOG_ERROR("BUG: connection->priv == NULL"); + free(connection->priv); + connection->priv = NULL; return ERROR_OK; } diff --git a/src/svf/svf.c b/src/svf/svf.c index fd27417e0..608703434 100644 --- a/src/svf/svf.c +++ b/src/svf/svf.c @@ -18,11 +18,11 @@ /* The specification for SVF is available here: * http://www.asset-intertech.com/support/svf.pdf - * Below, this document is refered to as the "SVF spec". + * Below, this document is referred to as the "SVF spec". * * The specification for XSVF is available here: * http://www.xilinx.com/support/documentation/application_notes/xapp503.pdf - * Below, this document is refered to as the "XSVF spec". + * Below, this document is referred to as the "XSVF spec". */ #ifdef HAVE_CONFIG_H @@ -226,12 +226,12 @@ static int svf_getline(char **lineptr, size_t *n, FILE *stream); #define SVF_MAX_BUFFER_SIZE_TO_COMMIT (1024 * 1024) static uint8_t *svf_tdi_buffer, *svf_tdo_buffer, *svf_mask_buffer; -static int svf_buffer_index, svf_buffer_size ; +static int svf_buffer_index, svf_buffer_size; static int svf_quiet; static int svf_nil; static int svf_ignore_error; -/* Targetting particular tap */ +/* Targeting particular tap */ static int svf_tap_is_specified; static int svf_set_padding(struct svf_xxr_para *para, int len, unsigned char tdi); @@ -246,7 +246,7 @@ static int svf_last_printed_percentage = -1; * DEBUG, INFO, ERROR, USER */ #define SVF_BUF_LOG(_lvl, _buf, _nbits, _desc) \ - svf_hexbuf_print(LOG_LVL_##_lvl , __FILE__, __LINE__, __func__, _buf, _nbits, _desc) + svf_hexbuf_print(LOG_LVL_##_lvl, __FILE__, __LINE__, __func__, _buf, _nbits, _desc) static void svf_hexbuf_print(int dbg_lvl, const char *file, unsigned line, const char *function, const uint8_t *buf, @@ -302,22 +302,17 @@ static int svf_realloc_buffers(size_t len) static void svf_free_xxd_para(struct svf_xxr_para *para) { if (NULL != para) { - if (para->tdi != NULL) { - free(para->tdi); - para->tdi = NULL; - } - if (para->tdo != NULL) { - free(para->tdo); - para->tdo = NULL; - } - if (para->mask != NULL) { - free(para->mask); - para->mask = NULL; - } - if (para->smask != NULL) { - free(para->smask); - para->smask = NULL; - } + free(para->tdi); + para->tdi = NULL; + + free(para->tdo); + para->tdo = NULL; + + free(para->mask); + para->mask = NULL; + + free(para->smask); + para->smask = NULL; } } @@ -546,28 +541,23 @@ free_all: svf_fd = 0; /* free buffers */ - if (svf_command_buffer) { - free(svf_command_buffer); - svf_command_buffer = NULL; - svf_command_buffer_size = 0; - } - if (svf_check_tdo_para) { - free(svf_check_tdo_para); - svf_check_tdo_para = NULL; - svf_check_tdo_para_index = 0; - } - if (svf_tdi_buffer) { - free(svf_tdi_buffer); - svf_tdi_buffer = NULL; - } - if (svf_tdo_buffer) { - free(svf_tdo_buffer); - svf_tdo_buffer = NULL; - } - if (svf_mask_buffer) { - free(svf_mask_buffer); - svf_mask_buffer = NULL; - } + free(svf_command_buffer); + svf_command_buffer = NULL; + svf_command_buffer_size = 0; + + free(svf_check_tdo_para); + svf_check_tdo_para = NULL; + svf_check_tdo_para_index = 0; + + free(svf_tdi_buffer); + svf_tdi_buffer = NULL; + + free(svf_tdo_buffer); + svf_tdo_buffer = NULL; + + free(svf_mask_buffer); + svf_mask_buffer = NULL; + svf_buffer_index = 0; svf_buffer_size = 0; @@ -771,16 +761,12 @@ static int svf_adjust_array_length(uint8_t **arr, int orig_bit_len, int new_bit_ int new_byte_len = (new_bit_len + 7) >> 3; if ((NULL == *arr) || (((orig_bit_len + 7) >> 3) < ((new_bit_len + 7) >> 3))) { - if (*arr != NULL) { - free(*arr); - *arr = NULL; - } - *arr = malloc(new_byte_len); + free(*arr); + *arr = calloc(1, new_byte_len); if (NULL == *arr) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } - memset(*arr, 0, new_byte_len); } return ERROR_OK; } @@ -854,7 +840,7 @@ static int svf_copy_hexstring_to_binary(char *str, uint8_t **bin, int orig_bit_l /* check validity: we must have consumed everything */ if (str_len > 0 || (ch & ~((2 << ((bit_len - 1) % 4)) - 1)) != 0) { - LOG_ERROR("value execeeds length"); + LOG_ERROR("value exceeds length"); return ERROR_FAIL; } @@ -1078,7 +1064,7 @@ XXR_common: pbuffer_tmp = &xxr_para_tmp->smask; xxr_para_tmp->data_mask |= XXR_SMASK; } else { - LOG_ERROR("unknow parameter: %s", argus[i]); + LOG_ERROR("unknown parameter: %s", argus[i]); return ERROR_FAIL; } if (ERROR_OK != @@ -1524,7 +1510,7 @@ XXR_common: svf_para.trst_mode = i_tmp; LOG_DEBUG("\ttrst_mode = %s", svf_trst_mode_name[svf_para.trst_mode]); } else { - LOG_ERROR("can not accpet TRST command if trst_mode is ABSENT"); + LOG_ERROR("can not accept TRST command if trst_mode is ABSENT"); return ERROR_FAIL; } break; @@ -1570,7 +1556,7 @@ static const struct command_registration svf_command_handlers[] = { .handler = handle_svf_command, .mode = COMMAND_EXEC, .help = "Runs a SVF file.", - .usage = "svf [-tap device.tap] [quiet] [nil] [progress] [ignore_error]", + .usage = "[-tap device.tap] [quiet] [nil] [progress] [ignore_error]", }, COMMAND_REGISTRATION_DONE }; diff --git a/src/target/Makefile.am b/src/target/Makefile.am index 42d809d01..19ba7714e 100644 --- a/src/target/Makefile.am +++ b/src/target/Makefile.am @@ -7,6 +7,7 @@ endif %C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la \ %D%/riscv/libriscv.la +%C%_libtarget_la_CPPFLAGS = $(AM_CPPFLAGS) STARTUP_TCL_SRCS += %D%/startup.tcl @@ -33,6 +34,11 @@ noinst_LTLIBRARIES += %D%/libtarget.la $(ARMV8_SRC) \ $(MIPS64_SRC) +if HAVE_CAPSTONE +%C%_libtarget_la_CPPFLAGS += $(CAPSTONE_CFLAGS) +%C%_libtarget_la_LIBADD += $(CAPSTONE_LIBS) +endif + TARGET_CORE_SRC = \ %D%/algorithm.c \ %D%/register.c \ @@ -83,6 +89,7 @@ ARMV8_SRC = \ %D%/armv8_dpm.c \ %D%/armv8_opcodes.c \ %D%/aarch64.c \ + %D%/a64_disassembler.c \ %D%/armv8.c \ %D%/armv8_cache.c @@ -170,6 +177,7 @@ ARC_SRC = \ %D%/armv7a_cache_l2x.h \ %D%/armv7a_mmu.h \ %D%/arm_disassembler.h \ + %D%/a64_disassembler.h \ %D%/arm_opcodes.h \ %D%/arm_simulator.h \ %D%/arm_semihosting.h \ diff --git a/src/target/a64_disassembler.c b/src/target/a64_disassembler.c new file mode 100644 index 000000000..bd78129dd --- /dev/null +++ b/src/target/a64_disassembler.c @@ -0,0 +1,145 @@ +/*************************************************************************** + * Copyright (C) 2019 by Mete Balci * + * metebalci@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * + ***************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include "target.h" +#include "a64_disassembler.h" + +#if HAVE_CAPSTONE + +#include + +static void print_opcode(struct command_invocation *cmd, const cs_insn *insn) +{ + uint32_t opcode = 0; + + memcpy(&opcode, insn->bytes, insn->size); + + if (insn->size == 4) { + + uint16_t opcode_high = opcode >> 16; + + opcode = opcode & 0xffff; + + command_print(cmd, + "0x%08" PRIx64" %04x %04x\t%s\t%s", + insn->address, + opcode, + opcode_high, + insn->mnemonic, + insn->op_str); + + } else { + + command_print( + cmd, + "0x%08" PRIx64" %04x\t%s\t%s", + insn->address, + opcode, + insn->mnemonic, + insn->op_str); + + } +} + +int a64_disassemble(struct command_invocation *cmd, struct target *target, target_addr_t address, size_t count) +{ + int ret; + int csret; + csh handle; + + csret = cs_open(CS_ARCH_ARM64, CS_MODE_LITTLE_ENDIAN, &handle); + + if (csret != CS_ERR_OK) { + + LOG_ERROR("cs_open() failed: %s", cs_strerror(csret)); + return ERROR_FAIL; + + } + + csret = cs_option(handle, CS_OPT_SKIPDATA, CS_OPT_ON); + + if (csret != CS_ERR_OK) { + + LOG_ERROR("cs_option() failed: %s", cs_strerror(csret)); + cs_close(&handle); + return ERROR_FAIL; + + } + + cs_insn *insn = cs_malloc(handle); + + if (csret != CS_ERR_OK) { + + LOG_ERROR("cs_malloc() failed: %s", cs_strerror(csret)); + cs_close(&handle); + return ERROR_FAIL; + + } + + while (count > 0) { + + uint8_t buffer[4]; + + ret = target_read_buffer(target, address, sizeof(buffer), buffer); + + if (ret != ERROR_OK) { + cs_free(insn, 1); + cs_close(&handle); + return ret; + } + + size_t size = sizeof(buffer); + const uint8_t *tmp = buffer; + + ret = cs_disasm_iter(handle, &tmp, &size, &address, insn); + + if (!ret) { + + LOG_ERROR("cs_disasm_iter() failed: %s", cs_strerror(cs_errno(handle))); + cs_free(insn, 1); + cs_close(&handle); + return ERROR_FAIL; + + } + + print_opcode(cmd, insn); + count--; + + } + + cs_free(insn, 1); + cs_close(&handle); + + return ERROR_OK; +} + +#else + +int a64_disassemble(struct command_invocation *cmd, struct target *target, target_addr_t address, size_t count) +{ + command_print(cmd, "capstone disassembly framework required"); + + return ERROR_FAIL; +} + +#endif diff --git a/src/target/a64_disassembler.h b/src/target/a64_disassembler.h new file mode 100644 index 000000000..5c58bbfe5 --- /dev/null +++ b/src/target/a64_disassembler.h @@ -0,0 +1,30 @@ +/*************************************************************************** + * Copyright (C) 2019 by Mete Balci * + * metebalci@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * + ***************************************************************************/ + +#ifndef OPENOCD_TARGET_AARCH64_DISASSEMBLER_H +#define OPENOCD_TARGET_AARCH64_DISASSEMBLER_H + +#include "target.h" + +int a64_disassemble( + struct command_invocation *cmd, + struct target *target, + target_addr_t address, + size_t count); + +#endif /* OPENOCD_TARGET_AARCH64_DISASSEMBLER_H */ diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 87176f638..d111a0568 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -23,6 +23,7 @@ #include "breakpoints.h" #include "aarch64.h" +#include "a64_disassembler.h" #include "register.h" #include "target_request.h" #include "target_type.h" @@ -99,12 +100,14 @@ static int aarch64_restore_system_control_reg(struct target *target) case ARM_MODE_ABT: case ARM_MODE_FIQ: case ARM_MODE_IRQ: + case ARM_MODE_HYP: case ARM_MODE_SYS: instr = ARMV4_5_MCR(15, 0, 0, 1, 0, 0); break; default: - LOG_INFO("cannot read system control register in this mode"); + LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)", + armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode); return ERROR_FAIL; } @@ -172,12 +175,13 @@ static int aarch64_mmu_modify(struct target *target, int enable) case ARM_MODE_ABT: case ARM_MODE_FIQ: case ARM_MODE_IRQ: + case ARM_MODE_HYP: case ARM_MODE_SYS: instr = ARMV4_5_MCR(15, 0, 0, 1, 0, 0); break; default: - LOG_DEBUG("unknown cpu state 0x%" PRIx32, armv8->arm.core_mode); + LOG_DEBUG("unknown cpu state 0x%x", armv8->arm.core_mode); break; } @@ -1033,12 +1037,14 @@ static int aarch64_post_debug_entry(struct target *target) case ARM_MODE_ABT: case ARM_MODE_FIQ: case ARM_MODE_IRQ: + case ARM_MODE_HYP: case ARM_MODE_SYS: instr = ARMV4_5_MRC(15, 0, 0, 1, 0, 0); break; default: - LOG_INFO("cannot read system control register in this mode"); + LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)", + armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode); return ERROR_FAIL; } @@ -2242,7 +2248,7 @@ static int aarch64_examine_first(struct target *target) struct aarch64_common *aarch64 = target_to_aarch64(target); struct armv8_common *armv8 = &aarch64->armv8_common; struct adiv5_dap *swjdp = armv8->arm.dap; - struct aarch64_private_config *pc; + struct aarch64_private_config *pc = target->private_config; int i; int retval = ERROR_OK; uint64_t debug, ttypr; @@ -2250,11 +2256,18 @@ static int aarch64_examine_first(struct target *target) uint32_t tmp0, tmp1, tmp2, tmp3; debug = ttypr = cpuid = 0; - /* Search for the APB-AB - it is needed for access to debug registers */ - retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv8->debug_ap); - if (retval != ERROR_OK) { - LOG_ERROR("Could not find APB-AP for debug access"); - return retval; + if (pc == NULL) + return ERROR_FAIL; + + if (pc->adiv5_config.ap_num == DP_APSEL_INVALID) { + /* Search for the APB-AB */ + retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv8->debug_ap); + if (retval != ERROR_OK) { + LOG_ERROR("Could not find APB-AP for debug access"); + return retval; + } + } else { + armv8->debug_ap = dap_ap(swjdp, pc->adiv5_config.ap_num); } retval = mem_ap_init(armv8->debug_ap); @@ -2329,10 +2342,6 @@ static int aarch64_examine_first(struct target *target) LOG_DEBUG("ttypr = 0x%08" PRIx64, ttypr); LOG_DEBUG("debug = 0x%08" PRIx64, debug); - if (target->private_config == NULL) - return ERROR_FAIL; - - pc = (struct aarch64_private_config *)target->private_config; if (pc->cti == NULL) return ERROR_FAIL; @@ -2485,6 +2494,7 @@ static int aarch64_jim_configure(struct target *target, Jim_GetOptInfo *goi) pc = (struct aarch64_private_config *)target->private_config; if (pc == NULL) { pc = calloc(1, sizeof(struct aarch64_private_config)); + pc->adiv5_config.ap_num = DP_APSEL_INVALID; target->private_config = pc; } @@ -2492,10 +2502,15 @@ static int aarch64_jim_configure(struct target *target, Jim_GetOptInfo *goi) * Call adiv5_jim_configure() to parse the common DAP options * It will return JIM_CONTINUE if it didn't find any known * options, JIM_OK if it correctly parsed the topmost option - * and JIM_ERR if an error occured during parameter evaluation. + * and JIM_ERR if an error occurred during parameter evaluation. * For JIM_CONTINUE, we check our own params. + * + * adiv5_jim_configure() assumes 'private_config' to point to + * 'struct adiv5_private_config'. Override 'private_config'! */ + target->private_config = &pc->adiv5_config; e = adiv5_jim_configure(target, goi); + target->private_config = pc; if (e != JIM_CONTINUE) return e; @@ -2561,7 +2576,6 @@ COMMAND_HANDLER(aarch64_handle_cache_info_command) &armv8->armv8_mmu.armv8_cache); } - COMMAND_HANDLER(aarch64_handle_dbginit_command) { struct target *target = get_current_target(CMD_CTX); @@ -2573,6 +2587,39 @@ COMMAND_HANDLER(aarch64_handle_dbginit_command) return aarch64_init_debug_access(target); } +COMMAND_HANDLER(aarch64_handle_disassemble_command) +{ + struct target *target = get_current_target(CMD_CTX); + + if (target == NULL) { + LOG_ERROR("No target selected"); + return ERROR_FAIL; + } + + struct aarch64_common *aarch64 = target_to_aarch64(target); + + if (aarch64->common_magic != AARCH64_COMMON_MAGIC) { + command_print(CMD, "current target isn't an AArch64"); + return ERROR_FAIL; + } + + int count = 1; + target_addr_t address; + + switch (CMD_ARGC) { + case 2: + COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], count); + /* FALL THROUGH */ + case 1: + COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address); + break; + default: + return ERROR_COMMAND_SYNTAX_ERROR; + } + + return a64_disassemble(CMD, target, address, count); +} + COMMAND_HANDLER(aarch64_mask_interrupts_command) { struct target *target = get_current_target(CMD_CTX); @@ -2753,6 +2800,13 @@ static const struct command_registration aarch64_exec_command_handlers[] = { .help = "Initialize core debug", .usage = "", }, + { + .name = "disassemble", + .handler = aarch64_handle_disassemble_command, + .mode = COMMAND_EXEC, + .help = "Disassemble instructions", + .usage = "address [count]", + }, { .name = "maskisr", .handler = aarch64_mask_interrupts_command, diff --git a/src/target/arc.c b/src/target/arc.c index 6cf0ec7af..e1b576436 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -33,7 +33,7 @@ * unexisting register is safe RAZ, rather then an error. * Note, core registers cannot be BCR. * - * In arc/cpu/ tcl files all regiters are defined as core, non-BCR aux + * In arc/cpu/ tcl files all registers are defined as core, non-BCR aux * and BCR aux, in "add-reg" command they are passed to three lists * respectively: core_reg_descriptions, aux_reg_descriptions, * bcr_reg_descriptions. @@ -86,6 +86,26 @@ struct reg *arc_reg_get_by_name(struct reg_cache *first, return NULL; } +/** + * Reset internal states of caches. Must be called when entering debugging. + * + * @param target Target for which to reset caches states. + */ +int arc_reset_caches_states(struct target *target) +{ + struct arc_common *arc = target_to_arc(target); + + LOG_DEBUG("Resetting internal variables of caches states"); + + /* Reset caches states. */ + arc->dcache_flushed = false; + arc->l2cache_flushed = false; + arc->icache_invalidated = false; + arc->dcache_invalidated = false; + arc->l2cache_invalidated = false; + + return ERROR_OK; +} /* Initialize arc_common structure, which passes to openocd target instance */ static int arc_init_arch_info(struct target *target, struct arc_common *arc, @@ -102,6 +122,15 @@ static int arc_init_arch_info(struct target *target, struct arc_common *arc, return ERROR_FAIL; } + /* On most ARC targets there is a dcache, so we enable its flushing + * by default. If there no dcache, there will be no error, just a slight + * performance penalty from unnecessary JTAG operations. */ + arc->has_dcache = true; + arc->has_icache = true; + /* L2$ is not available in a target by default. */ + arc->has_l2cache = false; + arc_reset_caches_states(target); + /* Add standard GDB data types */ INIT_LIST_HEAD(&arc->reg_data_types); struct arc_reg_data_type *std_types = calloc(ARRAY_SIZE(standard_gdb_types), @@ -168,7 +197,7 @@ int arc_reg_add(struct target *target, struct arc_reg_desc *arc_reg, arc->num_regs += 1; LOG_DEBUG( - "added register {name=%s, num=0x%x, type=%s%s%s%s}", + "added register {name=%s, num=0x%" PRIx32 ", type=%s%s%s%s}", arc_reg->name, arc_reg->arch_num, arc_reg->data_type->id, arc_reg->is_core ? ", core" : "", arc_reg->is_bcr ? ", bcr" : "", arc_reg->is_general ? ", general" : "" @@ -218,7 +247,7 @@ static int arc_get_register(struct reg *reg) reg->dirty = false; LOG_DEBUG("Get register gdb_num=%" PRIu32 ", name=%s, value=0x%" PRIx32, - reg->number , desc->name, value); + reg->number, desc->name, value); return ERROR_OK; @@ -257,7 +286,7 @@ const struct reg_arch_type arc_reg_type = { .set = arc_set_register, }; -/* GDB register groups. For now we suport only general and "empty" */ +/* GDB register groups. For now we support only general and "empty" */ static const char * const reg_group_general = "general"; static const char * const reg_group_other = ""; @@ -519,7 +548,7 @@ int arc_reg_get_field(struct target *target, const char *reg_name, struct reg *reg = arc_reg_get_by_name(target->reg_cache, reg_name, true); if (!reg) { - LOG_ERROR("Requested register `%s' doens't exist.", reg_name); + LOG_ERROR("Requested register `%s' doesn't exist.", reg_name); return ERROR_ARC_REGISTER_NOT_FOUND; } @@ -546,7 +575,7 @@ int arc_reg_get_field(struct target *target, const char *reg_name, if (!reg->valid) CHECK_RETVAL(reg->type->get(reg)); - /* First do endiannes-safe read of register value + /* First do endianness-safe read of register value * then convert it to binary buffer for further * field extraction */ @@ -574,6 +603,27 @@ static int arc_get_register_value(struct target *target, const char *reg_name, return ERROR_OK; } +static int arc_set_register_value(struct target *target, const char *reg_name, + uint32_t value) +{ + LOG_DEBUG("reg_name=%s value=0x%08" PRIx32, reg_name, value); + + if (!(target && reg_name)) { + LOG_ERROR("Arguments cannot be NULL."); + return ERROR_FAIL; + } + + struct reg *reg = arc_reg_get_by_name(target->reg_cache, reg_name, true); + + if (!reg) + return ERROR_ARC_REGISTER_NOT_FOUND; + + uint8_t value_buf[4]; + buf_set_u32(value_buf, 0, 32, value); + CHECK_RETVAL(reg->type->set(reg, value_buf)); + + return ERROR_OK; +} /* Configure DCCM's */ static int arc_configure_dccm(struct target *target) @@ -839,7 +889,7 @@ static int arc_save_context(struct target *target) core_cnt += 1; reg->valid = true; reg->dirty = false; - LOG_DEBUG("Get core register regnum=%" PRIu32 ", name=%s, value=0x%08" PRIx32, + LOG_DEBUG("Get core register regnum=%u, name=%s, value=0x%08" PRIx32, i, arc_reg->name, core_values[core_cnt]); } } @@ -854,8 +904,8 @@ static int arc_save_context(struct target *target) aux_cnt += 1; reg->valid = true; reg->dirty = false; - LOG_DEBUG("Get aux register regnum=%" PRIu32 ", name=%s, value=0x%08" PRIx32, - i , arc_reg->name, aux_values[aux_cnt]); + LOG_DEBUG("Get aux register regnum=%u, name=%s, value=0x%08" PRIx32, + i, arc_reg->name, aux_values[aux_cnt]); } } @@ -868,6 +918,44 @@ exit: return retval; } +/** + * Finds an actionpoint that triggered last actionpoint event, as specified by + * DEBUG.ASR. + * + * @param actionpoint Pointer to be set to last active actionpoint. Pointer + * will be set to NULL if DEBUG.AH is 0. + */ +static int get_current_actionpoint(struct target *target, + struct arc_actionpoint **actionpoint) +{ + assert(target != NULL); + assert(actionpoint != NULL); + + uint32_t debug_ah; + /* Check if actionpoint caused halt */ + CHECK_RETVAL(arc_reg_get_field(target, "debug", "ah", + &debug_ah)); + + if (debug_ah) { + struct arc_common *arc = target_to_arc(target); + unsigned int ap; + uint32_t debug_asr; + CHECK_RETVAL(arc_reg_get_field(target, "debug", + "asr", &debug_asr)); + + for (ap = 0; debug_asr > 1; debug_asr >>= 1) + ap += 1; + + assert(ap < arc->actionpoints_num); + + *actionpoint = &(arc->actionpoints_list[ap]); + } else { + *actionpoint = NULL; + } + + return ERROR_OK; +} + static int arc_examine_debug_reason(struct target *target) { uint32_t debug_bh; @@ -887,8 +975,20 @@ static int arc_examine_debug_reason(struct target *target) /* DEBUG.BH is set if core halted due to BRK instruction. */ target->debug_reason = DBG_REASON_BREAKPOINT; } else { - /* TODO: Add Actionpoint check when AP support will be introduced*/ - LOG_WARNING("Unknown debug reason"); + struct arc_actionpoint *actionpoint = NULL; + CHECK_RETVAL(get_current_actionpoint(target, &actionpoint)); + + if (actionpoint != NULL) { + if (!actionpoint->used) + LOG_WARNING("Target halted by an unused actionpoint."); + + if (actionpoint->type == ARC_AP_BREAKPOINT) + target->debug_reason = DBG_REASON_BREAKPOINT; + else if (actionpoint->type == ARC_AP_WATCHPOINT) + target->debug_reason = DBG_REASON_WATCHPOINT; + else + LOG_WARNING("Unknown type of actionpoint."); + } } return ERROR_OK; @@ -900,6 +1000,7 @@ static int arc_debug_entry(struct target *target) /* TODO: reset internal indicators of caches states, otherwise D$/I$ * will not be flushed/invalidated when required. */ + CHECK_RETVAL(arc_reset_caches_states(target)); CHECK_RETVAL(arc_examine_debug_reason(target)); return ERROR_OK; @@ -1152,6 +1253,11 @@ static int arc_resume(struct target *target, int current, target_addr_t address, LOG_DEBUG("current:%i, address:0x%08" TARGET_PRIxADDR ", handle_breakpoints(not supported yet):%i," " debug_execution:%i", current, address, handle_breakpoints, debug_execution); + /* We need to reset ARC cache variables so caches + * would be invalidated and actual data + * would be fetched from memory. */ + CHECK_RETVAL(arc_reset_caches_states(target)); + if (target->state != TARGET_HALTED) { LOG_WARNING("target not halted"); return ERROR_TARGET_NOT_HALTED; @@ -1266,6 +1372,7 @@ static void arc_deinit_target(struct target *target) list_for_each_entry_safe(desc, k, &arc->bcr_reg_descriptions, list) free_reg_desc(desc); + free(arc->actionpoints_list); free(arc); } @@ -1289,7 +1396,7 @@ static int arc_target_create(struct target *target, Jim_Interp *interp) * Write 4-byte instruction to memory. This is like target_write_u32, however * in case of little endian ARC instructions are in middle endian format, not * little endian, so different type of conversion should be done. - * Middle endinan: instruction "aabbccdd", stored as "bbaaddcc" + * Middle endian: instruction "aabbccdd", stored as "bbaaddcc" */ int arc_write_instruction_u32(struct target *target, uint32_t address, uint32_t instr) @@ -1342,10 +1449,54 @@ int arc_read_instruction_u32(struct target *target, uint32_t address, return ERROR_OK; } +/* Actionpoint mechanism allows to setup HW breakpoints + * and watchpoints. Each actionpoint is controlled by + * 3 aux registers: Actionpoint(AP) match mask(AP_AMM), AP match value(AP_AMV) + * and AP control(AC). + * This function is for setting/unsetting actionpoints: + * at - actionpoint target: trigger on mem/reg access + * tt - transaction type : trigger on r/w. */ +static int arc_configure_actionpoint(struct target *target, uint32_t ap_num, + uint32_t match_value, uint32_t control_tt, uint32_t control_at) +{ + struct arc_common *arc = target_to_arc(target); + + if (control_tt != AP_AC_TT_DISABLE) { + + if (arc->actionpoints_num_avail < 1) { + LOG_ERROR("No free actionpoints, maximim amount is %u", + arc->actionpoints_num); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + /* Names of register to set - 24 chars should be enough. Looks a little + * bit out-of-place for C code, but makes it aligned to the bigger + * concept of "ARC registers are defined in TCL" as far as possible. + */ + char ap_amv_reg_name[24], ap_amm_reg_name[24], ap_ac_reg_name[24]; + snprintf(ap_amv_reg_name, 24, "ap_amv%" PRIu32, ap_num); + snprintf(ap_amm_reg_name, 24, "ap_amm%" PRIu32, ap_num); + snprintf(ap_ac_reg_name, 24, "ap_ac%" PRIu32, ap_num); + CHECK_RETVAL(arc_set_register_value(target, ap_amv_reg_name, + match_value)); + CHECK_RETVAL(arc_set_register_value(target, ap_amm_reg_name, 0)); + CHECK_RETVAL(arc_set_register_value(target, ap_ac_reg_name, + control_tt | control_at)); + arc->actionpoints_num_avail--; + } else { + char ap_ac_reg_name[24]; + snprintf(ap_ac_reg_name, 24, "ap_ac%" PRIu32, ap_num); + CHECK_RETVAL(arc_set_register_value(target, ap_ac_reg_name, + AP_AC_TT_DISABLE)); + arc->actionpoints_num_avail++; + } + + return ERROR_OK; +} + static int arc_set_breakpoint(struct target *target, struct breakpoint *breakpoint) { - if (breakpoint->set) { LOG_WARNING("breakpoint already set"); return ERROR_OK; @@ -1390,14 +1541,41 @@ static int arc_set_breakpoint(struct target *target, breakpoint->set = 64; /* Any nice value but 0 */ } else if (breakpoint->type == BKPT_HARD) { - LOG_DEBUG("Hardware breakpoints are not supported yet!"); - return ERROR_FAIL; + struct arc_common *arc = target_to_arc(target); + struct arc_actionpoint *ap_list = arc->actionpoints_list; + unsigned int bp_num; + + for (bp_num = 0; bp_num < arc->actionpoints_num; bp_num++) { + if (!ap_list[bp_num].used) + break; + } + + if (bp_num >= arc->actionpoints_num) { + LOG_ERROR("No free actionpoints, maximum amount is %u", + arc->actionpoints_num); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + int retval = arc_configure_actionpoint(target, bp_num, + breakpoint->address, AP_AC_TT_READWRITE, AP_AC_AT_INST_ADDR); + + if (retval == ERROR_OK) { + breakpoint->set = bp_num + 1; + ap_list[bp_num].used = 1; + ap_list[bp_num].bp_value = breakpoint->address; + ap_list[bp_num].type = ARC_AP_BREAKPOINT; + + LOG_DEBUG("bpid: %" PRIu32 ", bp_num %u bp_value 0x%" PRIx32, + breakpoint->unique_id, bp_num, ap_list[bp_num].bp_value); + } + } else { LOG_DEBUG("ERROR: setting unknown breakpoint type"); return ERROR_FAIL; } - /* core instruction cache is now invalid, - * TODO: add cache invalidation function here (when implemented). */ + + /* core instruction cache is now invalid. */ + CHECK_RETVAL(arc_cache_invalidate(target)); return ERROR_OK; } @@ -1429,7 +1607,7 @@ static int arc_unset_breakpoint(struct target *target, } else { LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR " has been overwritten outside of debugger." - "Expected: @0x%" PRIx32 ", got: @0x%" PRIx32, + "Expected: @0x%x, got: @0x%" PRIx32, breakpoint->address, ARC_SDBBP_32, current_instr); } } else if (breakpoint->length == 2) { @@ -1455,15 +1633,34 @@ static int arc_unset_breakpoint(struct target *target, breakpoint->set = 0; } else if (breakpoint->type == BKPT_HARD) { - LOG_WARNING("Hardware breakpoints are not supported yet!"); - return ERROR_FAIL; + struct arc_common *arc = target_to_arc(target); + struct arc_actionpoint *ap_list = arc->actionpoints_list; + unsigned int bp_num = breakpoint->set - 1; + + if ((breakpoint->set == 0) || (bp_num >= arc->actionpoints_num)) { + LOG_DEBUG("Invalid actionpoint ID: %u in breakpoint: %" PRIu32, + bp_num, breakpoint->unique_id); + return ERROR_OK; + } + + retval = arc_configure_actionpoint(target, bp_num, + breakpoint->address, AP_AC_TT_DISABLE, AP_AC_AT_INST_ADDR); + + if (retval == ERROR_OK) { + breakpoint->set = 0; + ap_list[bp_num].used = 0; + ap_list[bp_num].bp_value = 0; + + LOG_DEBUG("bpid: %" PRIu32 " - released actionpoint ID: %i", + breakpoint->unique_id, bp_num); + } } else { LOG_DEBUG("ERROR: unsetting unknown breakpoint type"); return ERROR_FAIL; } - /* core instruction cache is now invalid. - * TODO: Add cache invalidation function */ + /* core instruction cache is now invalid. */ + CHECK_RETVAL(arc_cache_invalidate(target)); return retval; } @@ -1494,7 +1691,116 @@ static int arc_remove_breakpoint(struct target *target, return ERROR_OK; } -/* Helper function which swiches core to single_step mode by +void arc_reset_actionpoints(struct target *target) +{ + struct arc_common *arc = target_to_arc(target); + struct arc_actionpoint *ap_list = arc->actionpoints_list; + struct breakpoint *next_b; + + while (target->breakpoints) { + next_b = target->breakpoints->next; + arc_remove_breakpoint(target, target->breakpoints); + free(target->breakpoints->orig_instr); + free(target->breakpoints); + target->breakpoints = next_b; + } + for (unsigned int i = 0; i < arc->actionpoints_num; i++) { + if ((ap_list[i].used) && (ap_list[i].reg_address)) + arc_remove_auxreg_actionpoint(target, ap_list[i].reg_address); + } +} + +int arc_set_actionpoints_num(struct target *target, uint32_t ap_num) +{ + LOG_DEBUG("target=%s actionpoints=%" PRIu32, target_name(target), ap_num); + struct arc_common *arc = target_to_arc(target); + + /* Make sure that there are no enabled actionpoints in target. */ + arc_reset_actionpoints(target); + + /* Assume that all points have been removed from target. */ + free(arc->actionpoints_list); + + arc->actionpoints_num_avail = ap_num; + arc->actionpoints_num = ap_num; + /* calloc can be safely called when ncount == 0. */ + arc->actionpoints_list = calloc(ap_num, sizeof(struct arc_actionpoint)); + + if (!arc->actionpoints_list) { + LOG_ERROR("Unable to allocate memory"); + return ERROR_FAIL; + } + return ERROR_OK; +} + + +int arc_add_auxreg_actionpoint(struct target *target, + uint32_t auxreg_addr, uint32_t transaction) +{ + unsigned int ap_num = 0; + int retval = ERROR_OK; + + if (target->state != TARGET_HALTED) + return ERROR_TARGET_NOT_HALTED; + + struct arc_common *arc = target_to_arc(target); + struct arc_actionpoint *ap_list = arc->actionpoints_list; + + while (ap_list[ap_num].used) + ap_num++; + + if (ap_num >= arc->actionpoints_num) { + LOG_ERROR("No actionpoint free, maximum amount is %u", + arc->actionpoints_num); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + retval = arc_configure_actionpoint(target, ap_num, + auxreg_addr, transaction, AP_AC_AT_AUXREG_ADDR); + + if (retval == ERROR_OK) { + ap_list[ap_num].used = 1; + ap_list[ap_num].reg_address = auxreg_addr; + } + + return retval; +} + +int arc_remove_auxreg_actionpoint(struct target *target, uint32_t auxreg_addr) +{ + int retval = ERROR_OK; + bool ap_found = false; + unsigned int ap_num = 0; + + if (target->state != TARGET_HALTED) + return ERROR_TARGET_NOT_HALTED; + + struct arc_common *arc = target_to_arc(target); + struct arc_actionpoint *ap_list = arc->actionpoints_list; + + while ((ap_list[ap_num].used) && (ap_num < arc->actionpoints_num)) { + if (ap_list[ap_num].reg_address == auxreg_addr) { + ap_found = true; + break; + } + ap_num++; + } + + if (ap_found) { + retval = arc_configure_actionpoint(target, ap_num, + auxreg_addr, AP_AC_TT_DISABLE, AP_AC_AT_AUXREG_ADDR); + + if (retval == ERROR_OK) { + ap_list[ap_num].used = 0; + ap_list[ap_num].bp_value = 0; + } + } else { + LOG_ERROR("Register actionpoint not found"); + } + return retval; +} + +/* Helper function which switches core to single_step mode by * doing aux r/w operations. */ int arc_config_step(struct target *target, int enable_step) { @@ -1596,6 +1902,176 @@ int arc_step(struct target *target, int current, target_addr_t address, } +/* This function invalidates icache. */ +static int arc_icache_invalidate(struct target *target) +{ + uint32_t value; + + struct arc_common *arc = target_to_arc(target); + + /* Don't waste time if already done. */ + if (!arc->has_icache || arc->icache_invalidated) + return ERROR_OK; + + LOG_DEBUG("Invalidating I$."); + + value = IC_IVIC_INVALIDATE; /* invalidate I$ */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_IC_IVIC_REG, value)); + + arc->icache_invalidated = true; + + return ERROR_OK; +} + +/* This function invalidates dcache */ +static int arc_dcache_invalidate(struct target *target) +{ + uint32_t value, dc_ctrl_value; + + struct arc_common *arc = target_to_arc(target); + + if (!arc->has_dcache || arc->dcache_invalidated) + return ERROR_OK; + + LOG_DEBUG("Invalidating D$."); + + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, AUX_DC_CTRL_REG, &value)); + dc_ctrl_value = value; + value &= ~DC_CTRL_IM; + + /* set DC_CTRL invalidate mode to invalidate-only (no flushing!!) */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DC_CTRL_REG, value)); + value = DC_IVDC_INVALIDATE; /* invalidate D$ */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DC_IVDC_REG, value)); + + /* restore DC_CTRL invalidate mode */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DC_CTRL_REG, dc_ctrl_value)); + + arc->dcache_invalidated = true; + + return ERROR_OK; +} + +/* This function invalidates l2 cache. */ +static int arc_l2cache_invalidate(struct target *target) +{ + uint32_t value, slc_ctrl_value; + + struct arc_common *arc = target_to_arc(target); + + if (!arc->has_l2cache || arc->l2cache_invalidated) + return ERROR_OK; + + LOG_DEBUG("Invalidating L2$."); + + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_CTRL, &value)); + slc_ctrl_value = value; + value &= ~L2_CTRL_IM; + + /* set L2_CTRL invalidate mode to invalidate-only (no flushing!!) */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_CTRL, value)); + /* invalidate L2$ */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_INV, L2_INV_IV)); + + /* Wait until invalidate operation ends */ + do { + LOG_DEBUG("Waiting for invalidation end."); + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_CTRL, &value)); + } while (value & L2_CTRL_BS); + + /* restore L2_CTRL invalidate mode */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_CTRL, slc_ctrl_value)); + + arc->l2cache_invalidated = true; + + return ERROR_OK; +} + + +int arc_cache_invalidate(struct target *target) +{ + CHECK_RETVAL(arc_icache_invalidate(target)); + CHECK_RETVAL(arc_dcache_invalidate(target)); + CHECK_RETVAL(arc_l2cache_invalidate(target)); + + return ERROR_OK; +} + +/* Flush data cache. This function is cheap to call and return quickly if D$ + * already has been flushed since target had been halted. JTAG debugger reads + * values directly from memory, bypassing cache, so if there are unflushed + * lines debugger will read invalid values, which will cause a lot of troubles. + * */ +int arc_dcache_flush(struct target *target) +{ + uint32_t value, dc_ctrl_value; + bool has_to_set_dc_ctrl_im; + + struct arc_common *arc = target_to_arc(target); + + /* Don't waste time if already done. */ + if (!arc->has_dcache || arc->dcache_flushed) + return ERROR_OK; + + LOG_DEBUG("Flushing D$."); + + /* Store current value of DC_CTRL */ + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, AUX_DC_CTRL_REG, &dc_ctrl_value)); + + /* Set DC_CTRL invalidate mode to flush (if not already set) */ + has_to_set_dc_ctrl_im = (dc_ctrl_value & DC_CTRL_IM) == 0; + if (has_to_set_dc_ctrl_im) { + value = dc_ctrl_value | DC_CTRL_IM; + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DC_CTRL_REG, value)); + } + + /* Flush D$ */ + value = DC_IVDC_INVALIDATE; + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DC_IVDC_REG, value)); + + /* Restore DC_CTRL invalidate mode (even of flush failed) */ + if (has_to_set_dc_ctrl_im) + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DC_CTRL_REG, dc_ctrl_value)); + + arc->dcache_flushed = true; + + return ERROR_OK; +} + +/* This function flushes l2cache. */ +static int arc_l2cache_flush(struct target *target) +{ + uint32_t value; + + struct arc_common *arc = target_to_arc(target); + + /* Don't waste time if already done. */ + if (!arc->has_l2cache || arc->l2cache_flushed) + return ERROR_OK; + + LOG_DEBUG("Flushing L2$."); + + /* Flush L2 cache */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_FLUSH, L2_FLUSH_FL)); + + /* Wait until flush operation ends */ + do { + LOG_DEBUG("Waiting for flushing end."); + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, SLC_AUX_CACHE_CTRL, &value)); + } while (value & L2_CTRL_BS); + + arc->l2cache_flushed = true; + + return ERROR_OK; +} + +int arc_cache_flush(struct target *target) +{ + CHECK_RETVAL(arc_dcache_flush(target)); + CHECK_RETVAL(arc_l2cache_flush(target)); + + return ERROR_OK; +} /* ARC v2 target */ struct target_type arcv2_target = { @@ -1605,7 +2081,7 @@ struct target_type arcv2_target = { .arch_state = arc_arch_state, - /* TODO That seems like something similiar to metaware hostlink, so perhaps + /* TODO That seems like something similar to metaware hostlink, so perhaps * we can exploit this in the future. */ .target_request_data = NULL, diff --git a/src/target/arc.h b/src/target/arc.h index defa3fa97..aeb326cb5 100644 --- a/src/target/arc.h +++ b/src/target/arc.h @@ -55,11 +55,39 @@ #define REG_TYPE_MAX_NAME_LENGTH 20 /* ARC 32bits opcodes */ -#define ARC_SDBBP_32 0x256F003F /* BRK */ +#define ARC_SDBBP_32 0x256F003FU /* BRK */ /* ARC 16bits opcodes */ #define ARC_SDBBP_16 0x7FFF /* BRK_S */ +/* Cache registers */ +#define AUX_IC_IVIC_REG 0X10 +#define IC_IVIC_INVALIDATE 0XFFFFFFFF + +#define AUX_DC_IVDC_REG 0X47 +#define DC_IVDC_INVALIDATE BIT(0) +#define AUX_DC_CTRL_REG 0X48 +#define DC_CTRL_IM BIT(6) + +/* L2 cache registers */ +#define SLC_AUX_CACHE_CTRL 0x903 +#define L2_CTRL_IM BIT(6) +#define L2_CTRL_BS BIT(8) /* Busy flag */ +#define SLC_AUX_CACHE_FLUSH 0x904 +#define L2_FLUSH_FL BIT(0) +#define SLC_AUX_CACHE_INV 0x905 +#define L2_INV_IV BIT(0) + + /* Action Point */ +#define AP_AC_AT_INST_ADDR 0x0 +#define AP_AC_AT_MEMORY_ADDR 0x2 +#define AP_AC_AT_AUXREG_ADDR 0x4 + +#define AP_AC_TT_DISABLE 0x00 +#define AP_AC_TT_WRITE 0x10 +#define AP_AC_TT_READ 0x20 +#define AP_AC_TT_READWRITE 0x30 + struct arc_reg_bitfield { struct reg_data_type_bitfield bitfield; char name[REG_TYPE_MAX_NAME_LENGTH]; @@ -78,8 +106,6 @@ struct arc_reg_data_type { }; }; - - /* Standard GDB register types */ static const struct reg_data_type standard_gdb_types[] = { { .type = REG_TYPE_INT, .id = "int" }, @@ -100,6 +126,18 @@ static const struct reg_data_type standard_gdb_types[] = { { .type = REG_TYPE_IEEE_DOUBLE, .id = "ieee_double" }, }; +enum arc_actionpointype { + ARC_AP_BREAKPOINT, + ARC_AP_WATCHPOINT, +}; + +/* Actionpoint related fields */ +struct arc_actionpoint { + int used; + uint32_t bp_value; + uint32_t reg_address; + enum arc_actionpointype type; +}; struct arc_common { uint32_t common_magic; @@ -109,6 +147,22 @@ struct arc_common { struct reg_cache *core_and_aux_cache; struct reg_cache *bcr_cache; + /* Cache control */ + bool has_dcache; + bool has_icache; + bool has_l2cache; + /* If true, then D$ has been already flushed since core has been + * halted. */ + bool dcache_flushed; + /* If true, then L2 has been already flushed since core has been + * halted. */ + bool l2cache_flushed; + /* If true, then caches have been already flushed since core has been + * halted. */ + bool icache_invalidated; + bool dcache_invalidated; + bool l2cache_invalidated; + /* Indicate if cach was built (for deinit function) */ bool core_aux_cache_built; bool bcr_cache_built; @@ -138,6 +192,11 @@ struct arc_common { unsigned long pc_index_in_cache; /* DEBUG register location in register cache. */ unsigned long debug_index_in_cache; + + /* Actionpoints */ + unsigned int actionpoints_num; + unsigned int actionpoints_num_avail; + struct arc_actionpoint *actionpoints_list; }; /* Borrowed from nds32.h */ @@ -247,4 +306,12 @@ struct reg *arc_reg_get_by_name(struct reg_cache *first, int arc_reg_get_field(struct target *target, const char *reg_name, const char *field_name, uint32_t *value_ptr); +int arc_cache_flush(struct target *target); +int arc_cache_invalidate(struct target *target); + +int arc_add_auxreg_actionpoint(struct target *target, + uint32_t auxreg_addr, uint32_t transaction); +int arc_remove_auxreg_actionpoint(struct target *target, uint32_t auxreg_addr); +int arc_set_actionpoints_num(struct target *target, uint32_t ap_num); + #endif /* OPENOCD_TARGET_ARC_H */ diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c index fad8ca947..18f5cb8f4 100644 --- a/src/target/arc_cmd.c +++ b/src/target/arc_cmd.c @@ -86,7 +86,7 @@ static int jim_arc_read_reg_type_field(Jim_GetOptInfo *goi, const char **field_n int e = JIM_OK; if ((type == CFG_ADD_REG_TYPE_STRUCT && goi->argc < 3) || (type == CFG_ADD_REG_TYPE_FLAG && goi->argc < 2)) { - Jim_SetResultFormatted(goi->interp, "Not enough argmunets after -flag/-bitfield"); + Jim_SetResultFormatted(goi->interp, "Not enough arguments after -flag/-bitfield"); return JIM_ERR; } @@ -101,7 +101,7 @@ static int jim_arc_read_reg_type_field(Jim_GetOptInfo *goi, const char **field_n end_pos = start_pos; - /* Check if any argnuments remain, + /* Check if any arguments remain, * set bitfields[cur_field].end if flag is multibit */ if (goi->argc > 0) /* Check current argv[0], if it is equal to "-flag", @@ -143,9 +143,9 @@ static int jim_arc_add_reg_type_flags(Jim_Interp *interp, int argc, int e = JIM_OK; - /* Check if the amount of argnuments is not zero */ + /* Check if the amount of arguments is not zero */ if (goi.argc <= 0) { - Jim_SetResultFormatted(goi.interp, "The command has no argnuments"); + Jim_SetResultFormatted(goi.interp, "The command has no arguments"); return JIM_ERR; } @@ -154,7 +154,7 @@ static int jim_arc_add_reg_type_flags(Jim_Interp *interp, int argc, unsigned int fields_sz = (goi.argc - 2) / 3; unsigned int cur_field = 0; - /* Tha maximum amount of bitfilds is 32 */ + /* The maximum amount of bitfields is 32 */ if (fields_sz > 32) { Jim_SetResultFormatted(goi.interp, "The amount of bitfields exceed 32"); return JIM_ERR; @@ -451,7 +451,7 @@ static const struct command_registration arc_jtag_command_group[] = { "raw JTAG request that bypasses OpenOCD register cache " "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", - .usage = "arc jtag get-aux-reg " + .usage = "" }, { .name = "set-aux-reg", @@ -461,7 +461,7 @@ static const struct command_registration arc_jtag_command_group[] = { "raw JTAG request that bypasses OpenOCD register cache " "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", - .usage = "arc jtag set-aux-reg " + .usage = " " }, { .name = "get-core-reg", @@ -471,7 +471,7 @@ static const struct command_registration arc_jtag_command_group[] = { "raw JTAG request that bypasses OpenOCD register cache " "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", - .usage = "arc jtag get-core-reg []" + .usage = " []" }, { .name = "set-core-reg", @@ -481,7 +481,7 @@ static const struct command_registration arc_jtag_command_group[] = { "raw JTAG request that bypasses OpenOCD register cache " "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", - .usage = "arc jtag set-core-reg []" + .usage = " []" }, COMMAND_REGISTRATION_DONE }; @@ -509,9 +509,9 @@ static int jim_arc_add_reg_type_struct(Jim_Interp *interp, int argc, int e = JIM_OK; - /* Check if the amount of argnuments is not zero */ + /* Check if the amount of arguments is not zero */ if (goi.argc <= 0) { - Jim_SetResultFormatted(goi.interp, "The command has no argnuments"); + Jim_SetResultFormatted(goi.interp, "The command has no arguments"); return JIM_ERR; } @@ -520,7 +520,7 @@ static int jim_arc_add_reg_type_struct(Jim_Interp *interp, int argc, unsigned int fields_sz = (goi.argc - 2) / 4; unsigned int cur_field = 0; - /* Tha maximum amount of bitfilds is 32 */ + /* The maximum amount of bitfields is 32 */ if (fields_sz > 32) { Jim_SetResultFormatted(goi.interp, "The amount of bitfields exceed 32"); return JIM_ERR; @@ -672,19 +672,19 @@ static int jim_arc_add_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv) } /* There is no architecture number that we could treat as invalid, so - * separate variable requried to ensure that arch num has been set. */ + * separate variable required to ensure that arch num has been set. */ bool arch_num_set = false; const char *type_name = "int"; /* Default type */ int type_name_len = strlen(type_name); int e = ERROR_OK; /* At least we need to specify 4 parameters: name, number and gdb_feature, - * which means there should be 6 arguments. Also there can be additional paramters + * which means there should be 6 arguments. Also there can be additional parameters * "-type ", "-g" and "-core" or "-bcr" which makes maximum 10 parameters. */ if (goi.argc < 6 || goi.argc > 10) { free_reg_desc(reg); Jim_SetResultFormatted(goi.interp, - "Should be at least 6 argnuments and not greater than 10: " + "Should be at least 6 arguments and not greater than 10: " " -name -num -feature " " [-type ] [-core|-bcr] [-g]."); return JIM_ERR; @@ -909,14 +909,108 @@ static int jim_arc_get_reg_field(Jim_Interp *interp, int argc, Jim_Obj * const * return JIM_OK; } +COMMAND_HANDLER(arc_l1_cache_disable_auto_cmd) +{ + bool value; + int retval = 0; + struct arc_common *arc = target_to_arc(get_current_target(CMD_CTX)); + retval = CALL_COMMAND_HANDLER(handle_command_parse_bool, + &value, "target has caches enabled"); + arc->has_l2cache = value; + arc->has_dcache = value; + arc->has_icache = value; + return retval; +} + +COMMAND_HANDLER(arc_l2_cache_disable_auto_cmd) +{ + struct arc_common *arc = target_to_arc(get_current_target(CMD_CTX)); + return CALL_COMMAND_HANDLER(handle_command_parse_bool, + &arc->has_l2cache, "target has l2 cache enabled"); +} + +static int jim_handle_actionpoints_num(Jim_Interp *interp, int argc, + Jim_Obj * const *argv) +{ + Jim_GetOptInfo goi; + Jim_GetOpt_Setup(&goi, interp, argc - 1, argv + 1); + + LOG_DEBUG("-"); + + if (goi.argc >= 2) { + Jim_WrongNumArgs(interp, goi.argc, goi.argv, "[]"); + return JIM_ERR; + } + + struct command_context *context = current_command_context(interp); + assert(context); + + struct target *target = get_current_target(context); + + if (!target) { + Jim_SetResultFormatted(goi.interp, "No current target"); + return JIM_ERR; + } + + struct arc_common *arc = target_to_arc(target); + /* It is not possible to pass &arc->actionpoints_num directly to + * handle_command_parse_uint, because this value should be valid during + * "actionpoint reset, initiated by arc_set_actionpoints_num. */ + uint32_t ap_num = arc->actionpoints_num; + + if (goi.argc == 1) { + JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &ap_num)); + int e = arc_set_actionpoints_num(target, ap_num); + if (e != ERROR_OK) { + Jim_SetResultFormatted(goi.interp, + "Failed to set number of actionpoints"); + return JIM_ERR; + } + } + + Jim_SetResultInt(interp, ap_num); + + return JIM_OK; +} + /* ----- Exported target commands ------------------------------------------ */ +const struct command_registration arc_l2_cache_group_handlers[] = { + { + .name = "auto", + .handler = arc_l2_cache_disable_auto_cmd, + .mode = COMMAND_ANY, + .usage = "(1|0)", + .help = "Disable or enable L2", + }, + COMMAND_REGISTRATION_DONE +}; + +const struct command_registration arc_cache_group_handlers[] = { + { + .name = "auto", + .handler = arc_l1_cache_disable_auto_cmd, + .mode = COMMAND_ANY, + .help = "Disable or enable L1", + .usage = "(1|0)", + }, + { + .name = "l2", + .mode = COMMAND_ANY, + .help = "L2 cache command group", + .usage = "", + .chain = arc_l2_cache_group_handlers, + }, + COMMAND_REGISTRATION_DONE +}; + + static const struct command_registration arc_core_command_handlers[] = { -{ + { .name = "add-reg-type-flags", .jim_handler = jim_arc_add_reg_type_flags, .mode = COMMAND_CONFIG, - .usage = "arc ardd-reg-type-flags -name -flag " + .usage = "-name -flag " "[-flag ]...", .help = "Add new 'flags' register data type. Only single bit flags " "are supported. Type name is global. Bitsize of register is fixed " @@ -926,7 +1020,7 @@ static const struct command_registration arc_core_command_handlers[] = { .name = "add-reg-type-struct", .jim_handler = jim_arc_add_reg_type_struct, .mode = COMMAND_CONFIG, - .usage = "arc add-reg-type-struct -name -bitfield " + .usage = "-name -bitfield " "[-bitfield ]...", .help = "Add new 'struct' register data type. Only bit-fields are " "supported so far, which means that for each bitfield start and end " @@ -938,10 +1032,10 @@ static const struct command_registration arc_core_command_handlers[] = { .name = "add-reg", .jim_handler = jim_arc_add_reg, .mode = COMMAND_CONFIG, - .usage = "arc add-reg -name -num -feature [-gdbnum ] " + .usage = "-name -num -feature [-gdbnum ] " "[-core|-bcr] [-type ] [-g]", .help = "Add new register. Name, architectural number and feature name " - "are requried options. GDB regnum will default to previous register " + "are required options. GDB regnum will default to previous register " "(gdbnum + 1) and shouldn't be specified in most cases. Type " "defaults to default GDB 'int'.", }, @@ -949,7 +1043,7 @@ static const struct command_registration arc_core_command_handlers[] = { .name = "set-reg-exists", .handler = arc_set_reg_exists, .mode = COMMAND_ANY, - .usage = "arc set-reg-exists []...", + .usage = " []...", .help = "Set that register exists. Accepts multiple register names as " "arguments.", }, @@ -957,7 +1051,7 @@ static const struct command_registration arc_core_command_handlers[] = { .name = "get-reg-field", .jim_handler = jim_arc_get_reg_field, .mode = COMMAND_ANY, - .usage = "arc get-reg-field ", + .usage = " ", .help = "Returns value of field in a register with 'struct' type.", }, { @@ -967,6 +1061,20 @@ static const struct command_registration arc_core_command_handlers[] = { .usage = "", .chain = arc_jtag_command_group, }, + { + .name = "cache", + .mode = COMMAND_ANY, + .help = "cache command group", + .usage = "", + .chain = arc_cache_group_handlers, + }, + { + .name = "num-actionpoints", + .jim_handler = jim_handle_actionpoints_num, + .mode = COMMAND_ANY, + .usage = "[]", + .help = "Prints or sets amount of actionpoints in the processor.", + }, COMMAND_REGISTRATION_DONE }; @@ -975,7 +1083,7 @@ const struct command_registration arc_monitor_command_handlers[] = { .name = "arc", .mode = COMMAND_ANY, .help = "ARC monitor command group", - .usage = "Help info ...", + .usage = "", .chain = arc_core_command_handlers, }, COMMAND_REGISTRATION_DONE diff --git a/src/target/arc_jtag.c b/src/target/arc_jtag.c index e85167a6f..fd77b37f2 100644 --- a/src/target/arc_jtag.c +++ b/src/target/arc_jtag.c @@ -158,7 +158,7 @@ static void arc_jtag_enque_status_read(struct arc_jtag * const jtag_info, assert(jtag_info->tap); assert(buffer); - /* first writin code(0x8) of jtag status register in IR */ + /* first writing code(0x8) of jtag status register in IR */ arc_jtag_enque_write_ir(jtag_info, ARC_JTAG_STATUS_REG); /* Now reading dr performs jtag status register read */ arc_jtag_enque_read_dr(jtag_info, buffer, TAP_IDLE); @@ -223,7 +223,7 @@ static void arc_jtag_enque_register_rw(struct arc_jtag *jtag_info, uint32_t *add else arc_jtag_enque_read_dr(jtag_info, read_buffer + i * 4, TAP_IDLE); } - /* To prevent pollution of next regiter due to optimization it is necessary * + /* To prevent pollution of next register due to optimization it is necessary * * to reset transaction */ arc_jtag_enque_reset_transaction(jtag_info); } diff --git a/src/target/arc_mem.c b/src/target/arc_mem.c index e80bfb4e4..96762690f 100644 --- a/src/target/arc_mem.c +++ b/src/target/arc_mem.c @@ -41,10 +41,18 @@ static int arc_mem_write_block32(struct target *target, uint32_t addr, /* Check arguments */ assert(!(addr & 3)); + /* We need to flush the cache since it might contain dirty + * lines, so the cache invalidation may cause data inconsistency. */ + CHECK_RETVAL(arc_cache_flush(target)); + + /* No need to flush cache, because we don't read values from memory. */ CHECK_RETVAL(arc_jtag_write_memory(&arc->jtag_info, addr, count, (uint32_t *)buf)); + /* Invalidate caches. */ + CHECK_RETVAL(arc_cache_invalidate(target)); + return ERROR_OK; } @@ -64,8 +72,11 @@ static int arc_mem_write_block16(struct target *target, uint32_t addr, /* Check arguments */ assert(!(addr & 1)); - /* non-word writes are less common, than 4-byte writes, so I suppose we can - * allowe ourselves to write this in a cycle, instead of calling arc_jtag + /* We will read data from memory, so we need to flush the cache. */ + CHECK_RETVAL(arc_cache_flush(target)); + + /* non-word writes are less common than 4-byte writes, so I suppose we can + * allow ourselves to write this in a cycle, instead of calling arc_jtag * with count > 1. */ for (i = 0; i < count; i++) { /* We can read only word at word-aligned address. Also *jtag_read_memory @@ -97,6 +108,9 @@ static int arc_mem_write_block16(struct target *target, uint32_t addr, (addr + i * sizeof(uint16_t)) & ~3u, 1, &buffer_he)); } + /* Invalidate caches. */ + CHECK_RETVAL(arc_cache_invalidate(target)); + return ERROR_OK; } @@ -113,8 +127,11 @@ static int arc_mem_write_block8(struct target *target, uint32_t addr, LOG_DEBUG("Write 1-byte memory block: addr=0x%08" PRIx32 ", count=%" PRIu32, addr, count); - /* non-word writes are less common, than 4-byte writes, so I suppose we can - * allowe ourselves to write this in a cycle, instead of calling arc_jtag + /* We will read data from memory, so we need to flush the cache. */ + CHECK_RETVAL(arc_cache_flush(target)); + + /* non-word writes are less common than 4-byte writes, so I suppose we can + * allow ourselves to write this in a cycle, instead of calling arc_jtag * with count > 1. */ for (i = 0; i < count; i++) { /* See comment in arc_mem_write_block16 for details. Since it is a byte @@ -128,6 +145,9 @@ static int arc_mem_write_block8(struct target *target, uint32_t addr, CHECK_RETVAL(arc_jtag_write_memory(&arc->jtag_info, (addr + i) & ~3, 1, &buffer_he)); } + /* Invalidate caches. */ + CHECK_RETVAL(arc_cache_invalidate(target)); + return ERROR_OK; } @@ -153,7 +173,7 @@ int arc_mem_write(struct target *target, target_addr_t address, uint32_t size, if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; - /* correct endianess if we have word or hword access */ + /* correct endianness if we have word or hword access */ if (size > 1) { /* * arc_..._write_mem with size 4/2 requires uint32_t/uint16_t @@ -205,6 +225,9 @@ static int arc_mem_read_block(struct target *target, target_addr_t addr, assert(!(addr & 3)); assert(size == 4); + /* Flush cache before memory access */ + CHECK_RETVAL(arc_cache_flush(target)); + CHECK_RETVAL(arc_jtag_read_memory(&arc->jtag_info, addr, count, buf, arc_mem_is_slow_memory(arc, addr, size, count))); diff --git a/src/target/arm.h b/src/target/arm.h index 3450260f0..d97a95edf 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -197,6 +197,9 @@ struct arm { /** Flag reporting armv6m based core. */ bool is_armv6m; + /** Flag reporting armv8m based core. */ + bool is_armv8m; + /** Floating point or VFP version, 0 if disabled. */ int arm_vfp_version; diff --git a/src/target/arm11.c b/src/target/arm11.c index 10a1d6de5..68d4e1894 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1131,6 +1131,14 @@ static int arm11_init_target(struct command_context *cmd_ctx, return ERROR_OK; } +static void arm11_deinit_target(struct target *target) +{ + struct arm11_common *arm11 = target_to_arm11(target); + + arm11_dpm_deinit(arm11); + free(arm11); +} + /* talk to the target and set things up */ static int arm11_examine(struct target *target) { @@ -1379,5 +1387,6 @@ struct target_type arm11_target = { .commands = arm11_command_handlers, .target_create = arm11_target_create, .init_target = arm11_init_target, + .deinit_target = arm11_deinit_target, .examine = arm11_examine, }; diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index a758db58f..60be0096f 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -1193,3 +1193,13 @@ int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr) return arm11_bpwp_flush(arm11); } + +void arm11_dpm_deinit(struct arm11_common *arm11) +{ + struct arm_dpm *dpm = &arm11->dpm; + + free(arm11->bpwp_actions); + arm_free_reg_cache(dpm->arm); + free(dpm->dbp); + free(dpm->dwp); +} diff --git a/src/target/arm11_dbgtap.h b/src/target/arm11_dbgtap.h index 541434edc..be0248411 100644 --- a/src/target/arm11_dbgtap.h +++ b/src/target/arm11_dbgtap.h @@ -78,6 +78,7 @@ int arm11_read_memory_word(struct arm11_common *arm11, uint32_t address, uint32_t *result); int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr); +void arm11_dpm_deinit(struct arm11_common *arm11); int arm11_bpwp_flush(struct arm11_common *arm11); #endif /* OPENOCD_TARGET_ARM11_DBGTAP_H */ diff --git a/src/target/arm720t.c b/src/target/arm720t.c index abe5f1cea..e04cab2e7 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -391,6 +391,11 @@ static int arm720t_init_target(struct command_context *cmd_ctx, struct target *t return arm7tdmi_init_target(cmd_ctx, target); } +static void arm720t_deinit_target(struct target *target) +{ + arm7tdmi_deinit_target(target); +} + /* FIXME remove forward decls */ static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, @@ -583,6 +588,7 @@ struct target_type arm720t_target = { .commands = arm720t_command_handlers, .target_create = arm720t_target_create, .init_target = arm720t_init_target, + .deinit_target = arm720t_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 6a7bf9da5..d70d27377 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -55,8 +55,8 @@ * shadowed registers, and support for the Thumb instruction set. * * Processor differences include things like presence or absence of MMU - * and cache, pipeline sizes, use of a modified Harvard Architecure - * (with separate instruction and data busses from the CPU), support + * and cache, pipeline sizes, use of a modified Harvard Architecture + * (with separate instruction and data buses from the CPU), support * for cpu clock gating during idle, and more. */ @@ -102,7 +102,7 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br } else LOG_ERROR("BUG: no hardware comparator available"); - LOG_DEBUG("BPID: %" PRId32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d", + LOG_DEBUG("BPID: %" PRIu32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d", breakpoint->unique_id, breakpoint->address, breakpoint->set); @@ -188,7 +188,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break struct arm7_9_common *arm7_9 = target_to_arm7_9(target); int retval = ERROR_OK; - LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d", + LOG_DEBUG("BPID: %" PRIu32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d", breakpoint->unique_id, breakpoint->address, breakpoint->type); @@ -300,7 +300,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre int retval = ERROR_OK; struct arm7_9_common *arm7_9 = target_to_arm7_9(target); - LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR, + LOG_DEBUG("BPID: %" PRIu32 ", Address: 0x%08" TARGET_PRIxADDR, breakpoint->unique_id, breakpoint->address); @@ -310,7 +310,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre } if (breakpoint->type == BKPT_HARD) { - LOG_DEBUG("BPID: %" PRId32 " Releasing hw wp: %d", + LOG_DEBUG("BPID: %" PRIu32 " Releasing hw wp: %d", breakpoint->unique_id, breakpoint->set); if (breakpoint->set == 1) { @@ -1009,7 +1009,7 @@ int arm7_9_deassert_reset(struct target *target) /** * Clears the halt condition for an ARM7/9 target. If it isn't coming out of - * reset and if DBGRQ is used, it is progammed to be deasserted. If the reset + * reset and if DBGRQ is used, it is programmed to be deasserted. If the reset * vector catch was used, it is restored. Otherwise, the control value is * restored and the watchpoint unit is restored if it was in use. * @@ -1725,7 +1725,7 @@ int arm7_9_resume(struct target *target, breakpoint = breakpoint_find(target, buf_get_u32(arm->pc->value, 0, 32)); if (breakpoint != NULL) { - LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRId32, + LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRIu32, breakpoint->address, breakpoint->unique_id); retval = arm7_9_unset_breakpoint(target, breakpoint); @@ -2682,6 +2682,15 @@ int arm7_9_examine(struct target *target) return retval; } +void arm7_9_deinit(struct target *target) +{ + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + + if (target_was_examined(target)) + embeddedice_free_reg_cache(arm7_9->eice_cache); + + arm_jtag_close_connection(&arm7_9->jtag_info); +} int arm7_9_check_reset(struct target *target) { diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index 811f9c593..4961212bb 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -186,6 +186,7 @@ int arm7_9_execute_sys_speed(struct target *target); int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9); int arm7_9_examine(struct target *target); +void arm7_9_deinit(struct target *target); int arm7_9_check_reset(struct target *target); int arm7_9_endianness_callback(jtag_callback_data_t pu8_in, diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index e1e91c3a0..01685ab6a 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -613,6 +613,13 @@ static void arm7tdmi_build_reg_cache(struct target *target) (*cache_p) = arm_build_reg_cache(target, arm); } +static void arm7tdmi_free_reg_cache(struct target *target) +{ + struct arm *arm = target_to_arm(target); + + arm_free_reg_cache(arm); +} + int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target) { arm7tdmi_build_reg_cache(target); @@ -620,6 +627,11 @@ int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target) return ERROR_OK; } +void arm7tdmi_deinit_target(struct target *target) +{ + arm7tdmi_free_reg_cache(target); +} + int arm7tdmi_init_arch_info(struct target *target, struct arm7_9_common *arm7_9, struct jtag_tap *tap) { @@ -718,6 +730,7 @@ struct target_type arm7tdmi_target = { .commands = arm7_9_command_handlers, .target_create = arm7tdmi_target_create, .init_target = arm7tdmi_init_target, + .deinit_target = arm7tdmi_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/arm7tdmi.h b/src/target/arm7tdmi.h index 053f64df8..3cc3d4a7b 100644 --- a/src/target/arm7tdmi.h +++ b/src/target/arm7tdmi.h @@ -28,5 +28,6 @@ int arm7tdmi_init_arch_info(struct target *target, struct arm7_9_common *arm7_9, struct jtag_tap *tap); int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target); +void arm7tdmi_deinit_target(struct target *target); #endif /* OPENOCD_TARGET_ARM7TDMI_H */ diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 3ddd19888..c96975a77 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -852,6 +852,16 @@ static int arm920t_target_create(struct target *target, Jim_Interp *interp) return arm920t_init_arch_info(target, arm920t, target->tap); } +static void arm920t_deinit_target(struct target *target) +{ + struct arm *arm = target_to_arm(target); + struct arm920t_common *arm920t = target_to_arm920(target); + + arm7_9_deinit(target); + arm_free_reg_cache(arm); + free(arm920t); +} + COMMAND_HANDLER(arm920t_handle_read_cache_command) { int retval = ERROR_OK; @@ -1716,6 +1726,7 @@ struct target_type arm920t_target = { .commands = arm920t_command_handlers, .target_create = arm920t_target_create, .init_target = arm9tdmi_init_target, + .deinit_target = arm920t_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index ac30485b8..95a4f7ca0 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -723,6 +723,16 @@ static int arm926ejs_target_create(struct target *target, Jim_Interp *interp) return arm926ejs_init_arch_info(target, arm926ejs, target->tap); } +void arm926ejs_deinit_target(struct target *target) +{ + struct arm *arm = target_to_arm(target); + struct arm926ejs_common *arm926ejs = target_to_arm926(target); + + arm7_9_deinit(target); + arm_free_reg_cache(arm); + free(arm926ejs); +} + COMMAND_HANDLER(arm926ejs_handle_cache_info_command) { int retval; @@ -823,6 +833,7 @@ struct target_type arm926ejs_target = { .commands = arm926ejs_command_handlers, .target_create = arm926ejs_target_create, .init_target = arm9tdmi_init_target, + .deinit_target = arm926ejs_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, .virt2phys = arm926ejs_virt2phys, diff --git a/src/target/arm946e.c b/src/target/arm946e.c index 4ef167a9d..8754c861c 100644 --- a/src/target/arm946e.c +++ b/src/target/arm946e.c @@ -45,7 +45,7 @@ /** * flag to give info about cache manipulation during debug : * "0" - cache lines are invalidated "on the fly", for affected addresses. - * This is prefered from performance point of view. + * This is preferred from performance point of view. * "1" - cache is invalidated and switched off on debug_entry, and switched back on on restore. * It is kept off during debugging. */ @@ -99,6 +99,16 @@ static int arm946e_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } +static void arm946e_deinit_target(struct target *target) +{ + struct arm *arm = target_to_arm(target); + struct arm946e_common *arm946e = target_to_arm946(target); + + arm7_9_deinit(target); + arm_free_reg_cache(arm); + free(arm946e); +} + static int arm946e_verify_pointer(struct command_invocation *cmd, struct arm946e_common *arm946e) { @@ -251,7 +261,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target) */ int nb_idx = (csize / (4*8*NB_CACHE_WAYS)); /* gives nb of lines (indexes) in the cache */ - /* Loop for all segmentde (i.e. ways) */ + /* Loop for all segments (i.e. ways) */ uint32_t seg; for (seg = 0; seg < NB_CACHE_WAYS; seg++) { /* Loop for all indexes */ @@ -586,7 +596,7 @@ COMMAND_HANDLER(arm946e_handle_cp15) uint32_t value; retval = arm946e_read_cp15(target, address, &value); if (retval != ERROR_OK) { - command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address); + command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address); return retval; } retval = jtag_execute_queue(); @@ -601,7 +611,7 @@ COMMAND_HANDLER(arm946e_handle_cp15) retval = arm946e_write_cp15(target, address, value); if (retval != ERROR_OK) { - command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address); + command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address); return retval; } if (address == CP15_CTL) @@ -776,6 +786,7 @@ struct target_type arm946e_target = { .commands = arm946e_command_handlers, .target_create = arm946e_target_create, .init_target = arm9tdmi_init_target, + .deinit_target = arm946e_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/arm966e.c b/src/target/arm966e.c index 8462f546e..b6d3e50e3 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -56,6 +56,16 @@ static int arm966e_target_create(struct target *target, Jim_Interp *interp) return arm966e_init_arch_info(target, arm966e, target->tap); } +static void arm966e_deinit_target(struct target *target) +{ + struct arm *arm = target_to_arm(target); + struct arm966e_common *arm966e = target_to_arm966(target); + + arm7_9_deinit(target); + arm_free_reg_cache(arm); + free(arm966e); +} + static int arm966e_verify_pointer(struct command_invocation *cmd, struct arm966e_common *arm966e) { @@ -189,7 +199,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) retval = arm966e_read_cp15(target, address, &value); if (retval != ERROR_OK) { command_print(CMD, - "couldn't access reg %" PRIi32, + "couldn't access reg %" PRIu32, address); return ERROR_OK; } @@ -197,7 +207,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) if (retval != ERROR_OK) return retval; - command_print(CMD, "%" PRIi32 ": %8.8" PRIx32, + command_print(CMD, "%" PRIu32 ": %8.8" PRIx32, address, value); } else if (CMD_ARGC == 2) { uint32_t value; @@ -205,11 +215,11 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) retval = arm966e_write_cp15(target, address, value); if (retval != ERROR_OK) { command_print(CMD, - "couldn't access reg %" PRIi32, + "couldn't access reg %" PRIu32, address); return ERROR_OK; } - command_print(CMD, "%" PRIi32 ": %8.8" PRIx32, + command_print(CMD, "%" PRIu32 ": %8.8" PRIx32, address, value); } } @@ -278,6 +288,7 @@ struct target_type arm966e_target = { .commands = arm966e_command_handlers, .target_create = arm966e_target_create, .init_target = arm9tdmi_init_target, + .deinit_target = arm966e_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 6ab06edf9..4810c2b16 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -786,6 +786,16 @@ static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } +void arm9tdmi_deinit_target(struct target *target) +{ + struct arm *arm = target_to_arm(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + + arm7_9_deinit(target); + arm_free_reg_cache(arm); + free(arm7_9); +} + COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) { struct target *target = get_current_target(CMD_CTX); @@ -921,6 +931,7 @@ struct target_type arm9tdmi_target = { .commands = arm9tdmi_command_handlers, .target_create = arm9tdmi_target_create, .init_target = arm9tdmi_init_target, + .deinit_target = arm9tdmi_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/arm9tdmi.h b/src/target/arm9tdmi.h index c6f0ccf0f..56946f78a 100644 --- a/src/target/arm9tdmi.h +++ b/src/target/arm9tdmi.h @@ -26,6 +26,7 @@ int arm9tdmi_init_target(struct command_context *cmd_ctx, struct target *target); +void arm9tdmi_deinit_target(struct target *target); int arm9tdmi_init_arch_info(struct target *target, struct arm7_9_common *arm7_9, struct jtag_tap *tap); extern const struct command_registration arm9tdmi_command_handlers[]; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index f19514c85..a09e2698a 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -51,7 +51,7 @@ * is set in the DP_CTRL_STAT register, the SSTICKYORUN status is set and * further AP operations will fail. There are two basic methods to avoid * such overrun errors. One involves polling for status instead of using - * transaction piplining. The other involves adding delays to ensure the + * transaction pipelining. The other involves adding delays to ensure the * AP has enough time to complete one operation before starting the next * one. (For JTAG these delays are controlled by memaccess_tck.) */ @@ -872,7 +872,7 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a * 3-0 : AP Type (0=JTAG-AP 1=AHB-AP 2=APB-AP 4=AXI-AP) */ - /* Reading register for a non-existant AP should not cause an error, + /* Reading register for a non-existent AP should not cause an error, * but just to be sure, try to continue searching if an error does happen. */ if ((retval == ERROR_OK) && /* Register read success */ @@ -1072,21 +1072,23 @@ static const struct { { ARM_ID, 0x00c, "Cortex-M4 SCS", "(System Control Space)", }, { ARM_ID, 0x00d, "CoreSight ETM11", "(Embedded Trace)", }, { ARM_ID, 0x00e, "Cortex-M7 FPB", "(Flash Patch and Breakpoint)", }, + { ARM_ID, 0x470, "Cortex-M1 ROM", "(ROM Table)", }, + { ARM_ID, 0x471, "Cortex-M0 ROM", "(ROM Table)", }, { ARM_ID, 0x490, "Cortex-A15 GIC", "(Generic Interrupt Controller)", }, { ARM_ID, 0x4a1, "Cortex-A53 ROM", "(v8 Memory Map ROM Table)", }, { ARM_ID, 0x4a2, "Cortex-A57 ROM", "(ROM Table)", }, { ARM_ID, 0x4a3, "Cortex-A53 ROM", "(v7 Memory Map ROM Table)", }, { ARM_ID, 0x4a4, "Cortex-A72 ROM", "(ROM Table)", }, { ARM_ID, 0x4a9, "Cortex-A9 ROM", "(ROM Table)", }, + { ARM_ID, 0x4aa, "Cortex-A35 ROM", "(v8 Memory Map ROM Table)", }, { ARM_ID, 0x4af, "Cortex-A15 ROM", "(ROM Table)", }, + { ARM_ID, 0x4b5, "Cortex-R5 ROM", "(ROM Table)", }, { ARM_ID, 0x4c0, "Cortex-M0+ ROM", "(ROM Table)", }, { ARM_ID, 0x4c3, "Cortex-M3 ROM", "(ROM Table)", }, { ARM_ID, 0x4c4, "Cortex-M4 ROM", "(ROM Table)", }, { ARM_ID, 0x4c7, "Cortex-M7 PPB ROM", "(Private Peripheral Bus ROM Table)", }, { ARM_ID, 0x4c8, "Cortex-M7 ROM", "(ROM Table)", }, - { ARM_ID, 0x4b5, "Cortex-R5 ROM", "(ROM Table)", }, - { ARM_ID, 0x470, "Cortex-M1 ROM", "(ROM Table)", }, - { ARM_ID, 0x471, "Cortex-M0 ROM", "(ROM Table)", }, + { ARM_ID, 0x4e0, "Cortex-A35 ROM", "(v7 Memory Map ROM Table)", }, { ARM_ID, 0x906, "CoreSight CTI", "(Cross Trigger)", }, { ARM_ID, 0x907, "CoreSight ETB", "(Trace Buffer)", }, { ARM_ID, 0x908, "CoreSight CSTF", "(Trace Funnel)", }, @@ -1129,6 +1131,7 @@ static const struct { { ARM_ID, 0x9d3, "Cortex-A53 PMU", "(Performance Monitor Unit)", }, { ARM_ID, 0x9d7, "Cortex-A57 PMU", "(Performance Monitor Unit)", }, { ARM_ID, 0x9d8, "Cortex-A72 PMU", "(Performance Monitor Unit)", }, + { ARM_ID, 0x9da, "Cortex-A35 PMU/CTI/ETM", "(Performance Monitor Unit/Cross Trigger/ETM)", }, { ARM_ID, 0xc05, "Cortex-A5 Debug", "(Debug Unit)", }, { ARM_ID, 0xc07, "Cortex-A7 Debug", "(Debug Unit)", }, { ARM_ID, 0xc08, "Cortex-A8 Debug", "(Debug Unit)", }, @@ -1139,6 +1142,7 @@ static const struct { { ARM_ID, 0xc15, "Cortex-R5 Debug", "(Debug Unit)", }, { ARM_ID, 0xc17, "Cortex-R7 Debug", "(Debug Unit)", }, { ARM_ID, 0xd03, "Cortex-A53 Debug", "(Debug Unit)", }, + { ARM_ID, 0xd04, "Cortex-A35 Debug", "(Debug Unit)", }, { ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", }, { ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", }, { 0x097, 0x9af, "MSP432 ROM", "(ROM Table)" }, @@ -1149,8 +1153,8 @@ static const struct { { 0x0E5, 0x000, "SHARC+/Blackfin+", "", }, { 0x0F0, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", }, { 0x3eb, 0x181, "Tegra 186 ROM", "(ROM Table)", }, - { 0x3eb, 0x211, "Tegra 210 ROM", "(ROM Table)", }, { 0x3eb, 0x202, "Denver ETM", "(Denver Embedded Trace)", }, + { 0x3eb, 0x211, "Tegra 210 ROM", "(ROM Table)", }, { 0x3eb, 0x302, "Denver Debug", "(Debug Unit)", }, { 0x3eb, 0x402, "Denver PMU", "(Performance Monitor Unit)", }, /* legacy comment: 0x113: what? */ @@ -1678,7 +1682,7 @@ COMMAND_HANDLER(dap_memaccess_command) } dap->ap[dap->apsel].memaccess_tck = memaccess_tck; - command_print(CMD, "memory bus access delay set to %" PRIi32 " tck", + command_print(CMD, "memory bus access delay set to %" PRIu32 " tck", dap->ap[dap->apsel].memaccess_tck); return ERROR_OK; @@ -1691,7 +1695,7 @@ COMMAND_HANDLER(dap_apsel_command) switch (CMD_ARGC) { case 0: - command_print(CMD, "%" PRIi32, dap->apsel); + command_print(CMD, "%" PRIu32, dap->apsel); return ERROR_OK; case 1: COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); @@ -1717,7 +1721,7 @@ COMMAND_HANDLER(dap_apcsw_command) switch (CMD_ARGC) { case 0: - command_print(CMD, "ap %" PRIi32 " selected, csw 0x%8.8" PRIx32, + command_print(CMD, "ap %" PRIu32 " selected, csw 0x%8.8" PRIx32, dap->apsel, apcsw); return ERROR_OK; case 1: diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 17365bddb..ea7155167 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -253,7 +253,7 @@ struct adiv5_dap { /* Control config */ uint32_t dp_ctrl_stat; - struct adiv5_ap ap[256]; + struct adiv5_ap ap[DP_APSEL_MAX + 1]; /* The current manually selected AP by the "dap apsel" command */ uint32_t apsel; diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index da8aee28b..9b8c09e45 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -26,6 +26,10 @@ #include "arm_disassembler.h" #include +#if HAVE_CAPSTONE +#include +#endif + /* * This disassembler supports two main functions for OpenOCD: * @@ -92,8 +96,8 @@ * the Cortex-M implementations). */ -/* textual represenation of the condition field - * ALways (default) is ommitted (empty string) */ +/* textual representation of the condition field + * ALways (default) is omitted (empty string) */ static const char *arm_condition_strings[] = { "EQ", "NE", "CS", "CC", "MI", "PL", "VS", "VC", "HI", "LS", "GE", "LT", "GT", "LE", "", "NV" }; @@ -2896,7 +2900,7 @@ int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, struct arm_instruct instruction->instruction_size = 2; if ((opcode & 0xe000) == 0x0000) { - /* add/substract register or immediate */ + /* add/subtract register or immediate */ if ((opcode & 0x1800) == 0x1800) return evaluate_add_sub_thumb(opcode, address, instruction); /* shift by immediate */ @@ -2904,7 +2908,7 @@ int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, struct arm_instruct return evaluate_shift_imm_thumb(opcode, address, instruction); } - /* Add/substract/compare/move immediate */ + /* Add/subtract/compare/move immediate */ if ((opcode & 0xe000) == 0x2000) return evaluate_data_proc_imm_thumb(opcode, address, instruction); @@ -3000,1593 +3004,6 @@ int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, struct arm_instruct return -1; } -static int t2ev_b_bl(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - unsigned offset; - unsigned b21 = 1 << 21; - unsigned b22 = 1 << 22; - - /* instead of combining two smaller 16-bit branch instructions, - * Thumb2 uses only one larger 32-bit instruction. - */ - offset = opcode & 0x7ff; - offset |= (opcode & 0x03ff0000) >> 5; - if (opcode & (1 << 26)) { - offset |= 0xff << 23; - if ((opcode & (1 << 11)) == 0) - b21 = 0; - if ((opcode & (1 << 13)) == 0) - b22 = 0; - } else { - if (opcode & (1 << 11)) - b21 = 0; - if (opcode & (1 << 13)) - b22 = 0; - } - offset |= b21; - offset |= b22; - - - address += 4; - address += offset << 1; - - char *inst; - switch ((opcode >> 12) & 0x5) { - case 0x1: - inst = "B.W"; - instruction->type = ARM_B; - break; - case 0x4: - inst = "BLX"; - instruction->type = ARM_BLX; - address &= 0xfffffffc; - break; - case 0x5: - inst = "BL"; - instruction->type = ARM_BL; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - instruction->info.b_bl_bx_blx.reg_operand = -1; - instruction->info.b_bl_bx_blx.target_address = address; - sprintf(cp, "%s\t%#8.8" PRIx32, inst, address); - - return ERROR_OK; -} - -static int t2ev_cond_b(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - unsigned offset; - unsigned b17 = 1 << 17; - unsigned b18 = 1 << 18; - unsigned cond = (opcode >> 22) & 0x0f; - - offset = opcode & 0x7ff; - offset |= (opcode & 0x003f0000) >> 5; - if (opcode & (1 << 26)) { - offset |= 0x1fff << 19; - if ((opcode & (1 << 11)) == 0) - b17 = 0; - if ((opcode & (1 << 13)) == 0) - b18 = 0; - } else { - if (opcode & (1 << 11)) - b17 = 0; - if (opcode & (1 << 13)) - b18 = 0; - } - offset |= b17; - offset |= b18; - - address += 4; - address += offset << 1; - - instruction->type = ARM_B; - instruction->info.b_bl_bx_blx.reg_operand = -1; - instruction->info.b_bl_bx_blx.target_address = address; - sprintf(cp, "B%s.W\t%#8.8" PRIx32, - arm_condition_strings[cond], - address); - - return ERROR_OK; -} - -static const char *special_name(int number) -{ - char *special = "(RESERVED)"; - - switch (number) { - case 0: - special = "apsr"; - break; - case 1: - special = "iapsr"; - break; - case 2: - special = "eapsr"; - break; - case 3: - special = "xpsr"; - break; - case 5: - special = "ipsr"; - break; - case 6: - special = "epsr"; - break; - case 7: - special = "iepsr"; - break; - case 8: - special = "msp"; - break; - case 9: - special = "psp"; - break; - case 16: - special = "primask"; - break; - case 17: - special = "basepri"; - break; - case 18: - special = "basepri_max"; - break; - case 19: - special = "faultmask"; - break; - case 20: - special = "control"; - break; - } - return special; -} - -static int t2ev_hint(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - const char *mnemonic; - - if (opcode & 0x0700) { - instruction->type = ARM_UNDEFINED_INSTRUCTION; - strcpy(cp, "UNDEFINED"); - return ERROR_OK; - } - - if (opcode & 0x00f0) { - sprintf(cp, "DBG\t#%d", (int) opcode & 0xf); - return ERROR_OK; - } - - switch (opcode & 0x0f) { - case 0: - mnemonic = "NOP.W"; - break; - case 1: - mnemonic = "YIELD.W"; - break; - case 2: - mnemonic = "WFE.W"; - break; - case 3: - mnemonic = "WFI.W"; - break; - case 4: - mnemonic = "SEV.W"; - break; - default: - mnemonic = "HINT.W (UNRECOGNIZED)"; - break; - } - strcpy(cp, mnemonic); - return ERROR_OK; -} - -static int t2ev_misc(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - const char *mnemonic; - - switch ((opcode >> 4) & 0x0f) { - case 0: - mnemonic = "LEAVEX"; - break; - case 1: - mnemonic = "ENTERX"; - break; - case 2: - mnemonic = "CLREX"; - break; - case 4: - mnemonic = "DSB"; - break; - case 5: - mnemonic = "DMB"; - break; - case 6: - mnemonic = "ISB"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - strcpy(cp, mnemonic); - return ERROR_OK; -} - -static int t2ev_b_misc(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - /* permanently undefined */ - if ((opcode & 0x07f07000) == 0x07f02000) { - instruction->type = ARM_UNDEFINED_INSTRUCTION; - strcpy(cp, "UNDEFINED"); - return ERROR_OK; - } - - switch ((opcode >> 12) & 0x5) { - case 0x1: - case 0x4: - case 0x5: - return t2ev_b_bl(opcode, address, instruction, cp); - case 0: - if (((opcode >> 23) & 0x07) != 0x07) - return t2ev_cond_b(opcode, address, instruction, cp); - if (opcode & (1 << 26)) - goto undef; - break; - } - - switch ((opcode >> 20) & 0x7f) { - case 0x38: - case 0x39: - sprintf(cp, "MSR\t%s, r%d", special_name(opcode & 0xff), - (int) (opcode >> 16) & 0x0f); - return ERROR_OK; - case 0x3a: - return t2ev_hint(opcode, address, instruction, cp); - case 0x3b: - return t2ev_misc(opcode, address, instruction, cp); - case 0x3c: - sprintf(cp, "BXJ\tr%d", (int) (opcode >> 16) & 0x0f); - return ERROR_OK; - case 0x3e: - case 0x3f: - sprintf(cp, "MRS\tr%d, %s", (int) (opcode >> 8) & 0x0f, - special_name(opcode & 0xff)); - return ERROR_OK; - } - -undef: - return ERROR_COMMAND_SYNTAX_ERROR; -} - -static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - char *mnemonic = NULL; - int rn = (opcode >> 16) & 0xf; - int rd = (opcode >> 8) & 0xf; - unsigned immed = opcode & 0xff; - unsigned func; - bool one = false; - char *suffix = ""; - char *suffix2 = ""; - - /* ARMv7-M: A5.3.2 Modified immediate constants */ - func = (opcode >> 11) & 0x0e; - if (immed & 0x80) - func |= 1; - if (opcode & (1 << 26)) - func |= 0x10; - - /* "Modified" immediates */ - switch (func >> 1) { - case 0: - break; - case 2: - immed <<= 8; - /* FALLTHROUGH */ - case 1: - immed += immed << 16; - break; - case 3: - immed += immed << 8; - immed += immed << 16; - break; - default: - immed |= 0x80; - immed = ror(immed, func); - } - - if (opcode & (1 << 20)) - suffix = "S"; - - switch ((opcode >> 21) & 0xf) { - case 0: - if (rd == 0xf) { - instruction->type = ARM_TST; - mnemonic = "TST"; - one = true; - suffix = ""; - rd = rn; - } else { - instruction->type = ARM_AND; - mnemonic = "AND"; - } - break; - case 1: - instruction->type = ARM_BIC; - mnemonic = "BIC"; - break; - case 2: - if (rn == 0xf) { - instruction->type = ARM_MOV; - mnemonic = "MOV"; - one = true; - suffix2 = ".W"; - } else { - instruction->type = ARM_ORR; - mnemonic = "ORR"; - } - break; - case 3: - if (rn == 0xf) { - instruction->type = ARM_MVN; - mnemonic = "MVN"; - one = true; - } else { - /* instruction->type = ARM_ORN; */ - mnemonic = "ORN"; - } - break; - case 4: - if (rd == 0xf) { - instruction->type = ARM_TEQ; - mnemonic = "TEQ"; - one = true; - suffix = ""; - rd = rn; - } else { - instruction->type = ARM_EOR; - mnemonic = "EOR"; - } - break; - case 8: - if (rd == 0xf) { - instruction->type = ARM_CMN; - mnemonic = "CMN"; - one = true; - suffix = ""; - rd = rn; - } else { - instruction->type = ARM_ADD; - mnemonic = "ADD"; - suffix2 = ".W"; - } - break; - case 10: - instruction->type = ARM_ADC; - mnemonic = "ADC"; - suffix2 = ".W"; - break; - case 11: - instruction->type = ARM_SBC; - mnemonic = "SBC"; - break; - case 13: - if (rd == 0xf) { - instruction->type = ARM_CMP; - mnemonic = "CMP"; - one = true; - suffix = ""; - rd = rn; - } else { - instruction->type = ARM_SUB; - mnemonic = "SUB"; - } - suffix2 = ".W"; - break; - case 14: - instruction->type = ARM_RSB; - mnemonic = "RSB"; - suffix2 = ".W"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - if (one) - sprintf(cp, "%s%s\tr%d, #%d\t; %#8.8x", - mnemonic, suffix2, rd, immed, immed); - else - sprintf(cp, "%s%s%s\tr%d, r%d, #%d\t; %#8.8x", - mnemonic, suffix, suffix2, - rd, rn, immed, immed); - - return ERROR_OK; -} - -static int t2ev_data_immed(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - char *mnemonic = NULL; - int rn = (opcode >> 16) & 0xf; - int rd = (opcode >> 8) & 0xf; - unsigned immed; - bool add = false; - bool is_signed = false; - - immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 4); - if (opcode & (1 << 26)) - immed |= (1 << 11); - - switch ((opcode >> 20) & 0x1f) { - case 0: - if (rn == 0xf) { - add = true; - goto do_adr; - } - mnemonic = "ADDW"; - break; - case 4: - immed |= (opcode >> 4) & 0xf000; - sprintf(cp, "MOVW\tr%d, #%d\t; %#3.3x", rd, immed, immed); - return ERROR_OK; - case 0x0a: - if (rn == 0xf) - goto do_adr; - mnemonic = "SUBW"; - break; - case 0x0c: - /* move constant to top 16 bits of register */ - immed |= (opcode >> 4) & 0xf000; - sprintf(cp, "MOVT\tr%d, #%d\t; %#4.4x", rd, immed, immed); - return ERROR_OK; - case 0x10: - case 0x12: - is_signed = true; - /* fallthrough */ - case 0x18: - case 0x1a: - /* signed/unsigned saturated add */ - immed = (opcode >> 6) & 0x03; - immed |= (opcode >> 10) & 0x1c; - sprintf(cp, "%sSAT\tr%d, #%d, r%d, %s #%d\t", - is_signed ? "S" : "U", - rd, (int) (opcode & 0x1f) + is_signed, rn, - (opcode & (1 << 21)) ? "ASR" : "LSL", - immed ? immed : 32); - return ERROR_OK; - case 0x14: - is_signed = true; - /* FALLTHROUGH */ - case 0x1c: - /* signed/unsigned bitfield extract */ - immed = (opcode >> 6) & 0x03; - immed |= (opcode >> 10) & 0x1c; - sprintf(cp, "%sBFX\tr%d, r%d, #%d, #%d\t", - is_signed ? "S" : "U", - rd, rn, immed, - (int) (opcode & 0x1f) + 1); - return ERROR_OK; - case 0x16: - immed = (opcode >> 6) & 0x03; - immed |= (opcode >> 10) & 0x1c; - if (rn == 0xf) /* bitfield clear */ - sprintf(cp, "BFC\tr%d, #%d, #%d\t", - rd, immed, - (int) (opcode & 0x1f) + 1 - immed); - else /* bitfield insert */ - sprintf(cp, "BFI\tr%d, r%d, #%d, #%d\t", - rd, rn, immed, - (int) (opcode & 0x1f) + 1 - immed); - return ERROR_OK; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - sprintf(cp, "%s\tr%d, r%d, #%d\t; %#3.3x", mnemonic, - rd, rn, immed, immed); - return ERROR_OK; - -do_adr: - address = thumb_alignpc4(address); - if (add) - address += immed; - else - address -= immed; - /* REVISIT "ADD/SUB Rd, PC, #const ; 0x..." might be better; - * not hiding the pc-relative stuff will sometimes be useful. - */ - sprintf(cp, "ADR.W\tr%d, %#8.8" PRIx32, rd, address); - return ERROR_OK; -} - -static int t2ev_store_single(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - unsigned op = (opcode >> 20) & 0xf; - char *size = ""; - char *suffix = ""; - char *p1 = ""; - char *p2 = "]"; - unsigned immed; - unsigned rn = (opcode >> 16) & 0x0f; - unsigned rt = (opcode >> 12) & 0x0f; - - if (rn == 0xf) - return ERROR_COMMAND_SYNTAX_ERROR; - - if (opcode & 0x0800) - op |= 1; - switch (op) { - /* byte */ - case 0x8: - case 0x9: - size = "B"; - goto imm12; - case 0x1: - size = "B"; - goto imm8; - case 0x0: - size = "B"; - break; - /* halfword */ - case 0xa: - case 0xb: - size = "H"; - goto imm12; - case 0x3: - size = "H"; - goto imm8; - case 0x2: - size = "H"; - break; - /* word */ - case 0xc: - case 0xd: - goto imm12; - case 0x5: - goto imm8; - case 0x4: - break; - /* error */ - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - sprintf(cp, "STR%s.W\tr%d, [r%d, r%d, LSL #%d]", - size, rt, rn, (int) opcode & 0x0f, - (int) (opcode >> 4) & 0x03); - return ERROR_OK; - -imm12: - immed = opcode & 0x0fff; - sprintf(cp, "STR%s.W\tr%d, [r%d, #%u]\t; %#3.3x", - size, rt, rn, immed, immed); - return ERROR_OK; - -imm8: - immed = opcode & 0x00ff; - - switch (opcode & 0x700) { - case 0x600: - suffix = "T"; - break; - case 0x000: - case 0x200: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - /* two indexed modes will write back rn */ - if (opcode & 0x100) { - if (opcode & 0x400) /* pre-indexed */ - p2 = "]!"; - else { /* post-indexed */ - p1 = "]"; - p2 = ""; - } - } - - sprintf(cp, "STR%s%s\tr%d, [r%d%s, #%s%u%s\t; %#2.2x", - size, suffix, rt, rn, p1, - (opcode & 0x200) ? "" : "-", - immed, p2, immed); - return ERROR_OK; -} - -static int t2ev_mul32(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int ra = (opcode >> 12) & 0xf; - - switch (opcode & 0x007000f0) { - case 0: - if (ra == 0xf) - sprintf(cp, "MUL\tr%d, r%d, r%d", - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 16) & 0xf, - (int) (opcode >> 0) & 0xf); - else - sprintf(cp, "MLA\tr%d, r%d, r%d, r%d", - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 16) & 0xf, - (int) (opcode >> 0) & 0xf, ra); - break; - case 0x10: - sprintf(cp, "MLS\tr%d, r%d, r%d, r%d", - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 16) & 0xf, - (int) (opcode >> 0) & 0xf, ra); - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - return ERROR_OK; -} - -static int t2ev_mul64_div(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int op = (opcode >> 4) & 0xf; - char *infix = "MUL"; - - op += (opcode >> 16) & 0x70; - switch (op) { - case 0x40: - case 0x60: - infix = "MLA"; - /* FALLTHROUGH */ - case 0: - case 0x20: - sprintf(cp, "%c%sL\tr%d, r%d, r%d, r%d", - (op & 0x20) ? 'U' : 'S', - infix, - (int) (opcode >> 12) & 0xf, - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 16) & 0xf, - (int) (opcode >> 0) & 0xf); - break; - case 0x1f: - case 0x3f: - sprintf(cp, "%cDIV\tr%d, r%d, r%d", - (op & 0x20) ? 'U' : 'S', - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 16) & 0xf, - (int) (opcode >> 0) & 0xf); - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - return ERROR_OK; -} - -static int t2ev_ldm_stm(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int rn = (opcode >> 16) & 0xf; - int op = (opcode >> 22) & 0x6; - int t = (opcode >> 21) & 1; - unsigned registers = opcode & 0xffff; - char *mode = ""; - - if (opcode & (1 << 20)) - op |= 1; - - switch (op) { - case 0: - mode = "DB"; - /* FALL THROUGH */ - case 6: - sprintf(cp, "SRS%s\tsp%s, #%d", mode, - t ? "!" : "", - (unsigned) (opcode & 0x1f)); - return ERROR_OK; - case 1: - mode = "DB"; - /* FALL THROUGH */ - case 7: - sprintf(cp, "RFE%s\tr%d%s", mode, - (unsigned) ((opcode >> 16) & 0xf), - t ? "!" : ""); - return ERROR_OK; - case 2: - sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : ""); - break; - case 3: - if (rn == 13 && t) - sprintf(cp, "POP.W\t"); - else - sprintf(cp, "LDM.W\tr%d%s, ", rn, t ? "!" : ""); - break; - case 4: - if (rn == 13 && t) - sprintf(cp, "PUSH.W\t"); - else - sprintf(cp, "STMDB\tr%d%s, ", rn, t ? "!" : ""); - break; - case 5: - sprintf(cp, "LDMDB.W\tr%d%s, ", rn, t ? "!" : ""); - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - cp = strchr(cp, 0); - *cp++ = '{'; - for (t = 0; registers; t++, registers >>= 1) { - if ((registers & 1) == 0) - continue; - registers &= ~1; - sprintf(cp, "r%d%s", t, registers ? ", " : ""); - cp = strchr(cp, 0); - } - *cp++ = '}'; - *cp++ = 0; - - return ERROR_OK; -} - -/* load/store dual or exclusive, table branch */ -static int t2ev_ldrex_strex(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - unsigned op1op2 = (opcode >> 20) & 0x3; - unsigned op3 = (opcode >> 4) & 0xf; - char *mnemonic; - unsigned rn = (opcode >> 16) & 0xf; - unsigned rt = (opcode >> 12) & 0xf; - unsigned rd = (opcode >> 8) & 0xf; - unsigned imm = opcode & 0xff; - char *p1 = ""; - char *p2 = "]"; - - op1op2 |= (opcode >> 21) & 0xc; - switch (op1op2) { - case 0: - mnemonic = "STREX"; - goto strex; - case 1: - mnemonic = "LDREX"; - goto ldrex; - case 2: - case 6: - case 8: - case 10: - case 12: - case 14: - mnemonic = "STRD"; - goto immediate; - case 3: - case 7: - case 9: - case 11: - case 13: - case 15: - mnemonic = "LDRD"; - if (rn == 15) - goto literal; - else - goto immediate; - case 4: - switch (op3) { - case 4: - mnemonic = "STREXB"; - break; - case 5: - mnemonic = "STREXH"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - rd = opcode & 0xf; - imm = 0; - goto strex; - case 5: - switch (op3) { - case 0: - sprintf(cp, "TBB\t[r%u, r%u]", rn, imm & 0xf); - return ERROR_OK; - case 1: - sprintf(cp, "TBH\t[r%u, r%u, LSL #1]", rn, imm & 0xf); - return ERROR_OK; - case 4: - mnemonic = "LDREXB"; - break; - case 5: - mnemonic = "LDREXH"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - imm = 0; - goto ldrex; - } - return ERROR_COMMAND_SYNTAX_ERROR; - -strex: - imm <<= 2; - if (imm) - sprintf(cp, "%s\tr%u, r%u, [r%u, #%u]\t; %#2.2x", - mnemonic, rd, rt, rn, imm, imm); - else - sprintf(cp, "%s\tr%u, r%u, [r%u]", - mnemonic, rd, rt, rn); - return ERROR_OK; - -ldrex: - imm <<= 2; - if (imm) - sprintf(cp, "%s\tr%u, [r%u, #%u]\t; %#2.2x", - mnemonic, rt, rn, imm, imm); - else - sprintf(cp, "%s\tr%u, [r%u]", - mnemonic, rt, rn); - return ERROR_OK; - -immediate: - /* two indexed modes will write back rn */ - if (opcode & (1 << 21)) { - if (opcode & (1 << 24)) /* pre-indexed */ - p2 = "]!"; - else { /* post-indexed */ - p1 = "]"; - p2 = ""; - } - } - - imm <<= 2; - sprintf(cp, "%s\tr%u, r%u, [r%u%s, #%s%u%s\t; %#2.2x", - mnemonic, rt, rd, rn, p1, - (opcode & (1 << 23)) ? "" : "-", - imm, p2, imm); - return ERROR_OK; - -literal: - address = thumb_alignpc4(address); - imm <<= 2; - if (opcode & (1 << 23)) - address += imm; - else - address -= imm; - sprintf(cp, "%s\tr%u, r%u, %#8.8" PRIx32, - mnemonic, rt, rd, address); - return ERROR_OK; -} - -static int t2ev_data_shift(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int op = (opcode >> 21) & 0xf; - int rd = (opcode >> 8) & 0xf; - int rn = (opcode >> 16) & 0xf; - int type = (opcode >> 4) & 0x3; - int immed = (opcode >> 6) & 0x3; - char *mnemonic; - char *suffix = ""; - - immed |= (opcode >> 10) & 0x1c; - if (opcode & (1 << 20)) - suffix = "S"; - - switch (op) { - case 0: - if (rd == 0xf) { - if (!(opcode & (1 << 20))) - return ERROR_COMMAND_SYNTAX_ERROR; - instruction->type = ARM_TST; - mnemonic = "TST"; - suffix = ""; - goto two; - } - instruction->type = ARM_AND; - mnemonic = "AND"; - break; - case 1: - instruction->type = ARM_BIC; - mnemonic = "BIC"; - break; - case 2: - if (rn == 0xf) { - instruction->type = ARM_MOV; - switch (type) { - case 0: - if (immed == 0) { - sprintf(cp, "MOV%s.W\tr%d, r%d", - suffix, rd, - (int) (opcode & 0xf)); - return ERROR_OK; - } - mnemonic = "LSL"; - break; - case 1: - mnemonic = "LSR"; - break; - case 2: - mnemonic = "ASR"; - break; - default: - if (immed == 0) { - sprintf(cp, "RRX%s\tr%d, r%d", - suffix, rd, - (int) (opcode & 0xf)); - return ERROR_OK; - } - mnemonic = "ROR"; - break; - } - goto immediate; - } else { - instruction->type = ARM_ORR; - mnemonic = "ORR"; - } - break; - case 3: - if (rn == 0xf) { - instruction->type = ARM_MVN; - mnemonic = "MVN"; - rn = rd; - goto two; - } else { - /* instruction->type = ARM_ORN; */ - mnemonic = "ORN"; - } - break; - case 4: - if (rd == 0xf) { - if (!(opcode & (1 << 20))) - return ERROR_COMMAND_SYNTAX_ERROR; - instruction->type = ARM_TEQ; - mnemonic = "TEQ"; - suffix = ""; - goto two; - } - instruction->type = ARM_EOR; - mnemonic = "EOR"; - break; - case 8: - if (rd == 0xf) { - if (!(opcode & (1 << 20))) - return ERROR_COMMAND_SYNTAX_ERROR; - instruction->type = ARM_CMN; - mnemonic = "CMN"; - suffix = ""; - goto two; - } - instruction->type = ARM_ADD; - mnemonic = "ADD"; - break; - case 0xa: - instruction->type = ARM_ADC; - mnemonic = "ADC"; - break; - case 0xb: - instruction->type = ARM_SBC; - mnemonic = "SBC"; - break; - case 0xd: - if (rd == 0xf) { - if (!(opcode & (1 << 21))) - return ERROR_COMMAND_SYNTAX_ERROR; - instruction->type = ARM_CMP; - mnemonic = "CMP"; - suffix = ""; - goto two; - } - instruction->type = ARM_SUB; - mnemonic = "SUB"; - break; - case 0xe: - instruction->type = ARM_RSB; - mnemonic = "RSB"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - sprintf(cp, "%s%s.W\tr%d, r%d, r%d", - mnemonic, suffix, rd, rn, (int) (opcode & 0xf)); - -shift: - cp = strchr(cp, 0); - - switch (type) { - case 0: - if (immed == 0) - return ERROR_OK; - suffix = "LSL"; - break; - case 1: - suffix = "LSR"; - if (immed == 32) - immed = 0; - break; - case 2: - suffix = "ASR"; - if (immed == 32) - immed = 0; - break; - case 3: - if (immed == 0) { - strcpy(cp, ", RRX"); - return ERROR_OK; - } - suffix = "ROR"; - break; - } - sprintf(cp, ", %s #%d", suffix, immed ? immed : 32); - return ERROR_OK; - -two: - sprintf(cp, "%s%s.W\tr%d, r%d", - mnemonic, suffix, rn, (int) (opcode & 0xf)); - goto shift; - -immediate: - sprintf(cp, "%s%s.W\tr%d, r%d, #%d", - mnemonic, suffix, rd, - (int) (opcode & 0xf), immed ? immed : 32); - return ERROR_OK; -} - -static int t2ev_data_reg(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - char *mnemonic; - char *suffix = ""; - - if (((opcode >> 4) & 0xf) == 0) { - switch ((opcode >> 21) & 0x7) { - case 0: - mnemonic = "LSL"; - break; - case 1: - mnemonic = "LSR"; - break; - case 2: - mnemonic = "ASR"; - break; - case 3: - mnemonic = "ROR"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - instruction->type = ARM_MOV; - if (opcode & (1 << 20)) - suffix = "S"; - sprintf(cp, "%s%s.W\tr%d, r%d, r%d", - mnemonic, suffix, - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 16) & 0xf, - (int) (opcode >> 0) & 0xf); - - } else if (opcode & (1 << 7)) { - switch ((opcode >> 20) & 0xf) { - case 0: - case 1: - case 4: - case 5: - switch ((opcode >> 4) & 0x3) { - case 1: - suffix = ", ROR #8"; - break; - case 2: - suffix = ", ROR #16"; - break; - case 3: - suffix = ", ROR #24"; - break; - } - sprintf(cp, "%cXT%c.W\tr%d, r%d%s", - (opcode & (1 << 24)) ? 'U' : 'S', - (opcode & (1 << 26)) ? 'B' : 'H', - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 0) & 0xf, - suffix); - break; - case 8: - case 9: - case 0xa: - case 0xb: - if (opcode & (1 << 6)) - return ERROR_COMMAND_SYNTAX_ERROR; - if (((opcode >> 12) & 0xf) != 0xf) - return ERROR_COMMAND_SYNTAX_ERROR; - if (!(opcode & (1 << 20))) - return ERROR_COMMAND_SYNTAX_ERROR; - - switch (((opcode >> 19) & 0x04) - | ((opcode >> 4) & 0x3)) { - case 0: - mnemonic = "REV.W"; - break; - case 1: - mnemonic = "REV16.W"; - break; - case 2: - mnemonic = "RBIT"; - break; - case 3: - mnemonic = "REVSH.W"; - break; - case 4: - mnemonic = "CLZ"; - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - sprintf(cp, "%s\tr%d, r%d", - mnemonic, - (int) (opcode >> 8) & 0xf, - (int) (opcode >> 0) & 0xf); - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - } - - return ERROR_OK; -} - -static int t2ev_load_word(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int rn = (opcode >> 16) & 0xf; - int immed; - - instruction->type = ARM_LDR; - - if (rn == 0xf) { - immed = opcode & 0x0fff; - if ((opcode & (1 << 23)) == 0) - immed = -immed; - sprintf(cp, "LDR\tr%d, %#8.8" PRIx32, - (int) (opcode >> 12) & 0xf, - thumb_alignpc4(address) + immed); - return ERROR_OK; - } - - if (opcode & (1 << 23)) { - immed = opcode & 0x0fff; - sprintf(cp, "LDR.W\tr%d, [r%d, #%d]\t; %#3.3x", - (int) (opcode >> 12) & 0xf, - rn, immed, immed); - return ERROR_OK; - } - - if (!(opcode & (0x3f << 6))) { - sprintf(cp, "LDR.W\tr%d, [r%d, r%d, LSL #%d]", - (int) (opcode >> 12) & 0xf, - rn, - (int) (opcode >> 0) & 0xf, - (int) (opcode >> 4) & 0x3); - return ERROR_OK; - } - - - if (((opcode >> 8) & 0xf) == 0xe) { - immed = opcode & 0x00ff; - - sprintf(cp, "LDRT\tr%d, [r%d, #%d]\t; %#2.2x", - (int) (opcode >> 12) & 0xf, - rn, immed, immed); - return ERROR_OK; - } - - if (((opcode >> 8) & 0xf) == 0xc || (opcode & 0x0900) == 0x0900) { - char *p1 = "]", *p2 = ""; - - if (!(opcode & 0x0500)) - return ERROR_COMMAND_SYNTAX_ERROR; - - immed = opcode & 0x00ff; - - /* two indexed modes will write back rn */ - if (opcode & 0x100) { - if (opcode & 0x400) /* pre-indexed */ - p2 = "]!"; - else { /* post-indexed */ - p1 = "]"; - p2 = ""; - } - } - - sprintf(cp, "LDR\tr%d, [r%d%s, #%s%u%s\t; %#2.2x", - (int) (opcode >> 12) & 0xf, - rn, p1, - (opcode & 0x200) ? "" : "-", - immed, p2, immed); - return ERROR_OK; - } - - return ERROR_COMMAND_SYNTAX_ERROR; -} - -static int t2ev_load_byte_hints(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int rn = (opcode >> 16) & 0xf; - int rt = (opcode >> 12) & 0xf; - int op2 = (opcode >> 6) & 0x3f; - unsigned immed; - char *p1 = "", *p2 = "]"; - char *mnemonic; - - switch ((opcode >> 23) & 0x3) { - case 0: - if ((rn & rt) == 0xf) { -pld_literal: - immed = opcode & 0xfff; - address = thumb_alignpc4(address); - if (opcode & (1 << 23)) - address += immed; - else - address -= immed; - sprintf(cp, "PLD\tr%d, %#8.8" PRIx32, - rt, address); - return ERROR_OK; - } - if (rn == 0x0f && rt != 0x0f) { -ldrb_literal: - immed = opcode & 0xfff; - address = thumb_alignpc4(address); - if (opcode & (1 << 23)) - address += immed; - else - address -= immed; - sprintf(cp, "LDRB\tr%d, %#8.8" PRIx32, - rt, address); - return ERROR_OK; - } - if (rn == 0x0f) - break; - if ((op2 & 0x3c) == 0x38) { - immed = opcode & 0xff; - sprintf(cp, "LDRBT\tr%d, [r%d, #%d]\t; %#2.2x", - rt, rn, immed, immed); - return ERROR_OK; - } - if ((op2 & 0x3c) == 0x30) { - if (rt == 0x0f) { - immed = opcode & 0xff; - immed = -immed; -preload_immediate: - p1 = (opcode & (1 << 21)) ? "W" : ""; - sprintf(cp, "PLD%s\t[r%d, #%d]\t; %#6.6x", - p1, rn, immed, immed); - return ERROR_OK; - } - mnemonic = "LDRB"; -ldrxb_immediate_t3: - immed = opcode & 0xff; - if (!(opcode & 0x200)) - immed = -immed; - - /* two indexed modes will write back rn */ - if (opcode & 0x100) { - if (opcode & 0x400) /* pre-indexed */ - p2 = "]!"; - else { /* post-indexed */ - p1 = "]"; - p2 = ""; - } - } -ldrxb_immediate_t2: - sprintf(cp, "%s\tr%d, [r%d%s, #%d%s\t; %#8.8x", - mnemonic, rt, rn, p1, - immed, p2, immed); - return ERROR_OK; - } - if ((op2 & 0x24) == 0x24) { - mnemonic = "LDRB"; - goto ldrxb_immediate_t3; - } - if (op2 == 0) { - int rm = opcode & 0xf; - - if (rt == 0x0f) - sprintf(cp, "PLD\t"); - else - sprintf(cp, "LDRB.W\tr%d, ", rt); - immed = (opcode >> 4) & 0x3; - cp = strchr(cp, 0); - sprintf(cp, "[r%d, r%d, LSL #%d]", rn, rm, immed); - return ERROR_OK; - } - break; - case 1: - if ((rn & rt) == 0xf) - goto pld_literal; - if (rt == 0xf) { - immed = opcode & 0xfff; - goto preload_immediate; - } - if (rn == 0x0f) - goto ldrb_literal; - mnemonic = "LDRB.W"; - immed = opcode & 0xfff; - goto ldrxb_immediate_t2; - case 2: - if ((rn & rt) == 0xf) { - immed = opcode & 0xfff; - address = thumb_alignpc4(address); - if (opcode & (1 << 23)) - address += immed; - else - address -= immed; - sprintf(cp, "PLI\t%#8.8" PRIx32, address); - return ERROR_OK; - } - if (rn == 0xf && rt != 0xf) { -ldrsb_literal: - immed = opcode & 0xfff; - address = thumb_alignpc4(address); - if (opcode & (1 << 23)) - address += immed; - else - address -= immed; - sprintf(cp, "LDRSB\t%#8.8" PRIx32, address); - return ERROR_OK; - } - if (rn == 0xf) - break; - if ((op2 & 0x3c) == 0x38) { - immed = opcode & 0xff; - sprintf(cp, "LDRSBT\tr%d, [r%d, #%d]\t; %#2.2x", - rt, rn, immed, immed); - return ERROR_OK; - } - if ((op2 & 0x3c) == 0x30) { - if (rt == 0xf) { - immed = opcode & 0xff; - immed = -immed; /* pli */ - sprintf(cp, "PLI\t[r%d, #%d]\t; -%#2.2x", - rn, immed, -immed); - return ERROR_OK; - } - mnemonic = "LDRSB"; - goto ldrxb_immediate_t3; - } - if ((op2 & 0x24) == 0x24) { - mnemonic = "LDRSB"; - goto ldrxb_immediate_t3; - } - if (op2 == 0) { - int rm = opcode & 0xf; - - if (rt == 0x0f) - sprintf(cp, "PLI\t"); - else - sprintf(cp, "LDRSB.W\tr%d, ", rt); - immed = (opcode >> 4) & 0x3; - cp = strchr(cp, 0); - sprintf(cp, "[r%d, r%d, LSL #%d]", rn, rm, immed); - return ERROR_OK; - } - break; - case 3: - if (rt == 0xf) { - immed = opcode & 0xfff; - sprintf(cp, "PLI\t[r%d, #%d]\t; %#3.3x", - rn, immed, immed); - return ERROR_OK; - } - if (rn == 0xf) - goto ldrsb_literal; - immed = opcode & 0xfff; - mnemonic = "LDRSB"; - goto ldrxb_immediate_t2; - } - - return ERROR_COMMAND_SYNTAX_ERROR; -} - -static int t2ev_load_halfword(uint32_t opcode, uint32_t address, - struct arm_instruction *instruction, char *cp) -{ - int rn = (opcode >> 16) & 0xf; - int rt = (opcode >> 12) & 0xf; - int op2 = (opcode >> 6) & 0x3f; - char *sign = ""; - unsigned immed; - - if (rt == 0xf) { - sprintf(cp, "HINT (UNALLOCATED)"); - return ERROR_OK; - } - - if (opcode & (1 << 24)) - sign = "S"; - - if ((opcode & (1 << 23)) == 0) { - if (rn == 0xf) { -ldrh_literal: - immed = opcode & 0xfff; - address = thumb_alignpc4(address); - if (opcode & (1 << 23)) - address += immed; - else - address -= immed; - sprintf(cp, "LDR%sH\tr%d, %#8.8" PRIx32, - sign, rt, address); - return ERROR_OK; - } - if (op2 == 0) { - int rm = opcode & 0xf; - - immed = (opcode >> 4) & 0x3; - sprintf(cp, "LDR%sH.W\tr%d, [r%d, r%d, LSL #%d]", - sign, rt, rn, rm, immed); - return ERROR_OK; - } - if ((op2 & 0x3c) == 0x38) { - immed = opcode & 0xff; - sprintf(cp, "LDR%sHT\tr%d, [r%d, #%d]\t; %#2.2x", - sign, rt, rn, immed, immed); - return ERROR_OK; - } - if ((op2 & 0x3c) == 0x30 || (op2 & 0x24) == 0x24) { - char *p1 = "", *p2 = "]"; - - immed = opcode & 0xff; - if (!(opcode & 0x200)) - immed = -immed; - - /* two indexed modes will write back rn */ - if (opcode & 0x100) { - if (opcode & 0x400) /* pre-indexed */ - p2 = "]!"; - else { /* post-indexed */ - p1 = "]"; - p2 = ""; - } - } - sprintf(cp, "LDR%sH\tr%d, [r%d%s, #%d%s\t; %#8.8x", - sign, rt, rn, p1, immed, p2, immed); - return ERROR_OK; - } - } else { - if (rn == 0xf) - goto ldrh_literal; - - immed = opcode & 0xfff; - sprintf(cp, "LDR%sH%s\tr%d, [r%d, #%d]\t; %#6.6x", - sign, *sign ? "" : ".W", - rt, rn, immed, immed); - return ERROR_OK; - } - - return ERROR_COMMAND_SYNTAX_ERROR; -} - -/* - * REVISIT for Thumb2 instructions, instruction->type and friends aren't - * always set. That means eventual arm_simulate_step() support for Thumb2 - * will need work in this area. - */ -int thumb2_opcode(struct target *target, uint32_t address, struct arm_instruction *instruction) -{ - int retval; - uint16_t op; - uint32_t opcode; - char *cp; - - /* clear low bit ... it's set on function pointers */ - address &= ~1; - - /* clear fields, to avoid confusion */ - memset(instruction, 0, sizeof(struct arm_instruction)); - - /* read first halfword, see if this is the only one */ - retval = target_read_u16(target, address, &op); - if (retval != ERROR_OK) - return retval; - - switch (op & 0xf800) { - case 0xf800: - case 0xf000: - case 0xe800: - /* 32-bit instructions */ - instruction->instruction_size = 4; - opcode = op << 16; - retval = target_read_u16(target, address + 2, &op); - if (retval != ERROR_OK) - return retval; - opcode |= op; - instruction->opcode = opcode; - break; - default: - /* 16-bit: Thumb1 + IT + CBZ/CBNZ + ... */ - return thumb_evaluate_opcode(op, address, instruction); - } - - snprintf(instruction->text, 128, - "0x%8.8" PRIx32 " 0x%8.8" PRIx32 "\t", - address, opcode); - cp = strchr(instruction->text, 0); - retval = ERROR_FAIL; - - /* ARMv7-M: A5.3.1 Data processing (modified immediate) */ - if ((opcode & 0x1a008000) == 0x10000000) - retval = t2ev_data_mod_immed(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.3 Data processing (plain binary immediate) */ - else if ((opcode & 0x1a008000) == 0x12000000) - retval = t2ev_data_immed(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.4 Branches and miscellaneous control */ - else if ((opcode & 0x18008000) == 0x10008000) - retval = t2ev_b_misc(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.5 Load/store multiple */ - else if ((opcode & 0x1e400000) == 0x08000000) - retval = t2ev_ldm_stm(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.6 Load/store dual or exclusive, table branch */ - else if ((opcode & 0x1e400000) == 0x08400000) - retval = t2ev_ldrex_strex(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.7 Load word */ - else if ((opcode & 0x1f700000) == 0x18500000) - retval = t2ev_load_word(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.8 Load halfword, unallocated memory hints */ - else if ((opcode & 0x1e700000) == 0x18300000) - retval = t2ev_load_halfword(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.9 Load byte, memory hints */ - else if ((opcode & 0x1e700000) == 0x18100000) - retval = t2ev_load_byte_hints(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.10 Store single data item */ - else if ((opcode & 0x1f100000) == 0x18000000) - retval = t2ev_store_single(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.11 Data processing (shifted register) */ - else if ((opcode & 0x1e000000) == 0x0a000000) - retval = t2ev_data_shift(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.12 Data processing (register) - * and A5.3.13 Miscellaneous operations - */ - else if ((opcode & 0x1f000000) == 0x1a000000) - retval = t2ev_data_reg(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.14 Multiply, and multiply accumulate */ - else if ((opcode & 0x1f800000) == 0x1b000000) - retval = t2ev_mul32(opcode, address, instruction, cp); - - /* ARMv7-M: A5.3.15 Long multiply, long multiply accumulate, divide */ - else if ((opcode & 0x1f800000) == 0x1b800000) - retval = t2ev_mul64_div(opcode, address, instruction, cp); - - if (retval == ERROR_OK) - return retval; - - /* - * Thumb2 also supports coprocessor, ThumbEE, and DSP/Media (SIMD) - * instructions; not yet handled here. - */ - - if (retval == ERROR_COMMAND_SYNTAX_ERROR) { - instruction->type = ARM_UNDEFINED_INSTRUCTION; - strcpy(cp, "UNDEFINED OPCODE"); - return ERROR_OK; - } - - LOG_DEBUG("Can't decode 32-bit Thumb2 yet (opcode=%08" PRIx32 ")", - opcode); - - strcpy(cp, "(32-bit Thumb2 ...)"); - return ERROR_OK; -} - int arm_access_size(struct arm_instruction *instruction) { if ((instruction->type == ARM_LDRB) @@ -4613,3 +3030,100 @@ int arm_access_size(struct arm_instruction *instruction) return 0; } } + +#if HAVE_CAPSTONE +static void print_opcode(struct command_invocation *cmd, const cs_insn *insn) +{ + uint32_t opcode = 0; + + memcpy(&opcode, insn->bytes, insn->size); + + if (insn->size == 4) { + uint16_t opcode_high = opcode >> 16; + opcode = opcode & 0xffff; + + command_print(cmd, "0x%08" PRIx64" %04x %04x\t%s%s%s", + insn->address, opcode, opcode_high, insn->mnemonic, + insn->op_str[0] ? "\t" : "", insn->op_str); + } else { + command_print(cmd, "0x%08" PRIx64" %04x\t%s%s%s", + insn->address, opcode, insn->mnemonic, + insn->op_str[0] ? "\t" : "", insn->op_str); + } +} + +int arm_disassemble(struct command_invocation *cmd, struct target *target, + target_addr_t address, size_t count, bool thumb_mode) +{ + csh handle; + int ret; + cs_insn *insn; + cs_mode mode; + + if (!cs_support(CS_ARCH_ARM)) { + LOG_ERROR("ARM architecture not supported by capstone"); + return ERROR_FAIL; + } + + mode = CS_MODE_LITTLE_ENDIAN; + + if (thumb_mode) + mode |= CS_MODE_THUMB; + + ret = cs_open(CS_ARCH_ARM, mode, &handle); + + if (ret != CS_ERR_OK) { + LOG_ERROR("cs_open() failed: %s", cs_strerror(ret)); + return ERROR_FAIL; + } + + ret = cs_option(handle, CS_OPT_SKIPDATA, CS_OPT_ON); + + if (ret != CS_ERR_OK) { + LOG_ERROR("cs_option() failed: %s", cs_strerror(ret)); + cs_close(&handle); + return ERROR_FAIL; + } + + insn = cs_malloc(handle); + + if (!insn) { + LOG_ERROR("cs_malloc() failed\n"); + cs_close(&handle); + return ERROR_FAIL; + } + + while (count > 0) { + uint8_t buffer[4]; + + ret = target_read_buffer(target, address, sizeof(buffer), buffer); + + if (ret != ERROR_OK) { + cs_free(insn, 1); + cs_close(&handle); + return ret; + } + + size_t size = sizeof(buffer); + const uint8_t *tmp = buffer; + + ret = cs_disasm_iter(handle, &tmp, &size, &address, insn); + + if (!ret) { + LOG_ERROR("cs_disasm_iter() failed: %s", + cs_strerror(cs_errno(handle))); + cs_free(insn, 1); + cs_close(&handle); + return ERROR_FAIL; + } + + print_opcode(cmd, insn); + count--; + } + + cs_free(insn, 1); + cs_close(&handle); + + return ERROR_OK; +} +#endif /* HAVE_CAPSTONE */ diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index 486e903e3..beecb3f30 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -197,9 +197,11 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address, struct arm_instruction *instruction); int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, struct arm_instruction *instruction); -int thumb2_opcode(struct target *target, uint32_t address, - struct arm_instruction *instruction); int arm_access_size(struct arm_instruction *instruction); +#if HAVE_CAPSTONE +int arm_disassemble(struct command_invocation *cmd, struct target *target, + target_addr_t address, size_t count, bool thumb_mode); +#endif #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28]) diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index 72215f90b..6bfe355ba 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -206,7 +206,7 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) LOG_WARNING("Jazelle PC adjustment unknown"); break; default: - LOG_WARNING("unknow core state"); + LOG_WARNING("unknown core state"); break; } break; @@ -335,7 +335,7 @@ static int dpm_write_pc_core_state(struct arm_dpm *dpm, struct reg *r) } /** - * Read basic registers of the the current context: R0 to R15, and CPSR; + * Read basic registers of the current context: R0 to R15, and CPSR; * sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb). * In normal operation this is called on entry to halting debug state, * possibly after some other operations supporting restore of debug state diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h index d05c66c43..82707822b 100644 --- a/src/target/arm_dpm.h +++ b/src/target/arm_dpm.h @@ -62,29 +62,29 @@ struct arm_dpm { uint64_t didr; /** Invoke before a series of instruction operations */ - int (*prepare)(struct arm_dpm *); + int (*prepare)(struct arm_dpm *dpm); /** Invoke after a series of instruction operations */ - int (*finish)(struct arm_dpm *); + int (*finish)(struct arm_dpm *dpm); /** Runs one instruction. */ - int (*instr_execute)(struct arm_dpm *, uint32_t opcode); + int (*instr_execute)(struct arm_dpm *dpm, uint32_t opcode); /* WRITE TO CPU */ /** Runs one instruction, writing data to DCC before execution. */ - int (*instr_write_data_dcc)(struct arm_dpm *, + int (*instr_write_data_dcc)(struct arm_dpm *dpm, uint32_t opcode, uint32_t data); - int (*instr_write_data_dcc_64)(struct arm_dpm *, + int (*instr_write_data_dcc_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t data); /** Runs one instruction, writing data to R0 before execution. */ - int (*instr_write_data_r0)(struct arm_dpm *, + int (*instr_write_data_r0)(struct arm_dpm *dpm, uint32_t opcode, uint32_t data); /** Runs one instruction, writing data to R0 before execution. */ - int (*instr_write_data_r0_64)(struct arm_dpm *, + int (*instr_write_data_r0_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t data); /** Optional core-specific operation invoked after CPSR writes. */ @@ -93,17 +93,17 @@ struct arm_dpm { /* READ FROM CPU */ /** Runs one instruction, reading data from dcc after execution. */ - int (*instr_read_data_dcc)(struct arm_dpm *, + int (*instr_read_data_dcc)(struct arm_dpm *dpm, uint32_t opcode, uint32_t *data); - int (*instr_read_data_dcc_64)(struct arm_dpm *, + int (*instr_read_data_dcc_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t *data); /** Runs one instruction, reading data from r0 after execution. */ - int (*instr_read_data_r0)(struct arm_dpm *, + int (*instr_read_data_r0)(struct arm_dpm *dpm, uint32_t opcode, uint32_t *data); - int (*instr_read_data_r0_64)(struct arm_dpm *, + int (*instr_read_data_r0_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t *data); struct reg *(*arm_reg_current)(struct arm *arm, @@ -117,7 +117,7 @@ struct arm_dpm { * must currently be disabled. Indices 0..15 are used for * breakpoints; indices 16..31 are for watchpoints. */ - int (*bpwp_enable)(struct arm_dpm *, unsigned index_value, + int (*bpwp_enable)(struct arm_dpm *dpm, unsigned index_value, uint32_t addr, uint32_t control); /** @@ -125,7 +125,7 @@ struct arm_dpm { * hardware control registers. Indices are the same ones * accepted by bpwp_enable(). */ - int (*bpwp_disable)(struct arm_dpm *, unsigned index_value); + int (*bpwp_disable)(struct arm_dpm *dpm, unsigned index_value); /* The breakpoint and watchpoint arrays are private to the * DPM infrastructure. There are nbp indices in the dbp @@ -153,12 +153,12 @@ int arm_dpm_setup(struct arm_dpm *dpm); int arm_dpm_initialize(struct arm_dpm *dpm); int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum); -int arm_dpm_read_current_registers(struct arm_dpm *); +int arm_dpm_read_current_registers(struct arm_dpm *dpm); int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode); -int arm_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp); +int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp); -void arm_dpm_report_wfar(struct arm_dpm *, uint32_t wfar); +void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t wfar); /* DSCR bits; see ARMv7a arch spec section C10.3.1. * Not all v7 bits are valid in v6. diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c index 49aca3487..f9605acb1 100644 --- a/src/target/arm_jtag.c +++ b/src/target/arm_jtag.c @@ -92,3 +92,8 @@ int arm_jtag_setup_connection(struct arm_jtag *jtag_info) return jtag_register_event_callback(arm_jtag_reset_callback, jtag_info); } + +int arm_jtag_close_connection(struct arm_jtag *jtag_info) +{ + return jtag_unregister_event_callback(arm_jtag_reset_callback, jtag_info); +} diff --git a/src/target/arm_jtag.h b/src/target/arm_jtag.h index bb92abb84..bf5b83748 100644 --- a/src/target/arm_jtag.h +++ b/src/target/arm_jtag.h @@ -61,6 +61,7 @@ static inline int arm_jtag_scann(struct arm_jtag *jtag_info, uint32_t new_scan_c } int arm_jtag_setup_connection(struct arm_jtag *jtag_info); +int arm_jtag_close_connection(struct arm_jtag *jtag_info); /* use this as a static so we can inline it in -O3 and refer to it via a pointer */ static inline void arm7flip32(jtag_callback_data_t arg) diff --git a/src/target/arm_opcodes.h b/src/target/arm_opcodes.h index e94e8333b..90f841600 100644 --- a/src/target/arm_opcodes.h +++ b/src/target/arm_opcodes.h @@ -38,7 +38,7 @@ /* Store multiple increment after * Rn: base register * List: for each bit in list: store register - * S: in priviledged mode: store user-mode registers + * S: in privileged mode: store user-mode registers * W = 1: update the base register. W = 0: leave the base register untouched */ #define ARMV4_5_STMIA(Rn, List, S, W) \ @@ -47,7 +47,7 @@ /* Load multiple increment after * Rn: base register * List: for each bit in list: store register - * S: in priviledged mode: store user-mode registers + * S: in privileged mode: store user-mode registers * W = 1: update the base register. W = 0: leave the base register untouched */ #define ARMV4_5_LDMIA(Rn, List, S, W) \ diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 58bc3390a..7da28e349 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -942,7 +942,7 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command) COMMAND_HANDLER(handle_arm_disassemble_command) { - int retval = ERROR_OK; +#if HAVE_CAPSTONE struct target *target = get_current_target(CMD_CTX); if (target == NULL) { @@ -952,8 +952,8 @@ COMMAND_HANDLER(handle_arm_disassemble_command) struct arm *arm = target_to_arm(target); target_addr_t address; - int count = 1; - int thumb = 0; + unsigned int count = 1; + bool thumb = false; if (!is_arm(arm)) { command_print(CMD, "current target isn't an ARM"); @@ -962,62 +962,37 @@ COMMAND_HANDLER(handle_arm_disassemble_command) if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) { /* armv7m is always thumb mode */ - thumb = 1; + thumb = true; } switch (CMD_ARGC) { case 3: if (strcmp(CMD_ARGV[2], "thumb") != 0) - goto usage; - thumb = 1; + return ERROR_COMMAND_SYNTAX_ERROR; + thumb = true; /* FALL THROUGH */ case 2: - COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], count); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], count); /* FALL THROUGH */ case 1: COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address); if (address & 0x01) { if (!thumb) { command_print(CMD, "Disassemble as Thumb"); - thumb = 1; + thumb = true; } address &= ~1; } break; default: -usage: - count = 0; - retval = ERROR_COMMAND_SYNTAX_ERROR; + return ERROR_COMMAND_SYNTAX_ERROR; } - while (count-- > 0) { - struct arm_instruction cur_instruction; - - if (thumb) { - /* Always use Thumb2 disassembly for best handling - * of 32-bit BL/BLX, and to work with newer cores - * (some ARMv6, all ARMv7) that use Thumb2. - */ - retval = thumb2_opcode(target, address, - &cur_instruction); - if (retval != ERROR_OK) - break; - } else { - uint32_t opcode; - - retval = target_read_u32(target, address, &opcode); - if (retval != ERROR_OK) - break; - retval = arm_evaluate_opcode(opcode, address, - &cur_instruction) != ERROR_OK; - if (retval != ERROR_OK) - break; - } - command_print(CMD, "%s", cur_instruction.text); - address += cur_instruction.instruction_size; - } - - return retval; + return arm_disassemble(CMD, target, address, count, thumb); +#else + command_print(CMD, "capstone disassembly framework required"); + return ERROR_FAIL; +#endif } static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) diff --git a/src/target/armv7a.c b/src/target/armv7a.c index 2be70b78b..c36744ddf 100644 --- a/src/target/armv7a.c +++ b/src/target/armv7a.c @@ -160,7 +160,7 @@ int armv7a_read_ttbcr(struct target *target) } /* - * ARM Architecture Reference Manual (ARMv7-A and ARMv7-Redition), + * ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition), * document # ARM DDI 0406C */ armv7a->armv7a_mmu.ttbr_range[0] = 0xffffffff >> ttbcr_n; @@ -257,10 +257,10 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd, if (arch->ctype & 1) { command_print(cmd, - "L%d I-Cache: linelen %" PRIi32 - ", associativity %" PRIi32 - ", nsets %" PRIi32 - ", cachesize %" PRId32 " KBytes", + "L%d I-Cache: linelen %" PRIu32 + ", associativity %" PRIu32 + ", nsets %" PRIu32 + ", cachesize %" PRIu32 " KBytes", cl+1, arch->i_size.linelen, arch->i_size.associativity, @@ -270,10 +270,10 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd, if (arch->ctype >= 2) { command_print(cmd, - "L%d D-Cache: linelen %" PRIi32 - ", associativity %" PRIi32 - ", nsets %" PRIi32 - ", cachesize %" PRId32 " KBytes", + "L%d D-Cache: linelen %" PRIu32 + ", associativity %" PRIu32 + ", nsets %" PRIu32 + ", cachesize %" PRIu32 " KBytes", cl+1, arch->d_u_size.linelen, arch->d_u_size.associativity, @@ -283,7 +283,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd, } if (l2x_cache != NULL) - command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways", + command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways", l2x_cache->base, l2x_cache->way); return ERROR_OK; @@ -399,7 +399,7 @@ int armv7a_identify_cache(struct target *target) cache->iminline = 4UL << (ctr & 0xf); cache->dminline = 4UL << ((ctr & 0xf0000) >> 16); - LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRId32 " ctr.dminline %" PRId32, + LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRIu32 " ctr.dminline %" PRIu32, ctr, cache->iminline, cache->dminline); /* retrieve CLIDR @@ -439,13 +439,13 @@ int armv7a_identify_cache(struct target *target) goto done; cache->arch[cl].d_u_size = decode_cache_reg(cache_reg); - LOG_DEBUG("data/unified cache index %d << %d, way %d << %d", + LOG_DEBUG("data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32, cache->arch[cl].d_u_size.index, cache->arch[cl].d_u_size.index_shift, cache->arch[cl].d_u_size.way, cache->arch[cl].d_u_size.way_shift); - LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways", + LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways", cache->arch[cl].d_u_size.linelen, cache->arch[cl].d_u_size.cachesize, cache->arch[cl].d_u_size.associativity); @@ -459,13 +459,13 @@ int armv7a_identify_cache(struct target *target) goto done; cache->arch[cl].i_size = decode_cache_reg(cache_reg); - LOG_DEBUG("instruction cache index %d << %d, way %d << %d", + LOG_DEBUG("instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32, cache->arch[cl].i_size.index, cache->arch[cl].i_size.index_shift, cache->arch[cl].i_size.way, cache->arch[cl].i_size.way_shift); - LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways", + LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways", cache->arch[cl].i_size.linelen, cache->arch[cl].i_size.cachesize, cache->arch[cl].i_size.associativity); diff --git a/src/target/armv7a.h b/src/target/armv7a.h index 3d88c8679..7b6219821 100644 --- a/src/target/armv7a.h +++ b/src/target/armv7a.h @@ -48,7 +48,7 @@ struct armv7a_l2x_cache { }; struct armv7a_cachesize { - /* cache dimensionning */ + /* cache dimensioning */ uint32_t linelen; uint32_t associativity; uint32_t nsets; diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c index 921ba9be9..e5f1fb060 100644 --- a/src/target/armv7a_cache.c +++ b/src/target/armv7a_cache.c @@ -409,7 +409,7 @@ int armv7a_cache_flush_virt(struct target *target, uint32_t virt, * We assume that target core was chosen correctly. It means if same data * was handled by two cores, other core will loose the changes. Since it * is impossible to know (FIXME) which core has correct data, keep in mind - * that some kind of data lost or korruption is possible. + * that some kind of data lost or corruption is possible. * Possible scenario: * - core1 loaded and changed data on 0x12345678 * - we halted target and modified same data on core0 @@ -577,7 +577,7 @@ const struct command_registration arm7a_l1_di_cache_group_handlers[] = { .name = "info", .handler = arm7a_l1_cache_info_cmd, .mode = COMMAND_ANY, - .help = "print cache realted information", + .help = "print cache related information", .usage = "", }, { diff --git a/src/target/armv7a_cache.h b/src/target/armv7a_cache.h index e0f7eb3a5..8d8ca2d7d 100644 --- a/src/target/armv7a_cache.h +++ b/src/target/armv7a_cache.h @@ -25,7 +25,7 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt, unsigned int size); int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt, - unsigned int size); + uint32_t size); int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt, unsigned int size); int armv7a_l1_i_cache_inval_all(struct target *target); diff --git a/src/target/armv7a_cache_l2x.c b/src/target/armv7a_cache_l2x.c index 72e12b42b..3607a5122 100644 --- a/src/target/armv7a_cache_l2x.c +++ b/src/target/armv7a_cache_l2x.c @@ -185,7 +185,7 @@ static int arm7a_handle_l2x_cache_info_command(struct command_invocation *cmd, } command_print(cmd, - "L2 unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways", + "L2 unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways", l2x_cache->base, l2x_cache->way); return ERROR_OK; @@ -332,7 +332,7 @@ static const struct command_registration arm7a_l2x_cache_commands[] = { .name = "info", .handler = arm7a_l2x_cache_info_command, .mode = COMMAND_ANY, - .help = "print cache realted information", + .help = "print cache related information", .usage = "", }, { diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c index eec14a36f..b4234b24e 100644 --- a/src/target/armv7a_mmu.c +++ b/src/target/armv7a_mmu.c @@ -266,7 +266,7 @@ COMMAND_HANDLER(armv7a_mmu_dump_table) uint32_t first_lvl_descriptor = target_buffer_get_u32(target, (uint8_t *)&first_lvl_ptbl[pt_idx]); - LOG_DEBUG("L1 desc[%8.8"PRIx32"]: %8.8"PRIx32, pt_idx << 20, first_lvl_descriptor); + LOG_DEBUG("L1 desc[%8.8x]: %8.8"PRIx32, pt_idx << 20, first_lvl_descriptor); /* skip empty entries in the first level table */ if ((first_lvl_descriptor & 3) == 0) { diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 017d693ce..ea6ee6117 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -48,7 +48,7 @@ static const char * const armv7m_exception_strings[] = { "", "Reset", "NMI", "HardFault", - "MemManage", "BusFault", "UsageFault", "RESERVED", + "MemManage", "BusFault", "UsageFault", "SecureFault", "RESERVED", "RESERVED", "RESERVED", "SVCall", "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; diff --git a/src/target/armv7m_trace.h b/src/target/armv7m_trace.h index c63f36dea..e5879fb08 100644 --- a/src/target/armv7m_trace.h +++ b/src/target/armv7m_trace.h @@ -56,7 +56,7 @@ struct armv7m_trace_config { /** Synchronous output port width */ uint32_t port_size; - /** Bitmask of currenty enabled ITM stimuli */ + /** Bitmask of currently enabled ITM stimuli */ uint32_t itm_ter[8]; /** Identifier for multi-source trace stream formatting */ unsigned int trace_bus_id; diff --git a/src/target/armv8.c b/src/target/armv8.c index 61f11f24a..ab60cd371 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -73,6 +73,10 @@ static const struct { .name = "ABT", .psr = ARM_MODE_ABT, }, + { + .name = "HYP", + .psr = ARM_MODE_HYP, + }, { .name = "SYS", .psr = ARM_MODE_SYS, @@ -791,7 +795,7 @@ static uint8_t armv8_pa_size(uint32_t ps) ret = 48; break; default: - LOG_INFO("Unknow physicall address size"); + LOG_INFO("Unknown physical address size"); break; } return ret; @@ -818,7 +822,7 @@ static __attribute__((unused)) int armv8_read_ttbcr32(struct target *target) armv8->armv8_mmu.ttbcr = ttbcr; /* - * ARM Architecture Reference Manual (ARMv7-A and ARMv7-Redition), + * ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition), * document # ARM DDI 0406C */ armv8->armv8_mmu.ttbr_range[0] = 0xffffffff >> ttbcr_n; @@ -848,7 +852,7 @@ static __attribute__((unused)) int armv8_read_ttbcr(struct target *target) if (retval != ERROR_OK) goto done; - /* claaer ttrr1_used and ttbr0_mask */ + /* clear ttrr1_used and ttbr0_mask */ memset(&armv8->armv8_mmu.ttbr1_used, 0, sizeof(armv8->armv8_mmu.ttbr1_used)); memset(&armv8->armv8_mmu.ttbr0_mask, 0, sizeof(armv8->armv8_mmu.ttbr0_mask)); @@ -898,7 +902,7 @@ static __attribute__((unused)) int armv8_read_ttbcr(struct target *target) goto done; break; default: - LOG_ERROR("unknow core state"); + LOG_ERROR("unknown core state"); retval = ERROR_FAIL; break; } @@ -1050,7 +1054,7 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command) nsec = n->name; if (sec == NULL || nsec == NULL) { - LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02x", edeccr & 0xff); + LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02" PRIx32, edeccr & 0xff); return ERROR_FAIL; } @@ -1284,13 +1288,13 @@ static struct reg_data_type aarch64v[] = { }; static struct reg_data_type_bitfield aarch64_cpsr_bits[] = { - { 0, 0 , REG_TYPE_UINT8 }, - { 2, 3, REG_TYPE_UINT8 }, - { 4, 4 , REG_TYPE_UINT8 }, - { 6, 6 , REG_TYPE_BOOL }, - { 7, 7 , REG_TYPE_BOOL }, - { 8, 8 , REG_TYPE_BOOL }, - { 9, 9 , REG_TYPE_BOOL }, + { 0, 0, REG_TYPE_UINT8 }, + { 2, 3, REG_TYPE_UINT8 }, + { 4, 4, REG_TYPE_UINT8 }, + { 6, 6, REG_TYPE_BOOL }, + { 7, 7, REG_TYPE_BOOL }, + { 8, 8, REG_TYPE_BOOL }, + { 9, 9, REG_TYPE_BOOL }, { 20, 20, REG_TYPE_BOOL }, { 21, 21, REG_TYPE_BOOL }, { 28, 28, REG_TYPE_BOOL }, @@ -1303,16 +1307,16 @@ static struct reg_data_type_flags_field aarch64_cpsr_fields[] = { { "SP", aarch64_cpsr_bits + 0, aarch64_cpsr_fields + 1 }, { "EL", aarch64_cpsr_bits + 1, aarch64_cpsr_fields + 2 }, { "nRW", aarch64_cpsr_bits + 2, aarch64_cpsr_fields + 3 }, - { "F" , aarch64_cpsr_bits + 3, aarch64_cpsr_fields + 4 }, - { "I" , aarch64_cpsr_bits + 4, aarch64_cpsr_fields + 5 }, - { "A" , aarch64_cpsr_bits + 5, aarch64_cpsr_fields + 6 }, - { "D" , aarch64_cpsr_bits + 6, aarch64_cpsr_fields + 7 }, - { "IL" , aarch64_cpsr_bits + 7, aarch64_cpsr_fields + 8 }, - { "SS" , aarch64_cpsr_bits + 8, aarch64_cpsr_fields + 9 }, - { "V" , aarch64_cpsr_bits + 9, aarch64_cpsr_fields + 10 }, - { "C" , aarch64_cpsr_bits + 10, aarch64_cpsr_fields + 11 }, - { "Z" , aarch64_cpsr_bits + 11, aarch64_cpsr_fields + 12 }, - { "N" , aarch64_cpsr_bits + 12, NULL } + { "F", aarch64_cpsr_bits + 3, aarch64_cpsr_fields + 4 }, + { "I", aarch64_cpsr_bits + 4, aarch64_cpsr_fields + 5 }, + { "A", aarch64_cpsr_bits + 5, aarch64_cpsr_fields + 6 }, + { "D", aarch64_cpsr_bits + 6, aarch64_cpsr_fields + 7 }, + { "IL", aarch64_cpsr_bits + 7, aarch64_cpsr_fields + 8 }, + { "SS", aarch64_cpsr_bits + 8, aarch64_cpsr_fields + 9 }, + { "V", aarch64_cpsr_bits + 9, aarch64_cpsr_fields + 10 }, + { "C", aarch64_cpsr_bits + 10, aarch64_cpsr_fields + 11 }, + { "Z", aarch64_cpsr_bits + 11, aarch64_cpsr_fields + 12 }, + { "N", aarch64_cpsr_bits + 12, NULL } }; static struct reg_data_type_flags aarch64_cpsr_flags[] = { diff --git a/src/target/armv8.h b/src/target/armv8.h index 1a611455d..978b2ad4a 100644 --- a/src/target/armv8.h +++ b/src/target/armv8.h @@ -139,7 +139,7 @@ struct armv8_l2x_cache { struct armv8_cachesize { uint32_t level_num; - /* cache dimensionning */ + /* cache dimensioning */ uint32_t linelen; uint32_t associativity; uint32_t nsets; @@ -330,6 +330,7 @@ static inline unsigned int armv8_curel_from_core_mode(enum arm_mode core_mode) } } +const char *armv8_mode_name(unsigned psr_mode); void armv8_select_reg_access(struct armv8_common *armv8, bool is_aarch64); int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value); diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c index 41c85c9ab..86e4a5961 100644 --- a/src/target/armv8_cache.c +++ b/src/target/armv8_cache.c @@ -203,10 +203,10 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd, if (arch->ctype & 1) { command_print(cmd, - "L%d I-Cache: linelen %" PRIi32 - ", associativity %" PRIi32 - ", nsets %" PRIi32 - ", cachesize %" PRId32 " KBytes", + "L%d I-Cache: linelen %" PRIu32 + ", associativity %" PRIu32 + ", nsets %" PRIu32 + ", cachesize %" PRIu32 " KBytes", cl+1, arch->i_size.linelen, arch->i_size.associativity, @@ -216,10 +216,10 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd, if (arch->ctype >= 2) { command_print(cmd, - "L%d D-Cache: linelen %" PRIi32 - ", associativity %" PRIi32 - ", nsets %" PRIi32 - ", cachesize %" PRId32 " KBytes", + "L%d D-Cache: linelen %" PRIu32 + ", associativity %" PRIu32 + ", nsets %" PRIu32 + ", cachesize %" PRIu32 " KBytes", cl+1, arch->d_u_size.linelen, arch->d_u_size.associativity, @@ -336,7 +336,7 @@ int armv8_identify_cache(struct armv8_common *armv8) cache->iminline = 4UL << (ctr & 0xf); cache->dminline = 4UL << ((ctr & 0xf0000) >> 16); - LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRId32 " ctr.dminline %" PRId32, + LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRIu32 " ctr.dminline %" PRIu32, ctr, cache->iminline, cache->dminline); /* retrieve CLIDR */ @@ -373,13 +373,13 @@ int armv8_identify_cache(struct armv8_common *armv8) goto done; cache->arch[cl].d_u_size = decode_cache_reg(cache_reg); - LOG_DEBUG("data/unified cache index %d << %d, way %d << %d", + LOG_DEBUG("data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32, cache->arch[cl].d_u_size.index, cache->arch[cl].d_u_size.index_shift, cache->arch[cl].d_u_size.way, cache->arch[cl].d_u_size.way_shift); - LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways", + LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways", cache->arch[cl].d_u_size.linelen, cache->arch[cl].d_u_size.cachesize, cache->arch[cl].d_u_size.associativity); @@ -393,13 +393,13 @@ int armv8_identify_cache(struct armv8_common *armv8) goto done; cache->arch[cl].i_size = decode_cache_reg(cache_reg); - LOG_DEBUG("instruction cache index %d << %d, way %d << %d", + LOG_DEBUG("instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32, cache->arch[cl].i_size.index, cache->arch[cl].i_size.index_shift, cache->arch[cl].i_size.way, cache->arch[cl].i_size.way_shift); - LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways", + LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways", cache->arch[cl].i_size.linelen, cache->arch[cl].i_size.cachesize, cache->arch[cl].i_size.associativity); diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index a3edb7f47..1e88a445f 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -253,11 +253,11 @@ static int dpmv8_exec_opcode(struct arm_dpm *dpm, /* update dscr and el after each command execution */ dpm->dscr = dscr; if (dpm->last_el != ((dscr >> 8) & 3)) - LOG_DEBUG("EL %i -> %i", dpm->last_el, (dscr >> 8) & 3); + LOG_DEBUG("EL %i -> %" PRIu32, dpm->last_el, (dscr >> 8) & 3); dpm->last_el = (dscr >> 8) & 3; if (dscr & DSCR_ERR) { - LOG_ERROR("Opcode 0x%08"PRIx32", DSCR.ERR=1, DSCR.EL=%i", opcode, dpm->last_el); + LOG_ERROR("Opcode 0x%08" PRIx32 ", DSCR.ERR=1, DSCR.EL=%i", opcode, dpm->last_el); armv8_dpm_handle_exception(dpm, true); retval = ERROR_FAIL; } @@ -560,7 +560,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode) LOG_DEBUG("restoring mode, cpsr = 0x%08"PRIx32, cpsr); } else { - LOG_DEBUG("setting mode 0x%"PRIx32, mode); + LOG_DEBUG("setting mode 0x%x", mode); cpsr = mode; } @@ -731,7 +731,7 @@ static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) } /** - * Read basic registers of the the current context: R0 to R15, and CPSR; + * Read basic registers of the current context: R0 to R15, and CPSR; * sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb). * In normal operation this is called on entry to halting debug state, * possibly after some other operations supporting restore of debug state diff --git a/src/target/armv8_dpm.h b/src/target/armv8_dpm.h index f40440370..ee6f699de 100644 --- a/src/target/armv8_dpm.h +++ b/src/target/armv8_dpm.h @@ -31,13 +31,13 @@ struct armv8_common; int armv8_dpm_setup(struct arm_dpm *dpm); int armv8_dpm_initialize(struct arm_dpm *dpm); -int armv8_dpm_read_current_registers(struct arm_dpm *); +int armv8_dpm_read_current_registers(struct arm_dpm *dpm); int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode); -int armv8_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp); +int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp); -void armv8_dpm_report_wfar(struct arm_dpm *, uint64_t wfar); +void armv8_dpm_report_wfar(struct arm_dpm *dpm, uint64_t wfar); /* DSCR bits; see ARMv7a arch spec section C10.3.1. * Not all v7 bits are valid in v6. diff --git a/src/target/avrt.c b/src/target/avrt.c index 9cb6f2f34..eb8d000c4 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -195,7 +195,7 @@ static int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti) { if (ir_len > 8) { - LOG_ERROR("ir_len overflow, maxium is 8"); + LOG_ERROR("ir_len overflow, maximum is 8"); return ERROR_FAIL; } @@ -208,7 +208,7 @@ static int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *dr_in, uint32_t dr_out, int dr_len, int rti) { if (dr_len > 32) { - LOG_ERROR("dr_len overflow, maxium is 32"); + LOG_ERROR("dr_len overflow, maximum is 32"); return ERROR_FAIL; } diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index f562a7614..bd8e49fd9 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -841,7 +841,7 @@ static int cortex_a_internal_restore(struct target *target, int current, LOG_ERROR("How do I resume into Jazelle state??"); return ERROR_FAIL; case ARM_STATE_AARCH64: - LOG_ERROR("Shoudn't be in AARCH64 state"); + LOG_ERROR("Shouldn't be in AARCH64 state"); return ERROR_FAIL; } LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc); @@ -2498,7 +2498,7 @@ static int cortex_a_read_phys_memory(struct target *target, if (!count || !buffer) return ERROR_COMMAND_SYNTAX_ERROR; - LOG_DEBUG("Reading memory at real address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32, + LOG_DEBUG("Reading memory at real address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32, address, size, count); /* read memory through the CPU */ @@ -2515,7 +2515,7 @@ static int cortex_a_read_memory(struct target *target, target_addr_t address, int retval; /* cortex_a handles unaligned memory access */ - LOG_DEBUG("Reading memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32, + LOG_DEBUG("Reading memory at address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32, address, size, count); cortex_a_prep_memaccess(target, 0); @@ -2534,7 +2534,7 @@ static int cortex_a_write_phys_memory(struct target *target, if (!count || !buffer) return ERROR_COMMAND_SYNTAX_ERROR; - LOG_DEBUG("Writing memory to real address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32, + LOG_DEBUG("Writing memory to real address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32, address, size, count); /* write memory through the CPU */ @@ -2551,7 +2551,7 @@ static int cortex_a_write_memory(struct target *target, target_addr_t address, int retval; /* cortex_a handles unaligned memory access */ - LOG_DEBUG("Writing memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32, + LOG_DEBUG("Writing memory at address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32, address, size, count); /* memory writes bypass the caches, must flush before writing */ diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index d9bee0e53..55664a79a 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -113,7 +113,7 @@ static int cortexm_dap_write_coreregister_u32(struct target *target, return retval; if (target->dbg_msg_enabled) { - /* restore DCB_DCRDR - this needs to be in a seperate + /* restore DCB_DCRDR - this needs to be in a separate * transaction otherwise the emulated DCC channel breaks */ if (retval == ERROR_OK) retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRDR, dcrdr); @@ -445,6 +445,14 @@ static int cortex_m_examine_exception_reason(struct target *target) if (retval != ERROR_OK) return retval; break; + case 7: /* Secure Fault */ + retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFSR, &except_sr); + if (retval != ERROR_OK) + return retval; + retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFAR, &except_ar); + if (retval != ERROR_OK) + return retval; + break; case 11: /* SVCall */ break; case 12: /* Debug Monitor */ @@ -494,6 +502,18 @@ static int cortex_m_debug_entry(struct target *target) if (retval != ERROR_OK) return retval; + /* examine PE security state */ + bool secure_state = false; + if (armv7m->arm.is_armv8m) { + uint32_t dscsr; + + retval = mem_ap_read_u32(armv7m->debug_ap, DCB_DSCSR, &dscsr); + if (retval != ERROR_OK) + return retval; + + secure_state = (dscsr & DSCSR_CDS) == DSCSR_CDS; + } + /* Examine target state and mode * First load register accessible through core debug port */ int num_regs = arm->core_cache->num_regs; @@ -540,9 +560,10 @@ static int cortex_m_debug_entry(struct target *target) if (armv7m->exception_number) cortex_m_examine_exception_reason(target); - LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s", + LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", cpu in %s state, target->state: %s", arm_mode_name(arm->core_mode), buf_get_u32(arm->pc->value, 0, 32), + secure_state ? "Secure" : "Non-Secure", target_state_name(target)); if (armv7m->post_debug_entry) { @@ -951,7 +972,7 @@ static int cortex_m_step(struct target *target, int current, * just step over the instruction with interrupts disabled. * * The documentation has no information about this, it was found by observation - * on STM32F1 and STM32F2. Proper explanation welcome. STM32F0 dosen't seem to + * on STM32F1 and STM32F2. Proper explanation welcome. STM32F0 doesn't seem to * suffer from this problem. * * To add some confusion: pc_value has bit 0 always set, while the breakpoint @@ -2148,16 +2169,24 @@ int cortex_m_examine(struct target *target) /* Get CPU Type */ i = (cpuid >> 4) & 0xf; + /* Check if it is an ARMv8-M core */ + armv7m->arm.is_armv8m = true; + switch (cpuid & ARM_CPUID_PARTNO_MASK) { case CORTEX_M23_PARTNO: i = 23; break; - case CORTEX_M33_PARTNO: i = 33; break; - + case CORTEX_M35P_PARTNO: + i = 35; + break; + case CORTEX_M55_PARTNO: + i = 55; + break; default: + armv7m->arm.is_armv8m = false; break; } @@ -2188,7 +2217,7 @@ int cortex_m_examine(struct target *target) LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i); armv7m->fp_feature = FPv4_SP; } - } else if (i == 7 || i == 33) { + } else if (i == 7 || i == 33 || i == 35 || i == 55) { target_read_u32(target, MVFR0, &mvfr0); target_read_u32(target, MVFR1, &mvfr1); @@ -2473,6 +2502,11 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command) if (retval != ERROR_OK) return retval; + if (!target_was_examined(target)) { + LOG_ERROR("Target not examined yet"); + return ERROR_FAIL; + } + retval = mem_ap_read_atomic_u32(armv7m->debug_ap, DCB_DEMCR, &demcr); if (retval != ERROR_OK) return retval; diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index a767f93c5..415a6c22f 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -44,12 +44,15 @@ #define CORTEX_M23_PARTNO 0xD200 #define CORTEX_M33_PARTNO 0xD210 +#define CORTEX_M35P_PARTNO 0xD310 +#define CORTEX_M55_PARTNO 0xD220 /* Debug Control Block */ #define DCB_DHCSR 0xE000EDF0 #define DCB_DCRSR 0xE000EDF4 #define DCB_DCRDR 0xE000EDF8 #define DCB_DEMCR 0xE000EDFC +#define DCB_DSCSR 0xE000EE08 #define DCRSR_WnR BIT(16) @@ -114,6 +117,10 @@ #define VC_MMERR BIT(4) #define VC_CORERESET BIT(0) +/* DCB_DSCSR bit and field definitions */ +#define DSCSR_CDS BIT(16) + +/* NVIC registers */ #define NVIC_ICTR 0xE000E004 #define NVIC_ISE0 0xE000E100 #define NVIC_ICSR 0xE000ED04 @@ -127,6 +134,8 @@ #define NVIC_DFSR 0xE000ED30 #define NVIC_MMFAR 0xE000ED34 #define NVIC_BFAR 0xE000ED38 +#define NVIC_SFSR 0xE000EDE4 +#define NVIC_SFAR 0xE000EDE8 /* NVIC_AIRCR bits */ #define AIRCR_VECTKEY (0x5FAul << 16) diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c index 67c153806..864376fb6 100644 --- a/src/target/dsp563xx.c +++ b/src/target/dsp563xx.c @@ -322,7 +322,7 @@ enum watchpoint_condition { #define INSTR_JUMP 0x0AF080 /* Effective Addressing Mode Encoding */ #define EAME_R0 0x10 -/* instrcution encoder */ +/* instruction encoder */ /* movep * s - peripheral space X/Y (X=0,Y=1) * w - write/read @@ -937,7 +937,7 @@ static int dsp563xx_examine(struct target *target) if (((chip>>5)&0x1f) == 0) chip += 300; - LOG_INFO("DSP56%03" PRId32 " device found", chip); + LOG_INFO("DSP56%03" PRIu32 " device found", chip); /* Clear all breakpoints */ dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0); @@ -1359,7 +1359,7 @@ static int dsp563xx_deassert_reset(struct target *target) if (target->state == TARGET_HALTED) { /* after a reset the cpu jmp to the * reset vector and need 2 cycles to fill - * the cache (fetch,decode,excecute) + * the cache (fetch,decode,execute) */ err = dsp563xx_step_ex(target, 1, 0, 1, 1); if (err != ERROR_OK) diff --git a/src/target/dsp563xx.h b/src/target/dsp563xx.h index 4bb5aceaf..18428b854 100644 --- a/src/target/dsp563xx.h +++ b/src/target/dsp563xx.h @@ -46,8 +46,8 @@ struct dsp563xx_common { struct once_reg once_regs[DSP563XX_NUMONCEREGS]; /* register cache to processor synchronization */ - int (*read_core_reg) (struct target *target, int num); - int (*write_core_reg) (struct target *target, int num); + int (*read_core_reg)(struct target *target, int num); + int (*write_core_reg)(struct target *target, int num); struct hardware_breakpoint hardware_breakpoint[1]; diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c index c74a41846..d6107abc6 100644 --- a/src/target/dsp5680xx.c +++ b/src/target/dsp5680xx.c @@ -93,7 +93,7 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in, if (len > 32) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_DR_LEN_OVERFLOW, - "dr_len overflow, maxium is 32"); + "dr_len overflow, maximum is 32"); } /* TODO what values of len are valid for jtag_add_plain_dr_scan? */ /* can i send as many bits as i want? */ @@ -638,7 +638,7 @@ static int switch_tap(struct target *target, struct jtag_tap *master_tap, * more complicated routine, which is guaranteed to work, but requires * a reset. This will complicate comm with the flash module, since * after a reset clock divisors must be set again. - * This implementation works most of the time, and is not accesible to the + * This implementation works most of the time, and is not accessible to the * user. * * @param target @@ -1795,7 +1795,7 @@ static int set_fm_ck_div(struct target *target) * Executes the FM calculate signature command. The FM will calculate over the * data from @address to @address + @words -1. The result is written to a * register, then read out by this function and returned in @signature. The - * value @signature may be compared to the the one returned by perl_crc to + * value @signature may be compared to the one returned by perl_crc to * verify the flash was written correctly. * * @param target diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index 61ee8bbd9..7c53c45c5 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -303,6 +303,22 @@ struct reg_cache *embeddedice_build_reg_cache(struct target *target, return reg_cache; } +/** + * Free all memory allocated for EmbeddedICE register cache + */ +void embeddedice_free_reg_cache(struct reg_cache *reg_cache) +{ + if (!reg_cache) + return; + + for (unsigned int i = 0; i < reg_cache->num_regs; i++) + free(reg_cache->reg_list[i].value); + + free(reg_cache->reg_list[0].arch_info); + free(reg_cache->reg_list); + free(reg_cache); +} + /** * Initialize EmbeddedICE module, if needed. */ diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index 39902fb3e..4b5c816a6 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -88,6 +88,7 @@ struct embeddedice_reg { struct reg_cache *embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9); +void embeddedice_free_reg_cache(struct reg_cache *reg_cache); int embeddedice_setup(struct target *target); diff --git a/src/target/esirisc_jtag.c b/src/target/esirisc_jtag.c index 700ae3a60..7fd35e5fd 100644 --- a/src/target/esirisc_jtag.c +++ b/src/target/esirisc_jtag.c @@ -181,8 +181,8 @@ static int esirisc_jtag_check_status(struct esirisc_jtag *jtag_info) { uint8_t eid = esirisc_jtag_get_eid(jtag_info); if (eid != EID_NONE) { - LOG_ERROR("esirisc_jtag: bad status: 0x%02" PRIx32 " (DA: %" PRId32 ", " - "S: %" PRId32 ", EID: 0x%02" PRIx32 ")", + LOG_ERROR("esirisc_jtag: bad status: 0x%02" PRIx8 " (DA: %" PRId32 ", " + "S: %" PRId32 ", EID: 0x%02" PRIx8 ")", jtag_info->status, esirisc_jtag_is_debug_active(jtag_info), esirisc_jtag_is_stopped(jtag_info), eid); return ERROR_FAIL; @@ -201,13 +201,13 @@ static int esirisc_jtag_send_and_recv(struct esirisc_jtag *jtag_info, uint8_t co retval = esirisc_jtag_send(jtag_info, command, num_out_fields, out_fields); if (retval != ERROR_OK) { - LOG_ERROR("esirisc_jtag: send failed (command: 0x%02" PRIx32 ")", command); + LOG_ERROR("esirisc_jtag: send failed (command: 0x%02" PRIx8 ")", command); return ERROR_FAIL; } retval = esirisc_jtag_recv(jtag_info, num_in_fields, in_fields); if (retval != ERROR_OK) { - LOG_ERROR("esirisc_jtag: recv failed (command: 0x%02" PRIx32 ")", command); + LOG_ERROR("esirisc_jtag: recv failed (command: 0x%02" PRIx8 ")", command); return ERROR_FAIL; } @@ -409,7 +409,7 @@ int esirisc_jtag_read_reg(struct esirisc_jtag *jtag_info, uint8_t reg, uint32_t return retval; *data = le_to_h_u32(d); - LOG_DEBUG("register: 0x%" PRIx32 ", data: 0x%" PRIx32, reg, *data); + LOG_DEBUG("register: 0x%" PRIx8 ", data: 0x%" PRIx32, reg, *data); return ERROR_OK; } @@ -419,7 +419,7 @@ int esirisc_jtag_write_reg(struct esirisc_jtag *jtag_info, uint8_t reg, uint32_t struct scan_field out_fields[2]; uint8_t d[4]; - LOG_DEBUG("register: 0x%" PRIx32 ", data: 0x%" PRIx32, reg, data); + LOG_DEBUG("register: 0x%" PRIx8 ", data: 0x%" PRIx32, reg, data); out_fields[0].num_bits = 8; out_fields[0].out_value = ® @@ -457,7 +457,7 @@ int esirisc_jtag_read_csr(struct esirisc_jtag *jtag_info, uint8_t bank, uint8_t return retval; *data = le_to_h_u32(d); - LOG_DEBUG("bank: 0x%" PRIx32 ", csr: 0x%" PRIx32 ", data: 0x%" PRIx32, bank, csr, *data); + LOG_DEBUG("bank: 0x%" PRIx8 ", csr: 0x%" PRIx8 ", data: 0x%" PRIx32, bank, csr, *data); return ERROR_OK; } @@ -467,7 +467,7 @@ int esirisc_jtag_write_csr(struct esirisc_jtag *jtag_info, uint8_t bank, uint8_t struct scan_field out_fields[2]; uint8_t c[2], d[4]; - LOG_DEBUG("bank: 0x%" PRIx32 ", csr: 0x%" PRIx32 ", data: 0x%" PRIx32, bank, csr, data); + LOG_DEBUG("bank: 0x%" PRIx8 ", csr: 0x%" PRIx8 ", data: 0x%" PRIx32, bank, csr, data); out_fields[0].num_bits = 16; out_fields[0].out_value = c; diff --git a/src/target/esirisc_regs.h b/src/target/esirisc_regs.h index ad3385819..a946a2ecc 100644 --- a/src/target/esirisc_regs.h +++ b/src/target/esirisc_regs.h @@ -164,7 +164,7 @@ enum esirisc_reg_num { #define CSR_CONFIG_DBG 0x0f /* Debug Configuration */ #define CSR_CONFIG_MID 0x10 /* Manufacturer ID */ #define CSR_CONFIG_REV 0x11 /* Revision Number */ -#define CSR_CONFIG_MPID 0x12 /* Mulitprocessor ID */ +#define CSR_CONFIG_MPID 0x12 /* Multiprocessor ID */ #define CSR_CONFIG_FREQn 0x13 /* Frequency [0..2] */ #define CSR_CONFIG_TRACE 0x16 /* Trace Configuration */ diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c index 6a7d5a29d..28d7536af 100644 --- a/src/target/esirisc_trace.c +++ b/src/target/esirisc_trace.c @@ -461,7 +461,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b if (retval != ERROR_OK) goto fail; - command_print(cmd, "repeats %" PRId32 " %s", count, + command_print(cmd, "repeats %" PRIu32 " %s", count, (count == 1) ? "time" : "times"); break; } @@ -470,13 +470,13 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b return ERROR_OK; default: - command_print(cmd, "invalid extended trace ID: %" PRId32, ext_id); + command_print(cmd, "invalid extended trace ID: %" PRIu32, ext_id); return ERROR_FAIL; } break; } default: - command_print(cmd, "invalid trace ID: %" PRId32, id); + command_print(cmd, "invalid trace ID: %" PRIu32, id); return ERROR_FAIL; } } @@ -729,7 +729,7 @@ COMMAND_HANDLER(handle_esirisc_trace_info_command) command_print(CMD, "trigger delay: %s", esirisc_trace_delay_strings[trace_info->delay]); - command_print(CMD, "trigger delay cycles: %i", trace_info->delay_cycles); + command_print(CMD, "trigger delay cycles: %" PRIu32, trace_info->delay_cycles); return ERROR_OK; } diff --git a/src/target/etm.h b/src/target/etm.h index 6a78b7564..debe19743 100644 --- a/src/target/etm.h +++ b/src/target/etm.h @@ -203,7 +203,7 @@ typedef enum { BR_ENABLE = 0x1, /* Trace has been enabled */ BR_RESTART = 0x2, /* Trace restarted after a FIFO overflow */ BR_NODEBUG = 0x3, /* ARM has exited for debug state */ - BR_PERIOD = 0x4, /* Peridioc synchronization point (ETM >= v1.2)*/ + BR_PERIOD = 0x4, /* Periodic synchronization point (ETM >= v1.2)*/ BR_RSVD5 = 0x5, /* reserved */ BR_RSVD6 = 0x6, /* reserved */ BR_RSVD7 = 0x7, /* reserved */ diff --git a/src/target/fa526.c b/src/target/fa526.c index bb9f7353a..aa9e45043 100644 --- a/src/target/fa526.c +++ b/src/target/fa526.c @@ -347,6 +347,16 @@ static int fa526_target_create(struct target *target, Jim_Interp *interp) return fa526_init_arch_info(target, arm920t, target->tap); } +static void fa526_deinit_target(struct target *target) +{ + struct arm *arm = target_to_arm(target); + struct arm920t_common *arm920t = target_to_arm920(target); + + arm7_9_deinit(target); + arm_free_reg_cache(arm); + free(arm920t); +} + /** Holds methods for FA526 targets. */ struct target_type fa526_target = { .name = "fa526", @@ -383,6 +393,7 @@ struct target_type fa526_target = { .commands = arm920t_command_handlers, .target_create = fa526_target_create, .init_target = arm9tdmi_init_target, + .deinit_target = fa526_deinit_target, .examine = arm7_9_examine, .check_reset = arm7_9_check_reset, }; diff --git a/src/target/feroceon.c b/src/target/feroceon.c index 4a6c6dcf0..1d1351bbc 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -37,7 +37,7 @@ * - asserting DBGRQ doesn't work if target is looping on the undef vector * * - the EICE version signature in the COMMS_CTL reg is next to the flow bits - * not at the top, and rather meaningless due to existing discrepencies + * not at the top, and rather meaningless due to existing discrepancies * * - the DCC channel is half duplex (only one FIFO for both directions) with * seemingly no proper flow control. @@ -593,6 +593,11 @@ static int feroceon_init_target(struct command_context *cmd_ctx, return ERROR_OK; } +static void feroceon_deinit_target(struct target *target) +{ + arm9tdmi_deinit_target(target); +} + static void feroceon_common_setup(struct target *target) { struct arm *arm = target->arch_info; @@ -729,6 +734,7 @@ struct target_type feroceon_target = { .commands = arm926ejs_command_handlers, .target_create = feroceon_target_create, .init_target = feroceon_init_target, + .deinit_target = feroceon_deinit_target, .examine = feroceon_examine, }; diff --git a/src/target/image.c b/src/target/image.c index 1038a744b..68262e9ff 100644 --- a/src/target/image.c +++ b/src/target/image.c @@ -497,7 +497,7 @@ static int image_elf_read_section(struct image *image, if (offset < field32(elf, segment->p_filesz)) { /* maximal size present in file for the current segment */ read_size = MIN(size, field32(elf, segment->p_filesz) - offset); - LOG_DEBUG("read elf: size = 0x%zu at 0x%" PRIx32 "", read_size, + LOG_DEBUG("read elf: size = 0x%zx at 0x%" PRIx32 "", read_size, field32(elf, segment->p_offset) + offset); /* read initialized area of the segment */ retval = fileio_seek(elf->fileio, field32(elf, segment->p_offset) + offset); @@ -832,7 +832,7 @@ int image_open(struct image *image, const char *url, const char *type_string) for (section = 0; section < image->num_sections; section++) image->sections[section].base_address += image->base_address; /* we're done relocating. The two statements below are mainly - * for documenation purposes: stop anyone from empirically + * for documentation purposes: stop anyone from empirically * thinking they should use these values henceforth. */ image->base_address = 0; image->base_address_set = 0; @@ -984,40 +984,30 @@ void image_close(struct image *image) fileio_close(image_ihex->fileio); - if (image_ihex->buffer) { - free(image_ihex->buffer); - image_ihex->buffer = NULL; - } + free(image_ihex->buffer); + image_ihex->buffer = NULL; } else if (image->type == IMAGE_ELF) { struct image_elf *image_elf = image->type_private; fileio_close(image_elf->fileio); - if (image_elf->header) { - free(image_elf->header); - image_elf->header = NULL; - } + free(image_elf->header); + image_elf->header = NULL; - if (image_elf->segments) { - free(image_elf->segments); - image_elf->segments = NULL; - } + free(image_elf->segments); + image_elf->segments = NULL; } else if (image->type == IMAGE_MEMORY) { struct image_memory *image_memory = image->type_private; - if (image_memory->cache) { - free(image_memory->cache); - image_memory->cache = NULL; - } + free(image_memory->cache); + image_memory->cache = NULL; } else if (image->type == IMAGE_SRECORD) { struct image_mot *image_mot = image->type_private; fileio_close(image_mot->fileio); - if (image_mot->buffer) { - free(image_mot->buffer); - image_mot->buffer = NULL; - } + free(image_mot->buffer); + image_mot->buffer = NULL; } else if (image->type == IMAGE_BUILDER) { int i; @@ -1027,15 +1017,11 @@ void image_close(struct image *image) } } - if (image->type_private) { - free(image->type_private); - image->type_private = NULL; - } + free(image->type_private); + image->type_private = NULL; - if (image->sections) { - free(image->sections); - image->sections = NULL; - } + free(image->sections); + image->sections = NULL; } int image_calculate_checksum(uint8_t *buffer, uint32_t nbytes, uint32_t *checksum) diff --git a/src/target/lakemont.c b/src/target/lakemont.c index 31882b828..31b521b3a 100644 --- a/src/target/lakemont.c +++ b/src/target/lakemont.c @@ -330,7 +330,7 @@ static int restore_context(struct target *t) /* * we keep reg_cache in sync with hardware at halt/resume time, we avoid - * writing to real hardware here bacause pm_regs reflects the hardware + * writing to real hardware here because pm_regs reflects the hardware * while we are halted then reg_cache syncs with hw on resume * TODO - in order for "reg eip force" to work it assume get/set reads * and writes from hardware, may be other reasons also because generally @@ -363,7 +363,7 @@ static int lakemont_set_core_reg(struct reg *reg, uint8_t *buf) } static const struct reg_arch_type lakemont_reg_type = { - /* these get called if reg_cache doesnt have a "valid" value + /* these get called if reg_cache doesn't have a "valid" value * of an individual reg eg "reg eip" but not for "reg" block */ .get = lakemont_get_core_reg, @@ -649,7 +649,7 @@ static int read_hw_reg(struct target *t, int reg, uint32_t *regval, uint8_t cach struct x86_32_common *x86_32 = target_to_x86_32(t); struct lakemont_core_reg *arch_info; arch_info = x86_32->cache->reg_list[reg].arch_info; - x86_32->flush = 0; /* dont flush scans till we have a batch */ + x86_32->flush = 0; /* don't flush scans till we have a batch */ if (submit_reg_pir(t, reg) != ERROR_OK) return ERROR_FAIL; if (submit_instruction_pir(t, SRAMACCESS) != ERROR_OK) @@ -693,7 +693,7 @@ static int write_hw_reg(struct target *t, int reg, uint32_t regval, uint8_t cach arch_info->op, regval); - x86_32->flush = 0; /* dont flush scans till we have a batch */ + x86_32->flush = 0; /* don't flush scans till we have a batch */ if (submit_reg_pir(t, reg) != ERROR_OK) return ERROR_FAIL; if (submit_instruction_pir(t, SRAMACCESS) != ERROR_OK) @@ -943,7 +943,7 @@ int lakemont_poll(struct target *t) if (bp != NULL) { t->debug_reason = DBG_REASON_BREAKPOINT; if (bp->type == BKPT_SOFT) { - /* The EIP is now pointing the the next byte after the + /* The EIP is now pointing the next byte after the * breakpoint instruction. This needs to be corrected. */ buf_set_u32(x86_32->cache->reg_list[EIP].value, 0, 32, eip-1); diff --git a/src/target/ls1_sap.c b/src/target/ls1_sap.c index 330042f00..5e1218837 100644 --- a/src/target/ls1_sap.c +++ b/src/target/ls1_sap.c @@ -182,7 +182,7 @@ static int ls1_sap_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) { LOG_DEBUG("Reading memory at physical address 0x%" TARGET_PRIxADDR - "; size %" PRId32 "; count %" PRId32, address, size, count); + "; size %" PRIu32 "; count %" PRIu32, address, size, count); if (count == 0 || buffer == NULL) return ERROR_COMMAND_SYNTAX_ERROR; @@ -204,7 +204,7 @@ static int ls1_sap_write_memory(struct target *target, target_addr_t address, const uint8_t *buffer) { LOG_DEBUG("Writing memory at physical address 0x%" TARGET_PRIxADDR - "; size %" PRId32 "; count %" PRId32, address, size, count); + "; size %" PRIu32 "; count %" PRIu32, address, size, count); if (count == 0 || buffer == NULL) diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c index ade48b6d7..7ed41c63c 100644 --- a/src/target/mem_ap.c +++ b/src/target/mem_ap.c @@ -150,7 +150,7 @@ static int mem_ap_read_memory(struct target *target, target_addr_t address, struct mem_ap *mem_ap = target->arch_info; LOG_DEBUG("Reading memory at physical address " TARGET_ADDR_FMT - "; size %" PRId32 "; count %" PRId32, address, size, count); + "; size %" PRIu32 "; count %" PRIu32, address, size, count); if (count == 0 || buffer == NULL) return ERROR_COMMAND_SYNTAX_ERROR; @@ -165,7 +165,7 @@ static int mem_ap_write_memory(struct target *target, target_addr_t address, struct mem_ap *mem_ap = target->arch_info; LOG_DEBUG("Writing memory at physical address " TARGET_ADDR_FMT - "; size %" PRId32 "; count %" PRId32, address, size, count); + "; size %" PRIu32 "; count %" PRIu32, address, size, count); if (count == 0 || buffer == NULL) return ERROR_COMMAND_SYNTAX_ERROR; diff --git a/src/target/mips32.c b/src/target/mips32.c index 526003216..e1f2b2832 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -226,7 +226,7 @@ static int mips32_write_core_reg(struct target *target, unsigned int num) reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32); mips32->core_regs[num] = reg_value; - LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value); + LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value); mips32->core_cache->reg_list[num].valid = true; mips32->core_cache->reg_list[num].dirty = false; @@ -723,9 +723,9 @@ int mips32_read_config_regs(struct target *target) break; /* no more config registers implemented */ } else - return ERROR_OK; /* already succesfully read */ + return ERROR_OK; /* already successfully read */ - LOG_DEBUG("read %"PRId32" config registers", ejtag_info->config_regs); + LOG_DEBUG("read %"PRIu32" config registers", ejtag_info->config_regs); if (ejtag_info->impcode & EJTAG_IMP_MIPS16) { mips32->isa_imp = MIPS32_MIPS16; @@ -950,11 +950,11 @@ COMMAND_HANDLER(mips32_handle_cp0_command) retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel); if (retval != ERROR_OK) { command_print(CMD, - "couldn't access reg %" PRIi32, + "couldn't access reg %" PRIu32, cp0_reg); return ERROR_OK; } - command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32, + command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32, cp0_reg, cp0_sel, value); } else if (CMD_ARGC == 3) { @@ -963,11 +963,11 @@ COMMAND_HANDLER(mips32_handle_cp0_command) retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel); if (retval != ERROR_OK) { command_print(CMD, - "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32, + "couldn't access cp0 reg %" PRIu32 ", select %" PRIu32, cp0_reg, cp0_sel); return ERROR_OK; } - command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32, + command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32, cp0_reg, cp0_sel, value); } } diff --git a/src/target/mips32.h b/src/target/mips32.h index 4dc164e1b..f107b57d5 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -42,7 +42,7 @@ /** Returns the kernel segment base of a given address */ #define KSEGX(a) ((a) & 0xe0000000) -/** CP0 CONFIG regites fields */ +/** CP0 CONFIG register fields */ #define MIPS32_CONFIG0_KU_SHIFT 25 #define MIPS32_CONFIG0_KU_MASK (0x7 << MIPS32_CONFIG0_KU_SHIFT) diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index 790c8dc93..9bac40eb0 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -277,7 +277,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct return ERROR_JTAG_DEVICE_ERROR; } } else - if (code_count > 10) { /* enough, abandone */ + if (code_count > 10) { /* enough, abandon */ LOG_DEBUG("execution abandoned, store pending: %d", store_pending); return ERROR_JTAG_DEVICE_ERROR; } @@ -346,8 +346,7 @@ void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t dat inline void pracc_queue_free(struct pracc_queue_info *ctx) { - if (ctx->pracc_list != NULL) - free(ctx->pracc_list); + free(ctx->pracc_list); } int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx, @@ -427,7 +426,7 @@ int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_in fetch_addr += 4; scan_count++; - /* check if previous intrucction is a store instruction at dmesg */ + /* check if previous instruction is a store instruction at dmesg */ if (i > 0 && ctx->pracc_list[i - 1].addr) { uint32_t store_addr = ctx->pracc_list[i - 1].addr; ejtag_ctrl = buf_get_u32(scan_in[scan_count].scan_32.ctrl, 0, 32); @@ -550,8 +549,7 @@ int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size } exit: pracc_queue_free(&ctx); - if (data != NULL) - free(data); + free(data); return ctx.retval; } @@ -789,7 +787,7 @@ int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int siz * If we are in the cacheable region and cache is activated, * we must clean D$ (if Cache Coherency Attribute is set to 3) + invalidate I$ after we did the write, * so that changes do not continue to live only in D$ (if CCA = 3), but to be - * replicated in I$ also (maybe we wrote the istructions) + * replicated in I$ also (maybe we wrote the instructions) */ uint32_t conf = 0; int cached = 0; @@ -816,7 +814,7 @@ int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int siz } /** - * Check cachablitiy bits coherency algorithm + * Check cacheability bits coherency algorithm * is the region cacheable or uncached. * If cacheable we have to synchronize the cache */ diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h index e31ba63e2..911a69c5b 100644 --- a/src/target/mips32_pracc.h +++ b/src/target/mips32_pracc.h @@ -58,7 +58,7 @@ struct pracc_queue_info { int retval; int code_count; int store_count; - int max_code; /* max intstructions with currently allocated memory */ + int max_code; /* max instructions with currently allocated memory */ pa_list *pracc_list; /* Code and store addresses at dmseg */ }; @@ -93,7 +93,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct * @param[in] cp0_reg Number of copro C0 register we want to read * @param[in] cp0_sel Select for the given C0 register * - * @return ERROR_OK on Sucess, ERROR_FAIL otherwise + * @return ERROR_OK on Success, ERROR_FAIL otherwise */ int mips32_cp0_read(struct mips_ejtag *ejtag_info, uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel); @@ -109,7 +109,7 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info, * @param[in] cp0_reg Number of copro C0 register we want to write to * @param[in] cp0_sel Select for the given C0 register * - * @return ERROR_OK on Sucess, ERROR_FAIL otherwise + * @return ERROR_OK on Success, ERROR_FAIL otherwise */ int mips32_cp0_write(struct mips_ejtag *ejtag_info, uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel); diff --git a/src/target/mips64.c b/src/target/mips64.c index 6a7c4252b..347cdfc4b 100644 --- a/src/target/mips64.c +++ b/src/target/mips64.c @@ -283,7 +283,7 @@ static int mips64_write_core_reg(struct target *target, int num) reg_value = buf_get_u64(mips64->core_cache->reg_list[num].value, 0, 64); mips64->core_regs[num] = reg_value; - LOG_DEBUG("write core reg %i value 0x%" PRIx64 "", num , reg_value); + LOG_DEBUG("write core reg %i value 0x%" PRIx64 "", num, reg_value); mips64->core_cache->reg_list[num].valid = 1; mips64->core_cache->reg_list[num].dirty = 0; diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c index b19fd044e..3080046f3 100644 --- a/src/target/mips64_pracc.c +++ b/src/target/mips64_pracc.c @@ -221,7 +221,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info, unsigned i; for (i = 0; i < code_len; i++) - LOG_DEBUG("%08x", code[i]); + LOG_DEBUG("%08" PRIx32, code[i]); ctx.local_iparam = param_in; ctx.local_oparam = param_out; @@ -247,7 +247,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info, mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); mips_ejtag_drscan_32(ejtag_info, &address32); - LOG_DEBUG("-> %08x", address32); + LOG_DEBUG("-> %08" PRIx32, address32); address = 0xffffffffff200000ull | address32; int psz = (ejtag_ctrl >> 29) & 3; @@ -1349,7 +1349,7 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, LOG_DEBUG("%s using " TARGET_ADDR_FMT " for write handler", __func__, source->address); - LOG_DEBUG("daddiu: %08x", handler_code[11]); + LOG_DEBUG("daddiu: %08" PRIx32, handler_code[11]); jmp_code[0] |= UPPER16(source->address); jmp_code[1] |= LOWER16(source->address); diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index 3735cbb67..7544afe52 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -278,7 +278,7 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info) return ctx.retval; } -/* mips_ejtag_init_mmr - asign Memory-Mapped Registers depending +/* mips_ejtag_init_mmr - assign Memory-Mapped Registers depending * on EJTAG version. */ static void mips_ejtag_init_mmr(struct mips_ejtag *ejtag_info) diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index ad27520c8..52b4b3217 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -667,7 +667,7 @@ static int mips_m4k_set_breakpoint(struct target *target, if (ejtag_info->endianness && isa_req) sdbbp32_instr = SWAP16(sdbbp32_instr); - if ((breakpoint->address & 3) == 0) { /* word alligned */ + if ((breakpoint->address & 3) == 0) { /* word aligned */ retval = target_read_memory(target, bpaddr, bplength, 1, breakpoint->orig_instr); if (retval != ERROR_OK) @@ -784,9 +784,9 @@ static int mips_m4k_unset_breakpoint(struct target *target, if (retval != ERROR_OK) return retval; /** - * target_read_memory() gets us data in _target_ endianess. + * target_read_memory() gets us data in _target_ endianness. * If we want to use this data on the host for comparisons with some macros - * we must first transform it to _host_ endianess using target_buffer_get_u16(). + * we must first transform it to _host_ endianness using target_buffer_get_u16(). */ if (sdbbp32_instr == target_buffer_get_u32(target, current_instr)) { retval = target_write_memory(target, breakpoint->address, 4, 1, @@ -794,7 +794,7 @@ static int mips_m4k_unset_breakpoint(struct target *target, if (retval != ERROR_OK) return retval; } - } else { /* 16bit alligned */ + } else { /* 16bit aligned */ retval = target_read_memory(target, breakpoint->address, 2, 2, current_instr); if (retval != ERROR_OK) return retval; @@ -1072,7 +1072,7 @@ static int mips_m4k_read_memory(struct target *target, target_addr_t address, } } - if ((size > 1) && (t != NULL)) + if (size > 1) free(t); return retval; @@ -1106,7 +1106,7 @@ static int mips_m4k_write_memory(struct target *target, target_addr_t address, if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; - /** correct endianess if we have word or hword access */ + /** correct endianness if we have word or hword access */ void *t = NULL; if (size > 1) { /* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */ @@ -1135,8 +1135,7 @@ static int mips_m4k_write_memory(struct target *target, target_addr_t address, else retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, buffer); - if (t != NULL) - free(t); + free(t); if (ERROR_OK != retval) return retval; @@ -1261,8 +1260,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address, count, t); - if (t != NULL) - free(t); + free(t); if (retval != ERROR_OK) LOG_ERROR("Fastdata access Failed"); @@ -1309,11 +1307,11 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command) retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel); if (retval != ERROR_OK) { command_print(CMD, - "couldn't access reg %" PRIi32, + "couldn't access reg %" PRIu32, cp0_reg); return ERROR_OK; } - command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32, + command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32, cp0_reg, cp0_sel, value); } else if (CMD_ARGC == 3) { @@ -1322,11 +1320,11 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command) retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel); if (retval != ERROR_OK) { command_print(CMD, - "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32, + "couldn't access cp0 reg %" PRIu32 ", select %" PRIu32, cp0_reg, cp0_sel); return ERROR_OK; } - command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32, + command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32, cp0_reg, cp0_sel, value); } } diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c index 3a592f7f3..f941af517 100644 --- a/src/target/mips_mips64.c +++ b/src/target/mips_mips64.c @@ -247,7 +247,7 @@ static int mips_mips64_set_hwbp(struct target *target, struct breakpoint *bp) bp_num++; if (bp_num >= mips64->num_inst_bpoints) { - LOG_DEBUG("ERROR Can not find free FP Comparator(bpid: %d)", + LOG_DEBUG("ERROR Can not find free FP Comparator(bpid: %" PRIu32 ")", bp->unique_id); LOG_WARNING("ERROR Can not find free FP Comparator"); exit(-1); @@ -274,7 +274,7 @@ static int mips_mips64_set_hwbp(struct target *target, struct breakpoint *bp) if (retval != ERROR_OK) return retval; - LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx64 "", bp->unique_id, + LOG_DEBUG("bpid: %" PRIu32 ", bp_num %i bp_value 0x%" PRIx64, bp->unique_id, bp_num, c->bp_value); return ERROR_OK; @@ -354,7 +354,7 @@ static int mips_mips64_set_breakpoint(struct target *target, if (bp->type == BKPT_HARD) { retval = mips_mips64_set_hwbp(target, bp); } else { - LOG_DEBUG("bpid: %d", bp->unique_id); + LOG_DEBUG("bpid: %" PRIu32, bp->unique_id); switch (bp->length) { case MIPS64_SDBBP_SIZE: @@ -511,12 +511,12 @@ static int mips_mips64_unset_hwbp(struct target *target, struct breakpoint *bp) bp_num = bp->set - 1; if ((bp_num < 0) || (bp_num >= mips64->num_inst_bpoints)) { - LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %d)", + LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %" PRIu32 ")", bp->unique_id); return ERROR_OK; } - LOG_DEBUG("bpid: %d - releasing hw: %d", bp->unique_id, bp_num); + LOG_DEBUG("bpid: %" PRIu32 " - releasing hw: %d", bp->unique_id, bp_num); comparator_list[bp_num].used = false; comparator_list[bp_num].bp_value = 0; @@ -576,7 +576,7 @@ static int mips_mips64_unset_breakpoint(struct target *target, if (bp->type == BKPT_HARD) { retval = mips_mips64_unset_hwbp(target, bp); } else { - LOG_DEBUG("bpid: %d", bp->unique_id); + LOG_DEBUG("bpid: %" PRIu32, bp->unique_id); switch (bp->length) { case MIPS64_SDBBP_SIZE: diff --git a/src/target/nds32.c b/src/target/nds32.c index f40ce534b..487e19c6a 100644 --- a/src/target/nds32.c +++ b/src/target/nds32.c @@ -1462,8 +1462,7 @@ int nds32_add_software_breakpoint(struct target *target, break_insn = NDS32_BREAK_32; } - if (breakpoint->orig_instr != NULL) - free(breakpoint->orig_instr); + free(breakpoint->orig_instr); breakpoint->orig_instr = malloc(breakpoint->length); memcpy(breakpoint->orig_instr, &data, breakpoint->length); @@ -1711,8 +1710,8 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng /* (address + length - 1) / dcache_line_size */ end_line = (address + length - 1) >> (dcache->line_size + 2); - for (cur_address = address, cur_line = start_line ; - cur_line <= end_line ; + for (cur_address = address, cur_line = start_line; + cur_line <= end_line; cur_address += dcache_line_size, cur_line++) { /* D$ write back */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_VA_WB, cur_address); @@ -1732,8 +1731,8 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng /* (address + length - 1) / icache_line_size */ end_line = (address + length - 1) >> (icache->line_size + 2); - for (cur_address = address, cur_line = start_line ; - cur_line <= end_line ; + for (cur_address = address, cur_line = start_line; + cur_line <= end_line; cur_address += icache_line_size, cur_line++) { /* Because PSW.IT is turned off under debug exception, address MUST * be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide @@ -2334,10 +2333,8 @@ int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fil LOG_DEBUG("hit syscall ID: 0x%" PRIx32, syscall_id); /* free previous identifier storage */ - if (NULL != fileio_info->identifier) { - free(fileio_info->identifier); - fileio_info->identifier = NULL; - } + free(fileio_info->identifier); + fileio_info->identifier = NULL; uint32_t reg_r0, reg_r1, reg_r2; nds32_get_mapped_reg(nds32, R0, ®_r0); diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c index d7d040e4b..1684ea882 100644 --- a/src/target/nds32_cmd.c +++ b/src/target/nds32_cmd.c @@ -1036,7 +1036,7 @@ static const struct command_registration nds32_exec_command_handlers[] = { .name = "login_edm_operation", .handler = handle_nds32_login_edm_operation_command, .mode = COMMAND_CONFIG, - .usage = "login_edm_operation misc_reg_no value", + .usage = "misc_reg_no value", .help = "add EDM operations for secure MCU debugging.", }, { diff --git a/src/target/nds32_reg.c b/src/target/nds32_reg.c index 7cefcb1a2..034a07584 100644 --- a/src/target/nds32_reg.c +++ b/src/target/nds32_reg.c @@ -367,7 +367,7 @@ bool nds32_reg_exception(uint32_t number, uint32_t value) field_value = (value >> ex_reg_value->ex_value_bit_pos) & ex_reg_value->ex_value_mask; if (field_value == ex_reg_value->ex_value) { - LOG_WARNING("It will generate exceptions as setting %" PRId32 " to %s", + LOG_WARNING("It will generate exceptions as setting %" PRIu32 " to %s", value, nds32_regs[number].simple_mnemonic); return true; } diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c index 29489a034..392bd6eb9 100644 --- a/src/target/nds32_v2.c +++ b/src/target/nds32_v2.c @@ -256,7 +256,7 @@ static int nds32_v2_check_interrupt_stack(struct nds32_v2_common *nds32_v2) aice_write_register(aice, IR2, val_ir2); } - /* get origianl DT bit and set to current state let debugger has same memory view + /* get original DT bit and set to current state let debugger has same memory view PSW.IT MUST be turned off. Otherwise, DIM could not operate normally. */ aice_read_register(aice, IR1, &val_ir1); modified_psw = val_ir0 | (val_ir1 & 0x80); diff --git a/src/target/openrisc/jsp_server.c b/src/target/openrisc/jsp_server.c index 6fb764a6c..1d05944bc 100644 --- a/src/target/openrisc/jsp_server.c +++ b/src/target/openrisc/jsp_server.c @@ -184,24 +184,14 @@ static int jsp_input(struct connection *connection) static int jsp_connection_closed(struct connection *connection) { - struct telnet_connection *t_con = connection->priv; struct jsp_service *jsp_service = connection->service->priv; - if (t_con->prompt) { - free(t_con->prompt); - t_con->prompt = NULL; - } - int retval = target_unregister_timer_callback(&jsp_poll_read, jsp_service); if (ERROR_OK != retval) return retval; - if (connection->priv) { - free(connection->priv); - connection->priv = NULL; - } else - LOG_ERROR("BUG: connection->priv == NULL"); - + free(connection->priv); + connection->priv = NULL; return ERROR_OK; } diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c index 44825d002..d685359be 100644 --- a/src/target/openrisc/or1k.c +++ b/src/target/openrisc/or1k.c @@ -50,186 +50,186 @@ static int or1k_write_core_reg(struct target *target, int num); static struct or1k_core_reg *or1k_core_reg_list_arch_info; static const struct or1k_core_reg_init or1k_init_reg_list[] = { - {"r0" , GROUP0 + 1024, "org.gnu.gdb.or1k.group0", NULL}, - {"r1" , GROUP0 + 1025, "org.gnu.gdb.or1k.group0", NULL}, - {"r2" , GROUP0 + 1026, "org.gnu.gdb.or1k.group0", NULL}, - {"r3" , GROUP0 + 1027, "org.gnu.gdb.or1k.group0", NULL}, - {"r4" , GROUP0 + 1028, "org.gnu.gdb.or1k.group0", NULL}, - {"r5" , GROUP0 + 1029, "org.gnu.gdb.or1k.group0", NULL}, - {"r6" , GROUP0 + 1030, "org.gnu.gdb.or1k.group0", NULL}, - {"r7" , GROUP0 + 1031, "org.gnu.gdb.or1k.group0", NULL}, - {"r8" , GROUP0 + 1032, "org.gnu.gdb.or1k.group0", NULL}, - {"r9" , GROUP0 + 1033, "org.gnu.gdb.or1k.group0", NULL}, - {"r10" , GROUP0 + 1034, "org.gnu.gdb.or1k.group0", NULL}, - {"r11" , GROUP0 + 1035, "org.gnu.gdb.or1k.group0", NULL}, - {"r12" , GROUP0 + 1036, "org.gnu.gdb.or1k.group0", NULL}, - {"r13" , GROUP0 + 1037, "org.gnu.gdb.or1k.group0", NULL}, - {"r14" , GROUP0 + 1038, "org.gnu.gdb.or1k.group0", NULL}, - {"r15" , GROUP0 + 1039, "org.gnu.gdb.or1k.group0", NULL}, - {"r16" , GROUP0 + 1040, "org.gnu.gdb.or1k.group0", NULL}, - {"r17" , GROUP0 + 1041, "org.gnu.gdb.or1k.group0", NULL}, - {"r18" , GROUP0 + 1042, "org.gnu.gdb.or1k.group0", NULL}, - {"r19" , GROUP0 + 1043, "org.gnu.gdb.or1k.group0", NULL}, - {"r20" , GROUP0 + 1044, "org.gnu.gdb.or1k.group0", NULL}, - {"r21" , GROUP0 + 1045, "org.gnu.gdb.or1k.group0", NULL}, - {"r22" , GROUP0 + 1046, "org.gnu.gdb.or1k.group0", NULL}, - {"r23" , GROUP0 + 1047, "org.gnu.gdb.or1k.group0", NULL}, - {"r24" , GROUP0 + 1048, "org.gnu.gdb.or1k.group0", NULL}, - {"r25" , GROUP0 + 1049, "org.gnu.gdb.or1k.group0", NULL}, - {"r26" , GROUP0 + 1050, "org.gnu.gdb.or1k.group0", NULL}, - {"r27" , GROUP0 + 1051, "org.gnu.gdb.or1k.group0", NULL}, - {"r28" , GROUP0 + 1052, "org.gnu.gdb.or1k.group0", NULL}, - {"r29" , GROUP0 + 1053, "org.gnu.gdb.or1k.group0", NULL}, - {"r30" , GROUP0 + 1054, "org.gnu.gdb.or1k.group0", NULL}, - {"r31" , GROUP0 + 1055, "org.gnu.gdb.or1k.group0", NULL}, - {"ppc" , GROUP0 + 18, "org.gnu.gdb.or1k.group0", NULL}, - {"npc" , GROUP0 + 16, "org.gnu.gdb.or1k.group0", NULL}, - {"sr" , GROUP0 + 17, "org.gnu.gdb.or1k.group0", NULL}, - {"vr" , GROUP0 + 0, "org.gnu.gdb.or1k.group0", "system"}, - {"upr" , GROUP0 + 1, "org.gnu.gdb.or1k.group0", "system"}, - {"cpucfgr" , GROUP0 + 2, "org.gnu.gdb.or1k.group0", "system"}, - {"dmmucfgr" , GROUP0 + 3, "org.gnu.gdb.or1k.group0", "system"}, - {"immucfgr" , GROUP0 + 4, "org.gnu.gdb.or1k.group0", "system"}, - {"dccfgr" , GROUP0 + 5, "org.gnu.gdb.or1k.group0", "system"}, - {"iccfgr" , GROUP0 + 6, "org.gnu.gdb.or1k.group0", "system"}, - {"dcfgr" , GROUP0 + 7, "org.gnu.gdb.or1k.group0", "system"}, - {"pccfgr" , GROUP0 + 8, "org.gnu.gdb.or1k.group0", "system"}, - {"fpcsr" , GROUP0 + 20, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr0" , GROUP0 + 32, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr1" , GROUP0 + 33, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr2" , GROUP0 + 34, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr3" , GROUP0 + 35, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr4" , GROUP0 + 36, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr5" , GROUP0 + 37, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr6" , GROUP0 + 38, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr7" , GROUP0 + 39, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr8" , GROUP0 + 40, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr9" , GROUP0 + 41, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr10" , GROUP0 + 42, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr11" , GROUP0 + 43, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr12" , GROUP0 + 44, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr13" , GROUP0 + 45, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr14" , GROUP0 + 46, "org.gnu.gdb.or1k.group0", "system"}, - {"epcr15" , GROUP0 + 47, "org.gnu.gdb.or1k.group0", "system"}, - {"eear0" , GROUP0 + 48, "org.gnu.gdb.or1k.group0", "system"}, - {"eear1" , GROUP0 + 49, "org.gnu.gdb.or1k.group0", "system"}, - {"eear2" , GROUP0 + 50, "org.gnu.gdb.or1k.group0", "system"}, - {"eear3" , GROUP0 + 51, "org.gnu.gdb.or1k.group0", "system"}, - {"eear4" , GROUP0 + 52, "org.gnu.gdb.or1k.group0", "system"}, - {"eear5" , GROUP0 + 53, "org.gnu.gdb.or1k.group0", "system"}, - {"eear6" , GROUP0 + 54, "org.gnu.gdb.or1k.group0", "system"}, - {"eear7" , GROUP0 + 55, "org.gnu.gdb.or1k.group0", "system"}, - {"eear8" , GROUP0 + 56, "org.gnu.gdb.or1k.group0", "system"}, - {"eear9" , GROUP0 + 57, "org.gnu.gdb.or1k.group0", "system"}, - {"eear10" , GROUP0 + 58, "org.gnu.gdb.or1k.group0", "system"}, - {"eear11" , GROUP0 + 59, "org.gnu.gdb.or1k.group0", "system"}, - {"eear12" , GROUP0 + 60, "org.gnu.gdb.or1k.group0", "system"}, - {"eear13" , GROUP0 + 61, "org.gnu.gdb.or1k.group0", "system"}, - {"eear14" , GROUP0 + 62, "org.gnu.gdb.or1k.group0", "system"}, - {"eear15" , GROUP0 + 63, "org.gnu.gdb.or1k.group0", "system"}, - {"esr0" , GROUP0 + 64, "org.gnu.gdb.or1k.group0", "system"}, - {"esr1" , GROUP0 + 65, "org.gnu.gdb.or1k.group0", "system"}, - {"esr2" , GROUP0 + 66, "org.gnu.gdb.or1k.group0", "system"}, - {"esr3" , GROUP0 + 67, "org.gnu.gdb.or1k.group0", "system"}, - {"esr4" , GROUP0 + 68, "org.gnu.gdb.or1k.group0", "system"}, - {"esr5" , GROUP0 + 69, "org.gnu.gdb.or1k.group0", "system"}, - {"esr6" , GROUP0 + 70, "org.gnu.gdb.or1k.group0", "system"}, - {"esr7" , GROUP0 + 71, "org.gnu.gdb.or1k.group0", "system"}, - {"esr8" , GROUP0 + 72, "org.gnu.gdb.or1k.group0", "system"}, - {"esr9" , GROUP0 + 73, "org.gnu.gdb.or1k.group0", "system"}, - {"esr10" , GROUP0 + 74, "org.gnu.gdb.or1k.group0", "system"}, - {"esr11" , GROUP0 + 75, "org.gnu.gdb.or1k.group0", "system"}, - {"esr12" , GROUP0 + 76, "org.gnu.gdb.or1k.group0", "system"}, - {"esr13" , GROUP0 + 77, "org.gnu.gdb.or1k.group0", "system"}, - {"esr14" , GROUP0 + 78, "org.gnu.gdb.or1k.group0", "system"}, - {"esr15" , GROUP0 + 79, "org.gnu.gdb.or1k.group0", "system"}, + {"r0", GROUP0 + 1024, "org.gnu.gdb.or1k.group0", NULL}, + {"r1", GROUP0 + 1025, "org.gnu.gdb.or1k.group0", NULL}, + {"r2", GROUP0 + 1026, "org.gnu.gdb.or1k.group0", NULL}, + {"r3", GROUP0 + 1027, "org.gnu.gdb.or1k.group0", NULL}, + {"r4", GROUP0 + 1028, "org.gnu.gdb.or1k.group0", NULL}, + {"r5", GROUP0 + 1029, "org.gnu.gdb.or1k.group0", NULL}, + {"r6", GROUP0 + 1030, "org.gnu.gdb.or1k.group0", NULL}, + {"r7", GROUP0 + 1031, "org.gnu.gdb.or1k.group0", NULL}, + {"r8", GROUP0 + 1032, "org.gnu.gdb.or1k.group0", NULL}, + {"r9", GROUP0 + 1033, "org.gnu.gdb.or1k.group0", NULL}, + {"r10", GROUP0 + 1034, "org.gnu.gdb.or1k.group0", NULL}, + {"r11", GROUP0 + 1035, "org.gnu.gdb.or1k.group0", NULL}, + {"r12", GROUP0 + 1036, "org.gnu.gdb.or1k.group0", NULL}, + {"r13", GROUP0 + 1037, "org.gnu.gdb.or1k.group0", NULL}, + {"r14", GROUP0 + 1038, "org.gnu.gdb.or1k.group0", NULL}, + {"r15", GROUP0 + 1039, "org.gnu.gdb.or1k.group0", NULL}, + {"r16", GROUP0 + 1040, "org.gnu.gdb.or1k.group0", NULL}, + {"r17", GROUP0 + 1041, "org.gnu.gdb.or1k.group0", NULL}, + {"r18", GROUP0 + 1042, "org.gnu.gdb.or1k.group0", NULL}, + {"r19", GROUP0 + 1043, "org.gnu.gdb.or1k.group0", NULL}, + {"r20", GROUP0 + 1044, "org.gnu.gdb.or1k.group0", NULL}, + {"r21", GROUP0 + 1045, "org.gnu.gdb.or1k.group0", NULL}, + {"r22", GROUP0 + 1046, "org.gnu.gdb.or1k.group0", NULL}, + {"r23", GROUP0 + 1047, "org.gnu.gdb.or1k.group0", NULL}, + {"r24", GROUP0 + 1048, "org.gnu.gdb.or1k.group0", NULL}, + {"r25", GROUP0 + 1049, "org.gnu.gdb.or1k.group0", NULL}, + {"r26", GROUP0 + 1050, "org.gnu.gdb.or1k.group0", NULL}, + {"r27", GROUP0 + 1051, "org.gnu.gdb.or1k.group0", NULL}, + {"r28", GROUP0 + 1052, "org.gnu.gdb.or1k.group0", NULL}, + {"r29", GROUP0 + 1053, "org.gnu.gdb.or1k.group0", NULL}, + {"r30", GROUP0 + 1054, "org.gnu.gdb.or1k.group0", NULL}, + {"r31", GROUP0 + 1055, "org.gnu.gdb.or1k.group0", NULL}, + {"ppc", GROUP0 + 18, "org.gnu.gdb.or1k.group0", NULL}, + {"npc", GROUP0 + 16, "org.gnu.gdb.or1k.group0", NULL}, + {"sr", GROUP0 + 17, "org.gnu.gdb.or1k.group0", NULL}, + {"vr", GROUP0 + 0, "org.gnu.gdb.or1k.group0", "system"}, + {"upr", GROUP0 + 1, "org.gnu.gdb.or1k.group0", "system"}, + {"cpucfgr", GROUP0 + 2, "org.gnu.gdb.or1k.group0", "system"}, + {"dmmucfgr", GROUP0 + 3, "org.gnu.gdb.or1k.group0", "system"}, + {"immucfgr", GROUP0 + 4, "org.gnu.gdb.or1k.group0", "system"}, + {"dccfgr", GROUP0 + 5, "org.gnu.gdb.or1k.group0", "system"}, + {"iccfgr", GROUP0 + 6, "org.gnu.gdb.or1k.group0", "system"}, + {"dcfgr", GROUP0 + 7, "org.gnu.gdb.or1k.group0", "system"}, + {"pccfgr", GROUP0 + 8, "org.gnu.gdb.or1k.group0", "system"}, + {"fpcsr", GROUP0 + 20, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr0", GROUP0 + 32, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr1", GROUP0 + 33, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr2", GROUP0 + 34, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr3", GROUP0 + 35, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr4", GROUP0 + 36, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr5", GROUP0 + 37, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr6", GROUP0 + 38, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr7", GROUP0 + 39, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr8", GROUP0 + 40, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr9", GROUP0 + 41, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr10", GROUP0 + 42, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr11", GROUP0 + 43, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr12", GROUP0 + 44, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr13", GROUP0 + 45, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr14", GROUP0 + 46, "org.gnu.gdb.or1k.group0", "system"}, + {"epcr15", GROUP0 + 47, "org.gnu.gdb.or1k.group0", "system"}, + {"eear0", GROUP0 + 48, "org.gnu.gdb.or1k.group0", "system"}, + {"eear1", GROUP0 + 49, "org.gnu.gdb.or1k.group0", "system"}, + {"eear2", GROUP0 + 50, "org.gnu.gdb.or1k.group0", "system"}, + {"eear3", GROUP0 + 51, "org.gnu.gdb.or1k.group0", "system"}, + {"eear4", GROUP0 + 52, "org.gnu.gdb.or1k.group0", "system"}, + {"eear5", GROUP0 + 53, "org.gnu.gdb.or1k.group0", "system"}, + {"eear6", GROUP0 + 54, "org.gnu.gdb.or1k.group0", "system"}, + {"eear7", GROUP0 + 55, "org.gnu.gdb.or1k.group0", "system"}, + {"eear8", GROUP0 + 56, "org.gnu.gdb.or1k.group0", "system"}, + {"eear9", GROUP0 + 57, "org.gnu.gdb.or1k.group0", "system"}, + {"eear10", GROUP0 + 58, "org.gnu.gdb.or1k.group0", "system"}, + {"eear11", GROUP0 + 59, "org.gnu.gdb.or1k.group0", "system"}, + {"eear12", GROUP0 + 60, "org.gnu.gdb.or1k.group0", "system"}, + {"eear13", GROUP0 + 61, "org.gnu.gdb.or1k.group0", "system"}, + {"eear14", GROUP0 + 62, "org.gnu.gdb.or1k.group0", "system"}, + {"eear15", GROUP0 + 63, "org.gnu.gdb.or1k.group0", "system"}, + {"esr0", GROUP0 + 64, "org.gnu.gdb.or1k.group0", "system"}, + {"esr1", GROUP0 + 65, "org.gnu.gdb.or1k.group0", "system"}, + {"esr2", GROUP0 + 66, "org.gnu.gdb.or1k.group0", "system"}, + {"esr3", GROUP0 + 67, "org.gnu.gdb.or1k.group0", "system"}, + {"esr4", GROUP0 + 68, "org.gnu.gdb.or1k.group0", "system"}, + {"esr5", GROUP0 + 69, "org.gnu.gdb.or1k.group0", "system"}, + {"esr6", GROUP0 + 70, "org.gnu.gdb.or1k.group0", "system"}, + {"esr7", GROUP0 + 71, "org.gnu.gdb.or1k.group0", "system"}, + {"esr8", GROUP0 + 72, "org.gnu.gdb.or1k.group0", "system"}, + {"esr9", GROUP0 + 73, "org.gnu.gdb.or1k.group0", "system"}, + {"esr10", GROUP0 + 74, "org.gnu.gdb.or1k.group0", "system"}, + {"esr11", GROUP0 + 75, "org.gnu.gdb.or1k.group0", "system"}, + {"esr12", GROUP0 + 76, "org.gnu.gdb.or1k.group0", "system"}, + {"esr13", GROUP0 + 77, "org.gnu.gdb.or1k.group0", "system"}, + {"esr14", GROUP0 + 78, "org.gnu.gdb.or1k.group0", "system"}, + {"esr15", GROUP0 + 79, "org.gnu.gdb.or1k.group0", "system"}, - {"dmmuucr" , GROUP1 + 0, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"dmmuupr" , GROUP1 + 1, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"dtlbeir" , GROUP1 + 2, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbmr0" , GROUP1 + 4, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbmr1" , GROUP1 + 5, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbmr2" , GROUP1 + 6, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbmr3" , GROUP1 + 7, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbtr0" , GROUP1 + 8, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbtr1" , GROUP1 + 9, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbtr2" , GROUP1 + 10, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"datbtr3" , GROUP1 + 11, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"dmmuucr", GROUP1 + 0, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"dmmuupr", GROUP1 + 1, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"dtlbeir", GROUP1 + 2, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbmr0", GROUP1 + 4, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbmr1", GROUP1 + 5, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbmr2", GROUP1 + 6, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbmr3", GROUP1 + 7, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbtr0", GROUP1 + 8, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbtr1", GROUP1 + 9, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbtr2", GROUP1 + 10, "org.gnu.gdb.or1k.group1", "dmmu"}, + {"datbtr3", GROUP1 + 11, "org.gnu.gdb.or1k.group1", "dmmu"}, - {"immucr" , GROUP2 + 0, "org.gnu.gdb.or1k.group2", "immu"}, - {"immupr" , GROUP2 + 1, "org.gnu.gdb.or1k.group2", "immu"}, - {"itlbeir" , GROUP2 + 2, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbmr0" , GROUP2 + 4, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbmr1" , GROUP2 + 5, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbmr2" , GROUP2 + 6, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbmr3" , GROUP2 + 7, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbtr0" , GROUP2 + 8, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbtr1" , GROUP2 + 9, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbtr2" , GROUP2 + 10, "org.gnu.gdb.or1k.group2", "immu"}, - {"iatbtr3" , GROUP2 + 11, "org.gnu.gdb.or1k.group2", "immu"}, + {"immucr", GROUP2 + 0, "org.gnu.gdb.or1k.group2", "immu"}, + {"immupr", GROUP2 + 1, "org.gnu.gdb.or1k.group2", "immu"}, + {"itlbeir", GROUP2 + 2, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbmr0", GROUP2 + 4, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbmr1", GROUP2 + 5, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbmr2", GROUP2 + 6, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbmr3", GROUP2 + 7, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbtr0", GROUP2 + 8, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbtr1", GROUP2 + 9, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbtr2", GROUP2 + 10, "org.gnu.gdb.or1k.group2", "immu"}, + {"iatbtr3", GROUP2 + 11, "org.gnu.gdb.or1k.group2", "immu"}, - {"dccr" , GROUP3 + 0, "org.gnu.gdb.or1k.group3", "dcache"}, - {"dcbpr" , GROUP3 + 1, "org.gnu.gdb.or1k.group3", "dcache"}, - {"dcbfr" , GROUP3 + 2, "org.gnu.gdb.or1k.group3", "dcache"}, - {"dcbir" , GROUP3 + 3, "org.gnu.gdb.or1k.group3", "dcache"}, - {"dcbwr" , GROUP3 + 4, "org.gnu.gdb.or1k.group3", "dcache"}, - {"dcblr" , GROUP3 + 5, "org.gnu.gdb.or1k.group3", "dcache"}, + {"dccr", GROUP3 + 0, "org.gnu.gdb.or1k.group3", "dcache"}, + {"dcbpr", GROUP3 + 1, "org.gnu.gdb.or1k.group3", "dcache"}, + {"dcbfr", GROUP3 + 2, "org.gnu.gdb.or1k.group3", "dcache"}, + {"dcbir", GROUP3 + 3, "org.gnu.gdb.or1k.group3", "dcache"}, + {"dcbwr", GROUP3 + 4, "org.gnu.gdb.or1k.group3", "dcache"}, + {"dcblr", GROUP3 + 5, "org.gnu.gdb.or1k.group3", "dcache"}, - {"iccr" , GROUP4 + 0, "org.gnu.gdb.or1k.group4", "icache"}, - {"icbpr" , GROUP4 + 1, "org.gnu.gdb.or1k.group4", "icache"}, - {"icbir" , GROUP4 + 2, "org.gnu.gdb.or1k.group4", "icache"}, - {"icblr" , GROUP4 + 3, "org.gnu.gdb.or1k.group4", "icache"}, + {"iccr", GROUP4 + 0, "org.gnu.gdb.or1k.group4", "icache"}, + {"icbpr", GROUP4 + 1, "org.gnu.gdb.or1k.group4", "icache"}, + {"icbir", GROUP4 + 2, "org.gnu.gdb.or1k.group4", "icache"}, + {"icblr", GROUP4 + 3, "org.gnu.gdb.or1k.group4", "icache"}, - {"maclo" , GROUP5 + 0, "org.gnu.gdb.or1k.group5", "mac"}, - {"machi" , GROUP5 + 1, "org.gnu.gdb.or1k.group5", "mac"}, + {"maclo", GROUP5 + 0, "org.gnu.gdb.or1k.group5", "mac"}, + {"machi", GROUP5 + 1, "org.gnu.gdb.or1k.group5", "mac"}, - {"dvr0" , GROUP6 + 0, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr1" , GROUP6 + 1, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr2" , GROUP6 + 2, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr3" , GROUP6 + 3, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr4" , GROUP6 + 4, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr5" , GROUP6 + 5, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr6" , GROUP6 + 6, "org.gnu.gdb.or1k.group6", "debug"}, - {"dvr7" , GROUP6 + 7, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr0" , GROUP6 + 8, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr1" , GROUP6 + 9, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr2" , GROUP6 + 10, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr3" , GROUP6 + 11, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr4" , GROUP6 + 12, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr5" , GROUP6 + 13, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr6" , GROUP6 + 14, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcr7" , GROUP6 + 15, "org.gnu.gdb.or1k.group6", "debug"}, - {"dmr1" , GROUP6 + 16, "org.gnu.gdb.or1k.group6", "debug"}, - {"dmr2" , GROUP6 + 17, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcwr0" , GROUP6 + 18, "org.gnu.gdb.or1k.group6", "debug"}, - {"dcwr1" , GROUP6 + 19, "org.gnu.gdb.or1k.group6", "debug"}, - {"dsr" , GROUP6 + 20, "org.gnu.gdb.or1k.group6", "debug"}, - {"drr" , GROUP6 + 21, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr0", GROUP6 + 0, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr1", GROUP6 + 1, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr2", GROUP6 + 2, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr3", GROUP6 + 3, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr4", GROUP6 + 4, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr5", GROUP6 + 5, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr6", GROUP6 + 6, "org.gnu.gdb.or1k.group6", "debug"}, + {"dvr7", GROUP6 + 7, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr0", GROUP6 + 8, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr1", GROUP6 + 9, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr2", GROUP6 + 10, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr3", GROUP6 + 11, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr4", GROUP6 + 12, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr5", GROUP6 + 13, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr6", GROUP6 + 14, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcr7", GROUP6 + 15, "org.gnu.gdb.or1k.group6", "debug"}, + {"dmr1", GROUP6 + 16, "org.gnu.gdb.or1k.group6", "debug"}, + {"dmr2", GROUP6 + 17, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcwr0", GROUP6 + 18, "org.gnu.gdb.or1k.group6", "debug"}, + {"dcwr1", GROUP6 + 19, "org.gnu.gdb.or1k.group6", "debug"}, + {"dsr", GROUP6 + 20, "org.gnu.gdb.or1k.group6", "debug"}, + {"drr", GROUP6 + 21, "org.gnu.gdb.or1k.group6", "debug"}, - {"pccr0" , GROUP7 + 0, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr1" , GROUP7 + 1, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr2" , GROUP7 + 2, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr3" , GROUP7 + 3, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr4" , GROUP7 + 4, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr5" , GROUP7 + 5, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr6" , GROUP7 + 6, "org.gnu.gdb.or1k.group7", "perf"}, - {"pccr7" , GROUP7 + 7, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr0" , GROUP7 + 8, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr1" , GROUP7 + 9, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr2" , GROUP7 + 10, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr3" , GROUP7 + 11, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr4" , GROUP7 + 12, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr5" , GROUP7 + 13, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr6" , GROUP7 + 14, "org.gnu.gdb.or1k.group7", "perf"}, - {"pcmr7" , GROUP7 + 15, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr0", GROUP7 + 0, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr1", GROUP7 + 1, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr2", GROUP7 + 2, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr3", GROUP7 + 3, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr4", GROUP7 + 4, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr5", GROUP7 + 5, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr6", GROUP7 + 6, "org.gnu.gdb.or1k.group7", "perf"}, + {"pccr7", GROUP7 + 7, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr0", GROUP7 + 8, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr1", GROUP7 + 9, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr2", GROUP7 + 10, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr3", GROUP7 + 11, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr4", GROUP7 + 12, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr5", GROUP7 + 13, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr6", GROUP7 + 14, "org.gnu.gdb.or1k.group7", "perf"}, + {"pcmr7", GROUP7 + 15, "org.gnu.gdb.or1k.group7", "perf"}, - {"pmr" , GROUP8 + 0, "org.gnu.gdb.or1k.group8", "power"}, + {"pmr", GROUP8 + 0, "org.gnu.gdb.or1k.group8", "power"}, - {"picmr" , GROUP9 + 0, "org.gnu.gdb.or1k.group9", "pic"}, - {"picsr" , GROUP9 + 2, "org.gnu.gdb.or1k.group9", "pic"}, + {"picmr", GROUP9 + 0, "org.gnu.gdb.or1k.group9", "pic"}, + {"picsr", GROUP9 + 2, "org.gnu.gdb.or1k.group9", "pic"}, - {"ttmr" , GROUP10 + 0, "org.gnu.gdb.or1k.group10", "timer"}, - {"ttcr" , GROUP10 + 1, "org.gnu.gdb.or1k.group10", "timer"}, + {"ttmr", GROUP10 + 0, "org.gnu.gdb.or1k.group10", "timer"}, + {"ttcr", GROUP10 + 1, "org.gnu.gdb.or1k.group10", "timer"}, }; static int or1k_add_reg(struct target *target, struct or1k_core_reg *new_reg) @@ -423,7 +423,7 @@ static int or1k_read_core_reg(struct target *target, int num) if ((num >= 0) && (num < OR1KNUMCOREREGS)) { reg_value = or1k->core_regs[num]; buf_set_u32(or1k->core_cache->reg_list[num].value, 0, 32, reg_value); - LOG_DEBUG("Read core reg %i value 0x%08" PRIx32, num , reg_value); + LOG_DEBUG("Read core reg %i value 0x%08" PRIx32, num, reg_value); or1k->core_cache->reg_list[num].valid = true; or1k->core_cache->reg_list[num].dirty = false; } else { @@ -435,7 +435,7 @@ static int or1k_read_core_reg(struct target *target, int num) return retval; } buf_set_u32(or1k->core_cache->reg_list[num].value, 0, 32, reg_value); - LOG_DEBUG("Read spr reg %i value 0x%08" PRIx32, num , reg_value); + LOG_DEBUG("Read spr reg %i value 0x%08" PRIx32, num, reg_value); } return ERROR_OK; @@ -452,7 +452,7 @@ static int or1k_write_core_reg(struct target *target, int num) uint32_t reg_value = buf_get_u32(or1k->core_cache->reg_list[num].value, 0, 32); or1k->core_regs[num] = reg_value; - LOG_DEBUG("Write core reg %i value 0x%08" PRIx32, num , reg_value); + LOG_DEBUG("Write core reg %i value 0x%08" PRIx32, num, reg_value); or1k->core_cache->reg_list[num].valid = true; or1k->core_cache->reg_list[num].dirty = false; @@ -632,7 +632,7 @@ static int or1k_is_cpu_running(struct target *target, int *running) LOG_WARNING("Debug IF CPU control reg read failure."); /* Try once to restart the JTAG infrastructure - quite possibly the board has just been reset. */ - LOG_WARNING("Resetting JTAG TAP state and reconnectiong to debug IF."); + LOG_WARNING("Resetting JTAG TAP state and reconnecting to debug IF."); du_core->or1k_jtag_init(&or1k->jtag); LOG_WARNING("...attempt %d of %d", tries, RETRIES_MAX); @@ -742,7 +742,7 @@ static int or1k_deassert_reset(struct target *target) int retval = du_core->or1k_cpu_reset(&or1k->jtag, CPU_NOT_RESET); if (retval != ERROR_OK) { - LOG_ERROR("Error while desasserting RESET"); + LOG_ERROR("Error while deasserting RESET"); return retval; } @@ -923,7 +923,7 @@ static int or1k_add_breakpoint(struct target *target, struct or1k_du *du_core = or1k_to_du(or1k); uint8_t data; - LOG_DEBUG("Adding breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRId32, + LOG_DEBUG("Adding breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRIu32, breakpoint->address, breakpoint->length, breakpoint->type, breakpoint->set, breakpoint->unique_id); @@ -943,8 +943,7 @@ static int or1k_add_breakpoint(struct target *target, return retval; } - if (breakpoint->orig_instr != NULL) - free(breakpoint->orig_instr); + free(breakpoint->orig_instr); breakpoint->orig_instr = malloc(breakpoint->length); memcpy(breakpoint->orig_instr, &data, breakpoint->length); @@ -982,7 +981,7 @@ static int or1k_remove_breakpoint(struct target *target, struct or1k_common *or1k = target_to_or1k(target); struct or1k_du *du_core = or1k_to_du(or1k); - LOG_DEBUG("Removing breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRId32, + LOG_DEBUG("Removing breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRIu32, breakpoint->address, breakpoint->length, breakpoint->type, breakpoint->set, breakpoint->unique_id); @@ -1377,21 +1376,21 @@ static const struct command_registration or1k_hw_ip_command_handlers[] = { .name = "tap_select", .handler = or1k_tap_select_command_handler, .mode = COMMAND_ANY, - .usage = "tap_select name", + .usage = "name", .help = "Select the TAP core to use", }, { .name = "tap_list", .handler = or1k_tap_list_command_handler, .mode = COMMAND_ANY, - .usage = "tap_list", + .usage = "", .help = "Display available TAP core", }, { .name = "du_select", .handler = or1k_du_select_command_handler, .mode = COMMAND_ANY, - .usage = "du_select name", + .usage = "name", .help = "Select the Debug Unit core to use", }, { @@ -1409,7 +1408,7 @@ static const struct command_registration or1k_reg_command_handlers[] = { .name = "addreg", .handler = or1k_addreg_command_handler, .mode = COMMAND_ANY, - .usage = "addreg name addr feature group", + .usage = "name addr feature group", .help = "Add a register to the register list", }, COMMAND_REGISTRATION_DONE diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c index bdd6fc8cb..31b248776 100644 --- a/src/target/openrisc/or1k_du_adv.c +++ b/src/target/openrisc/or1k_du_adv.c @@ -869,7 +869,7 @@ static int or1k_adv_cpu_reset(struct or1k_jtag *jtag_info, int action) static int or1k_adv_jtag_read_memory(struct or1k_jtag *jtag_info, uint32_t addr, uint32_t size, int count, uint8_t *buffer) { - LOG_DEBUG("Reading WB%" PRId32 " at 0x%08" PRIx32, size * 8, addr); + LOG_DEBUG("Reading WB%" PRIu32 " at 0x%08" PRIx32, size * 8, addr); int retval; if (!jtag_info->or1k_jtag_inited) { @@ -924,7 +924,7 @@ static int or1k_adv_jtag_read_memory(struct or1k_jtag *jtag_info, static int or1k_adv_jtag_write_memory(struct or1k_jtag *jtag_info, uint32_t addr, uint32_t size, int count, const uint8_t *buffer) { - LOG_DEBUG("Writing WB%" PRId32 " at 0x%08" PRIx32, size * 8, addr); + LOG_DEBUG("Writing WB%" PRIu32 " at 0x%08" PRIx32, size * 8, addr); int retval; if (!jtag_info->or1k_jtag_inited) { @@ -975,8 +975,7 @@ static int or1k_adv_jtag_write_memory(struct or1k_jtag *jtag_info, size, blocks_this_round, block_count_address); if (retval != ERROR_OK) { - if (t != NULL) - free(t); + free(t); return retval; } @@ -985,9 +984,7 @@ static int or1k_adv_jtag_write_memory(struct or1k_jtag *jtag_info, block_count_buffer += size * MAX_BURST_SIZE; } - if (t != NULL) - free(t); - + free(t); return ERROR_OK; } @@ -995,7 +992,7 @@ int or1k_adv_jtag_jsp_xfer(struct or1k_jtag *jtag_info, int *out_len, unsigned char *out_buffer, int *in_len, unsigned char *in_buffer) { - LOG_DEBUG("JSP transfert"); + LOG_DEBUG("JSP transfer"); int retval; if (!jtag_info->or1k_jtag_inited) diff --git a/src/target/openrisc/or1k_tap_vjtag.c b/src/target/openrisc/or1k_tap_vjtag.c index db10f103b..28366cf53 100644 --- a/src/target/openrisc/or1k_tap_vjtag.c +++ b/src/target/openrisc/or1k_tap_vjtag.c @@ -99,7 +99,7 @@ static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info) /* You can use a custom JTAG controller to discover transactions * necessary to enumerate all Virtual JTAG megafunction instances - * from your design atruntime. All SLD nodes and the virtual JTAG + * from your design at runtime. All SLD nodes and the virtual JTAG * registers that they contain are targeted by two Instruction Register * values, USER0 and USER1. * @@ -218,7 +218,7 @@ static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info) LOG_DEBUG("m_width = %d", m_width); LOG_DEBUG("manufacturer_id = 0x%02" PRIx32, MANUF(hub_info)); LOG_DEBUG("nb_of_node = %d", nb_nodes); - LOG_DEBUG("version = %" PRId32, VER(hub_info)); + LOG_DEBUG("version = %" PRIu32, VER(hub_info)); LOG_DEBUG("VIR length = %d", guess_addr_width(nb_nodes) + m_width); /* Because the number of SLD nodes is now known, the Nodes on the hub can be @@ -257,11 +257,11 @@ static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info) LOG_DEBUG("Node info register"); LOG_DEBUG("--------------------"); - LOG_DEBUG("instance_id = %" PRId32, ID(node_info)); + LOG_DEBUG("instance_id = %" PRIu32, ID(node_info)); LOG_DEBUG("manufacturer_id = 0x%02" PRIx32, MANUF(node_info)); - LOG_DEBUG("node_id = %" PRId32 " (%s)", ID(node_info), + LOG_DEBUG("node_id = %" PRIu32 " (%s)", ID(node_info), id_to_string(ID(node_info))); - LOG_DEBUG("version = %" PRId32, VER(node_info)); + LOG_DEBUG("version = %" PRIu32, VER(node_info)); if (ID(node_info) == VJTAG_NODE_ID) vjtag_node_address = node_index + 1; diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c index d8813756d..43f2ffb8c 100644 --- a/src/target/riscv/batch.c +++ b/src/target/riscv/batch.c @@ -11,7 +11,7 @@ #define get_field(reg, mask) (((reg) & (mask)) / ((mask) & ~((mask) << 1))) #define set_field(reg, mask, val) (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask))) -#define DTM_DMI_MAX_ADDRESS_LENGTH ((1 << DTM_DTMCS_ABITS_LENGTH) - 1) +#define DTM_DMI_MAX_ADDRESS_LENGTH ((1< 32) { - /* Dummy comment to satisfy linter, since removing the brances here doesn't actually compile. */ + /* Dummy comment to satisfy linter, since removing the branches here doesn't actually compile. */ COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); } else { - /* Dummy comment to satisfy linter, since removing the brances here doesn't actually compile. */ + /* Dummy comment to satisfy linter, since removing the branches here doesn't actually compile. */ COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); } } diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 7d523fcbc..e4bdb8bf9 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -368,8 +368,6 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out) return in; } - - static uint32_t dtmcontrol_scan(struct target *target, uint32_t out) { struct scan_field field; @@ -472,8 +470,7 @@ static void riscv_free_registers(struct target *target) /* Free the shared structure use for most registers. */ if (target->reg_cache) { if (target->reg_cache->reg_list) { - if (target->reg_cache->reg_list[0].arch_info) - free(target->reg_cache->reg_list[0].arch_info); + free(target->reg_cache->reg_list[0].arch_info); /* Free the ones we allocated separately. */ for (unsigned i = GDB_REGNO_COUNT; i < target->reg_cache->num_regs; i++) free(target->reg_cache->reg_list[i].arch_info); @@ -4110,7 +4107,7 @@ static int register_get(struct reg *reg) buf_set_u64(reg->value, 0, reg->size, value); } reg->valid = gdb_regno_cacheable(reg->number, false); - char *str = buf_to_str(reg->value, reg->size, 16); + char *str = buf_to_hex_str(reg->value, reg->size); LOG_DEBUG("[%d]{%d} read 0x%s from %s (valid=%d)", target->coreid, riscv_current_hartid(target), str, reg->name, reg->valid); free(str); @@ -4123,7 +4120,7 @@ static int register_set(struct reg *reg, uint8_t *buf) struct target *target = reg_info->target; RISCV_INFO(r); - char *str = buf_to_str(buf, reg->size, 16); + char *str = buf_to_hex_str(buf, reg->size); LOG_DEBUG("[%d]{%d} write 0x%s to %s (valid=%d)", target->coreid, riscv_current_hartid(target), str, reg->name, reg->valid); free(str); diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index fb0af87de..eafc869dc 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -146,7 +146,7 @@ typedef struct { * implementations. */ int (*get_register)(struct target *target, riscv_reg_t *value, int hid, int rid); - int (*set_register)(struct target *, int hartid, int regid, + int (*set_register)(struct target *target, int hartid, int regid, uint64_t value); int (*get_register_buf)(struct target *target, uint8_t *buf, int regno); int (*set_register_buf)(struct target *target, int regno, @@ -344,12 +344,12 @@ int riscv_current_hartid(const struct target *target); * without requiring multiple targets. */ /* When using the RTOS to debug, this selects the hart that is currently being - * debugged. This doesn't propogate to the hardware. */ + * debugged. This doesn't propagate to the hardware. */ void riscv_set_all_rtos_harts(struct target *target); void riscv_set_rtos_hartid(struct target *target, int hartid); /* Lists the number of harts in the system, which are assumed to be - * concecutive and start with mhartid=0. */ + * consecutive and start with mhartid=0. */ int riscv_count_harts(struct target *target); /* Returns TRUE if the target has the given register on the given hart. */ diff --git a/src/target/semihosting_common.c b/src/target/semihosting_common.c index a02f2df3f..965055609 100644 --- a/src/target/semihosting_common.c +++ b/src/target/semihosting_common.c @@ -145,7 +145,7 @@ int semihosting_common(struct target *target) { struct semihosting *semihosting = target->semihosting; if (!semihosting) { - /* Silently ignore if the semhosting field was not set. */ + /* Silently ignore if the semihosting field was not set. */ return ERROR_OK; } @@ -345,7 +345,7 @@ int semihosting_common(struct target *target) "semihosting: *** application exited normally ***\n"); } } else if (semihosting->param == ADP_STOPPED_RUN_TIME_ERROR) { - /* Chosen more or less arbitrarly to have a nicer message, + /* Chosen more or less arbitrarily to have a nicer message, * otherwise all other return the same exit code 1. */ if (!gdb_actual_connections) exit(1); diff --git a/src/target/startup.tcl b/src/target/startup.tcl index 976cd2af5..ca39b1816 100644 --- a/src/target/startup.tcl +++ b/src/target/startup.tcl @@ -119,7 +119,7 @@ proc ocd_process_reset_inner { MODE } { continue } - # Wait upto 1 second for target to halt. Why 1sec? Cause + # Wait up to 1 second for target to halt. Why 1sec? Cause # the JTAG tap reset signal might be hooked to a slow # resistor/capacitor circuit - and it might take a while # to charge @@ -205,7 +205,7 @@ proc init_target_events {} { foreach t $targets { set_default_target_event $t gdb-flash-erase-start "reset init" set_default_target_event $t gdb-flash-write-end "reset halt" - set_default_target_event $t gdb-attach "halt" + set_default_target_event $t gdb-attach "halt 1000" } } diff --git a/src/target/stm8.c b/src/target/stm8.c index ce8cfaa51..78bf6a27a 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -967,7 +967,7 @@ static int stm8_reset_deassert(struct target *target) if (target->reset_halt) return ERROR_OK; - /* Instead of going thrugh saving context, polling and + /* Instead of going through saving context, polling and then resuming target again just clear stall and proceed. */ target->state = TARGET_RUNNING; return stm8_exit_debug(target); @@ -1143,7 +1143,7 @@ static int stm8_read_core_reg(struct target *target, unsigned int num) return ERROR_COMMAND_SYNTAX_ERROR; reg_value = stm8->core_regs[num]; - LOG_DEBUG("read core reg %i value 0x%" PRIx32 "", num , reg_value); + LOG_DEBUG("read core reg %i value 0x%" PRIx32 "", num, reg_value); buf_set_u32(stm8->core_cache->reg_list[num].value, 0, 32, reg_value); stm8->core_cache->reg_list[num].valid = true; stm8->core_cache->reg_list[num].dirty = false; @@ -1163,7 +1163,7 @@ static int stm8_write_core_reg(struct target *target, unsigned int num) reg_value = buf_get_u32(stm8->core_cache->reg_list[num].value, 0, 32); stm8->core_regs[num] = reg_value; - LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value); + LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value); stm8->core_cache->reg_list[num].valid = true; stm8->core_cache->reg_list[num].dirty = false; @@ -1308,7 +1308,7 @@ static int stm8_arch_state(struct target *target) static int stm8_step(struct target *target, int current, target_addr_t address, int handle_breakpoints) { - LOG_DEBUG("%" PRIx32 " " TARGET_ADDR_FMT " %" PRIx32, + LOG_DEBUG("%x " TARGET_ADDR_FMT " %x", current, address, handle_breakpoints); /* get pointers to arch-specific information */ @@ -1969,7 +1969,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->blocksize = w; - LOG_DEBUG("blocksize=%8.8x", stm8->blocksize); + LOG_DEBUG("blocksize=%8.8" PRIx32, stm8->blocksize); return JIM_OK; } if (!strcmp(arg, "-flashstart")) { @@ -1988,7 +1988,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->flashstart = w; - LOG_DEBUG("flashstart=%8.8x", stm8->flashstart); + LOG_DEBUG("flashstart=%8.8" PRIx32, stm8->flashstart); return JIM_OK; } if (!strcmp(arg, "-flashend")) { @@ -2007,7 +2007,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->flashend = w; - LOG_DEBUG("flashend=%8.8x", stm8->flashend); + LOG_DEBUG("flashend=%8.8" PRIx32, stm8->flashend); return JIM_OK; } if (!strcmp(arg, "-eepromstart")) { @@ -2026,7 +2026,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->eepromstart = w; - LOG_DEBUG("eepromstart=%8.8x", stm8->eepromstart); + LOG_DEBUG("eepromstart=%8.8" PRIx32, stm8->eepromstart); return JIM_OK; } if (!strcmp(arg, "-eepromend")) { @@ -2045,7 +2045,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->eepromend = w; - LOG_DEBUG("eepromend=%8.8x", stm8->eepromend); + LOG_DEBUG("eepromend=%8.8" PRIx32, stm8->eepromend); return JIM_OK; } if (!strcmp(arg, "-optionstart")) { @@ -2064,7 +2064,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->optionstart = w; - LOG_DEBUG("optionstart=%8.8x", stm8->optionstart); + LOG_DEBUG("optionstart=%8.8" PRIx32, stm8->optionstart); return JIM_OK; } if (!strcmp(arg, "-optionend")) { @@ -2083,7 +2083,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi) return e; stm8->optionend = w; - LOG_DEBUG("optionend=%8.8x", stm8->optionend); + LOG_DEBUG("optionend=%8.8" PRIx32, stm8->optionend); return JIM_OK; } if (!strcmp(arg, "-enable_step_irq")) { diff --git a/src/target/target.c b/src/target/target.c index ca1ded3e2..9e27f33ce 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -176,10 +176,10 @@ static const Jim_Nvp nvp_error_target[] = { { .value = ERROR_TARGET_TIMEOUT, .name = "err-timeout" }, { .value = ERROR_TARGET_NOT_HALTED, .name = "err-not-halted" }, { .value = ERROR_TARGET_FAILURE, .name = "err-failure" }, - { .value = ERROR_TARGET_UNALIGNED_ACCESS , .name = "err-unaligned-access" }, - { .value = ERROR_TARGET_DATA_ABORT , .name = "err-data-abort" }, - { .value = ERROR_TARGET_RESOURCE_NOT_AVAILABLE , .name = "err-resource-not-available" }, - { .value = ERROR_TARGET_TRANSLATION_FAULT , .name = "err-translation-fault" }, + { .value = ERROR_TARGET_UNALIGNED_ACCESS, .name = "err-unaligned-access" }, + { .value = ERROR_TARGET_DATA_ABORT, .name = "err-data-abort" }, + { .value = ERROR_TARGET_RESOURCE_NOT_AVAILABLE, .name = "err-resource-not-available" }, + { .value = ERROR_TARGET_TRANSLATION_FAULT, .name = "err-translation-fault" }, { .value = ERROR_TARGET_NOT_RUNNING, .name = "err-not-running" }, { .value = ERROR_TARGET_NOT_EXAMINED, .name = "err-not-examined" }, { .value = -1, .name = NULL } @@ -229,10 +229,10 @@ static const Jim_Nvp nvp_target_event[] = { { .value = TARGET_EVENT_GDB_DETACH, .name = "gdb-detach" }, { .value = TARGET_EVENT_GDB_FLASH_WRITE_START, .name = "gdb-flash-write-start" }, - { .value = TARGET_EVENT_GDB_FLASH_WRITE_END , .name = "gdb-flash-write-end" }, + { .value = TARGET_EVENT_GDB_FLASH_WRITE_END, .name = "gdb-flash-write-end" }, { .value = TARGET_EVENT_GDB_FLASH_ERASE_START, .name = "gdb-flash-erase-start" }, - { .value = TARGET_EVENT_GDB_FLASH_ERASE_END , .name = "gdb-flash-erase-end" }, + { .value = TARGET_EVENT_GDB_FLASH_ERASE_END, .name = "gdb-flash-erase-end" }, { .value = TARGET_EVENT_TRACE_CONFIG, .name = "trace-config" }, @@ -249,15 +249,15 @@ static const Jim_Nvp nvp_target_state[] = { }; static const Jim_Nvp nvp_target_debug_reason[] = { - { .name = "debug-request" , .value = DBG_REASON_DBGRQ }, - { .name = "breakpoint" , .value = DBG_REASON_BREAKPOINT }, - { .name = "watchpoint" , .value = DBG_REASON_WATCHPOINT }, + { .name = "debug-request", .value = DBG_REASON_DBGRQ }, + { .name = "breakpoint", .value = DBG_REASON_BREAKPOINT }, + { .name = "watchpoint", .value = DBG_REASON_WATCHPOINT }, { .name = "watchpoint-and-breakpoint", .value = DBG_REASON_WPTANDBKPT }, - { .name = "single-step" , .value = DBG_REASON_SINGLESTEP }, - { .name = "target-not-halted" , .value = DBG_REASON_NOTHALTED }, - { .name = "program-exit" , .value = DBG_REASON_EXIT }, - { .name = "exception-catch" , .value = DBG_REASON_EXC_CATCH }, - { .name = "undefined" , .value = DBG_REASON_UNDEFINED }, + { .name = "single-step", .value = DBG_REASON_SINGLESTEP }, + { .name = "target-not-halted", .value = DBG_REASON_NOTHALTED }, + { .name = "program-exit", .value = DBG_REASON_EXIT }, + { .name = "exception-catch", .value = DBG_REASON_EXC_CATCH }, + { .name = "undefined", .value = DBG_REASON_UNDEFINED }, { .name = NULL, .value = -1 }, }; @@ -271,10 +271,10 @@ static const Jim_Nvp nvp_target_endian[] = { static const Jim_Nvp nvp_reset_modes[] = { { .name = "unknown", .value = RESET_UNKNOWN }, - { .name = "run" , .value = RESET_RUN }, - { .name = "halt" , .value = RESET_HALT }, - { .name = "init" , .value = RESET_INIT }, - { .name = NULL , .value = -1 }, + { .name = "run", .value = RESET_RUN }, + { .name = "halt", .value = RESET_HALT }, + { .name = "init", .value = RESET_INIT }, + { .name = NULL, .value = -1 }, }; const char *debug_reason_name(struct target *t) @@ -344,6 +344,15 @@ static int new_target_number(void) return x + 1; } +static void append_to_list_all_targets(struct target *target) +{ + struct target **t = &all_targets; + + while (*t) + t = &((*t)->next); + *t = target; +} + /* read a uint64_t from a buffer in target memory endianness */ uint64_t target_buffer_get_u64(struct target *target, const uint8_t *buffer) { @@ -593,7 +602,7 @@ int target_halt(struct target *target) * @param address Optionally used as the program counter. * @param handle_breakpoints True iff breakpoints at the resumption PC * should be skipped. (For example, maybe execution was stopped by - * such a breakpoint, in which case it would be counterprodutive to + * such a breakpoint, in which case it would be counterproductive to * let it re-trigger. * @param debug_execution False if all working areas allocated by OpenOCD * should be released and/or restored to their original contents. @@ -709,7 +718,7 @@ static int default_check_reset(struct target *target) return ERROR_OK; } -/* Equvivalent Tcl code arp_examine_one is in src/target/startup.tcl +/* Equivalent Tcl code arp_examine_one is in src/target/startup.tcl * Keep in sync */ int target_examine_one(struct target *target) { @@ -1224,8 +1233,17 @@ int target_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class) { - int result = target->type->get_gdb_reg_list(target, reg_list, + int result = ERROR_FAIL; + + if (!target_was_examined(target)) { + LOG_ERROR("Target not examined yet"); + goto done; + } + + result = target->type->get_gdb_reg_list(target, reg_list, reg_list_size, reg_class); + +done: if (result != ERROR_OK) { *reg_list = NULL; *reg_list_size = 0; @@ -1783,10 +1801,8 @@ static void target_split_working_area(struct working_area *area, uint32_t size) /* If backup memory was allocated to this area, it has the wrong size * now so free it and it will be reallocated if/when needed */ - if (area->backup) { - free(area->backup); - area->backup = NULL; - } + free(area->backup); + area->backup = NULL; } } @@ -1806,16 +1822,13 @@ static void target_merge_working_areas(struct target *target) /* Remove the last */ struct working_area *to_be_freed = c->next; c->next = c->next->next; - if (to_be_freed->backup) - free(to_be_freed->backup); + free(to_be_freed->backup); free(to_be_freed); /* If backup memory was allocated to the remaining area, it's has * the wrong size now */ - if (c->backup) { - free(c->backup); - c->backup = NULL; - } + free(c->backup); + c->backup = NULL; } else { c = c->next; } @@ -2045,8 +2058,7 @@ static void target_destroy(struct target *target) if (target->type->deinit_target) target->type->deinit_target(target); - if (target->semihosting) - free(target->semihosting); + free(target->semihosting); jtag_unregister_event_callback(jtag_enable_callback, target); @@ -2196,7 +2208,7 @@ static int target_profiling_default(struct target *target, uint32_t *samples, */ int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer) { - LOG_DEBUG("writing buffer of %" PRIi32 " byte at " TARGET_ADDR_FMT, + LOG_DEBUG("writing buffer of %" PRIu32 " byte at " TARGET_ADDR_FMT, size, address); if (!target_was_examined(target)) { @@ -2260,7 +2272,7 @@ static int target_write_buffer_default(struct target *target, */ int target_read_buffer(struct target *target, target_addr_t address, uint32_t size, uint8_t *buffer) { - LOG_DEBUG("reading buffer of %" PRIi32 " byte at " TARGET_ADDR_FMT, + LOG_DEBUG("reading buffer of %" PRIu32 " byte at " TARGET_ADDR_FMT, size, address); if (!target_was_examined(target)) { @@ -2332,7 +2344,7 @@ int target_checksum_memory(struct target *target, target_addr_t address, uint32_ if (retval != ERROR_OK) { buffer = malloc(size); if (buffer == NULL) { - LOG_ERROR("error allocating buffer for section (%" PRId32 " bytes)", size); + LOG_ERROR("error allocating buffer for section (%" PRIu32 " bytes)", size); return ERROR_COMMAND_SYNTAX_ERROR; } retval = target_read_buffer(target, address, size, buffer); @@ -2898,8 +2910,8 @@ COMMAND_HANDLER(handle_reg_command) /* only print cached values if they are valid */ if (reg->exist) { if (reg->valid) { - value = buf_to_str(reg->value, - reg->size, 16); + value = buf_to_hex_str(reg->value, + reg->size); command_print(CMD, "(%i) %s (/%" PRIu32 "): 0x%s%s", count, reg->name, @@ -2972,7 +2984,7 @@ COMMAND_HANDLER(handle_reg_command) return retval; } } - value = buf_to_str(reg->value, reg->size, 16); + value = buf_to_hex_str(reg->value, reg->size); command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); free(value); return ERROR_OK; @@ -2992,7 +3004,7 @@ COMMAND_HANDLER(handle_reg_command) return retval; } - value = buf_to_str(reg->value, reg->size, 16); + value = buf_to_hex_str(reg->value, reg->size); command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); free(value); @@ -3493,7 +3505,7 @@ COMMAND_HANDLER(handle_load_image_command) uint32_t offset = 0; uint32_t length = buf_cnt; - /* DANGER!!! beware of unsigned comparision here!!! */ + /* DANGER!!! beware of unsigned comparison here!!! */ if ((image.sections[i].base_address + buf_cnt >= min_address) && (image.sections[i].base_address < max_address)) { @@ -3757,8 +3769,8 @@ static int handle_bp_command_list(struct command_invocation *cmd) struct breakpoint *breakpoint = target->breakpoints; while (breakpoint) { if (breakpoint->type == BKPT_SOFT) { - char *buf = buf_to_str(breakpoint->orig_instr, - breakpoint->length, 16); + char *buf = buf_to_hex_str(breakpoint->orig_instr, + breakpoint->length); command_print(cmd, "IVA breakpoint: " TARGET_ADDR_FMT ", 0x%x, %i, 0x%s", breakpoint->address, breakpoint->length, @@ -4315,7 +4327,7 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, } else { char buf[100]; Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); - sprintf(buf, "mem2array address: " TARGET_ADDR_FMT " is not aligned for %" PRId32 " byte reads", + sprintf(buf, "mem2array address: " TARGET_ADDR_FMT " is not aligned for %" PRIu32 " byte reads", addr, width); Jim_AppendStrings(interp, Jim_GetResult(interp), buf, NULL); @@ -4347,7 +4359,7 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, retval = target_read_memory(target, addr, width, count, buffer); if (retval != ERROR_OK) { /* BOO !*/ - LOG_ERROR("mem2array: Read @ " TARGET_ADDR_FMT ", w=%" PRId32 ", cnt=%" PRId32 ", failed", + LOG_ERROR("mem2array: Read @ " TARGET_ADDR_FMT ", w=%" PRIu32 ", cnt=%" PRIu32 ", failed", addr, width, count); @@ -4521,7 +4533,7 @@ static int target_array2mem(Jim_Interp *interp, struct target *target, } else { char buf[100]; Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); - sprintf(buf, "array2mem address: 0x%08" PRIx32 " is not aligned for %" PRId32 " byte reads", + sprintf(buf, "array2mem address: 0x%08" PRIx32 " is not aligned for %" PRIu32 " byte reads", addr, width); Jim_AppendStrings(interp, Jim_GetResult(interp), buf, NULL); @@ -4570,7 +4582,7 @@ static int target_array2mem(Jim_Interp *interp, struct target *target, retval = target_write_memory(target, addr, width, count, buffer); if (retval != ERROR_OK) { /* BOO !*/ - LOG_ERROR("array2mem: Write @ 0x%08" PRIx32 ", w=%" PRId32 ", cnt=%" PRId32 ", failed", + LOG_ERROR("array2mem: Write @ 0x%08" PRIx32 ", w=%" PRIu32 ", cnt=%" PRIu32 ", failed", addr, width, count); @@ -4614,8 +4626,14 @@ void target_handle_event(struct target *target, enum target_event e) struct command_context *cmd_ctx = current_command_context(teap->interp); struct target *saved_target_override = cmd_ctx->current_target_override; cmd_ctx->current_target_override = target; + retval = Jim_EvalObj(teap->interp, teap->body); + cmd_ctx->current_target_override = saved_target_override; + + if (retval == ERROR_COMMAND_CLOSE_CONNECTION) + return; + if (retval == JIM_RETURN) retval = teap->interp->returnCode; @@ -4628,8 +4646,6 @@ void target_handle_event(struct target *target, enum target_event e) /* clean both error code and stacktrace before return */ Jim_Eval(teap->interp, "error \"\" \"\""); } - - cmd_ctx->current_target_override = saved_target_override; } } } @@ -4671,7 +4687,7 @@ static Jim_Nvp nvp_config_opts[] = { { .name = "-work-area-phys", .value = TCFG_WORK_AREA_PHYS }, { .name = "-work-area-size", .value = TCFG_WORK_AREA_SIZE }, { .name = "-work-area-backup", .value = TCFG_WORK_AREA_BACKUP }, - { .name = "-endian" , .value = TCFG_ENDIAN }, + { .name = "-endian", .value = TCFG_ENDIAN }, { .name = "-coreid", .value = TCFG_COREID }, { .name = "-chain-position", .value = TCFG_CHAIN_POSITION }, { .name = "-dbgbase", .value = TCFG_DBGBASE }, @@ -4714,7 +4730,7 @@ static int target_configure(Jim_GetOptInfo *goi, struct target *target) } switch (n->value) { case TCFG_TYPE: - /* not setable */ + /* not settable */ if (goi->isconfigure) { Jim_SetResultFormatted(goi->interp, "not settable: %s", n->name); @@ -5506,12 +5522,21 @@ static int target_create(Jim_GetOptInfo *goi) /* Create it */ target = calloc(1, sizeof(struct target)); + if (!target) { + LOG_ERROR("Out of memory"); + return JIM_ERR; + } + /* set target number */ target->target_number = new_target_number(); - cmd_ctx->current_target = target; /* allocate memory for each unique target type */ - target->type = calloc(1, sizeof(struct target_type)); + target->type = malloc(sizeof(struct target_type)); + if (!target->type) { + LOG_ERROR("Out of memory"); + free(target); + return JIM_ERR; + } memcpy(target->type, target_types[x], sizeof(struct target_type)); @@ -5540,6 +5565,12 @@ static int target_create(Jim_GetOptInfo *goi) /* initialize trace information */ target->trace_info = calloc(1, sizeof(struct trace)); + if (!target->trace_info) { + LOG_ERROR("Out of memory"); + free(target->type); + free(target); + return JIM_ERR; + } target->dbgmsg = NULL; target->dbg_msg_enabled = 0; @@ -5573,7 +5604,9 @@ static int target_create(Jim_GetOptInfo *goi) } if (e != JIM_OK) { + rtos_destroy(target); free(target->gdb_port_override); + free(target->trace_info); free(target->type); free(target); return e; @@ -5586,14 +5619,25 @@ static int target_create(Jim_GetOptInfo *goi) cp = Jim_GetString(new_cmd, NULL); target->cmd_name = strdup(cp); + if (!target->cmd_name) { + LOG_ERROR("Out of memory"); + rtos_destroy(target); + free(target->gdb_port_override); + free(target->trace_info); + free(target->type); + free(target); + return JIM_ERR; + } if (target->type->target_create) { e = (*(target->type->target_create))(target, goi->interp); if (e != ERROR_OK) { LOG_DEBUG("target_create failed"); - free(target->gdb_port_override); - free(target->type); free(target->cmd_name); + rtos_destroy(target); + free(target->gdb_port_override); + free(target->trace_info); + free(target->type); free(target); return JIM_ERR; } @@ -5606,15 +5650,6 @@ static int target_create(Jim_GetOptInfo *goi) LOG_ERROR("unable to register '%s' commands", cp); } - /* append to end of list */ - { - struct target **tpp; - tpp = &(all_targets); - while (*tpp) - tpp = &((*tpp)->next); - *tpp = target; - } - /* now - create the new target name command */ const struct command_registration target_subcommands[] = { { @@ -5636,14 +5671,27 @@ static int target_create(Jim_GetOptInfo *goi) COMMAND_REGISTRATION_DONE }; e = register_commands(cmd_ctx, NULL, target_commands); - if (ERROR_OK != e) + if (e != ERROR_OK) { + if (target->type->deinit_target) + target->type->deinit_target(target); + free(target->cmd_name); + rtos_destroy(target); + free(target->gdb_port_override); + free(target->trace_info); + free(target->type); + free(target); return JIM_ERR; + } struct command *c = command_find_in_context(cmd_ctx, cp); assert(c); command_set_handler_data(c, target); - return (ERROR_OK == e) ? JIM_OK : JIM_ERR; + /* append to end of list */ + append_to_list_all_targets(target); + + cmd_ctx->current_target = target; + return JIM_OK; } static int jim_target_current(Jim_Interp *interp, int argc, Jim_Obj *const *argv) @@ -5703,7 +5751,7 @@ static int jim_target_smp(Jim_Interp *interp, int argc, Jim_Obj *const *argv) retval = 0; LOG_DEBUG("%d", argc); /* argv[1] = target to associate in smp - * argv[2] = target to assoicate in smp + * argv[2] = target to associate in smp * argv[3] ... */ @@ -5813,11 +5861,8 @@ static struct FastLoad *fastload; static void free_fastload(void) { if (fastload != NULL) { - int i; - for (i = 0; i < fastload_num; i++) { - if (fastload[i].data) - free(fastload[i].data); - } + for (int i = 0; i < fastload_num; i++) + free(fastload[i].data); free(fastload); fastload = NULL; } @@ -5874,7 +5919,7 @@ COMMAND_HANDLER(handle_fast_load_image_command) uint32_t offset = 0; uint32_t length = buf_cnt; - /* DANGER!!! beware of unsigned comparision here!!! */ + /* DANGER!!! beware of unsigned comparison here!!! */ if ((image.sections[i].base_address + buf_cnt >= min_address) && (image.sections[i].base_address < max_address)) { diff --git a/src/target/target_request.c b/src/target/target_request.c index c1da1a20e..32a907233 100644 --- a/src/target/target_request.c +++ b/src/target/target_request.c @@ -261,7 +261,7 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command) return ERROR_OK; } - /* see if reciever is already registered */ + /* see if receiver is already registered */ if (find_debug_msg_receiver(CMD_CTX, target) != NULL) receiving = 1; diff --git a/src/target/trace.c b/src/target/trace.c index 943bf1f4f..f2ceb03d9 100644 --- a/src/target/trace.c +++ b/src/target/trace.c @@ -62,10 +62,9 @@ COMMAND_HANDLER(handle_trace_point_command) } if (!strcmp(CMD_ARGV[0], "clear")) { - if (trace->trace_points) { - free(trace->trace_points); - trace->trace_points = NULL; - } + free(trace->trace_points); + trace->trace_points = NULL; + trace->num_trace_points = 0; trace->trace_points_size = 0; @@ -102,8 +101,7 @@ COMMAND_HANDLER(handle_trace_history_command) return ERROR_OK; } - if (trace->trace_history) - free(trace->trace_history); + free(trace->trace_history); COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], trace->trace_history_size); trace->trace_history = malloc(sizeof(uint32_t) * trace->trace_history_size); diff --git a/src/target/xscale.c b/src/target/xscale.c index edab4f9fc..6d1d426d5 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -824,7 +824,7 @@ static int xscale_poll(struct target *target) retval = xscale_debug_entry(target); } else if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { LOG_USER("error while polling TX register, reset CPU"); - /* here we "lie" so GDB won't get stuck and a reset can be perfomed */ + /* here we "lie" so GDB won't get stuck and a reset can be performed */ target->state = TARGET_HALTED; } @@ -955,7 +955,7 @@ static int xscale_debug_entry(struct target *target) xscale->arch_debug_reason = XSCALE_DBG_REASON_GENERIC; pc -= 4; break; - case 0x5: /* Vector trap occured */ + case 0x5: /* Vector trap occurred */ target->debug_reason = DBG_REASON_BREAKPOINT; xscale->arch_debug_reason = XSCALE_DBG_REASON_GENERIC; pc -= 4; @@ -1110,8 +1110,7 @@ static void xscale_free_trace_data(struct xscale_common *xscale) struct xscale_trace_data *td = xscale->trace.data; while (td) { struct xscale_trace_data *next_td = td->next; - if (td->entries) - free(td->entries); + free(td->entries); free(td); td = next_td; } @@ -2412,7 +2411,7 @@ static int xscale_get_reg(struct reg *reg) } else if (strcmp(reg->name, "XSCALE_TXRXCTRL") == 0) { /* can't (explicitly) read from TXRXCTRL register */ return ERROR_OK; - } else {/* Other DBG registers have to be transfered by the debug handler + } else {/* Other DBG registers have to be transferred by the debug handler * send CP read request (command 0x40) */ xscale_send_u32(target, 0x40); @@ -2450,7 +2449,7 @@ static int xscale_set_reg(struct reg *reg, uint8_t *buf) } else if (strcmp(reg->name, "XSCALE_TXRXCTRL") == 0) { /* can't (explicitly) write to TXRXCTRL register */ return ERROR_OK; - } else {/* Other DBG registers have to be transfered by the debug handler + } else {/* Other DBG registers have to be transferred by the debug handler * send CP write request (command 0x41) */ xscale_send_u32(target, 0x41); @@ -2809,7 +2808,7 @@ static int xscale_analyze_trace(struct target *target, struct command_invocation current_pc = chkpt_reg; else if (current_pc != chkpt_reg) /* sanity check */ LOG_WARNING("trace is suspect: checkpoint register " - "inconsistent with adddress from image"); + "inconsistent with address from image"); } if (current_pc == 0) @@ -2903,6 +2902,21 @@ static void xscale_build_reg_cache(struct target *target) xscale->reg_cache = (*cache_p); } +static void xscale_free_reg_cache(struct target *target) +{ + struct xscale_common *xscale = target_to_xscale(target); + struct reg_cache *cache = xscale->reg_cache; + + for (unsigned int i = 0; i < ARRAY_SIZE(xscale_reg_arch_info); i++) + free(cache->reg_list[i].value); + + free(cache->reg_list[0].arch_info); + free(cache->reg_list); + free(cache); + + arm_free_reg_cache(&xscale->arm); +} + static int xscale_init_target(struct command_context *cmd_ctx, struct target *target) { @@ -2910,6 +2924,14 @@ static int xscale_init_target(struct command_context *cmd_ctx, return ERROR_OK; } +static void xscale_deinit_target(struct target *target) +{ + struct xscale_common *xscale = target_to_xscale(target); + + xscale_free_reg_cache(target); + free(xscale); +} + static int xscale_init_arch_info(struct target *target, struct xscale_common *xscale, struct jtag_tap *tap) { @@ -2919,7 +2941,7 @@ static int xscale_init_arch_info(struct target *target, arm = &xscale->arm; - /* store architecture specfic data */ + /* store architecture specific data */ xscale->common_magic = XSCALE_COMMON_MAGIC; /* PXA3xx with 11 bit IR shifts the JTAG instructions */ @@ -3725,6 +3747,7 @@ struct target_type xscale_target = { .commands = xscale_command_handlers, .target_create = xscale_target_create, .init_target = xscale_init_target, + .deinit_target = xscale_deinit_target, .virt2phys = xscale_virt2phys, .mmu = xscale_mmu diff --git a/src/transport/transport.c b/src/transport/transport.c index 010ea7c44..9214dcd77 100644 --- a/src/transport/transport.c +++ b/src/transport/transport.c @@ -122,9 +122,9 @@ int allow_transports(struct command_context *ctx, const char * const *vector) } /** - * Used to verify corrrect adapter driver initialization. + * Used to verify correct adapter driver initialization. * - * @returns true iff the adapter declared one or more transports. + * @returns true if the adapter declares one or more transports. */ bool transports_are_declared(void) { @@ -139,7 +139,7 @@ bool transports_are_declared(void) * Code implementing a transport needs to register it before it can * be selected and then activated. This is a dynamic process, so * that chips (and families) can define transports as needed (without - * nneeding error-prone static tables). + * needing error-prone static tables). * * @param new_transport the transport being registered. On a * successful return, this memory is owned by the transport framework. diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c index bec32f21e..eaa5a3aae 100644 --- a/src/xsvf/xsvf.c +++ b/src/xsvf/xsvf.c @@ -27,11 +27,11 @@ /* The specification for SVF is available here: * http://www.asset-intertech.com/support/svf.pdf - * Below, this document is refered to as the "SVF spec". + * Below, this document is referred to as the "SVF spec". * * The specification for XSVF is available here: * http://www.xilinx.com/support/documentation/application_notes/xapp503.pdf - * Below, this document is refered to as the "XSVF spec". + * Below, this document is referred to as the "XSVF spec". */ #ifdef HAVE_CONFIG_H @@ -230,7 +230,7 @@ COMMAND_HANDLER(handle_xsvf_command) unsigned pathlen = 0; /* a flag telling whether to clock TCK during waits, - * or simply sleep, controled by virt2 + * or simply sleep, controlled by virt2 */ int runtest_requires_tck = 0; @@ -411,12 +411,9 @@ COMMAND_HANDLER(handle_xsvf_command) xsdrsize = be_to_h_u32(xsdrsize_buf); LOG_DEBUG("XSDRSIZE %d", xsdrsize); - if (dr_out_buf) - free(dr_out_buf); - if (dr_in_buf) - free(dr_in_buf); - if (dr_in_mask) - free(dr_in_mask); + free(dr_out_buf); + free(dr_in_buf); + free(dr_in_mask); dr_out_buf = malloc((xsdrsize + 7) / 8); dr_in_buf = malloc((xsdrsize + 7) / 8); @@ -456,7 +453,7 @@ COMMAND_HANDLER(handle_xsvf_command) if (attempt > 0) { /* perform the XC9500 exception handling sequence shown in xapp067.pdf and - * illustrated in psuedo code at end of this file. We start from state + * illustrated in pseudo code at end of this file. We start from state * DRPAUSE: * go to Exit2-DR * go to Shift-DR @@ -1027,14 +1024,9 @@ COMMAND_HANDLER(handle_xsvf_command) return ERROR_FAIL; } - if (dr_out_buf) - free(dr_out_buf); - - if (dr_in_buf) - free(dr_in_buf); - - if (dr_in_mask) - free(dr_in_mask); + free(dr_out_buf); + free(dr_in_buf); + free(dr_in_mask); close(xsvf_fd); diff --git a/tcl/board/dp_busblaster_v4.cfg b/tcl/board/dp_busblaster_v4.cfg new file mode 100644 index 000000000..066b54f3d --- /dev/null +++ b/tcl/board/dp_busblaster_v4.cfg @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Dangerous Prototypes - Bus Blaster +# +# http://dangerousprototypes.com/docs/Bus_Blaster +# +# The Bus Blaster has a configurable buffer between the FTDI FT2232H +# and the JTAG header which allows it to emulate various debugger +# types. This config works with KT-Link compatible implementation from +# https://raw.githubusercontent.com/dergraaf/busblaster_v4/master/ktlink/ktlink.svf +# +# To reprogram the on-board CPLD do: +# openocd -f board/dp_busblaster_v4.cfg -c "adapter_khz 1000; init; svf ; shutdown" +# + +source [find interface/ftdi/dp_busblaster.cfg] +ftdi_channel 1 + +jtag newtap xc2c64a tap -expected-id 0x06e5c093 -irlen 8 diff --git a/tcl/board/nds32_corvettef1.cfg b/tcl/board/nds32_corvettef1.cfg new file mode 100644 index 000000000..1a3782c68 --- /dev/null +++ b/tcl/board/nds32_corvettef1.cfg @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# ADP-Corvette-F1 R1.0 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-r1/ +# ADP-Corvette-F1 R2.0 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-r2/ + +adapter_khz 10000 + +adapter driver ftdi +ftdi_device_desc "Dual RS232-HS" +ftdi_vid_pid 0x0403 0x6010 + +ftdi_layout_init 0x0c08 0x0f1b +ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +reset_config srst_only + +source [find target/nds32v5.cfg] diff --git a/tcl/board/nds32_xc7.cfg b/tcl/board/nds32_xc7.cfg new file mode 100644 index 000000000..82c00acd7 --- /dev/null +++ b/tcl/board/nds32_xc7.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# ADP-XC7K160/410 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/adp-xc7k160-410/ + +source [find target/nds32v5.cfg] diff --git a/tcl/board/quicklogic_quickfeather.cfg b/tcl/board/quicklogic_quickfeather.cfg new file mode 100644 index 000000000..b522eff7e --- /dev/null +++ b/tcl/board/quicklogic_quickfeather.cfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# QuickLogic EOS S3 QuickFeather +# https://www.quicklogic.com/products/eos-s3/quickfeather-development-kit/ + +source [find target/eos_s3.cfg] + +reset_config srst_only + +transport select swd diff --git a/tcl/board/snps_hsdk.cfg b/tcl/board/snps_hsdk.cfg new file mode 100644 index 000000000..fed7343de --- /dev/null +++ b/tcl/board/snps_hsdk.cfg @@ -0,0 +1,18 @@ +# Copyright (C) 2019, 2020 Synopsys, Inc. +# Anton Kolesov +# Didin Evgeniy +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# Synopsys DesignWare ARC HSDK Software Development Platform (HS38 cores) +# + +source [find interface/ftdi/snps_sdp.cfg] +adapter_khz 10000 + +# ARCs supports only JTAG. +transport select jtag + +# Configure SoC +source [find target/snps_hsdk.cfg] diff --git a/tcl/board/st_nucleo_l1.cfg b/tcl/board/st_nucleo_l1.cfg index d97eb7c17..a508bb69c 100644 --- a/tcl/board/st_nucleo_l1.cfg +++ b/tcl/board/st_nucleo_l1.cfg @@ -5,6 +5,6 @@ source [find interface/stlink.cfg] transport select hla_swd -source [find target/stm32l1.cfg] +source [find target/stm32l1x_dual_bank.cfg] reset_config srst_only diff --git a/tcl/cpu/arc/hs.tcl b/tcl/cpu/arc/hs.tcl new file mode 100644 index 000000000..f39f2a7d0 --- /dev/null +++ b/tcl/cpu/arc/hs.tcl @@ -0,0 +1,58 @@ +# Copyright (C) 2015, 2020 Synopsys, Inc. +# Anton Kolesov +# Didin Evgeniy +# +# SPDX-License-Identifier: GPL-2.0-or-later + +source [find cpu/arc/v2.tcl] + +proc arc_hs_examine_target { target } { + # Will set current target for us. + arc_v2_examine_target $target +} + +proc arc_hs_init_regs { } { + arc_v2_init_regs + + [target current] configure \ + -event examine-end "arc_hs_examine_target [target current]" +} + +# Scripts in "target" folder should call this function instead of direct +# invocation of arc_common_reset. +proc arc_hs_reset { {target ""} } { + arc_v2_reset $target + + # Invalidate L2 cache if there is one. + set l2_config [$target arc jtag get-aux-reg 0x901] + # Will return 0, if cache is not present and register doesn't exist. + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + if { ($l2_config != 0) && (($l2_ctrl & 1) == 0) } { + puts "L2 cache is present and not disabled" + + # Wait until BUSY bit is 0. + puts "Invalidating L2 cache..." + $target arc jtag set-aux-reg 0x905 1 + # Dummy read of SLC_AUX_CACHE_CTRL bit, as described in: + # https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/arch/arc?id=c70c473396cbdec1168a6eff60e13029c0916854 + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + while { ($l2_ctrl & 0x100) != 0 } { + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + } + + # Flush cache if needed. If SLC_AUX_CACHE_CTRL.IM is 1, then invalidate + # operation already flushed everything. + if { ($l2_ctrl & 0x40) == 0 } { + puts "Flushing L2 cache..." + $target arc jtag set-aux-reg 0x904 1 + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + while { [expr $l2_ctrl & 0x100] != 0 } { + set l2_ctrl [$target arc jtag get-aux-reg 0x903] + } + } + + puts "L2 cache has been flushed and invalidated." + } +} diff --git a/tcl/cpu/arc/v2.tcl b/tcl/cpu/arc/v2.tcl index ad55361a5..a3172c220 100644 --- a/tcl/cpu/arc/v2.tcl +++ b/tcl/cpu/arc/v2.tcl @@ -30,6 +30,32 @@ proc arc_v2_examine_target { {target ""} } { r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 \ gp fp sp ilink r30 blink lp_count pcl + # Actionpoints + if { [arc get-reg-field ap_build version] == 5 } { + set ap_build_type [arc get-reg-field ap_build type] + # AP_BUILD.TYPE > 0b0110 is reserved in current ISA. + # Current ISA supports up to 8 actionpoints. + if { $ap_build_type < 8 } { + # Two LSB bits of AP_BUILD.TYPE define amount of actionpoints: + # 0b00 - 2 actionpoints + # 0b01 - 4 actionpoints + # 0b10 - 8 actionpoints + # 0b11 - reserved. + set ap_num [expr 0x2 << ($ap_build_type & 3)] + # Expression on top may produce 16 action points - which is a + # reserved value for now. + if { $ap_num < 16 } { + # Enable actionpoint registers + for {set i 0} {$i < $ap_num} {incr i} { + arc set-reg-exists ap_amv$i ap_amm$i ap_ac$i + } + + # Set amount of actionpoints + arc num-actionpoints $ap_num + } + } + } + # DCCM set dccm_version [arc get-reg-field dccm_build version] if { $dccm_version == 3 || $dccm_version == 4 } { @@ -213,6 +239,30 @@ proc arc_v2_init_regs { } { 0x018 aux_dccm int 0x208 aux_iccm int + 0x220 ap_amv0 uint32 + 0x221 ap_amm0 uint32 + 0x222 ap_ac0 ap_control_t + 0x223 ap_amv1 uint32 + 0x224 ap_amm1 uint32 + 0x225 ap_ac1 ap_control_t + 0x226 ap_amv2 uint32 + 0x227 ap_amm2 uint32 + 0x228 ap_ac2 ap_control_t + 0x229 ap_amv3 uint32 + 0x22A ap_amm3 uint32 + 0x22B ap_ac3 ap_control_t + 0x22C ap_amv4 uint32 + 0x22D ap_amm4 uint32 + 0x22E ap_ac4 ap_control_t + 0x22F ap_amv5 uint32 + 0x230 ap_amm5 uint32 + 0x231 ap_ac5 ap_control_t + 0x232 ap_amv6 uint32 + 0x233 ap_amm6 uint32 + 0x234 ap_ac6 ap_control_t + 0x235 ap_amv7 uint32 + 0x236 ap_amm7 uint32 + 0x237 ap_ac7 ap_control_t 0x400 eret code_ptr 0x401 erbta code_ptr @@ -285,4 +335,12 @@ proc arc_v2_init_regs { } { proc arc_v2_reset { {target ""} } { arc_common_reset $target + + # Disable all actionpoints. Cannot write via regcache yet, because it will + # not be flushed and all changes to registers will get lost. Therefore has + # to write directly via JTAG layer... + set num_ap [arc num-actionpoints] + for {set i 0} {$i < $num_ap} {incr i} { + arc jtag set-aux-reg [expr 0x222 + $i * 3] 0 + } } diff --git a/tcl/interface/dln-2-gpiod.cfg b/tcl/interface/dln-2-gpiod.cfg new file mode 100644 index 000000000..5407a244e --- /dev/null +++ b/tcl/interface/dln-2-gpiod.cfg @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Use DLN-2 GPIO through linuxgpiod +# +# +-----------+-------------+-------------+ +# | signal | DLN-2 | gpio offset | +# +-----------+-------------+-------------+ +# | nSRST | J3.1 (PA0) | 0 | +# | TDO | J3.2 (PA1) | 1 | +# | TCK/SWCLK | J3.3 (PA2) | 2 | +# | TMS/SWDIO | J3.4 (PA3) | 3 | +# | TDI | J3.5 (PA4) | 4 | +# | nTRST | J3.6 (PA5) | 5 | +# | LED | J3.7 (PA6) | 6 | +# | GND | J3.12 (GND) | | +# +-----------+-------------+-------------+ + +adapter driver linuxgpiod + +linuxgpiod_gpiochip 0 +linuxgpiod_jtag_nums 2 3 4 1 +linuxgpiod_trst_num 5 +linuxgpiod_swd_nums 2 3 +linuxgpiod_srst_num 0 +linuxgpiod_led_num 6 + +reset_config trst_and_srst separate srst_push_pull diff --git a/tcl/interface/ftdi/minimodule-swd.cfg b/tcl/interface/ftdi/minimodule-swd.cfg index 7ab46503e..4bc331edb 100644 --- a/tcl/interface/ftdi/minimodule-swd.cfg +++ b/tcl/interface/ftdi/minimodule-swd.cfg @@ -1,5 +1,5 @@ # -Supports SWD using the FT2232H or FT4232H minimodule. +# Supports SWD using the FT2232H or FT4232H minimodule. # Each can support 2 SWD interfaces. # # FT2232H or FT4232H minimodule channel 0 (Channel A) diff --git a/tcl/interface/ftdi/snps_sdp.cfg b/tcl/interface/ftdi/snps_sdp.cfg new file mode 100644 index 000000000..3aed2ae20 --- /dev/null +++ b/tcl/interface/ftdi/snps_sdp.cfg @@ -0,0 +1,18 @@ +# Copyright (C) 2020 Synopsys, Inc. +# Anton Kolesov +# Didin Evgeniy +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# Synopsys SDP Mainboard has embdded FT2232 chip, which is similar to Digilent +# HS-1, except that it uses channel B for JTAG communication, instead of +# channel A. +# + +adapter driver ftdi +ftdi_vid_pid 0x0403 0x6010 +ftdi_layout_init 0x0088 0x008b +ftdi_channel 1 + + diff --git a/tcl/interface/jtag_dpi.cfg b/tcl/interface/jtag_dpi.cfg new file mode 100644 index 000000000..e43386d58 --- /dev/null +++ b/tcl/interface/jtag_dpi.cfg @@ -0,0 +1,38 @@ +# +# Provide support for the Cadence JTAG BFM +# +# Copyright (c) 2020, Ampere Computing LLC +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; +# +# + +adapter driver jtag_dpi + +# Set the DPI JTAG server port +if { [info exists DPI_PORT] } { + set _DPI_PORT $DPI_PORT +} else { + set _DPI_PORT 5555 +} + +# Set the DPI JTAG server address +if { [info exists DPI_ADDRESS] } { + set _DPI_ADDRESS $DPI_ADDRESS +} else { + set _DPI_ADDRESS "127.0.0.1" +} + +jtag_dpi_set_port $_DPI_PORT +jtag_dpi_set_address $_DPI_ADDRESS diff --git a/tcl/interface/nulink.cfg b/tcl/interface/nulink.cfg new file mode 100644 index 000000000..e49b36cda --- /dev/null +++ b/tcl/interface/nulink.cfg @@ -0,0 +1,11 @@ +# +# Nuvoton Nu-Link in-circuit debugger/programmer +# + +adapter driver hla +hla_layout nulink +hla_device_desc "Nu-Link" +hla_vid_pid 0x0416 0x511b 0x0416 0x511c 0x0416 0x511d 0x0416 0x5200 0x0416 0x5201 + +# Only swd is supported +transport select hla_swd diff --git a/tcl/target/armada370.cfg b/tcl/target/armada370.cfg index 3b4be9f08..71652748f 100644 --- a/tcl/target/armada370.cfg +++ b/tcl/target/armada370.cfg @@ -28,6 +28,4 @@ proc armada370_dbginit {target} { $_TARGETNAME configure -event reset-assert-post "armada370_dbginit $_TARGETNAME" -# We need to init now, so we can run the apsel command. -init dap apsel 1 diff --git a/tcl/target/em357.cfg b/tcl/target/em357.cfg index 572007134..f39f3f428 100644 --- a/tcl/target/em357.cfg +++ b/tcl/target/em357.cfg @@ -52,7 +52,7 @@ if { [info exists FLASHSIZE] } { swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu if { [using_jtag] } { - swj_newdap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf + jtag newtap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf } set _TARGETNAME $_CHIPNAME.cpu diff --git a/tcl/target/eos_s3.cfg b/tcl/target/eos_s3.cfg new file mode 100644 index 000000000..f6016fb30 --- /dev/null +++ b/tcl/target/eos_s3.cfg @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# QuickLogic EOS S3 +# https://www.quicklogic.com/products/soc/eos-s3-microcontroller/ + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME eos_s3 +} + +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x80000 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + if { [using_jtag] } { + set _CPUTAPID 0x4ba00477 + } { + set _CPUTAPID 0x2ba01477 + } +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf -expected-id _CPUTAPID +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap + +# For now we use SRAM only for software upload +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +adapter speed 4000 + +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + cortex_m reset_config sysresetreq +} diff --git a/tcl/target/nds32v5.cfg b/tcl/target/nds32v5.cfg new file mode 100644 index 000000000..56b5fedfe --- /dev/null +++ b/tcl/target/nds32v5.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Andes Core +# +# http://www.andestech.com +# + +set _CHIPNAME nds +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563D + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME riscv -chain-position $_TARGETNAME diff --git a/tcl/target/psoc6.cfg b/tcl/target/psoc6.cfg index 51d032b17..bf63fd5d4 100644 --- a/tcl/target/psoc6.cfg +++ b/tcl/target/psoc6.cfg @@ -146,5 +146,5 @@ if { $_ENABLE_CM0 } { } if {[using_jtag]} { - swj_newdap $_CHIPNAME bs -irlen 18 -expected-id 0x2e200069 + jtag newtap $_CHIPNAME bs -irlen 18 -expected-id 0x2e200069 } diff --git a/tcl/target/rk3308.cfg b/tcl/target/rk3308.cfg new file mode 100644 index 000000000..d3d409eaf --- /dev/null +++ b/tcl/target/rk3308.cfg @@ -0,0 +1,69 @@ +# Rockchip RK3308 Target +# https://rockchip.fr/RK3308%20datasheet%20V1.5.pdf +# https://dl.radxa.com/rockpis/docs/hw/datasheets/Rockchip%20RK3308TRM%20V1.1%20Part1-20180810.pdf + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME rk3308 +} + +# +# Main DAP +# +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x2ba01477 +} + +adapter speed 12000 + +transport select swd + +# declare the one SWD tap to access the DAP +swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID -ignore-version + +# create the DAP +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu +target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0 + +# declare the 8 main application cores +set _TARGETNAME $_CHIPNAME.core +set _smp_command "" + +set $_TARGETNAME.base(0) 0x81010000 +set $_TARGETNAME.base(1) 0x81012000 +set $_TARGETNAME.base(2) 0x81014000 +set $_TARGETNAME.base(3) 0x81016000 + +set $_TARGETNAME.cti(0) 0x81018000 +set $_TARGETNAME.cti(1) 0x81019000 +set $_TARGETNAME.cti(2) 0x8101a000 +set $_TARGETNAME.cti(3) 0x8101b000 + +set _cores 4 +for { set _core 0 } { $_core < $_cores } { incr _core 1 } { + + cti create cti$_core -dap $_CHIPNAME.dap -ctibase [set $_TARGETNAME.cti($_core)] -ap-num 0 + + set _command "target create ${_TARGETNAME}$_core aarch64 \ + -dap $_CHIPNAME.dap -coreid $_core -cti cti$_core \ + -dbgbase [set $_TARGETNAME.base($_core)]" + + if { $_core != 0 } { + set _smp_command "$_smp_command ${_TARGETNAME}$_core" + } else { + # uncomment to use hardware threads pseudo rtos + # set _command "$_command -rtos hwthread" + set _command "$_command -work-area-size 0x40000 -work-area-phys 0xfff80000 \ + -work-area-backup 0" + set _smp_command "target smp ${_TARGETNAME}$_core" + } + + eval $_command +} + +eval $_smp_command + +targets ${_TARGETNAME}0 diff --git a/tcl/target/snps_hsdk.cfg b/tcl/target/snps_hsdk.cfg new file mode 100644 index 000000000..634e07adc --- /dev/null +++ b/tcl/target/snps_hsdk.cfg @@ -0,0 +1,86 @@ +# Copyright (C) 2019,2020 Synopsys, Inc. +# Anton Kolesov +# Didin Evgeniy +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# HS Development Kit SoC. +# +# Contains quad-core ARC HS38. +# + +source [find cpu/arc/hs.tcl] + +set _coreid 0 +set _dbgbase [expr ($_coreid << 13)] + +# CHIPNAME will be used to choose core family (600, 700 or EM). As far as +# OpenOCD is concerned EM and HS are identical. +set _CHIPNAME arc-em + +# OpenOCD discovers JTAG TAPs in reverse order. + +# ARC HS38 core 4 +set _TARGETNAME $_CHIPNAME.cpu4 +jtag newtap $_CHIPNAME cpu4 -irlen 4 -ircapture 0x1 -expected-id 0x200c24b1 + +target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME +$_TARGETNAME configure -coreid $_coreid +$_TARGETNAME configure -dbgbase $_dbgbase +# Flush L2$. +$_TARGETNAME configure -event reset-assert "arc_hs_reset $_TARGETNAME" +set _coreid [expr $_coreid + 1] +set _dbgbase [expr ($_coreid << 13)] + +arc_hs_init_regs + +# Enable L2 cache support for core 4. +$_TARGETNAME arc cache l2 auto 1 + +# ARC HS38 core 3 +set _TARGETNAME $_CHIPNAME.cpu3 +jtag newtap $_CHIPNAME cpu3 -irlen 4 -ircapture 0x1 -expected-id 0x200824b1 + +target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME +$_TARGETNAME configure -coreid $_coreid +$_TARGETNAME configure -dbgbase $_dbgbase +$_TARGETNAME configure -event reset-assert "arc_common_reset $_TARGETNAME" +set _coreid [expr $_coreid + 1] +set _dbgbase [expr ($_coreid << 13)] + +arc_hs_init_regs + +# Enable L2 cache support for core 3. +$_TARGETNAME arc cache l2 auto 1 + +# ARC HS38 core 2 +set _TARGETNAME $_CHIPNAME.cpu2 +jtag newtap $_CHIPNAME cpu2 -irlen 4 -ircapture 0x1 -expected-id 0x200424b1 + +target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME +$_TARGETNAME configure -coreid $_coreid +$_TARGETNAME configure -dbgbase $_dbgbase +$_TARGETNAME configure -event reset-assert "arc_common_reset $_TARGETNAME" +set _coreid [expr $_coreid + 1] +set _dbgbase [expr ($_coreid << 13)] + +arc_hs_init_regs + +# Enable L2 cache support for core 2. +$_TARGETNAME arc cache l2 auto 1 + +# ARC HS38 core 1 +set _TARGETNAME $_CHIPNAME.cpu1 +jtag newtap $_CHIPNAME cpu1 -irlen 4 -ircapture 0x1 -expected-id 0x200024b1 + +target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME +$_TARGETNAME configure -coreid $_coreid +$_TARGETNAME configure -dbgbase $_dbgbase +$_TARGETNAME configure -event reset-assert "arc_common_reset $_TARGETNAME" +set _coreid [expr $_coreid + 1] +set _dbgbase [expr 0x00000000 | ($_coreid << 13)] +arc_hs_init_regs + +# Enable L2 cache support for core 1. +$_TARGETNAME arc cache l2 auto 1 diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg index 2d92eca92..43a8b024e 100644 --- a/tcl/target/stm32h7x.cfg +++ b/tcl/target/stm32h7x.cfg @@ -70,7 +70,7 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu if {[using_jtag]} { - swj_newdap $_CHIPNAME bs -irlen 5 + jtag newtap $_CHIPNAME bs -irlen 5 } if {![using_hla]} { diff --git a/tcl/target/stm32w108xx.cfg b/tcl/target/stm32w108xx.cfg index 3a83fd19e..0470bf6ce 100644 --- a/tcl/target/stm32w108xx.cfg +++ b/tcl/target/stm32w108xx.cfg @@ -42,11 +42,11 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu if {[using_jtag]} { if { [info exists BSTAPID] } { set _BSTAPID $BSTAPID - swj_newdap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf -expected-id _BSTAPID + jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf -expected-id _BSTAPID } else { set _BSTAPID_1 0x169a862b set _BSTAPID_2 0x269a862b - swj_newdap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf \ + jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf \ -expected-id $_BSTAPID_1 -expected-id $_BSTAPID_2 } } diff --git a/tcl/target/stm32wlx.cfg b/tcl/target/stm32wlx.cfg index 98c9a7ee9..ba16fab6b 100644 --- a/tcl/target/stm32wlx.cfg +++ b/tcl/target/stm32wlx.cfg @@ -38,7 +38,7 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu if {[using_jtag]} { - swj_newdap $_CHIPNAME bs -irlen 5 + jtag newtap $_CHIPNAME bs -irlen 5 } set _TARGETNAME $_CHIPNAME.cpu diff --git a/tcl/target/swj-dp.tcl b/tcl/target/swj-dp.tcl index 1d274cb12..3fb0263f1 100644 --- a/tcl/target/swj-dp.tcl +++ b/tcl/target/swj-dp.tcl @@ -24,11 +24,12 @@ if [catch {transport select}] { } proc swj_newdap {chip tag args} { - if [using_hla] { - eval hla newtap $chip $tag $args - } elseif [using_jtag] { + if [using_jtag] { eval jtag newtap $chip $tag $args } elseif [using_swd] { eval swd newdap $chip $tag $args + } else { + echo "Error: transport '[ transport select ]' not supported by swj_newdap" + shutdown } } diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl index 0a119f1ba..bdd840805 100755 --- a/tools/scripts/checkpatch.pl +++ b/tools/scripts/checkpatch.pl @@ -1589,7 +1589,7 @@ sub process { } # Check for absolute kernel paths. - if ($tree) { + if ($tree && $line =~ /^[^-]/) { while ($line =~ m{(?:^|\s)(/\S*)}g) { my $file = $1;