eMAG: Add Ampere eMAG config files
Add board and target configuration files for Ampere eMAG8180 board and Ampere eMAG processor. Tested on an Ampere eMAG8180 development platform. Change-Id: I222653f0fc12d25202a7e469db3594076cbc38ed Signed-off-by: Anthony Ferranti <ferranti@os.amperecomputing.com> Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: http://openocd.zylin.com/5569 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Anthony Ferranti
Antonio Borneo
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7e16194828
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#
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# OpenOCD Board Configuration for eMAG Development Platform
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#
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# Copyright (c) 2019-2021, Ampere Computing LLC
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program;
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#
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#
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#
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# Configure JTAG speed
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#
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adapter speed 2000
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#
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# Configure Resets
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#
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jtag_ntrst_delay 100
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reset_config trst_only
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#
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# Configure Targets
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#
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source [find target/ampere_emag.cfg]
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#
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# OpenOCD Target Configuration for eMAG ARMv8 Processor
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#
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# Copyright (c) 2019-2021, Ampere Computing LLC
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program;
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#
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#
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#
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# Configure defaults for target
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# Can be overriden in board configuration file
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME emag
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}
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if { [info exists NUMCORES] } {
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set _NUMCORES $NUMCORES
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} else {
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set _NUMCORES 32
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4BA00477
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}
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#
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# Configure JTAG TAP
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#
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID
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set _TAPNAME $_CHIPNAME.cpu
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set _DAPNAME ${_TAPNAME}_dap
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set _APNUM 1
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dap create $_DAPNAME -chain-position $_TAPNAME
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$_DAPNAME apsel $_APNUM
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# Create the DAP AP0 MEM-AP AHB-AP target
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target create AHB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 0
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# Create the DAP AP1 MEM-AP APB-AP target
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target create APB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 1
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#
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# Configure target CPUs
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#
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# Build string used to enable smp mode
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set _SMP_STR "target smp"
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for {set _i 0} {$_i < $_NUMCORES} {incr _i} {
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# Format a string to reference which CPU target to use
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set _TARGETNAME [format "${_TAPNAME}_%02d" $_i]
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# Create and configure Cross Trigger Interface (CTI) - required for halt and resume
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set _CTINAME $_TARGETNAME.cti
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cti create $_CTINAME -dap $_DAPNAME -ap-num $_APNUM -baseaddr [expr 0xFC020000 + ($_i << 20)]
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# Create the target
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target create $_TARGETNAME aarch64 -endian $_ENDIAN -dap $_DAPNAME -ap-num $_APNUM -cti $_CTINAME -coreid $_i
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set _SMP_STR "$_SMP_STR $_TARGETNAME"
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# Clear CTI output/input enables that are not configured by OpenOCD for aarch64
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$_TARGETNAME configure -event examine-start [subst {
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$_CTINAME write INEN0 0x00000000
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$_CTINAME write INEN1 0x00000000
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$_CTINAME write INEN2 0x00000000
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$_CTINAME write INEN3 0x00000000
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$_CTINAME write INEN4 0x00000000
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$_CTINAME write INEN5 0x00000000
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$_CTINAME write INEN6 0x00000000
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$_CTINAME write INEN7 0x00000000
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$_CTINAME write INEN8 0x00000000
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$_CTINAME write OUTEN2 0x00000000
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$_CTINAME write OUTEN3 0x00000000
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$_CTINAME write OUTEN4 0x00000000
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$_CTINAME write OUTEN5 0x00000000
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$_CTINAME write OUTEN6 0x00000000
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$_CTINAME write OUTEN7 0x00000000
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$_CTINAME write OUTEN8 0x00000000
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}]
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# Enable OpenOCD HWTHREAD RTOS feature for GDB thread (CPU) selection support
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# This feature presents CPU cores ("hardware threads") in an SMP system as threads to GDB
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$_TARGETNAME configure -rtos hwthread
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}
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eval $_SMP_STR
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