diff --git a/.gitignore b/.gitignore index 103dad2c7..5de33077e 100644 --- a/.gitignore +++ b/.gitignore @@ -84,6 +84,9 @@ patches .cproject .settings +# VSCode stuff +.vscode + # Emacs temp files *~ diff --git a/HACKING b/HACKING index 46db3b8f6..c023a50a3 100644 --- a/HACKING +++ b/HACKING @@ -313,6 +313,13 @@ Only for exceptional cases, it is allowed to submit patches to Gerrit with the special field 'Checkpatch-ignore:' in the commit message. This field will cause checkpatch to ignore the error types listed in the field, only for the patch itself. +For errors in the commit message, the special field has to be put in +the commit message before the line that produces the error. +The special field must be added before the 'Signed-off-by:' +line, otherwise it is ignored. +To ignore multiple errors, either add multiple lines with the special +field or add multiple error types, separated by space or commas, in a +single line. The error type is printed by checkpatch on failure. For example the names of Windows APIs mix lower and upper case chars, in violation of OpenOCD coding style, triggering a 'CAMELCASE' error: diff --git a/configure.ac b/configure.ac index 779de40c6..c28a5b79f 100644 --- a/configure.ac +++ b/configure.ac @@ -104,12 +104,18 @@ AS_IF([test -x "$srcdir/guess-rev.sh"], [ AC_MSG_RESULT([$build_release]) # Adapter drivers -# 1st column -- configure option -# 2nd column -- description -# 3rd column -- symbol used for both config.h and automake +# 1st column -- Basename for the configure option generated with AC_ARG_ENABLE. +# For example, "buspirate" generates options "--enable-buspirate[=yes/no]" +# and "--disable-buspirate". +# 2nd column -- Description for the configure option. For example, "Bus Pirate" +# generates "Enable building support for the Bus Pirate (default is auto)". +# 3rd column -- Basename for the config.h and Automake symbols. +# For example, basename "BUS_PIRATE" generates "BUILD_BUS_PIRATE" with AC_DEFINE +# for config.h and "BUS_PIRATE" with AM_CONDITIONAL for Automake. m4_define([ADAPTER_ARG], [m4_argn([1], $1)]) m4_define([ADAPTER_DESC], [m4_argn([2], $1)]) m4_define([ADAPTER_SYM], [m4_argn([3], $1)]) +# AC_ARG_ENABLE uses prefix "enable_" to name the corresponding option variable. m4_define([ADAPTER_VAR], [enable_[]ADAPTER_ARG($1)]) m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])]) @@ -265,6 +271,7 @@ AC_ARG_ADAPTERS([ LIBFTDI_USB1_ADAPTERS LIBGPIOD_ADAPTERS, SERIAL_PORT_ADAPTERS, + PCIE_ADAPTERS, LIBJAYLINK_ADAPTERS ],[auto]) @@ -341,12 +348,10 @@ AC_ARG_ENABLE([sysfsgpio], AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]), [build_sysfsgpio=$enableval], [build_sysfsgpio=no]) -AC_ARG_ENABLE([xlnx_pcie_xvc], - AS_HELP_STRING([--enable-xlnx-pcie-xvc], [Enable building support for Xilinx XVC/PCIe.]), - [build_xlnx_pcie_xvc=$enableval], [build_xlnx_pcie_xvc=no]) - AS_CASE([$host_os], - [linux*], [], + [linux*], [ + is_linux=yes + ], [ AS_IF([test "x$build_sysfsgpio" = "xyes"], [ AC_MSG_ERROR([sysfsgpio is only available on linux]) @@ -356,10 +361,6 @@ AS_CASE([$host_os], AC_MSG_ERROR([linuxgpiod is only available on linux]) ]) - AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [ - AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux]) - ]) - AS_CASE([$host_os], [freebsd*], [], [ AS_IF([test "x$build_rshim" = "xyes"], [ @@ -620,13 +621,6 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [ AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.]) ]) -AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [ - build_xlnx_pcie_xvc=yes - AC_DEFINE([BUILD_XLNX_PCIE_XVC], [1], [1 if you want the Xilinx XVC/PCIe driver.]) -], [ - AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.]) -]) - PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [ use_libusb1=yes AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x]) @@ -688,11 +682,11 @@ PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [ PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2], [use_libjaylink=yes], [use_libjaylink=no]) -# Arg $1: The adapter name, used to derive option and variable names for the adapter. -# Arg $2: Whether the adapter can be enabled, for example, because -# its prerequisites are installed in the system. +# Arg $1: An array of adapter triplets, used to derive option and variable names for each adapter. +# Arg $2: Whether the adapters can be enabled, for example, because +# their prerequisites are installed in the system. # Arg $3: What prerequisites are missing, to be shown in an error message -# if the adapter was requested but cannot be enabled. +# if an adapter was requested but cannot be enabled. m4_define([PROCESS_ADAPTERS], [ m4_foreach([adapter], [$1], [ AS_IF([test $2], [ @@ -703,7 +697,7 @@ m4_define([PROCESS_ADAPTERS], [ ]) ], [ AS_IF([test "x$ADAPTER_VAR([adapter])" = "xyes"], [ - AC_MSG_ERROR([$3 is required for the ADAPTER_DESC([adapter])]) + AC_MSG_ERROR([$3 is required for [adapter] ADAPTER_DESC([adapter]).]) ]) ADAPTER_VAR([adapter])=no AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [0], [0 if you do not want the ]ADAPTER_DESC([adapter]).) @@ -719,6 +713,7 @@ PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi]) PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a "x$use_libusb1" = "xyes"], [libftdi and libusb-1.x]) PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod]) PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2]) +PROCESS_ADAPTERS([PCIE_ADAPTERS], ["x$is_linux" = "xyes"], [Linux build]) PROCESS_ADAPTERS([DUMMY_ADAPTER], [true], [unused]) AS_IF([test "x$enable_linuxgpiod" != "xno"], [ @@ -775,7 +770,6 @@ AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"]) AM_CONDITIONAL([REMOTE_BITBANG], [test "x$build_remote_bitbang" = "xyes"]) AM_CONDITIONAL([BUSPIRATE], [test "x$enable_buspirate" != "xno"]) AM_CONDITIONAL([SYSFSGPIO], [test "x$build_sysfsgpio" = "xyes"]) -AM_CONDITIONAL([XLNX_PCIE_XVC], [test "x$build_xlnx_pcie_xvc" = "xyes"]) AM_CONDITIONAL([USE_LIBUSB1], [test "x$use_libusb1" = "xyes"]) AM_CONDITIONAL([IS_CYGWIN], [test "x$is_cygwin" = "xyes"]) AM_CONDITIONAL([IS_MINGW], [test "x$is_mingw" = "xyes"]) diff --git a/contrib/itmdump.c b/contrib/itmdump.c index e7523d9bc..7c93a3963 100644 --- a/contrib/itmdump.c +++ b/contrib/itmdump.c @@ -43,9 +43,9 @@ unsigned int dump_swit; * NOTE that this specific encoding could be space-optimized; and that * trace data streams could also be history-sensitive. */ -static void show_task(int port, unsigned data) +static void show_task(int port, unsigned int data) { - unsigned code = data >> 16; + unsigned int code = data >> 16; char buf[16]; if (dump_swit) @@ -77,7 +77,7 @@ static void show_task(int port, unsigned data) static void show_reserved(FILE *f, char *label, int c) { - unsigned i; + unsigned int i; if (dump_swit) return; @@ -96,9 +96,9 @@ static void show_reserved(FILE *f, char *label, int c) printf("\n"); } -static bool read_varlen(FILE *f, int c, unsigned *value) +static bool read_varlen(FILE *f, int c, unsigned int *value) { - unsigned size; + unsigned int size; unsigned char buf[4]; *value = 0; @@ -135,8 +135,8 @@ err: static void show_hard(FILE *f, int c) { - unsigned type = c >> 3; - unsigned value; + unsigned int type = c >> 3; + unsigned int value; char *label; if (dump_swit) @@ -230,16 +230,16 @@ static void show_hard(FILE *f, int c) */ struct { int port; - void (*show)(int port, unsigned data); + void (*show)(int port, unsigned int data); } format[] = { { .port = 31, .show = show_task, }, }; static void show_swit(FILE *f, int c) { - unsigned port = c >> 3; - unsigned value = 0; - unsigned i; + unsigned int port = c >> 3; + unsigned int value = 0; + unsigned int i; if (port + 1 == dump_swit) { if (!read_varlen(f, c, &value)) @@ -272,7 +272,7 @@ static void show_swit(FILE *f, int c) static void show_timestamp(FILE *f, int c) { - unsigned counter = 0; + unsigned int counter = 0; char *label = ""; bool delayed = false; diff --git a/contrib/loaders/flash/fespi/riscv_fespi.c b/contrib/loaders/flash/fespi/riscv_fespi.c index 17ae2fd22..08fb09477 100644 --- a/contrib/loaders/flash/fespi/riscv_fespi.c +++ b/contrib/loaders/flash/fespi/riscv_fespi.c @@ -103,7 +103,7 @@ static void fespi_disable_hw_mode(volatile uint32_t *ctrl_base); static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base); static int fespi_wip(volatile uint32_t *ctrl_base); static int fespi_write_buffer(volatile uint32_t *ctrl_base, - const uint8_t *buffer, unsigned offset, unsigned len, + const uint8_t *buffer, unsigned int offset, unsigned int len, uint32_t flash_info); /* Can set bits 3:0 in result. */ @@ -113,7 +113,7 @@ static int fespi_write_buffer(volatile uint32_t *ctrl_base, * after pprog_cmd */ int flash_fespi(volatile uint32_t *ctrl_base, uint32_t page_size, - const uint8_t *buffer, unsigned offset, uint32_t count, + const uint8_t *buffer, unsigned int offset, uint32_t count, uint32_t flash_info) { int result; @@ -163,12 +163,12 @@ err: return result; } -static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned address) +static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned int address) { return ctrl_base[address / 4]; } -static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned address, uint32_t value) +static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned int address, uint32_t value) { ctrl_base[address / 4] = value; } @@ -188,7 +188,7 @@ static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base) /* Can set bits 7:4 in result. */ static int fespi_txwm_wait(volatile uint32_t *ctrl_base) { - unsigned timeout = TIMEOUT; + unsigned int timeout = TIMEOUT; while (timeout--) { uint32_t ip = fespi_read_reg(ctrl_base, FESPI_REG_IP); @@ -209,7 +209,7 @@ static void fespi_set_dir(volatile uint32_t *ctrl_base, bool dir) /* Can set bits 11:8 in result. */ static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in) { - unsigned timeout = TIMEOUT; + unsigned int timeout = TIMEOUT; while (timeout--) { uint32_t txfifo = fespi_read_reg(ctrl_base, FESPI_REG_TXFIFO); @@ -224,7 +224,7 @@ static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in) /* Can set bits 15:12 in result. */ static int fespi_rx(volatile uint32_t *ctrl_base, uint8_t *out) { - unsigned timeout = TIMEOUT; + unsigned int timeout = TIMEOUT; while (timeout--) { uint32_t value = fespi_read_reg(ctrl_base, FESPI_REG_RXFIFO); @@ -252,7 +252,7 @@ static int fespi_wip(volatile uint32_t *ctrl_base) if (result != ERROR_OK) return result | ERROR_STACK(0x20000); - unsigned timeout = TIMEOUT; + unsigned int timeout = TIMEOUT; while (timeout--) { result = fespi_tx(ctrl_base, 0); if (result != ERROR_OK) @@ -273,7 +273,7 @@ static int fespi_wip(volatile uint32_t *ctrl_base) /* Can set bits 23:20 in result. */ static int fespi_write_buffer(volatile uint32_t *ctrl_base, - const uint8_t *buffer, unsigned offset, unsigned len, + const uint8_t *buffer, unsigned int offset, unsigned int len, uint32_t flash_info) { int result = fespi_tx(ctrl_base, SPIFLASH_WRITE_ENABLE); @@ -304,7 +304,7 @@ static int fespi_write_buffer(volatile uint32_t *ctrl_base, if (result != ERROR_OK) return result | ERROR_STACK(0x600000); - for (unsigned i = 0; i < len; i++) { + for (unsigned int i = 0; i < len; i++) { result = fespi_tx(ctrl_base, buffer[i]); if (result != ERROR_OK) return result | ERROR_STACK(0x700000); diff --git a/doc/openocd.texi b/doc/openocd.texi index b2236dd32..4a6b0c126 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2489,7 +2489,7 @@ This command is only available if your libusb1 is at least version 1.0.16. Specifies the @var{serial_string} of the adapter to use. If this command is not specified, serial strings are not checked. Only the following adapter drivers use the serial string from this command: -arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus, +arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (ti-icdi), jlink, kitprog, opendus, openjtag, osbdm, presto, rlink, st-link, usb_blaster (ublast2), usbprog, vsllink, xds110. @end deffn @@ -3235,7 +3235,7 @@ version reported is V2.J21.S4. Currently Not Supported. @end deffn -@deffn {Config Command} {hla layout} (@option{stlink}|@option{icdi}|@option{nulink}) +@deffn {Config Command} {hla layout} (@option{icdi}|@option{nulink}) Specifies the adapter layout to use. @end deffn @@ -3243,15 +3243,6 @@ Specifies the adapter layout to use. Pairs of vendor IDs and product IDs of the device. @end deffn -@deffn {Config Command} {hla stlink_backend} (usb | tcp [port]) -@emph{ST-Link only:} Choose between 'exclusive' USB communication (the default backend) or -'shared' mode using ST-Link TCP server (the default port is 7184). - -@emph{Note:} ST-Link TCP server is a binary application provided by ST -available from @url{https://www.st.com/en/development-tools/st-link-server.html, -ST-LINK server software module}. -@end deffn - @deffn {Command} {hla command} command Execute a custom adapter-specific command. The @var{command} string is passed as is to the underlying adapter layout handler. @@ -3261,9 +3252,12 @@ passed as is to the underlying adapter layout handler. @anchor{st_link_dap_interface} @deffn {Interface Driver} {st-link} This is a driver that supports STMicroelectronics adapters ST-LINK/V2 -(from firmware V2J24), STLINK-V3 and STLINK-V3PWR, thanks to a new API that provides +(from 2015 firmware V2J24), STLINK-V3 and STLINK-V3PWR, thanks to a new API that provides directly access the arm ADIv5 DAP. +The older API that requires HLA transport is deprecated and will be dropped +from OpenOCD. In mean time it's still available by using @file{interface/stlink-hla.cfg}. + The new API provide access to multiple AP on the same DAP, but the maximum number of the AP port is limited by the specific firmware version (e.g. firmware V2J29 has 3 as maximum AP number, while V2J32 has 8). @@ -10706,7 +10700,7 @@ baud with our custom divisor to get 12MHz) @item OpenOCD invocation line: @example openocd -f interface/stlink.cfg \ --c "transport select hla_swd" \ +-c "transport select dapdirect_swd" \ -f target/stm32l1.cfg \ -c "stm32l1.tpiu configure -protocol uart" \ -c "stm32l1.tpiu configure -traceclk 24000000 -pin-freq 12000000" \ diff --git a/jimtcl b/jimtcl index 1933e5457..f16086617 160000 --- a/jimtcl +++ b/jimtcl @@ -1 +1 @@ -Subproject commit 1933e5457b9512d39ebbe11ed32578aada149f49 +Subproject commit f160866171457474f7c4d6ccda70f9b77524407e diff --git a/src/flash/common.c b/src/flash/common.c index ebd9396eb..9f40a3a6f 100644 --- a/src/flash/common.c +++ b/src/flash/common.c @@ -11,14 +11,14 @@ #include "common.h" #include -unsigned get_flash_name_index(const char *name) +unsigned int get_flash_name_index(const char *name) { const char *name_index = strrchr(name, '.'); if (!name_index) return 0; if (name_index[1] < '0' || name_index[1] > '9') return ~0U; - unsigned requested; + unsigned int requested; int retval = parse_uint(name_index + 1, &requested); /* detect parsing error by forcing past end of bank list */ return (retval == ERROR_OK) ? requested : ~0U; @@ -26,7 +26,7 @@ unsigned get_flash_name_index(const char *name) bool flash_driver_name_matches(const char *name, const char *expected) { - unsigned blen = strlen(name); + unsigned int blen = strlen(name); /* only match up to the length of the driver name... */ if (strncmp(name, expected, blen) != 0) return false; diff --git a/src/flash/common.h b/src/flash/common.h index 15aea5b81..6ceaa8d3c 100644 --- a/src/flash/common.h +++ b/src/flash/common.h @@ -17,7 +17,7 @@ * name provides a suffix but it does not parse as an unsigned integer, * the routine returns ~0U. This will prevent further matching. */ -unsigned get_flash_name_index(const char *name); +unsigned int get_flash_name_index(const char *name); /** * Attempt to match the @c expected name with the @c name of a driver. * @param name The name of the driver (from the bank's device structure). diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c index 80bd0cf25..dd012e161 100644 --- a/src/flash/nand/arm_io.c +++ b/src/flash/nand/arm_io.c @@ -31,12 +31,12 @@ * @return Success or failure of the operation */ static int arm_code_to_working_area(struct target *target, - const uint32_t *code, unsigned code_size, - unsigned additional, struct working_area **area) + const uint32_t *code, unsigned int code_size, + unsigned int additional, struct working_area **area) { uint8_t code_buf[code_size]; int retval; - unsigned size = code_size + additional; + unsigned int size = code_size + additional; /* REVISIT this assumes size doesn't ever change. * That's usually correct; but there are boards with diff --git a/src/flash/nand/arm_io.h b/src/flash/nand/arm_io.h index 10f0e661c..760dc7e6f 100644 --- a/src/flash/nand/arm_io.h +++ b/src/flash/nand/arm_io.h @@ -27,7 +27,7 @@ struct arm_nand_data { struct working_area *copy_area; /** The chunk size is the page size or ECC chunk. */ - unsigned chunk_size; + unsigned int chunk_size; /** Where data is read from or written to. */ uint32_t data; diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c index bfbba67c4..41cb07bc9 100644 --- a/src/flash/nand/at91sam9.c +++ b/src/flash/nand/at91sam9.c @@ -389,9 +389,8 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page, uint32_t bit = parity & 0x0F; data[word] ^= (0x1) << bit; - LOG_INFO("Data word %d, bit %d corrected.", - (unsigned) word, - (unsigned) bit); + LOG_INFO("Data word %" PRIu32 ", bit %" PRIu32 " corrected.", + word, bit); } } @@ -533,7 +532,7 @@ COMMAND_HANDLER(handle_at91sam9_cle_command) { struct nand_device *nand = NULL; struct at91sam9_nand *info = NULL; - unsigned num, address_line; + unsigned int num, address_line; if (CMD_ARGC != 2) { command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command"); @@ -563,7 +562,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command) { struct nand_device *nand = NULL; struct at91sam9_nand *info = NULL; - unsigned num, address_line; + unsigned int num, address_line; if (CMD_ARGC != 2) return ERROR_COMMAND_SYNTAX_ERROR; @@ -591,7 +590,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command) { struct nand_device *nand = NULL; struct at91sam9_nand *info = NULL; - unsigned num, base_pioc, pin_num; + unsigned int num, base_pioc, pin_num; if (CMD_ARGC != 3) return ERROR_COMMAND_SYNTAX_ERROR; @@ -622,7 +621,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command) { struct nand_device *nand = NULL; struct at91sam9_nand *info = NULL; - unsigned num, base_pioc, pin_num; + unsigned int num, base_pioc, pin_num; if (CMD_ARGC != 3) return ERROR_COMMAND_SYNTAX_ERROR; diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c index 37e1d12e0..c5430aeb0 100644 --- a/src/flash/nand/core.c +++ b/src/flash/nand/core.c @@ -165,8 +165,8 @@ static struct nand_ecclayout nand_oob_8 = { */ static struct nand_device *get_nand_device_by_name(const char *name) { - unsigned requested = get_flash_name_index(name); - unsigned found = 0; + unsigned int requested = get_flash_name_index(name); + unsigned int found = 0; struct nand_device *nand; for (nand = nand_devices; nand; nand = nand->next) { @@ -194,7 +194,7 @@ struct nand_device *get_nand_device_by_num(int num) return NULL; } -COMMAND_HELPER(nand_command_get_device, unsigned name_index, +COMMAND_HELPER(nand_command_get_device, unsigned int name_index, struct nand_device **nand) { const char *str = CMD_ARGV[name_index]; @@ -202,7 +202,7 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index, if (*nand) return ERROR_OK; - unsigned num; + unsigned int num; COMMAND_PARSE_NUMBER(uint, str, num); *nand = get_nand_device_by_num(num); if (!*nand) { diff --git a/src/flash/nand/core.h b/src/flash/nand/core.h index 137298cbc..4286e1183 100644 --- a/src/flash/nand/core.h +++ b/src/flash/nand/core.h @@ -209,7 +209,7 @@ int nand_correct_data(struct nand_device *nand, u_char *dat, int nand_register_commands(struct command_context *cmd_ctx); /** helper for parsing a nand device command argument string */ -COMMAND_HELPER(nand_command_get_device, unsigned name_index, +COMMAND_HELPER(nand_command_get_device, unsigned int name_index, struct nand_device **nand); diff --git a/src/flash/nand/davinci.c b/src/flash/nand/davinci.c index b7169feeb..17040fe17 100644 --- a/src/flash/nand/davinci.c +++ b/src/flash/nand/davinci.c @@ -379,7 +379,7 @@ static int davinci_writepage_tail(struct nand_device *nand, static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size) { - unsigned oob_offset; + unsigned int oob_offset; struct davinci_nand *info = nand->controller_priv; struct target *target = nand->target; const uint32_t fcr_addr = info->aemif + NANDFCR; diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c index ce79e1382..5d99102c8 100644 --- a/src/flash/nand/driver.c +++ b/src/flash/nand/driver.c @@ -33,7 +33,7 @@ static struct nand_flash_controller *nand_flash_controllers[] = { struct nand_flash_controller *nand_driver_find_by_name(const char *name) { - for (unsigned i = 0; nand_flash_controllers[i]; i++) { + for (unsigned int i = 0; nand_flash_controllers[i]; i++) { struct nand_flash_controller *controller = nand_flash_controllers[i]; if (strcmp(name, controller->name) == 0) return controller; @@ -42,7 +42,7 @@ struct nand_flash_controller *nand_driver_find_by_name(const char *name) } int nand_driver_walk(nand_driver_walker_t f, void *x) { - for (unsigned i = 0; nand_flash_controllers[i]; i++) { + for (unsigned int i = 0; nand_flash_controllers[i]; i++) { int retval = (*f)(nand_flash_controllers[i], x); if (retval != ERROR_OK) return retval; diff --git a/src/flash/nand/fileio.c b/src/flash/nand/fileio.c index ca618b375..613ae3cb3 100644 --- a/src/flash/nand/fileio.c +++ b/src/flash/nand/fileio.c @@ -107,7 +107,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, { nand_fileio_init(state); - unsigned minargs = need_size ? 4 : 3; + unsigned int minargs = need_size ? 4 : 3; if (minargs > CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; @@ -131,7 +131,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, } if (minargs < CMD_ARGC) { - for (unsigned i = minargs; i < CMD_ARGC; i++) { + for (unsigned int i = minargs; i < CMD_ARGC; i++) { if (!strcmp(CMD_ARGV[i], "oob_raw")) state->oob_format |= NAND_OOB_RAW; else if (!strcmp(CMD_ARGV[i], "oob_only")) diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c index c1af1d737..d221c34d9 100644 --- a/src/flash/nand/lpc3180.c +++ b/src/flash/nand/lpc3180.c @@ -890,8 +890,7 @@ static int lpc3180_read_page(struct nand_device *nand, if (mlc_isr & 0x8) { if (mlc_isr & 0x40) { - LOG_ERROR("uncorrectable error detected: 0x%2.2x", - (unsigned)mlc_isr); + LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr); free(page_buffer); free(oob_buffer); return ERROR_NAND_OPERATION_FAILED; @@ -1275,7 +1274,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command) if ((CMD_ARGC < 1) || (CMD_ARGC > 3)) return ERROR_COMMAND_SYNTAX_ERROR; - unsigned num; + unsigned int num; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num); struct nand_device *nand = get_nand_device_by_num(num); if (!nand) { diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c index 1fdae9fe5..c67f2aa30 100644 --- a/src/flash/nand/lpc32xx.c +++ b/src/flash/nand/lpc32xx.c @@ -1386,8 +1386,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, if (mlc_isr & 0x8) { if (mlc_isr & 0x40) { - LOG_ERROR("uncorrectable error detected: " - "0x%2.2x", (unsigned)mlc_isr); + LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr); return ERROR_NAND_OPERATION_FAILED; } @@ -1743,7 +1742,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command) if ((CMD_ARGC < 1) || (CMD_ARGC > 3)) return ERROR_COMMAND_SYNTAX_ERROR; - unsigned num; + unsigned int num; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num); struct nand_device *nand = get_nand_device_by_num(num); if (!nand) { diff --git a/src/flash/nand/mx3.h b/src/flash/nand/mx3.h index b272962b4..648cd86cc 100644 --- a/src/flash/nand/mx3.h +++ b/src/flash/nand/mx3.h @@ -86,10 +86,10 @@ enum mx_nf_finalize_action { }; struct mx3_nf_flags { - unsigned target_little_endian:1; - unsigned nand_readonly:1; - unsigned one_kb_sram:1; - unsigned hw_ecc_enabled:1; + unsigned int target_little_endian:1; + unsigned int nand_readonly:1; + unsigned int one_kb_sram:1; + unsigned int hw_ecc_enabled:1; }; struct mx3_nf_controller { diff --git a/src/flash/nand/mxc.h b/src/flash/nand/mxc.h index ae2c03a75..e9dc0a2f3 100644 --- a/src/flash/nand/mxc.h +++ b/src/flash/nand/mxc.h @@ -138,11 +138,11 @@ enum mxc_nf_finalize_action { }; struct mxc_nf_flags { - unsigned target_little_endian:1; - unsigned nand_readonly:1; - unsigned one_kb_sram:1; - unsigned hw_ecc_enabled:1; - unsigned biswap_enabled:1; + unsigned int target_little_endian:1; + unsigned int nand_readonly:1; + unsigned int one_kb_sram:1; + unsigned int hw_ecc_enabled:1; + unsigned int biswap_enabled:1; }; struct mxc_nf_controller { diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c index ce9bf2445..aa573acde 100644 --- a/src/flash/nor/aducm360.c +++ b/src/flash/nor/aducm360.c @@ -79,7 +79,7 @@ static int aducm360_build_sector_list(struct flash_bank *bank) /* sector size is 512 */ bank->num_sectors = bank->size / FLASH_SECTOR_SIZE; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - for (unsigned i = 0; i < bank->num_sectors; ++i) { + for (unsigned int i = 0; i < bank->num_sectors; ++i) { bank->sectors[i].offset = offset; bank->sectors[i].size = FLASH_SECTOR_SIZE; offset += bank->sectors[i].size; diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index b1cb8f110..b86a18da7 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -154,15 +154,15 @@ struct sam3_bank_private { struct sam3_chip *chip; /* so we can find the original bank pointer */ struct flash_bank *bank; - unsigned bank_number; + unsigned int bank_number; uint32_t controller_address; uint32_t base_address; uint32_t flash_wait_states; bool present; - unsigned size_bytes; - unsigned nsectors; - unsigned sector_size; - unsigned page_size; + unsigned int size_bytes; + unsigned int nsectors; + unsigned int sector_size; + unsigned int page_size; }; struct sam3_chip_details { @@ -176,12 +176,12 @@ struct sam3_chip_details { uint32_t chipid_cidr; const char *name; - unsigned n_gpnvms; + unsigned int n_gpnvms; #define SAM3_N_NVM_BITS 3 - unsigned gpnvm[SAM3_N_NVM_BITS]; - unsigned total_flash_size; - unsigned total_sram_size; - unsigned n_banks; + unsigned int gpnvm[SAM3_N_NVM_BITS]; + unsigned int total_flash_size; + unsigned int total_sram_size; + unsigned int n_banks; #define SAM3_MAX_FLASH_BANKS 2 /* these are "initialized" from the global const data */ struct sam3_bank_private bank[SAM3_MAX_FLASH_BANKS]; @@ -2029,7 +2029,7 @@ static int efc_get_result(struct sam3_bank_private *private, uint32_t *v) } static int efc_start_command(struct sam3_bank_private *private, - unsigned command, unsigned argument) + unsigned int command, unsigned int argument) { uint32_t n, v; int r; @@ -2051,7 +2051,7 @@ do_retry: case AT91C_EFC_FCMD_CLB: n = (private->size_bytes / private->page_size); if (argument >= n) - LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n)); + LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n); break; case AT91C_EFC_FCMD_SFB: @@ -2124,8 +2124,8 @@ do_retry: * @param status - put command status bits here */ static int efc_perform_command(struct sam3_bank_private *private, - unsigned command, - unsigned argument, + unsigned int command, + unsigned int argument, uint32_t *status) { @@ -2220,7 +2220,7 @@ static int flashd_erase_entire_bank(struct sam3_bank_private *private) * @param puthere - result stored here. */ /* ------------------------------------------------------------------------------ */ -static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, unsigned *puthere) +static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm, unsigned int *puthere) { uint32_t v; int r; @@ -2261,10 +2261,10 @@ static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, u * @param gpnvm GPNVM index. * @returns 0 if successful; otherwise returns an error code. */ -static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm) +static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm) { int r; - unsigned v; + unsigned int v; LOG_DEBUG("Here"); if (private->bank_number != 0) { @@ -2293,10 +2293,10 @@ static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm) * @param private info about the bank * @param gpnvm GPNVM index. */ -static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned gpnvm) +static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm) { int r; - unsigned v; + unsigned int v; if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); @@ -2346,8 +2346,8 @@ static int flashd_get_lock_bits(struct sam3_bank_private *private, uint32_t *v) */ static int flashd_unlock(struct sam3_bank_private *private, - unsigned start_sector, - unsigned end_sector) + unsigned int start_sector, + unsigned int end_sector) { int r; uint32_t status; @@ -2376,8 +2376,8 @@ static int flashd_unlock(struct sam3_bank_private *private, * @param end_sector - last sector (inclusive) to lock */ static int flashd_lock(struct sam3_bank_private *private, - unsigned start_sector, - unsigned end_sector) + unsigned int start_sector, + unsigned int end_sector) { uint32_t status; uint32_t pg; @@ -2405,8 +2405,8 @@ static int flashd_lock(struct sam3_bank_private *private, static uint32_t sam3_reg_fieldname(struct sam3_chip *chip, const char *regname, uint32_t value, - unsigned shift, - unsigned width) + unsigned int shift, + unsigned int width) { uint32_t v; int hwidth, dwidth; @@ -2491,7 +2491,7 @@ static const char *const sramsize[] = { }; -static const struct archnames { unsigned value; const char *name; } archnames[] = { +static const struct archnames { unsigned int value; const char *name; } archnames[] = { { 0x19, "AT91SAM9xx Series" }, { 0x29, "AT91SAM9XExx Series" }, { 0x34, "AT91x34 Series" }, @@ -2867,8 +2867,8 @@ static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here) r = target_read_u32(chip->target, reg->address, goes_here); if (r != ERROR_OK) { - LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d", - reg->name, (unsigned)(reg->address), r); + LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Err: %d", + reg->name, reg->address, r); } return r; } @@ -2883,8 +2883,8 @@ static int sam3_read_all_regs(struct sam3_chip *chip) r = sam3_read_this_reg(chip, sam3_get_reg_ptr(&(chip->cfg), reg)); if (r != ERROR_OK) { - LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d", - reg->name, ((unsigned)(reg->address)), r); + LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Error: %d", + reg->name, reg->address, r); return r; } reg++; @@ -2951,7 +2951,7 @@ static int sam3_protect_check(struct flash_bank *bank) { int r; uint32_t v = 0; - unsigned x; + unsigned int x; struct sam3_bank_private *private; LOG_DEBUG("Begin"); @@ -3071,7 +3071,7 @@ static int sam3_get_details(struct sam3_bank_private *private) const struct sam3_chip_details *details; struct sam3_chip *chip; struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS]; - unsigned x; + unsigned int x; LOG_DEBUG("Begin"); details = all_sam3_details; @@ -3264,7 +3264,7 @@ static int sam3_protect(struct flash_bank *bank, int set, unsigned int first, } -static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, uint8_t *buf) +static int sam3_page_read(struct sam3_bank_private *private, unsigned int pagenum, uint8_t *buf) { uint32_t adr; int r; @@ -3283,7 +3283,7 @@ static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, u return r; } -static int sam3_page_write(struct sam3_bank_private *private, unsigned pagenum, const uint8_t *buf) +static int sam3_page_write(struct sam3_bank_private *private, unsigned int pagenum, const uint8_t *buf) { uint32_t adr; uint32_t status; @@ -3347,10 +3347,10 @@ static int sam3_write(struct flash_bank *bank, uint32_t count) { int n; - unsigned page_cur; - unsigned page_end; + unsigned int page_cur; + unsigned int page_end; int r; - unsigned page_offset; + unsigned int page_offset; struct sam3_bank_private *private; uint8_t *pagebuffer; @@ -3497,7 +3497,7 @@ COMMAND_HANDLER(sam3_handle_info_command) if (!chip) return ERROR_OK; - unsigned x; + unsigned int x; int r; /* bank0 must exist before we can do anything */ @@ -3549,7 +3549,7 @@ need_define: COMMAND_HANDLER(sam3_handle_gpnvm_command) { - unsigned x, v; + unsigned int x, v; int r, who; struct sam3_chip *chip; diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index 62127530f..26a803784 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -134,15 +134,15 @@ struct sam4_bank_private { struct sam4_chip *chip; /* so we can find the original bank pointer */ struct flash_bank *bank; - unsigned bank_number; + unsigned int bank_number; uint32_t controller_address; uint32_t base_address; uint32_t flash_wait_states; bool present; - unsigned size_bytes; - unsigned nsectors; - unsigned sector_size; - unsigned page_size; + unsigned int size_bytes; + unsigned int nsectors; + unsigned int sector_size; + unsigned int page_size; }; struct sam4_chip_details { @@ -156,12 +156,12 @@ struct sam4_chip_details { uint32_t chipid_cidr; const char *name; - unsigned n_gpnvms; + unsigned int n_gpnvms; #define SAM4_N_NVM_BITS 3 - unsigned gpnvm[SAM4_N_NVM_BITS]; - unsigned total_flash_size; - unsigned total_sram_size; - unsigned n_banks; + unsigned int gpnvm[SAM4_N_NVM_BITS]; + unsigned int total_flash_size; + unsigned int total_sram_size; + unsigned int n_banks; #define SAM4_MAX_FLASH_BANKS 2 /* these are "initialized" from the global const data */ struct sam4_bank_private bank[SAM4_MAX_FLASH_BANKS]; @@ -1479,7 +1479,7 @@ static int efc_get_result(struct sam4_bank_private *private, uint32_t *v) } static int efc_start_command(struct sam4_bank_private *private, - unsigned command, unsigned argument) + unsigned int command, unsigned int argument) { uint32_t n, v; int r; @@ -1501,7 +1501,7 @@ do_retry: case AT91C_EFC_FCMD_CLB: n = (private->size_bytes / private->page_size); if (argument >= n) - LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n)); + LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n); break; case AT91C_EFC_FCMD_SFB: @@ -1574,8 +1574,8 @@ do_retry: * @param status - put command status bits here */ static int efc_perform_command(struct sam4_bank_private *private, - unsigned command, - unsigned argument, + unsigned int command, + unsigned int argument, uint32_t *status) { @@ -1716,7 +1716,7 @@ static int flashd_erase_pages(struct sam4_bank_private *private, * @param puthere - result stored here. */ /* ------------------------------------------------------------------------------ */ -static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, unsigned *puthere) +static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm, unsigned int *puthere) { uint32_t v; int r; @@ -1757,10 +1757,10 @@ static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, u * @param gpnvm GPNVM index. * @returns 0 if successful; otherwise returns an error code. */ -static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm) +static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm) { int r; - unsigned v; + unsigned int v; LOG_DEBUG("Here"); if (private->bank_number != 0) { @@ -1789,10 +1789,10 @@ static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm) * @param private info about the bank * @param gpnvm GPNVM index. */ -static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned gpnvm) +static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm) { int r; - unsigned v; + unsigned int v; if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); @@ -1846,8 +1846,8 @@ static int flashd_get_lock_bits(struct sam4_bank_private *private, uint32_t *v) */ static int flashd_unlock(struct sam4_bank_private *private, - unsigned start_sector, - unsigned end_sector) + unsigned int start_sector, + unsigned int end_sector) { int r; uint32_t status; @@ -1876,8 +1876,8 @@ static int flashd_unlock(struct sam4_bank_private *private, * @param end_sector - last sector (inclusive) to lock */ static int flashd_lock(struct sam4_bank_private *private, - unsigned start_sector, - unsigned end_sector) + unsigned int start_sector, + unsigned int end_sector) { uint32_t status; uint32_t pg; @@ -1905,8 +1905,8 @@ static int flashd_lock(struct sam4_bank_private *private, static uint32_t sam4_reg_fieldname(struct sam4_chip *chip, const char *regname, uint32_t value, - unsigned shift, - unsigned width) + unsigned int shift, + unsigned int width) { uint32_t v; int hwidth, dwidth; @@ -1991,7 +1991,7 @@ static const char *const sramsize[] = { }; -static const struct archnames { unsigned value; const char *name; } archnames[] = { +static const struct archnames { unsigned int value; const char *name; } archnames[] = { { 0x19, "AT91SAM9xx Series" }, { 0x29, "AT91SAM9XExx Series" }, { 0x34, "AT91x34 Series" }, @@ -2374,8 +2374,8 @@ static int sam4_read_this_reg(struct sam4_chip *chip, uint32_t *goes_here) r = target_read_u32(chip->target, reg->address, goes_here); if (r != ERROR_OK) { - LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d", - reg->name, (unsigned)(reg->address), r); + LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Err: %d", + reg->name, reg->address, r); } return r; } @@ -2390,8 +2390,8 @@ static int sam4_read_all_regs(struct sam4_chip *chip) r = sam4_read_this_reg(chip, sam4_get_reg_ptr(&(chip->cfg), reg)); if (r != ERROR_OK) { - LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d", - reg->name, ((unsigned)(reg->address)), r); + LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Error: %d", + reg->name, reg->address, r); return r; } reg++; @@ -2444,7 +2444,7 @@ static int sam4_protect_check(struct flash_bank *bank) { int r; uint32_t v[4] = {0}; - unsigned x; + unsigned int x; struct sam4_bank_private *private; LOG_DEBUG("Begin"); @@ -2557,7 +2557,7 @@ static int sam4_get_details(struct sam4_bank_private *private) const struct sam4_chip_details *details; struct sam4_chip *chip; struct flash_bank *saved_banks[SAM4_MAX_FLASH_BANKS]; - unsigned x; + unsigned int x; LOG_DEBUG("Begin"); details = all_sam4_details; @@ -2796,7 +2796,7 @@ static int sam4_protect(struct flash_bank *bank, int set, unsigned int first, } -static int sam4_page_read(struct sam4_bank_private *private, unsigned pagenum, uint8_t *buf) +static int sam4_page_read(struct sam4_bank_private *private, unsigned int pagenum, uint8_t *buf) { uint32_t adr; int r; @@ -2841,7 +2841,7 @@ static int sam4_set_wait(struct sam4_bank_private *private) return r; } -static int sam4_page_write(struct sam4_bank_private *private, unsigned pagenum, const uint8_t *buf) +static int sam4_page_write(struct sam4_bank_private *private, unsigned int pagenum, const uint8_t *buf) { uint32_t adr; uint32_t status; @@ -2891,10 +2891,10 @@ static int sam4_write(struct flash_bank *bank, uint32_t count) { int n; - unsigned page_cur; - unsigned page_end; + unsigned int page_cur; + unsigned int page_end; int r; - unsigned page_offset; + unsigned int page_offset; struct sam4_bank_private *private; uint8_t *pagebuffer; @@ -3045,7 +3045,7 @@ COMMAND_HANDLER(sam4_handle_info_command) if (!chip) return ERROR_OK; - unsigned x; + unsigned int x; int r; /* bank0 must exist before we can do anything */ @@ -3097,7 +3097,7 @@ need_define: COMMAND_HANDLER(sam4_handle_gpnvm_command) { - unsigned x, v; + unsigned int x, v; int r, who; struct sam4_chip *chip; diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c index 36298f19d..0f7b0bb30 100644 --- a/src/flash/nor/at91samd.c +++ b/src/flash/nor/at91samd.c @@ -365,7 +365,7 @@ static const struct samd_family *samd_find_family(uint32_t id) uint8_t family = SAMD_GET_FAMILY(id); uint8_t series = SAMD_GET_SERIES(id); - for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(samd_families); i++) { if (samd_families[i].processor == processor && samd_families[i].series == series && samd_families[i].family == family) @@ -387,7 +387,7 @@ static const struct samd_part *samd_find_part(uint32_t id) if (!family) return NULL; - for (unsigned i = 0; i < family->num_parts; i++) { + for (unsigned int i = 0; i < family->num_parts; i++) { if (family->parts[i].id == devsel) return &family->parts[i]; } diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c index 1d1ec02b3..7ce42b2da 100644 --- a/src/flash/nor/ath79.c +++ b/src/flash/nor/ath79.c @@ -513,7 +513,7 @@ static int ath79_erase(struct flash_bank *bank, unsigned int first, if (ath79_info->dev->erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; - for (unsigned sector = first; sector <= last; sector++) { + for (unsigned int sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { LOG_ERROR("Flash sector %u protected", sector); return ERROR_FAIL; diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c index a6ac9060a..f34958fdb 100644 --- a/src/flash/nor/atsame5.c +++ b/src/flash/nor/atsame5.c @@ -224,7 +224,7 @@ static const struct samd_family *samd_find_family(uint32_t id) uint8_t family = SAMD_GET_FAMILY(id); uint8_t series = SAMD_GET_SERIES(id); - for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(samd_families); i++) { if (samd_families[i].processor == processor && samd_families[i].series == series && samd_families[i].family == family) @@ -246,7 +246,7 @@ static const struct samd_part *samd_find_part(uint32_t id) if (!family) return NULL; - for (unsigned i = 0; i < family->num_parts; i++) { + for (unsigned int i = 0; i < family->num_parts; i++) { if (family->parts[i].id == devsel) return &family->parts[i]; } diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c index 24c432cba..d6d8938b6 100644 --- a/src/flash/nor/atsamv.c +++ b/src/flash/nor/atsamv.c @@ -55,8 +55,8 @@ struct samv_flash_bank { bool probed; - unsigned size_bytes; - unsigned gpnvm[SAMV_NUM_GPNVM_BITS]; + unsigned int size_bytes; + unsigned int gpnvm[SAMV_NUM_GPNVM_BITS]; }; /* The actual sector size of the SAMV7 flash memory is 128K bytes. @@ -82,7 +82,7 @@ static int samv_efc_get_result(struct target *target, uint32_t *v) } static int samv_efc_start_command(struct target *target, - unsigned command, unsigned argument) + unsigned int command, unsigned int argument) { uint32_t v; samv_efc_get_status(target, &v); @@ -100,7 +100,7 @@ static int samv_efc_start_command(struct target *target, } static int samv_efc_perform_command(struct target *target, - unsigned command, unsigned argument, uint32_t *status) + unsigned int command, unsigned int argument, uint32_t *status) { int r; uint32_t v; @@ -166,7 +166,7 @@ static int samv_erase_pages(struct target *target, first_page | erase_pages, status); } -static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out) +static int samv_get_gpnvm(struct target *target, unsigned int gpnvm, unsigned int *out) { uint32_t v; int r; @@ -190,10 +190,10 @@ static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out) return r; } -static int samv_clear_gpnvm(struct target *target, unsigned gpnvm) +static int samv_clear_gpnvm(struct target *target, unsigned int gpnvm) { int r; - unsigned v; + unsigned int v; if (gpnvm >= SAMV_NUM_GPNVM_BITS) { LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS); @@ -209,10 +209,10 @@ static int samv_clear_gpnvm(struct target *target, unsigned gpnvm) return r; } -static int samv_set_gpnvm(struct target *target, unsigned gpnvm) +static int samv_set_gpnvm(struct target *target, unsigned int gpnvm) { int r; - unsigned v; + unsigned int v; if (gpnvm >= SAMV_NUM_GPNVM_BITS) { LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS); return ERROR_FAIL; @@ -231,7 +231,7 @@ static int samv_set_gpnvm(struct target *target, unsigned gpnvm) } static int samv_flash_unlock(struct target *target, - unsigned start_sector, unsigned end_sector) + unsigned int start_sector, unsigned int end_sector) { int r; uint32_t status; @@ -251,7 +251,7 @@ static int samv_flash_unlock(struct target *target, } static int samv_flash_lock(struct target *target, - unsigned start_sector, unsigned end_sector) + unsigned int start_sector, unsigned int end_sector) { uint32_t status; uint32_t pg; @@ -419,7 +419,7 @@ static int samv_protect(struct flash_bank *bank, int set, unsigned int first, } static int samv_page_read(struct target *target, - unsigned page_num, uint8_t *buf) + unsigned int page_num, uint8_t *buf) { uint32_t addr = SAMV_FLASH_BASE + page_num * SAMV_PAGE_SIZE; int r = target_read_memory(target, addr, 4, SAMV_PAGE_SIZE / 4, buf); @@ -430,7 +430,7 @@ static int samv_page_read(struct target *target, } static int samv_page_write(struct target *target, - unsigned pagenum, const uint8_t *buf) + unsigned int pagenum, const uint8_t *buf) { uint32_t status; const uint32_t addr = SAMV_FLASH_BASE + pagenum * SAMV_PAGE_SIZE; @@ -618,7 +618,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command) return ERROR_COMMAND_SYNTAX_ERROR; } - unsigned v = 0; + unsigned int v = 0; if (!strcmp("show", CMD_ARGV[0])) { if (who == -1) { showall: diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 78bc91e7d..2a15e4913 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -806,7 +806,7 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char ** } bank->driver_priv = cfi_info; - for (unsigned i = 6; i < argc; i++) { + for (unsigned int i = 6; i < argc; i++) { if (strcmp(argv[i], "x16_as_x8") == 0) cfi_info->x16_as_x8 = true; else if (strcmp(argv[i], "data_swap") == 0) @@ -2219,8 +2219,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u uint8_t current_word[CFI_MAX_BUS_WIDTH]; int retval; - LOG_DEBUG("reading buffer of %i byte at 0x%8.8x", - (int)count, (unsigned)offset); + LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32, count, offset); if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h index ec7f47403..3a76d98ef 100644 --- a/src/flash/nor/cfi.h +++ b/src/flash/nor/cfi.h @@ -58,10 +58,10 @@ struct cfi_flash_bank { void *alt_ext; /* calculated timeouts */ - unsigned word_write_timeout; - unsigned buf_write_timeout; - unsigned block_erase_timeout; - unsigned chip_erase_timeout; + unsigned int word_write_timeout; + unsigned int buf_write_timeout; + unsigned int block_erase_timeout; + unsigned int chip_erase_timeout; /* memory accessors */ int (*write_mem)(struct flash_bank *bank, target_addr_t addr, diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c index 5e6c97152..5c4f2acca 100644 --- a/src/flash/nor/core.c +++ b/src/flash/nor/core.c @@ -164,7 +164,7 @@ int default_flash_verify(struct flash_bank *bank, void flash_bank_add(struct flash_bank *bank) { /* put flash bank in linked list */ - unsigned bank_num = 0; + unsigned int bank_num = 0; if (flash_banks) { /* find last flash bank */ struct flash_bank *p = flash_banks; @@ -242,8 +242,8 @@ void flash_free_all_banks(void) struct flash_bank *get_flash_bank_by_name_noprobe(const char *name) { - unsigned requested = get_flash_name_index(name); - unsigned found = 0; + unsigned int requested = get_flash_name_index(name); + unsigned int found = 0; struct flash_bank *bank; for (bank = flash_banks; bank; bank = bank->next) { diff --git a/src/flash/nor/core.h b/src/flash/nor/core.h index ff175a132..f8cf5e269 100644 --- a/src/flash/nor/core.h +++ b/src/flash/nor/core.h @@ -250,7 +250,7 @@ int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank); * @param bank On output, contains a pointer to the bank or NULL. * @returns ERROR_OK on success, or an error indicating the problem. */ -COMMAND_HELPER(flash_command_get_bank, unsigned name_index, +COMMAND_HELPER(flash_command_get_bank, unsigned int name_index, struct flash_bank **bank); /** * Retrieves @a bank from a command argument, reporting errors parsing diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c index 34359889a..dd9995ecb 100644 --- a/src/flash/nor/drivers.c +++ b/src/flash/nor/drivers.c @@ -91,7 +91,7 @@ static const struct flash_driver * const flash_drivers[] = { const struct flash_driver *flash_driver_find_by_name(const char *name) { - for (unsigned i = 0; flash_drivers[i]; i++) { + for (unsigned int i = 0; flash_drivers[i]; i++) { if (strcmp(name, flash_drivers[i]->name) == 0) return flash_drivers[i]; } diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c index 9191764a9..6c4e8a928 100644 --- a/src/flash/nor/fespi.c +++ b/src/flash/nor/fespi.c @@ -531,7 +531,7 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer, bin_size = sizeof(riscv64_bin); } - unsigned data_wa_size = 0; + unsigned int data_wa_size = 0; if (target_alloc_working_area(target, bin_size, &algorithm_wa) == ERROR_OK) { retval = target_write_buffer(target, algorithm_wa->address, bin_size, bin); diff --git a/src/flash/nor/fm4.c b/src/flash/nor/fm4.c index 979ae84d0..2db79ef50 100644 --- a/src/flash/nor/fm4.c +++ b/src/flash/nor/fm4.c @@ -107,7 +107,7 @@ static int fm4_flash_erase(struct flash_bank *bank, unsigned int first, struct working_area *workarea; struct reg_param reg_params[4]; struct armv7m_algorithm armv7m_algo; - unsigned i; + unsigned int i; int retval; const uint8_t erase_sector_code[] = { #include "../../../contrib/loaders/flash/fm4/erase.inc" @@ -207,7 +207,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, struct armv7m_algorithm armv7m_algo; uint32_t halfword_count = DIV_ROUND_UP(byte_count, 2); uint32_t result; - unsigned i; + unsigned int i; int retval, retval2 = ERROR_OK; const uint8_t write_block_code[] = { #include "../../../contrib/loaders/flash/fm4/write.inc" diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 2d0a75334..2f88b9c1f 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -256,7 +256,7 @@ struct kinetis_flash_bank { struct kinetis_chip *k_chip; bool probed; - unsigned bank_number; /* bank number in particular chip */ + unsigned int bank_number; /* bank number in particular chip */ struct flash_bank *bank; uint32_t sector_size; @@ -285,9 +285,9 @@ struct kinetis_chip { uint32_t fcfg2_maxaddr0_shifted; uint32_t fcfg2_maxaddr1_shifted; - unsigned num_pflash_blocks, num_nvm_blocks; - unsigned pflash_sector_size, nvm_sector_size; - unsigned max_flash_prog_size; + unsigned int num_pflash_blocks, num_nvm_blocks; + unsigned int pflash_sector_size, nvm_sector_size; + unsigned int max_flash_prog_size; uint32_t pflash_base; uint32_t pflash_size; @@ -337,7 +337,7 @@ struct kinetis_chip { char name[40]; - unsigned num_banks; + unsigned int num_banks; struct kinetis_flash_bank banks[KINETIS_MAX_BANKS]; }; @@ -425,7 +425,7 @@ static int kinetis_probe_chip_s32k(struct kinetis_chip *k_chip); static int kinetis_auto_probe(struct flash_bank *bank); -static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value) +static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value) { LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value); @@ -453,7 +453,7 @@ static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint3 return ERROR_OK; } -static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result) +static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result) { struct adiv5_ap *ap = dap_get_ap(dap, MDM_AP); if (!ap) { @@ -479,7 +479,7 @@ static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32 return ERROR_OK; } -static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, +static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value, uint32_t timeout_ms) { uint32_t val; @@ -977,7 +977,7 @@ static void kinetis_free_driver_priv(struct flash_bank *bank) static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) { - unsigned num_blocks; + unsigned int num_blocks; struct kinetis_flash_bank *k_bank; struct flash_bank *bank; char base_name[69], name[87], num[11]; @@ -1463,7 +1463,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) uint32_t fprot = 0xffffffff; uint8_t fsec = 0xfe; /* set MCU unsecure */ uint8_t fdprot = 0xff; - unsigned num_blocks; + unsigned int num_blocks; uint32_t pflash_bit; uint8_t dflash_bit; struct flash_bank *bank_iter; @@ -2269,12 +2269,12 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) uint32_t ee_size = 0; uint32_t pflash_size_k, nvm_size_k, dflash_size_k; uint32_t pflash_size_m; - unsigned num_blocks = 0; - unsigned maxaddr_shift = 13; + unsigned int num_blocks = 0; + unsigned int maxaddr_shift = 13; struct target *target = k_chip->target; - unsigned familyid = 0, subfamid = 0; - unsigned cpu_mhz = 120; + unsigned int familyid = 0, subfamid = 0; + unsigned int cpu_mhz = 120; bool use_nvm_marking = false; char flash_marking[12], nvm_marking[2]; char name[40]; @@ -2895,7 +2895,7 @@ static int kinetis_probe(struct flash_bank *bank) { int result; uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1; - unsigned num_blocks, first_nvm_bank; + unsigned int num_blocks, first_nvm_bank; uint32_t size_k; struct kinetis_flash_bank *k_bank = bank->driver_priv; struct kinetis_chip *k_chip; @@ -2940,7 +2940,7 @@ static int kinetis_probe(struct flash_bank *bank) } else if (k_bank->bank_number < num_blocks) { /* nvm, banks start at address 0x10000000 */ - unsigned nvm_ord = k_bank->bank_number - first_nvm_bank; + unsigned int nvm_ord = k_bank->bank_number - first_nvm_bank; uint32_t limit; k_bank->flash_class = FC_FLEX_NVM; @@ -3139,8 +3139,8 @@ static int kinetis_blank_check(struct flash_bank *bank) COMMAND_HANDLER(kinetis_nvm_partition) { int result; - unsigned bank_idx; - unsigned num_blocks, first_nvm_bank; + unsigned int bank_idx; + unsigned int num_blocks, first_nvm_bank; unsigned long par, log2 = 0, ee1 = 0, ee2 = 0; enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO; bool enable; diff --git a/src/flash/nor/kinetis_ke.c b/src/flash/nor/kinetis_ke.c index c069f3ac8..e4dffa6d5 100644 --- a/src/flash/nor/kinetis_ke.c +++ b/src/flash/nor/kinetis_ke.c @@ -134,7 +134,7 @@ struct kinetis_ke_flash_bank { #define MDM_ACCESS_TIMEOUT 3000 /* iterations */ -static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value) +static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value) { LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value); @@ -161,7 +161,7 @@ static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, ui return ERROR_OK; } -static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result) +static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result) { struct adiv5_ap *ap = dap_get_ap(dap, 1); if (!ap) { @@ -187,7 +187,7 @@ static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uin return ERROR_OK; } -static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value) +static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value) { uint32_t val; int retval; diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c index 59a14af8b..267fd4312 100644 --- a/src/flash/nor/max32xxx.c +++ b/src/flash/nor/max32xxx.c @@ -202,14 +202,14 @@ static int max32xxx_protect_check(struct flash_bank *bank) return ERROR_FLASH_BANK_NOT_PROBED; if (!info->max326xx) { - for (unsigned i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = -1; return ERROR_FLASH_OPER_UNSUPPORTED; } /* Check the protection */ - for (unsigned i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i%32 == 0) target_read_u32(target, info->flc_base + FLSH_PROT + ((i/32)*4), &temp_reg); @@ -360,7 +360,7 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer, struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; /* power of two, and multiple of word size */ - static const unsigned buf_min = 128; + static const unsigned int buf_min = 128; /* for small buffers it's faster not to download an algorithm */ if (wcount * 4 < buf_min) @@ -388,8 +388,8 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer, return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)", - target_name(target), (unsigned) buffer_size); + LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")", + target_name(target), buffer_size); } target_write_buffer(target, write_algorithm->address, sizeof(write_code), @@ -903,7 +903,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command) } LOG_WARNING("s: a:
p:"); - for (unsigned i = 0; i < bank->num_sectors; i += 4) { + for (unsigned int i = 0; i < bank->num_sectors; i += 4) { LOG_WARNING("s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d", (i+0), (i+0)*info->sector_size, bank->sectors[(i+0)].is_protected, (i+1), (i+1)*info->sector_size, bank->sectors[(i+1)].is_protected, diff --git a/src/flash/nor/ocl.c b/src/flash/nor/ocl.c index e00c365ed..61af908f5 100644 --- a/src/flash/nor/ocl.c +++ b/src/flash/nor/ocl.c @@ -160,7 +160,7 @@ static int ocl_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer); if (retval != ERROR_OK) { free(dcc_buffer); - return retval; + return retval; } /* wait for response, fixed timeout of 1 s */ diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c index 407efbcab..e8c901950 100644 --- a/src/flash/nor/psoc5lp.c +++ b/src/flash/nor/psoc5lp.c @@ -102,10 +102,10 @@ struct psoc5lp_device { uint32_t id; - unsigned fam; - unsigned speed_mhz; - unsigned flash_kb; - unsigned eeprom_kb; + unsigned int fam; + unsigned int speed_mhz; + unsigned int flash_kb; + unsigned int eeprom_kb; }; /* @@ -245,7 +245,7 @@ static int psoc5lp_find_device(struct target *target, const struct psoc5lp_device **device) { uint32_t device_id; - unsigned i; + unsigned int i; int retval; *device = NULL; @@ -381,9 +381,9 @@ static int psoc5lp_spc_load_byte(struct target *target, } static int psoc5lp_spc_load_row(struct target *target, - uint8_t array_id, const uint8_t *data, unsigned row_size) + uint8_t array_id, const uint8_t *data, unsigned int row_size) { - unsigned i; + unsigned int i; int retval; retval = psoc5lp_spc_write_opcode(target, SPC_LOAD_ROW); @@ -853,7 +853,7 @@ static int psoc5lp_eeprom_write(struct flash_bank *bank, { struct target *target = bank->target; uint8_t temp[2]; - unsigned row; + unsigned int row; int retval; if (offset % EEPROM_ROW_SIZE != 0) { @@ -1124,7 +1124,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer, struct working_area *code_area, *even_row_area, *odd_row_area; uint32_t row_size; uint8_t temp[2], buf[12], ecc_bytes[ROW_ECC_SIZE]; - unsigned array_id, row; + unsigned int array_id, row; int i, retval; if (offset + byte_count > bank->size) { @@ -1183,7 +1183,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer, row < ROWS_PER_BLOCK && byte_count > 0; row++) { bool even_row = (row % 2 == 0); struct working_area *data_area = even_row ? even_row_area : odd_row_area; - unsigned len = MIN(ROW_SIZE, byte_count); + unsigned int len = MIN(ROW_SIZE, byte_count); LOG_DEBUG("Writing load command for array %u row %u at " TARGET_ADDR_FMT, array_id, row, data_area->address); @@ -1307,8 +1307,8 @@ static int psoc5lp_protect_check(struct flash_bank *bank) { struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv; uint8_t row_data[ROW_SIZE]; - const unsigned protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8; - unsigned i, k, num_sectors; + const unsigned int protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8; + unsigned int i, k, num_sectors; int retval; if (bank->target->state != TARGET_HALTED) { diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c index 47f3ac698..662910aa0 100644 --- a/src/flash/nor/psoc6.c +++ b/src/flash/nor/psoc6.c @@ -487,7 +487,7 @@ static int psoc6_get_info(struct flash_bank *bank, struct command_invocation *cm { struct psoc6_target_info *psoc6_info = bank->driver_priv; - if (psoc6_info->is_probed == false) + if (!psoc6_info->is_probed) return ERROR_FAIL; int hr = get_silicon_id(bank->target, &psoc6_info->silicon_id, &psoc6_info->protection); diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c index 42550d06b..58d7913c2 100644 --- a/src/flash/nor/sim3x.c +++ b/src/flash/nor/sim3x.c @@ -859,7 +859,7 @@ static int sim3x_flash_info(struct flash_bank *bank, struct command_invocation * * reg 3:2 - register * reg 1:0 - no effect */ -static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value) +static int ap_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value) { LOG_DEBUG("DAP_REG[0x%02x] <- %08" PRIX32, reg, value); @@ -886,7 +886,7 @@ static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value return ERROR_OK; } -static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result) +static int ap_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result) { struct adiv5_ap *ap = dap_get_ap(dap, SIM3X_AP); if (!ap) { @@ -912,7 +912,7 @@ static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *resul return ERROR_OK; } -static int ap_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value, int timeout) +static int ap_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value, int timeout) { uint32_t val; int retval; diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c index eab6244d4..1f53b2f35 100644 --- a/src/flash/nor/stellaris.c +++ b/src/flash/nor/stellaris.c @@ -530,7 +530,7 @@ static void stellaris_set_flash_timing(struct flash_bank *bank) target_write_u32(target, SCB_BASE | USECRL, usecrl); } -static const unsigned rcc_xtal[32] = { +static const unsigned int rcc_xtal[32] = { [0x00] = 1000000, /* no pll */ [0x01] = 1843200, /* no pll */ [0x02] = 2000000, /* no pll */ @@ -569,7 +569,7 @@ static void stellaris_read_clock_info(struct flash_bank *bank) struct stellaris_flash_bank *stellaris_info = bank->driver_priv; struct target *target = bank->target; uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc; - unsigned xtal; + unsigned int xtal; unsigned long mainfreq; target_read_u32(target, SCB_BASE | RCC, &rcc); @@ -1029,7 +1029,7 @@ static int stellaris_write_block(struct flash_bank *bank, int retval = ERROR_OK; /* power of two, and multiple of word size */ - static const unsigned buf_min = 128; + static const unsigned int buf_min = 128; /* for small buffers it's faster not to download an algorithm */ if (wcount * 4 < buf_min) @@ -1056,8 +1056,8 @@ static int stellaris_write_block(struct flash_bank *bank, target_free_working_area(target, write_algorithm); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)", - target_name(target), (unsigned) buffer_size); + LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")", + target_name(target), buffer_size); } target_write_buffer(target, write_algorithm->address, diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 9235dd787..d66a83dd3 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -717,7 +717,8 @@ struct range { }; static void bitmap_to_ranges(unsigned long *bitmap, unsigned int nbits, - struct range *ranges, unsigned int *ranges_count) { + struct range *ranges, unsigned int *ranges_count) +{ *ranges_count = 0; bool last_bit = 0, cur_bit; for (unsigned int i = 0; i < nbits; i++) { diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c index 15edd1a10..a19b1a683 100644 --- a/src/flash/nor/tcl.c +++ b/src/flash/nor/tcl.c @@ -36,7 +36,7 @@ COMMAND_HELPER(flash_command_get_bank_probe_optional, unsigned int name_index, if (*bank) return ERROR_OK; - unsigned bank_num; + unsigned int bank_num; COMMAND_PARSE_NUMBER(uint, name, bank_num); if (do_probe) { @@ -48,7 +48,7 @@ COMMAND_HELPER(flash_command_get_bank_probe_optional, unsigned int name_index, } } -COMMAND_HELPER(flash_command_get_bank, unsigned name_index, +COMMAND_HELPER(flash_command_get_bank, unsigned int name_index, struct flash_bank **bank) { return CALL_COMMAND_HANDLER(flash_command_get_bank_probe_optional, @@ -518,7 +518,7 @@ COMMAND_HANDLER(handle_flash_fill_command) uint64_t pattern; uint32_t count; struct target *target = get_current_target(CMD_CTX); - unsigned i; + unsigned int i; uint32_t wordsize; int retval; @@ -1317,7 +1317,7 @@ COMMAND_HANDLER(handle_flash_banks_command) if (CMD_ARGC != 0) return ERROR_COMMAND_SYNTAX_ERROR; - unsigned n = 0; + unsigned int n = 0; for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) { command_print(CMD, "#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", " "buswidth %u, chipwidth %u", p->bank_number, diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c index e01d2df0a..00ee77bb8 100644 --- a/src/flash/nor/tms470.c +++ b/src/flash/nor/tms470.c @@ -16,7 +16,7 @@ * ---------------------------------------------------------------------- */ struct tms470_flash_bank { - unsigned ordinal; + unsigned int ordinal; /* device identification register */ uint32_t device_ident_reg; @@ -239,8 +239,8 @@ static int tms470_read_part_info(struct flash_bank *bank) break; default: - LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", - (unsigned)part_number); + LOG_WARNING("Could not identify part 0x%02" PRIx32 " as a member of the TMS470 family.", + part_number); return ERROR_FLASH_OPERATION_FAILED; } @@ -391,7 +391,7 @@ static int tms470_try_flash_keys(struct target *target, const uint32_t *key_set) /* only perform the key match when 3VSTAT is clear */ target_read_u32(target, 0xFFE8BC0C, &fmmstat); if (!(fmmstat & 0x08)) { - unsigned i; + unsigned int i; uint32_t fmbptr, fmbac2, orig_fmregopt; target_write_u32(target, 0xFFE8BC04, fmmstat & ~0x07); @@ -455,7 +455,7 @@ static int tms470_unlock_flash(struct flash_bank *bank) { struct target *target = bank->target; const uint32_t *p_key_sets[5]; - unsigned i, key_set_count; + unsigned int i, key_set_count; if (keys_set) { key_set_count = 5; diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c index 1d67b0943..4011fa42b 100644 --- a/src/flash/nor/xcf.c +++ b/src/flash/nor/xcf.c @@ -143,28 +143,27 @@ static int isc_enter(struct flash_bank *bank) struct xcf_status status = read_status(bank); - if (true == status.isc_mode) + if (status.isc_mode) return ERROR_OK; - else { - struct scan_field scan; - scan.check_mask = NULL; - scan.check_value = NULL; - scan.num_bits = 16; - scan.out_value = cmd_isc_enable; - scan.in_value = NULL; + struct scan_field scan; - jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); - jtag_execute_queue(); + scan.check_mask = NULL; + scan.check_value = NULL; + scan.num_bits = 16; + scan.out_value = cmd_isc_enable; + scan.in_value = NULL; - status = read_status(bank); - if (!status.isc_mode) { - LOG_ERROR("*** XCF: FAILED to enter ISC mode"); - return ERROR_FLASH_OPERATION_FAILED; - } + jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); + jtag_execute_queue(); - return ERROR_OK; + status = read_status(bank); + if (!status.isc_mode) { + LOG_ERROR("*** XCF: FAILED to enter ISC mode"); + return ERROR_FLASH_OPERATION_FAILED; } + + return ERROR_OK; } static int isc_leave(struct flash_bank *bank) @@ -174,27 +173,26 @@ static int isc_leave(struct flash_bank *bank) if (!status.isc_mode) return ERROR_OK; - else { - struct scan_field scan; - scan.check_mask = NULL; - scan.check_value = NULL; - scan.num_bits = 16; - scan.out_value = cmd_isc_disable; - scan.in_value = NULL; + struct scan_field scan; - jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); - jtag_execute_queue(); - alive_sleep(1); /* device needs 50 uS to leave ISC mode */ + scan.check_mask = NULL; + scan.check_value = NULL; + scan.num_bits = 16; + scan.out_value = cmd_isc_disable; + scan.in_value = NULL; - status = read_status(bank); - if (status.isc_mode) { - LOG_ERROR("*** XCF: FAILED to leave ISC mode"); - return ERROR_FLASH_OPERATION_FAILED; - } + jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); + jtag_execute_queue(); + alive_sleep(1); /* device needs 50 uS to leave ISC mode */ - return ERROR_OK; + status = read_status(bank); + if (status.isc_mode) { + LOG_ERROR("*** XCF: FAILED to leave ISC mode"); + return ERROR_FLASH_OPERATION_FAILED; } + + return ERROR_OK; } static int sector_state(uint8_t wrpt, int sector) diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c index 6e30fc125..4aa97a912 100644 --- a/src/flash/nor/xmc1xxx.c +++ b/src/flash/nor/xmc1xxx.c @@ -84,7 +84,7 @@ static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first, struct working_area *workarea; struct reg_param reg_params[3]; struct armv7m_algorithm armv7m_algo; - unsigned i; + unsigned int i; int retval; const uint8_t erase_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/erase.inc" @@ -159,7 +159,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank) struct reg_param reg_params[3]; struct armv7m_algorithm armv7m_algo; uint16_t val; - unsigned i; + unsigned int i; int retval; const uint8_t erase_check_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/erase_check.inc" @@ -245,7 +245,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, struct reg_param reg_params[4]; struct armv7m_algorithm armv7m_algo; uint32_t block_count = DIV_ROUND_UP(byte_count, NVM_BLOCK_SIZE); - unsigned i; + unsigned int i; int retval; const uint8_t write_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/write.inc" diff --git a/src/helper/align.h b/src/helper/align.h index 935a6a3b2..d7170065e 100644 --- a/src/helper/align.h +++ b/src/helper/align.h @@ -24,7 +24,7 @@ #define IS_PWR_OF_2(x) \ ({ \ typeof(x) _x = (x); \ - _x == 0 || (_x & (_x - 1)) == 0; \ + _x != 0 && (_x & (_x - 1)) == 0; \ }) #endif /* OPENOCD_HELPER_ALIGN_H */ diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index a7ca5af9d..6fba86a66 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -40,7 +40,7 @@ static const char hex_digits[] = { 'a', 'b', 'c', 'd', 'e', 'f' }; -void *buf_cpy(const void *from, void *_to, unsigned size) +void *buf_cpy(const void *from, void *_to, unsigned int size) { if (!from || !_to) return NULL; @@ -49,7 +49,7 @@ void *buf_cpy(const void *from, void *_to, unsigned size) memcpy(_to, from, DIV_ROUND_UP(size, 8)); /* mask out bits that don't belong to the buffer */ - unsigned trailing_bits = size % 8; + unsigned int trailing_bits = size % 8; if (trailing_bits) { uint8_t *to = _to; to[size / 8] &= (1 << trailing_bits) - 1; @@ -61,22 +61,22 @@ static bool buf_eq_masked(uint8_t a, uint8_t b, uint8_t m) { return (a & m) == (b & m); } -static bool buf_eq_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned trailing) +static bool buf_eq_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned int trailing) { uint8_t mask = (1 << trailing) - 1; return buf_eq_masked(a, b, mask & m); } -bool buf_eq(const void *_buf1, const void *_buf2, unsigned size) +bool buf_eq(const void *_buf1, const void *_buf2, unsigned int size) { if (!_buf1 || !_buf2) return _buf1 == _buf2; - unsigned last = size / 8; + unsigned int last = size / 8; if (memcmp(_buf1, _buf2, last) != 0) return false; - unsigned trailing = size % 8; + unsigned int trailing = size % 8; if (!trailing) return true; @@ -85,24 +85,24 @@ bool buf_eq(const void *_buf1, const void *_buf2, unsigned size) } bool buf_eq_mask(const void *_buf1, const void *_buf2, - const void *_mask, unsigned size) + const void *_mask, unsigned int size) { if (!_buf1 || !_buf2) return _buf1 == _buf2 && _buf1 == _mask; const uint8_t *buf1 = _buf1, *buf2 = _buf2, *mask = _mask; - unsigned last = size / 8; - for (unsigned i = 0; i < last; i++) { + unsigned int last = size / 8; + for (unsigned int i = 0; i < last; i++) { if (!buf_eq_masked(buf1[i], buf2[i], mask[i])) return false; } - unsigned trailing = size % 8; + unsigned int trailing = size % 8; if (!trailing) return true; return buf_eq_trailing(buf1[last], buf2[last], mask[last], trailing); } -void *buf_set_ones(void *_buf, unsigned size) +void *buf_set_ones(void *_buf, unsigned int size) { uint8_t *buf = _buf; if (!buf) @@ -110,19 +110,19 @@ void *buf_set_ones(void *_buf, unsigned size) memset(buf, 0xff, size / 8); - unsigned trailing_bits = size % 8; + unsigned int trailing_bits = size % 8; if (trailing_bits) buf[size / 8] = (1 << trailing_bits) - 1; return buf; } -void *buf_set_buf(const void *_src, unsigned src_start, - void *_dst, unsigned dst_start, unsigned len) +void *buf_set_buf(const void *_src, unsigned int src_start, + void *_dst, unsigned int dst_start, unsigned int len) { const uint8_t *src = _src; uint8_t *dst = _dst; - unsigned i, sb, db, sq, dq, lb, lq; + unsigned int i, sb, db, sq, dq, lb, lq; sb = src_start / 8; db = dst_start / 8; @@ -175,13 +175,13 @@ uint32_t flip_u32(uint32_t value, unsigned int num) return c; } -char *buf_to_hex_str(const void *_buf, unsigned buf_len) +char *buf_to_hex_str(const void *_buf, unsigned int buf_len) { - unsigned len_bytes = DIV_ROUND_UP(buf_len, 8); + unsigned int len_bytes = DIV_ROUND_UP(buf_len, 8); char *str = calloc(len_bytes * 2 + 1, 1); const uint8_t *buf = _buf; - for (unsigned i = 0; i < len_bytes; i++) { + for (unsigned int i = 0; i < len_bytes; i++) { uint8_t tmp = buf[len_bytes - i - 1]; if ((i == 0) && (buf_len % 8)) tmp &= (0xff >> (8 - (buf_len % 8))); @@ -289,8 +289,8 @@ void bit_copy_queue_init(struct bit_copy_queue *q) INIT_LIST_HEAD(&q->list); } -int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned dst_offset, const uint8_t *src, - unsigned src_offset, unsigned bit_count) +int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned int dst_offset, const uint8_t *src, + unsigned int src_offset, unsigned int bit_count) { struct bit_copy_queue_entry *qe = malloc(sizeof(*qe)); if (!qe) @@ -395,12 +395,12 @@ size_t hexify(char *hex, const uint8_t *bin, size_t count, size_t length) return i; } -void buffer_shr(void *_buf, unsigned buf_len, unsigned count) +void buffer_shr(void *_buf, unsigned int buf_len, unsigned int count) { - unsigned i; + unsigned int i; unsigned char *buf = _buf; - unsigned bytes_to_remove; - unsigned shift; + unsigned int bytes_to_remove; + unsigned int shift; bytes_to_remove = count / 8; shift = count - (bytes_to_remove * 8); diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h index ed13b980f..99132798b 100644 --- a/src/helper/binarybuffer.h +++ b/src/helper/binarybuffer.h @@ -32,7 +32,7 @@ * @param value Up to 32 bits that will be copied to _buffer. */ static inline void buf_set_u32(uint8_t *_buffer, - unsigned first, unsigned num, uint32_t value) + unsigned int first, unsigned int num, uint32_t value) { assert(num >= 1 && num <= 32); uint8_t *buffer = _buffer; @@ -43,7 +43,7 @@ static inline void buf_set_u32(uint8_t *_buffer, buffer[1] = (value >> 8) & 0xff; buffer[0] = (value >> 0) & 0xff; } else { - for (unsigned i = first; i < first + num; i++) { + for (unsigned int i = first; i < first + num; i++) { if (((value >> (i - first)) & 1) == 1) buffer[i / 8] |= 1 << (i % 8); else @@ -63,7 +63,7 @@ static inline void buf_set_u32(uint8_t *_buffer, * @param value Up to 64 bits that will be copied to _buffer. */ static inline void buf_set_u64(uint8_t *_buffer, - unsigned first, unsigned num, uint64_t value) + unsigned int first, unsigned int num, uint64_t value) { assert(num >= 1 && num <= 64); uint8_t *buffer = _buffer; @@ -83,7 +83,7 @@ static inline void buf_set_u64(uint8_t *_buffer, buffer[1] = (value >> 8) & 0xff; buffer[0] = (value >> 0) & 0xff; } else { - for (unsigned i = first; i < first + num; i++) { + for (unsigned int i = first; i < first + num; i++) { if (((value >> (i - first)) & 1) == 1) buffer[i / 8] |= 1 << (i % 8); else @@ -102,7 +102,7 @@ static inline void buf_set_u64(uint8_t *_buffer, * @returns Up to 32-bits that were read from @c _buffer. */ static inline uint32_t buf_get_u32(const uint8_t *_buffer, - unsigned first, unsigned num) + unsigned int first, unsigned int num) { assert(num >= 1 && num <= 32); const uint8_t *buffer = _buffer; @@ -114,7 +114,7 @@ static inline uint32_t buf_get_u32(const uint8_t *_buffer, (((uint32_t)buffer[0]) << 0); } else { uint32_t result = 0; - for (unsigned i = first; i < first + num; i++) { + for (unsigned int i = first; i < first + num; i++) { if (((buffer[i / 8] >> (i % 8)) & 1) == 1) result |= 1U << (i - first); } @@ -132,7 +132,7 @@ static inline uint32_t buf_get_u32(const uint8_t *_buffer, * @returns Up to 64-bits that were read from @c _buffer. */ static inline uint64_t buf_get_u64(const uint8_t *_buffer, - unsigned first, unsigned num) + unsigned int first, unsigned int num) { assert(num >= 1 && num <= 64); const uint8_t *buffer = _buffer; @@ -153,7 +153,7 @@ static inline uint64_t buf_get_u64(const uint8_t *_buffer, (((uint64_t)buffer[0]) << 0)); } else { uint64_t result = 0; - for (unsigned i = first; i < first + num; i++) { + for (unsigned int i = first; i < first + num; i++) { if (((buffer[i / 8] >> (i % 8)) & 1) == 1) result = result | ((uint64_t)1 << (uint64_t)(i - first)); } @@ -170,11 +170,11 @@ static inline uint64_t buf_get_u64(const uint8_t *_buffer, * @param width The number of bits in value (2-32). * @returns A 32-bit word with @c value in reversed bit-order. */ -uint32_t flip_u32(uint32_t value, unsigned width); +uint32_t flip_u32(uint32_t value, unsigned int width); -bool buf_eq(const void *buf1, const void *buf2, unsigned size); +bool buf_eq(const void *buf1, const void *buf2, unsigned int size); bool buf_eq_mask(const void *buf1, const void *buf2, - const void *mask, unsigned size); + const void *mask, unsigned int size); /** * Copies @c size bits out of @c from and into @c to. Any extra @@ -183,7 +183,7 @@ bool buf_eq_mask(const void *buf1, const void *buf2, * @param to The buffer that will receive the copy of @c from. * @param size The number of bits to copy. */ -void *buf_cpy(const void *from, void *to, unsigned size); +void *buf_cpy(const void *from, void *to, unsigned int size); /** * Set the contents of @c buf with @c count bits, all set to 1. @@ -191,10 +191,10 @@ void *buf_cpy(const void *from, void *to, unsigned size); * @param size The number of bits. * @returns The original buffer (@c buf). */ -void *buf_set_ones(void *buf, unsigned size); +void *buf_set_ones(void *buf, unsigned int size); -void *buf_set_buf(const void *src, unsigned src_start, - void *dst, unsigned dst_start, unsigned len); +void *buf_set_buf(const void *src, unsigned int src_start, + void *dst, unsigned int dst_start, unsigned int len); /** * Parse an unsigned number (provided as a zero-terminated string) @@ -207,7 +207,7 @@ void *buf_set_buf(const void *src, unsigned src_start, */ int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize); -char *buf_to_hex_str(const void *buf, unsigned size); +char *buf_to_hex_str(const void *buf, unsigned int size); /* read a uint32_t from a buffer in target memory endianness */ static inline uint32_t fast_target_buffer_get_u32(const void *p, bool le) @@ -215,8 +215,8 @@ static inline uint32_t fast_target_buffer_get_u32(const void *p, bool le) return le ? le_to_h_u32(p) : be_to_h_u32(p); } -static inline void bit_copy(uint8_t *dst, unsigned dst_offset, const uint8_t *src, - unsigned src_offset, unsigned bit_count) +static inline void bit_copy(uint8_t *dst, unsigned int dst_offset, const uint8_t *src, + unsigned int src_offset, unsigned int bit_count) { buf_set_buf(src, src_offset, dst, dst_offset, bit_count); } @@ -227,16 +227,16 @@ struct bit_copy_queue { struct bit_copy_queue_entry { uint8_t *dst; - unsigned dst_offset; + unsigned int dst_offset; const uint8_t *src; - unsigned src_offset; - unsigned bit_count; + unsigned int src_offset; + unsigned int bit_count; struct list_head list; }; void bit_copy_queue_init(struct bit_copy_queue *q); -int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned dst_offset, const uint8_t *src, - unsigned src_offset, unsigned bit_count); +int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned int dst_offset, const uint8_t *src, + unsigned int src_offset, unsigned int bit_count); void bit_copy_execute(struct bit_copy_queue *q); void bit_copy_discard(struct bit_copy_queue *q); @@ -244,6 +244,6 @@ void bit_copy_discard(struct bit_copy_queue *q); * used in ti-icdi driver and gdb server */ size_t unhexify(uint8_t *bin, const char *hex, size_t count); size_t hexify(char *hex, const uint8_t *bin, size_t count, size_t out_maxlen); -void buffer_shr(void *_buf, unsigned buf_len, unsigned count); +void buffer_shr(void *_buf, unsigned int buf_len, unsigned int count); #endif /* OPENOCD_HELPER_BINARYBUFFER_H */ diff --git a/src/helper/command.c b/src/helper/command.c index 907869325..d90d34141 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -58,7 +58,7 @@ void *jimcmd_privdata(Jim_Cmd *cmd) return cmd->isproc ? NULL : cmd->u.native.privData; } -static void tcl_output(void *privData, const char *file, unsigned line, +static void tcl_output(void *privData, const char *file, unsigned int line, const char *function, const char *string) { struct log_capture_state *state = privData; @@ -144,7 +144,7 @@ static void script_debug(Jim_Interp *interp, unsigned int argc, Jim_Obj * const return; char *dbg = alloc_printf("command -"); - for (unsigned i = 0; i < argc; i++) { + for (unsigned int i = 0; i < argc; i++) { const char *w = Jim_GetString(argv[i], NULL); char *t = alloc_printf("%s %s", dbg, w); free(dbg); @@ -288,7 +288,7 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix, struct target *override_target) { int retval = ERROR_OK; - unsigned i; + unsigned int i; for (i = 0; cmds[i].name || cmds[i].chain; i++) { const struct command_registration *cr = cmds + i; @@ -323,7 +323,7 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix, } } if (retval != ERROR_OK) { - for (unsigned j = 0; j < i; j++) + for (unsigned int j = 0; j < i; j++) unregister_command(cmd_ctx, cmd_prefix, cmds[j].name); } return retval; @@ -728,12 +728,12 @@ static COMMAND_HELPER(command_help_show_list, bool show_help, const char *cmd_ma #define HELP_LINE_WIDTH(_n) (int)(76 - (2 * _n)) -static void command_help_show_indent(unsigned n) +static void command_help_show_indent(unsigned int n) { - for (unsigned i = 0; i < n; i++) + for (unsigned int i = 0; i < n; i++) LOG_USER_N(" "); } -static void command_help_show_wrap(const char *str, unsigned n, unsigned n2) +static void command_help_show_wrap(const char *str, unsigned int n, unsigned int n2) { const char *cp = str, *last = str; while (*cp) { @@ -1317,7 +1317,7 @@ DEFINE_PARSE_NUM_TYPE(_llong, long long, strtoll, LLONG_MIN, LLONG_MAX) #define DEFINE_PARSE_ULONGLONG(name, type, min, max) \ DEFINE_PARSE_WRAPPER(name, type, min, max, unsigned long long, _ullong) -DEFINE_PARSE_ULONGLONG(_uint, unsigned, 0, UINT_MAX) +DEFINE_PARSE_ULONGLONG(_uint, unsigned int, 0, UINT_MAX) DEFINE_PARSE_ULONGLONG(_u64, uint64_t, 0, UINT64_MAX) DEFINE_PARSE_ULONGLONG(_u32, uint32_t, 0, UINT32_MAX) DEFINE_PARSE_ULONGLONG(_u16, uint16_t, 0, UINT16_MAX) diff --git a/src/helper/command.h b/src/helper/command.h index b224bd022..18fe56178 100644 --- a/src/helper/command.h +++ b/src/helper/command.h @@ -77,7 +77,7 @@ struct command_invocation { struct command_context *ctx; struct command *current; const char *name; - unsigned argc; + unsigned int argc; const char **argv; Jim_Obj * const *jimtcl_argv; Jim_Obj *output; @@ -414,7 +414,7 @@ int parse_llong(const char *str, long long *ul); #define DECLARE_PARSE_WRAPPER(name, type) \ int parse ## name(const char *str, type * ul) -DECLARE_PARSE_WRAPPER(_uint, unsigned); +DECLARE_PARSE_WRAPPER(_uint, unsigned int); DECLARE_PARSE_WRAPPER(_u64, uint64_t); DECLARE_PARSE_WRAPPER(_u32, uint32_t); DECLARE_PARSE_WRAPPER(_u16, uint16_t); diff --git a/src/helper/configuration.h b/src/helper/configuration.h index 295ea591d..d646670eb 100644 --- a/src/helper/configuration.h +++ b/src/helper/configuration.h @@ -11,6 +11,7 @@ #ifndef OPENOCD_HELPER_CONFIGURATION_H #define OPENOCD_HELPER_CONFIGURATION_H +#include #include int parse_cmdline_args(struct command_context *cmd_ctx, diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc index b74cda85f..53d0355c1 100644 --- a/src/helper/jep106.inc +++ b/src/helper/jep106.inc @@ -8,7 +8,7 @@ * identification code list, please visit the JEDEC website at www.jedec.org . */ -/* This file is aligned to revision JEP106BJ.01 July 2024. */ +/* This file is aligned to revision JEP106BK September 2024. */ [0][0x01 - 1] = "AMD", [0][0x02 - 1] = "AMI", @@ -177,7 +177,7 @@ [1][0x27 - 1] = "Cabletron", [1][0x28 - 1] = "STEC (Silicon Tech)", [1][0x29 - 1] = "Vanguard", -[1][0x2a - 1] = "Hagiwara Sys-Com", +[1][0x2a - 1] = "Hagiwara Solutions Co Ltd", [1][0x2b - 1] = "Vantis", [1][0x2c - 1] = "Celestica", [1][0x2d - 1] = "Century", @@ -1373,7 +1373,7 @@ [10][0x65 - 1] = "Esperanto Technologies", [10][0x66 - 1] = "JinSheng Electronic (Shenzhen) Co Ltd", [10][0x67 - 1] = "Shenzhen Shi Bolunshuai Technology", -[10][0x68 - 1] = "Shanghai Rui Zuan Information Tech", +[10][0x68 - 1] = "Shanghai Rui Xuan Information Tech", [10][0x69 - 1] = "Fraunhofer IIS", [10][0x6a - 1] = "Kandou Bus SA", [10][0x6b - 1] = "Acer", @@ -1653,9 +1653,9 @@ [13][0x03 - 1] = "Shenzhen Feisrike Technology Co Ltd", [13][0x04 - 1] = "Shenzhen Sunhome Electronics Co Ltd", [13][0x05 - 1] = "Global Mixed-mode Technology Inc", -[13][0x06 - 1] = "Shenzhen Weien Electronics Co. Ltd.", +[13][0x06 - 1] = "Shenzhen Weien Electronics Co Ltd.", [13][0x07 - 1] = "Shenzhen Cooyes Technology Co Ltd", -[13][0x08 - 1] = "Keymos Electronics Co., Limited", +[13][0x08 - 1] = "ShenZhen ChaoYing ZhiNeng Technology", [13][0x09 - 1] = "E-Rockic Technology Company Limited", [13][0x0a - 1] = "Aerospace Science Memory Shenzhen", [13][0x0b - 1] = "Shenzhen Quanji Technology Co Ltd", @@ -1898,7 +1898,7 @@ [14][0x7a - 1] = "Cornelis Networks Inc", [14][0x7b - 1] = "WingSemi Technologies Co Ltd", [14][0x7c - 1] = "ForwardEdge ASIC", -[14][0x7d - 1] = "Beijing Future Imprint Technology Co Ltd", +[14][0x7d - 1] = "Beijing Future Signet Technology Co Ltd", [14][0x7e - 1] = "Fine Made Microelectronics Group Co Ltd", [15][0x01 - 1] = "Changxin Memory Technology (Shanghai)", [15][0x02 - 1] = "Synconv", @@ -1919,7 +1919,7 @@ [15][0x11 - 1] = "Guangzhou Beimu Technology Co., Ltd", [15][0x12 - 1] = "Rays Semiconductor Nanjing Co Ltd", [15][0x13 - 1] = "Milli-Centi Intelligence Technology Jiangsu", -[15][0x14 - 1] = "Zilia Technologioes", +[15][0x14 - 1] = "Zilia Technologies", [15][0x15 - 1] = "Incore Semiconductors", [15][0x16 - 1] = "Kinetic Technologies", [15][0x17 - 1] = "Nanjing Houmo Technology Co Ltd", @@ -1963,4 +1963,57 @@ [15][0x3d - 1] = "Shenzhen Titan Micro Electronics Co Ltd", [15][0x3e - 1] = "Shenzhen Macroflash Technology Co Ltd", [15][0x3f - 1] = "Advantech Group", +[15][0x40 - 1] = "Shenzhen Xingjiachen Electronics Co Ltd", +[15][0x41 - 1] = "CHUQI", +[15][0x42 - 1] = "Dongguan Liesun Trading Co Ltd", +[15][0x43 - 1] = "Shenzhen Miuman Technology Co Ltd", +[15][0x44 - 1] = "Shenzhen Techwinsemi Technology Twsc", +[15][0x45 - 1] = "Encharge AI Inc", +[15][0x46 - 1] = "Shenzhen Zhenchuang Electronics Co Ltd", +[15][0x47 - 1] = "Giant Chip Co. Ltd", +[15][0x48 - 1] = "Shenzhen Runner Semiconductor Co Ltd", +[15][0x49 - 1] = "Scalinx", +[15][0x4a - 1] = "Shenzhen Lanqi Electronics Co Ltd", +[15][0x4b - 1] = "CoreComm Technology Co Ltd", +[15][0x4c - 1] = "DLI Memory", +[15][0x4d - 1] = "Shenzhen Fidat Technology Co Ltd", +[15][0x4e - 1] = "Hubei Yangtze Mason Semiconductor Tech", +[15][0x4f - 1] = "Flastor", +[15][0x50 - 1] = "PIRATEMAN", +[15][0x51 - 1] = "Barrie Technologies Co Ltd", +[15][0x52 - 1] = "Dynacard Co Ltd", +[15][0x53 - 1] = "Rivian Automotive", +[15][0x54 - 1] = "Shenzhen Fidat Technology Co Ltd", +[15][0x55 - 1] = "Zhejang Weiming Semiconductor Co Ltd", +[15][0x56 - 1] = "Shenzhen Xinhua Micro Technology Co Ltd", +[15][0x57 - 1] = "Duvonn Electronic Technology Co Ltd", +[15][0x58 - 1] = "Shenzhen Xinchang Technology Co Ltd", +[15][0x59 - 1] = "Leidos", +[15][0x5a - 1] = "Keepixo", +[15][0x5b - 1] = "Applied Brain Research Inc", +[15][0x5c - 1] = "Maxio Technology (Hangzhou) Co Ltd", +[15][0x5d - 1] = "HK DCHIP Technology Limited", +[15][0x5e - 1] = "Hitachi-LG Data Storage", +[15][0x5f - 1] = "Shenzhen Huadian Communication Co Ltd", +[15][0x60 - 1] = "Achieve Memory Technology (Suzhou) Co", +[15][0x61 - 1] = "Shenzhen Think Future Semiconductor Co", +[15][0x62 - 1] = "Innosilicon", +[15][0x63 - 1] = "Shenzhen Weilida Technology Co Ltd", +[15][0x64 - 1] = "Agrade Storage (Shenzhen) Co Ltd", +[15][0x65 - 1] = "Shenzhen Worldshine Data Technology Co", +[15][0x66 - 1] = "Mindgrove Technologies", +[15][0x67 - 1] = "BYD Semiconductor Co Ltd", +[15][0x68 - 1] = "Chipsine Semiconductor (Suzhou) Co Ltd", +[15][0x69 - 1] = "Shen Zhen Shi Xun He Shi Ji Dian Zi You", +[15][0x6a - 1] = "Shenzhen Jindacheng Computer Co Ltd", +[15][0x6b - 1] = "Shenzhen Baina Haichuan Technology Co", +[15][0x6c - 1] = "Shanghai Hengshi Electronic Technology", +[15][0x6d - 1] = "Beijing Boyu Tuxian Technology Co Ltd", +[15][0x6e - 1] = "China Chips Star Semiconductor Co Ltd", +[15][0x6f - 1] = "Shenzhen Shenghuacan Technology Co", +[15][0x70 - 1] = "Kinara Inc", +[15][0x71 - 1] = "TRASNA Semiconductor", +[15][0x72 - 1] = "KEYSOM", +[15][0x73 - 1] = "Shenzhen YYF Info Tech Co Ltd", +[15][0x74 - 1] = "Sharetronics Data Technology Co Ltd", /* EOF */ diff --git a/src/helper/jim-nvp.c b/src/helper/jim-nvp.c index e1ab64ae5..cdd4d3429 100644 --- a/src/helper/jim-nvp.c +++ b/src/helper/jim-nvp.c @@ -21,6 +21,7 @@ #endif #include "jim-nvp.h" +#include #include int jim_get_nvp(Jim_Interp *interp, diff --git a/src/helper/log.c b/src/helper/log.c index 471069ade..9ad00ce62 100644 --- a/src/helper/log.c +++ b/src/helper/log.c @@ -53,7 +53,7 @@ static const char * const log_strings[6] = { static int count; /* forward the log to the listeners */ -static void log_forward(const char *file, unsigned line, const char *function, const char *string) +static void log_forward(const char *file, unsigned int line, const char *function, const char *string) { struct log_callback *cb, *next; cb = log_callbacks; @@ -133,7 +133,7 @@ static void log_puts(enum log_levels level, void log_printf(enum log_levels level, const char *file, - unsigned line, + unsigned int line, const char *function, const char *format, ...) @@ -156,7 +156,7 @@ void log_printf(enum log_levels level, va_end(ap); } -void log_vprintf_lf(enum log_levels level, const char *file, unsigned line, +void log_vprintf_lf(enum log_levels level, const char *file, unsigned int line, const char *function, const char *format, va_list args) { char *tmp; @@ -182,7 +182,7 @@ void log_vprintf_lf(enum log_levels level, const char *file, unsigned line, void log_printf_lf(enum log_levels level, const char *file, - unsigned line, + unsigned int line, const char *function, const char *format, ...) @@ -505,7 +505,7 @@ void log_socket_error(const char *socket_desc) * Find the first non-printable character in the char buffer, return a pointer to it. * If no such character exists, return NULL. */ -char *find_nonprint_char(char *buf, unsigned buf_len) +const char *find_nonprint_char(const char *buf, unsigned int buf_len) { for (unsigned int i = 0; i < buf_len; i++) { if (!isprint(buf[i])) diff --git a/src/helper/log.h b/src/helper/log.h index d52c05f99..dc8df6fbb 100644 --- a/src/helper/log.h +++ b/src/helper/log.h @@ -48,12 +48,12 @@ enum log_levels { LOG_LVL_DEBUG_IO = 4, }; -void log_printf(enum log_levels level, const char *file, unsigned line, +void log_printf(enum log_levels level, const char *file, unsigned int line, const char *function, const char *format, ...) __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6))); -void log_vprintf_lf(enum log_levels level, const char *file, unsigned line, +void log_vprintf_lf(enum log_levels level, const char *file, unsigned int line, const char *function, const char *format, va_list args); -void log_printf_lf(enum log_levels level, const char *file, unsigned line, +void log_printf_lf(enum log_levels level, const char *file, unsigned int line, const char *function, const char *format, ...) __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6))); @@ -73,7 +73,7 @@ void busy_sleep(uint64_t ms); void log_socket_error(const char *socket_desc); -typedef void (*log_callback_fn)(void *priv, const char *file, unsigned line, +typedef void (*log_callback_fn)(void *priv, const char *file, unsigned int line, const char *function, const char *string); struct log_callback { @@ -89,7 +89,7 @@ char *alloc_vprintf(const char *fmt, va_list ap); char *alloc_printf(const char *fmt, ...) __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 1, 2))); -char *find_nonprint_char(char *buf, unsigned buf_len); +const char *find_nonprint_char(const char *buf, unsigned int buf_len); extern int debug_level; diff --git a/src/helper/replacements.h b/src/helper/replacements.h index 6e30b628b..ecc0e5e95 100644 --- a/src/helper/replacements.h +++ b/src/helper/replacements.h @@ -111,7 +111,7 @@ size_t strnlen(const char *s, size_t maxlen); #ifndef HAVE_USLEEP #ifdef _WIN32 -static inline unsigned usleep(unsigned int usecs) +static inline unsigned int usleep(unsigned int usecs) { Sleep((usecs/1000)); return 0; diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c index bbf1cb3d2..996a23f1f 100644 --- a/src/jtag/adapter.c +++ b/src/jtag/adapter.c @@ -401,7 +401,7 @@ COMMAND_HANDLER(adapter_transports_command) retval = allow_transports(CMD_CTX, (const char **)transports); if (retval != ERROR_OK) { - for (unsigned i = 0; transports[i]; i++) + for (unsigned int i = 0; transports[i]; i++) free(transports[i]); free(transports); } @@ -414,7 +414,7 @@ COMMAND_HANDLER(handle_adapter_list_command) return ERROR_COMMAND_SYNTAX_ERROR; command_print(CMD, "The following debug adapters are available:"); - for (unsigned i = 0; adapter_drivers[i]; i++) { + for (unsigned int i = 0; adapter_drivers[i]; i++) { const char *name = adapter_drivers[i]->name; command_print(CMD, "%u: %s", i + 1, name); } @@ -436,7 +436,7 @@ COMMAND_HANDLER(handle_adapter_driver_command) if (CMD_ARGC != 1 || CMD_ARGV[0][0] == '\0') return ERROR_COMMAND_SYNTAX_ERROR; - for (unsigned i = 0; adapter_drivers[i]; i++) { + for (unsigned int i = 0; adapter_drivers[i]; i++) { if (strcmp(CMD_ARGV[0], adapter_drivers[i]->name) != 0) continue; @@ -684,7 +684,7 @@ COMMAND_HANDLER(handle_adapter_srst_delay_command) if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; if (CMD_ARGC == 1) { - unsigned delay; + unsigned int delay; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay); jtag_set_nsrst_delay(delay); @@ -698,7 +698,7 @@ COMMAND_HANDLER(handle_adapter_srst_pulse_width_command) if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; if (CMD_ARGC == 1) { - unsigned width; + unsigned int width; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], width); jtag_set_nsrst_assert_width(width); @@ -714,7 +714,7 @@ COMMAND_HANDLER(handle_adapter_speed_command) int retval = ERROR_OK; if (CMD_ARGC == 1) { - unsigned khz = 0; + unsigned int khz = 0; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz); retval = adapter_config_khz(khz); diff --git a/src/jtag/core.c b/src/jtag/core.c index a6f38a19d..907883f09 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -224,7 +224,7 @@ static void jtag_tap_add(struct jtag_tap *t) } /* returns a pointer to the n-th device in the scan chain */ -struct jtag_tap *jtag_tap_by_position(unsigned n) +struct jtag_tap *jtag_tap_by_position(unsigned int n) { struct jtag_tap *t = jtag_all_taps(); @@ -246,7 +246,7 @@ struct jtag_tap *jtag_tap_by_string(const char *s) } /* no tap found by name, so try to parse the name as a number */ - unsigned n; + unsigned int n; if (parse_uint(s, &n) != ERROR_OK) return NULL; @@ -1473,10 +1473,9 @@ void jtag_tap_init(struct jtag_tap *tap) jtag_tap_add(tap); LOG_DEBUG("Created Tap: %s @ abs position %u, " - "irlen %u, capture: 0x%x mask: 0x%x", tap->dotted_name, + "irlen %u, capture: 0x%" PRIx32 " mask: 0x%" PRIx32, tap->dotted_name, tap->abs_chain_position, tap->ir_length, - (unsigned) tap->ir_capture_value, - (unsigned) tap->ir_capture_mask); + tap->ir_capture_value, tap->ir_capture_mask); } void jtag_tap_free(struct jtag_tap *tap) diff --git a/src/jtag/drivers/am335xgpio.c b/src/jtag/drivers/am335xgpio.c index cfe41c3be..9bb7ea7d1 100644 --- a/src/jtag/drivers/am335xgpio.c +++ b/src/jtag/drivers/am335xgpio.c @@ -275,10 +275,10 @@ static int am335xgpio_swdio_read(void) return get_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO]); } -static int am335xgpio_blink(int on) +static int am335xgpio_blink(bool on) { if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED])) - set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED], on); + set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED], on ? 1 : 0); return ERROR_OK; } diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c index ff10b0a78..2c2061dae 100644 --- a/src/jtag/drivers/bcm2835gpio.c +++ b/src/jtag/drivers/bcm2835gpio.c @@ -31,16 +31,28 @@ static off_t bcm2835_peri_base = 0x20000000; #define BCM2835_GPIO_MODE_OUTPUT 1 /* GPIO setup macros */ -#define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7) -#define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while (0) -#define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as necessary */ \ - INP_GPIO(g); \ - *(pio_base+((g)/10)) |= ((m)<<(((g)%10)*3)); } while (0) +#define MODE_GPIO(_g) ({ \ + typeof(_g) g = (_g); \ + *(pio_base + (g / 10)) >> ((g % 10) * 3) & 7; \ +}) + +#define INP_GPIO(_g) do { \ + typeof(_g) g1 = (_g); \ + *(pio_base + (g1 / 10)) &= ~(7 << ((g1 % 10) * 3)); \ +} while (0) + +#define SET_MODE_GPIO(_g, m) do { \ + typeof(_g) g = (_g); \ + /* clear the mode bits first, then set as necessary */ \ + INP_GPIO(g); \ + *(pio_base + (g / 10)) |= ((m) << ((g % 10) * 3)); \ +} while (0) + #define OUT_GPIO(g) SET_MODE_GPIO(g, BCM2835_GPIO_MODE_OUTPUT) -#define GPIO_SET (*(pio_base+7)) /* sets bits which are 1, ignores bits which are 0 */ -#define GPIO_CLR (*(pio_base+10)) /* clears bits which are 1, ignores bits which are 0 */ -#define GPIO_LEV (*(pio_base+13)) /* current level of the pin */ +#define GPIO_SET (*(pio_base + 7)) /* sets bits which are 1, ignores bits which are 0 */ +#define GPIO_CLR (*(pio_base + 10)) /* clears bits which are 1, ignores bits which are 0 */ +#define GPIO_LEV (*(pio_base + 13)) /* current level of the pin */ static int dev_mem_fd; static volatile uint32_t *pio_base = MAP_FAILED; @@ -175,7 +187,6 @@ static bb_value_t bcm2835gpio_read(void) unsigned int shift = adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].gpio_num; uint32_t value = (GPIO_LEV >> shift) & 1; return value ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].active_low ? BB_HIGH : BB_LOW); - } static int bcm2835gpio_write(int tck, int tms, int tdi) @@ -408,10 +419,10 @@ static void bcm2835gpio_munmap(void) } } -static int bcm2835gpio_blink(int on) +static int bcm2835gpio_blink(bool on) { if (is_gpio_config_valid(ADAPTER_GPIO_IDX_LED)) - set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED], on); + set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED], on ? 1 : 0); return ERROR_OK; } diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c index e41659263..42234a6f7 100644 --- a/src/jtag/drivers/bitbang.c +++ b/src/jtag/drivers/bitbang.c @@ -92,13 +92,13 @@ static int bitbang_state_move(int skip) */ static int bitbang_execute_tms(struct jtag_command *cmd) { - unsigned num_bits = cmd->cmd.tms->num_bits; + unsigned int num_bits = cmd->cmd.tms->num_bits; const uint8_t *bits = cmd->cmd.tms->bits; LOG_DEBUG_IO("TMS: %u bits", num_bits); int tms = 0; - for (unsigned i = 0; i < num_bits; i++) { + for (unsigned int i = 0; i < num_bits; i++) { tms = ((bits[i/8] >> (i % 8)) & 1); if (bitbang_interface->write(0, tms, 0) != ERROR_OK) return ERROR_FAIL; @@ -193,10 +193,10 @@ static int bitbang_stableclocks(unsigned int num_cycles) } static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, - unsigned scan_size) + unsigned int scan_size) { tap_state_t saved_end_state = tap_get_end_state(); - unsigned bit_cnt; + unsigned int bit_cnt; if (!((!ir_scan && (tap_get_state() == TAP_DRSHIFT)) || @@ -254,7 +254,7 @@ static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, if (type != SCAN_OUT && bitbang_interface->buf_size && (buffered == bitbang_interface->buf_size || bit_cnt == scan_size - 1)) { - for (unsigned i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) { + for (unsigned int i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) { switch (bitbang_interface->read_sample()) { case BB_LOW: buffer[i/8] &= ~(1 << (i % 8)); @@ -309,7 +309,7 @@ int bitbang_execute_queue(struct jtag_command *cmd_queue) retval = ERROR_OK; if (bitbang_interface->blink) { - if (bitbang_interface->blink(1) != ERROR_OK) + if (bitbang_interface->blink(true) != ERROR_OK) return ERROR_FAIL; } @@ -377,7 +377,7 @@ int bitbang_execute_queue(struct jtag_command *cmd_queue) cmd = cmd->next; } if (bitbang_interface->blink) { - if (bitbang_interface->blink(0) != ERROR_OK) + if (bitbang_interface->blink(false) != ERROR_OK) return ERROR_FAIL; } @@ -396,7 +396,7 @@ static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, u { if (bitbang_interface->blink) { /* FIXME: we should manage errors */ - bitbang_interface->blink(1); + bitbang_interface->blink(true); } for (unsigned int i = offset; i < bit_cnt + offset; i++) { @@ -418,7 +418,7 @@ static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, u if (bitbang_interface->blink) { /* FIXME: we should manage errors */ - bitbang_interface->blink(0); + bitbang_interface->blink(false); } } diff --git a/src/jtag/drivers/bitbang.h b/src/jtag/drivers/bitbang.h index dc941796e..82405eb8a 100644 --- a/src/jtag/drivers/bitbang.h +++ b/src/jtag/drivers/bitbang.h @@ -45,7 +45,7 @@ struct bitbang_interface { int (*write)(int tck, int tms, int tdi); /** Blink led (optional). */ - int (*blink)(int on); + int (*blink)(bool on); /** Sample SWDIO and return the value. */ int (*swdio_read)(void); diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c index b01a79644..6f8df5ada 100644 --- a/src/jtag/drivers/buspirate.c +++ b/src/jtag/drivers/buspirate.c @@ -1442,7 +1442,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del data); switch (ack) { - case SWD_ACK_OK: + case SWD_ACK_OK: if (parity != parity_u32(data)) { LOG_DEBUG("Read data parity mismatch %x %x", parity, parity_u32(data)); queued_retval = ERROR_FAIL; @@ -1453,15 +1453,15 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del if (cmd & SWD_CMD_APNDP) buspirate_swd_idle_clocks(ap_delay_clk); return; - case SWD_ACK_WAIT: + case SWD_ACK_WAIT: LOG_DEBUG("SWD_ACK_WAIT"); buspirate_swd_clear_sticky_errors(); return; - case SWD_ACK_FAULT: + case SWD_ACK_FAULT: LOG_DEBUG("SWD_ACK_FAULT"); queued_retval = ack; return; - default: + default: LOG_DEBUG("No valid acknowledge: ack=%d", ack); queued_retval = ack; return; @@ -1500,19 +1500,19 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del value); switch (ack) { - case SWD_ACK_OK: + case SWD_ACK_OK: if (cmd & SWD_CMD_APNDP) buspirate_swd_idle_clocks(ap_delay_clk); return; - case SWD_ACK_WAIT: + case SWD_ACK_WAIT: LOG_DEBUG("SWD_ACK_WAIT"); buspirate_swd_clear_sticky_errors(); return; - case SWD_ACK_FAULT: + case SWD_ACK_FAULT: LOG_DEBUG("SWD_ACK_FAULT"); queued_retval = ack; return; - default: + default: LOG_DEBUG("No valid acknowledge: ack=%d", ack); queued_retval = ack; return; diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c index a6dcfcd3d..2f776cb38 100644 --- a/src/jtag/drivers/cmsis_dap.c +++ b/src/jtag/drivers/cmsis_dap.c @@ -563,7 +563,7 @@ static int cmsis_dap_cmd_dap_delay(uint16_t delay_us) static int cmsis_dap_metacmd_targetsel(uint32_t instance_id) { uint8_t *command = cmsis_dap_handle->command; - const uint32_t SEQ_RD = 0x80, SEQ_WR = 0x00; + const uint32_t seq_rd = 0x80, seq_wr = 0x00; /* SWD multi-drop requires a transfer ala CMD_DAP_TFER, but with no expectation of an SWD ACK response. In @@ -579,14 +579,14 @@ static int cmsis_dap_metacmd_targetsel(uint32_t instance_id) command[idx++] = 3; /* sequence count */ /* sequence 0: packet request for TARGETSEL */ - command[idx++] = SEQ_WR | 8; + command[idx++] = seq_wr | 8; command[idx++] = SWD_CMD_START | swd_cmd(false, false, DP_TARGETSEL) | SWD_CMD_STOP | SWD_CMD_PARK; /* sequence 1: read Trn ACK Trn, no expectation for target to ACK */ - command[idx++] = SEQ_RD | 5; + command[idx++] = seq_rd | 5; /* sequence 2: WDATA plus parity */ - command[idx++] = SEQ_WR | (32 + 1); + command[idx++] = seq_wr | (32 + 1); h_u32_to_le(command + idx, instance_id); idx += 4; command[idx++] = parity_u32(instance_id); @@ -2153,7 +2153,7 @@ COMMAND_HANDLER(cmsis_dap_handle_cmd_command) { uint8_t *command = cmsis_dap_handle->command; - for (unsigned i = 0; i < CMD_ARGC; i++) + for (unsigned int i = 0; i < CMD_ARGC; i++) COMMAND_PARSE_NUMBER(u8, CMD_ARGV[i], command[i]); int retval = cmsis_dap_xfer(cmsis_dap_handle, CMD_ARGC); @@ -2185,7 +2185,7 @@ COMMAND_HANDLER(cmsis_dap_handle_vid_pid_command) CMD_ARGC -= 1; } - unsigned i; + unsigned int i; for (i = 0; i < CMD_ARGC; i += 2) { COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i], cmsis_dap_vid[i >> 1]); COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], cmsis_dap_pid[i >> 1]); diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c index 2aad4a0c1..d52a345a0 100644 --- a/src/jtag/drivers/driver.c +++ b/src/jtag/drivers/driver.c @@ -234,7 +234,7 @@ int interface_jtag_add_tlr(void) return ERROR_OK; } -int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state) +int interface_add_tms_seq(unsigned int num_bits, const uint8_t *seq, enum tap_state state) { struct jtag_command *cmd; diff --git a/src/jtag/drivers/dummy.c b/src/jtag/drivers/dummy.c index 1b1e57392..4fe598fe3 100644 --- a/src/jtag/drivers/dummy.c +++ b/src/jtag/drivers/dummy.c @@ -72,7 +72,7 @@ static int dummy_reset(int trst, int srst) return ERROR_OK; } -static int dummy_led(int on) +static int dummy_led(bool on) { return ERROR_OK; } diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c index a4d072cd7..6dc130493 100644 --- a/src/jtag/drivers/ft232r.c +++ b/src/jtag/drivers/ft232r.c @@ -177,7 +177,7 @@ static void ft232r_increase_buf_size(size_t new_buf_size) */ static void ft232r_write(int tck, int tms, int tdi) { - unsigned out_value = (1<cmd.tms->num_bits; + unsigned int num_bits = cmd->cmd.tms->num_bits; const uint8_t *bits = cmd->cmd.tms->bits; LOG_DEBUG_IO("TMS: %u bits", num_bits); int tms = 0; - for (unsigned i = 0; i < num_bits; i++) { + for (unsigned int i = 0; i < num_bits; i++) { tms = ((bits[i/8] >> (i % 8)) & 1); ft232r_write(0, tms, 0); ft232r_write(1, tms, 0); diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c index 66d0d501a..e3bf4610a 100644 --- a/src/jtag/drivers/ftdi.c +++ b/src/jtag/drivers/ftdi.c @@ -396,7 +396,7 @@ static void ftdi_execute_runtest(struct jtag_command *cmd) unsigned int i = cmd->cmd.runtest->num_cycles; while (i > 0) { /* there are no state transitions in this code, so omit state tracking */ - unsigned this_len = i > 7 ? 7 : i; + unsigned int this_len = i > 7 ? 7 : i; DO_CLOCK_TMS_CS_OUT(mpsse_ctx, &zero, 0, this_len, false, ftdi_jtag_mode); i -= this_len; } @@ -450,7 +450,7 @@ static void ftdi_execute_pathmove(struct jtag_command *cmd) tap_state_name(path[num_states-1])); int state_count = 0; - unsigned bit_count = 0; + unsigned int bit_count = 0; uint8_t tms_byte = 0; LOG_DEBUG_IO("-"); @@ -519,7 +519,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd) ftdi_end_state(cmd->cmd.scan->end_state); struct scan_field *field = cmd->cmd.scan->fields; - unsigned scan_size = 0; + unsigned int scan_size = 0; for (unsigned int i = 0; i < cmd->cmd.scan->num_fields; i++, field++) { scan_size += field->num_bits; @@ -652,7 +652,7 @@ static void ftdi_execute_stableclocks(struct jtag_command *cmd) * the correct level and remain there during the scan */ while (num_cycles > 0) { /* there are no state transitions in this code, so omit state tracking */ - unsigned this_len = num_cycles > 7 ? 7 : num_cycles; + unsigned int this_len = num_cycles > 7 ? 7 : num_cycles; DO_CLOCK_TMS_CS_OUT(mpsse_ctx, &tms, 0, this_len, false, ftdi_jtag_mode); num_cycles -= this_len; } @@ -1126,7 +1126,7 @@ COMMAND_HANDLER(ftdi_handle_layout_signal_command) uint16_t input_mask = 0; bool invert_oe = false; uint16_t oe_mask = 0; - for (unsigned i = 1; i < CMD_ARGC; i += 2) { + for (unsigned int i = 1; i < CMD_ARGC; i += 2) { if (strcmp("-data", CMD_ARGV[i]) == 0) { invert_data = false; COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], data_mask); @@ -1255,7 +1255,7 @@ COMMAND_HANDLER(ftdi_handle_vid_pid_command) CMD_ARGC -= 1; } - unsigned i; + unsigned int i; for (i = 0; i < CMD_ARGC; i += 2) { COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i], ftdi_vid[i >> 1]); COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], ftdi_pid[i >> 1]); diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index 1b2fb4e30..74660744a 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -104,10 +104,10 @@ static int jlink_flush(void); * @param in_offset A bit offset for TDO data. * @param length Amount of bits to transfer out and in. */ -static void jlink_clock_data(const uint8_t *out, unsigned out_offset, - const uint8_t *tms_out, unsigned tms_offset, - uint8_t *in, unsigned in_offset, - unsigned length); +static void jlink_clock_data(const uint8_t *out, unsigned int out_offset, + const uint8_t *tms_out, unsigned int tms_offset, + uint8_t *in, unsigned int in_offset, + unsigned int length); static enum tap_state jlink_last_state = TAP_RESET; static int queued_retval; @@ -179,7 +179,7 @@ static void jlink_execute_scan(struct jtag_command *cmd) jlink_end_state(cmd->cmd.scan->end_state); struct scan_field *field = cmd->cmd.scan->fields; - unsigned scan_size = 0; + unsigned int scan_size = 0; for (unsigned int i = 0; i < cmd->cmd.scan->num_fields; i++, field++) { scan_size += field->num_bits; @@ -1962,7 +1962,7 @@ static void jlink_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_c /***************************************************************************/ /* J-Link tap functions */ -static unsigned tap_length; +static unsigned int tap_length; /* In SWD mode use tms buffer for direction control */ static uint8_t tms_buffer[JLINK_TAP_BUFFER_SIZE]; static uint8_t tdi_buffer[JLINK_TAP_BUFFER_SIZE]; @@ -1970,13 +1970,13 @@ static uint8_t tdo_buffer[JLINK_TAP_BUFFER_SIZE]; struct pending_scan_result { /** First bit position in tdo_buffer to read. */ - unsigned first; + unsigned int first; /** Number of bits to read. */ - unsigned length; + unsigned int length; /** Location to store the result */ void *buffer; /** Offset in the destination buffer */ - unsigned buffer_offset; + unsigned int buffer_offset; /** SWD command */ uint8_t swd_cmd; }; @@ -1994,13 +1994,13 @@ static void jlink_tap_init(void) memset(tdi_buffer, 0, sizeof(tdi_buffer)); } -static void jlink_clock_data(const uint8_t *out, unsigned out_offset, - const uint8_t *tms_out, unsigned tms_offset, - uint8_t *in, unsigned in_offset, - unsigned length) +static void jlink_clock_data(const uint8_t *out, unsigned int out_offset, + const uint8_t *tms_out, unsigned int tms_offset, + uint8_t *in, unsigned int in_offset, + unsigned int length) { do { - unsigned available_length = JLINK_TAP_BUFFER_SIZE - tap_length / 8; + unsigned int available_length = JLINK_TAP_BUFFER_SIZE - tap_length / 8; if (!available_length || (in && pending_scan_results_length == MAX_PENDING_SCAN_RESULTS)) { @@ -2012,7 +2012,7 @@ static void jlink_clock_data(const uint8_t *out, unsigned out_offset, struct pending_scan_result *pending_scan_result = &pending_scan_results_buffer[pending_scan_results_length]; - unsigned scan_length = length > available_length ? + unsigned int scan_length = length > available_length ? available_length : length; if (out) diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c index a19060c2a..079bb1d0a 100644 --- a/src/jtag/drivers/jtag_vpi.c +++ b/src/jtag/drivers/jtag_vpi.c @@ -158,7 +158,7 @@ retry_write: static int jtag_vpi_receive_cmd(struct vpi_cmd *vpi) { - unsigned bytes_buffered = 0; + unsigned int bytes_buffered = 0; while (bytes_buffered < sizeof(struct vpi_cmd)) { int bytes_to_receive = sizeof(struct vpi_cmd) - bytes_buffered; int retval = read_socket(sockfd, ((char *)vpi) + bytes_buffered, bytes_to_receive); @@ -461,14 +461,14 @@ static int jtag_vpi_stableclocks(unsigned int num_cycles) unsigned int cycles_remain = num_cycles; int nb_bits; int retval; - const unsigned int CYCLES_ONE_BATCH = sizeof(tms_bits) * 8; + const unsigned int cycles_one_batch = sizeof(tms_bits) * 8; /* use TMS=1 in TAP RESET state, TMS=0 in all other stable states */ memset(&tms_bits, (tap_get_state() == TAP_RESET) ? 0xff : 0x00, sizeof(tms_bits)); /* send the TMS bits */ while (cycles_remain > 0) { - nb_bits = (cycles_remain < CYCLES_ONE_BATCH) ? cycles_remain : CYCLES_ONE_BATCH; + nb_bits = (cycles_remain < cycles_one_batch) ? cycles_remain : cycles_one_batch; retval = jtag_vpi_tms_seq(tms_bits, nb_bits); if (retval != ERROR_OK) return retval; diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c index 57ea8cd3f..ee90e78b3 100644 --- a/src/jtag/drivers/libusb_helper.c +++ b/src/jtag/drivers/libusb_helper.c @@ -53,7 +53,7 @@ static int jtag_libusb_error(int err) bool jtag_libusb_match_ids(struct libusb_device_descriptor *dev_desc, const uint16_t vids[], const uint16_t pids[]) { - for (unsigned i = 0; vids[i]; i++) { + for (unsigned int i = 0; vids[i]; i++) { if (dev_desc->idVendor == vids[i] && dev_desc->idProduct == pids[i]) { return true; diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c index 1926ed9ae..fa14e42d6 100644 --- a/src/jtag/drivers/linuxgpiod.c +++ b/src/jtag/drivers/linuxgpiod.c @@ -178,14 +178,14 @@ static int linuxgpiod_swd_write(int swclk, int swdio) return ERROR_OK; } -static int linuxgpiod_blink(int on) +static int linuxgpiod_blink(bool on) { int retval; if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_LED)) return ERROR_OK; - retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_LED], on); + retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_LED], on ? 1 : 0); if (retval < 0) LOG_WARNING("Fail set led"); return retval; diff --git a/src/jtag/drivers/minidriver_imp.h b/src/jtag/drivers/minidriver_imp.h index 7afb46345..b29b3c9cc 100644 --- a/src/jtag/drivers/minidriver_imp.h +++ b/src/jtag/drivers/minidriver_imp.h @@ -13,7 +13,7 @@ static inline void interface_jtag_add_scan_check_alloc(struct scan_field *field) { - unsigned num_bytes = DIV_ROUND_UP(field->num_bits, 8); + unsigned int num_bytes = DIV_ROUND_UP(field->num_bits, 8); field->in_value = cmd_queue_alloc(num_bytes); } diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c index 3decddb0e..1ef9550a0 100644 --- a/src/jtag/drivers/mpsse.c +++ b/src/jtag/drivers/mpsse.c @@ -64,13 +64,13 @@ struct mpsse_ctx { uint8_t interface; enum ftdi_chip_type type; uint8_t *write_buffer; - unsigned write_size; - unsigned write_count; + unsigned int write_size; + unsigned int write_count; uint8_t *read_buffer; - unsigned read_size; - unsigned read_count; + unsigned int read_size; + unsigned int read_count; uint8_t *read_chunk; - unsigned read_chunk_size; + unsigned int read_chunk_size; struct bit_copy_queue read_queue; int retval; }; @@ -444,13 +444,13 @@ void mpsse_purge(struct mpsse_ctx *ctx) } } -static unsigned buffer_write_space(struct mpsse_ctx *ctx) +static unsigned int buffer_write_space(struct mpsse_ctx *ctx) { /* Reserve one byte for SEND_IMMEDIATE */ return ctx->write_size - ctx->write_count - 1; } -static unsigned buffer_read_space(struct mpsse_ctx *ctx) +static unsigned int buffer_read_space(struct mpsse_ctx *ctx) { return ctx->read_size - ctx->read_count; } @@ -462,8 +462,8 @@ static void buffer_write_byte(struct mpsse_ctx *ctx, uint8_t data) ctx->write_buffer[ctx->write_count++] = data; } -static unsigned buffer_write(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, - unsigned bit_count) +static unsigned int buffer_write(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, + unsigned int bit_count) { LOG_DEBUG_IO("%d bits", bit_count); assert(ctx->write_count + DIV_ROUND_UP(bit_count, 8) <= ctx->write_size); @@ -472,8 +472,8 @@ static unsigned buffer_write(struct mpsse_ctx *ctx, const uint8_t *out, unsigned return bit_count; } -static unsigned buffer_add_read(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, - unsigned bit_count, unsigned offset) +static unsigned int buffer_add_read(struct mpsse_ctx *ctx, uint8_t *in, unsigned int in_offset, + unsigned int bit_count, unsigned int offset) { LOG_DEBUG_IO("%d bits, offset %d", bit_count, offset); assert(ctx->read_count + DIV_ROUND_UP(bit_count, 8) <= ctx->read_size); @@ -483,20 +483,20 @@ static unsigned buffer_add_read(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_ return bit_count; } -void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, - unsigned length, uint8_t mode) +void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, + unsigned int length, uint8_t mode) { mpsse_clock_data(ctx, out, out_offset, NULL, 0, length, mode); } -void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, unsigned length, +void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned int in_offset, unsigned int length, uint8_t mode) { mpsse_clock_data(ctx, NULL, 0, in, in_offset, length, mode); } -void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in, - unsigned in_offset, unsigned length, uint8_t mode) +void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in, + unsigned int in_offset, unsigned int length, uint8_t mode) { /* TODO: Fix MSB first modes */ LOG_DEBUG_IO("%s%s %d bits", in ? "in" : "", out ? "out" : "", length); @@ -531,7 +531,7 @@ void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_of length = 0; } else { /* Byte transfer */ - unsigned this_bytes = length / 8; + unsigned int this_bytes = length / 8; /* MPSSE command limit */ if (this_bytes > 65536) this_bytes = 65536; @@ -558,7 +558,7 @@ void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_of this_bytes * 8, 0); if (!out && !in) - for (unsigned n = 0; n < this_bytes; n++) + for (unsigned int n = 0; n < this_bytes; n++) buffer_write_byte(ctx, 0x00); length -= this_bytes * 8; } @@ -566,14 +566,14 @@ void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_of } } -void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, - unsigned length, bool tdi, uint8_t mode) +void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, + unsigned int length, bool tdi, uint8_t mode) { mpsse_clock_tms_cs(ctx, out, out_offset, NULL, 0, length, tdi, mode); } -void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in, - unsigned in_offset, unsigned length, bool tdi, uint8_t mode) +void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in, + unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode) { LOG_DEBUG_IO("%sout %d bits, tdi=%d", in ? "in" : "", length, tdi); assert(out); @@ -593,7 +593,7 @@ void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_ ctx->retval = mpsse_flush(ctx); /* Byte transfer */ - unsigned this_bits = length; + unsigned int this_bits = length; /* MPSSE command limit */ /* NOTE: there's a report of an FT2232 bug in this area, where shifting * exactly 7 bits can make problems with TMS signaling for the last @@ -783,7 +783,7 @@ int mpsse_set_frequency(struct mpsse_ctx *ctx, int frequency) struct transfer_result { struct mpsse_ctx *ctx; bool done; - unsigned transferred; + unsigned int transferred; }; static LIBUSB_CALL void read_cb(struct libusb_transfer *transfer) @@ -791,16 +791,16 @@ static LIBUSB_CALL void read_cb(struct libusb_transfer *transfer) struct transfer_result *res = transfer->user_data; struct mpsse_ctx *ctx = res->ctx; - unsigned packet_size = ctx->max_packet_size; + unsigned int packet_size = ctx->max_packet_size; DEBUG_PRINT_BUF(transfer->buffer, transfer->actual_length); /* Strip the two status bytes sent at the beginning of each USB packet * while copying the chunk buffer to the read buffer */ - unsigned num_packets = DIV_ROUND_UP(transfer->actual_length, packet_size); - unsigned chunk_remains = transfer->actual_length; - for (unsigned i = 0; i < num_packets && chunk_remains > 2; i++) { - unsigned this_size = packet_size - 2; + unsigned int num_packets = DIV_ROUND_UP(transfer->actual_length, packet_size); + unsigned int chunk_remains = transfer->actual_length; + for (unsigned int i = 0; i < num_packets && chunk_remains > 2; i++) { + unsigned int this_size = packet_size - 2; if (this_size > chunk_remains - 2) this_size = chunk_remains - 2; if (this_size > ctx->read_count - res->transferred) diff --git a/src/jtag/drivers/mpsse.h b/src/jtag/drivers/mpsse.h index 737560d95..4a625d890 100644 --- a/src/jtag/drivers/mpsse.h +++ b/src/jtag/drivers/mpsse.h @@ -44,16 +44,16 @@ bool mpsse_is_high_speed(struct mpsse_ctx *ctx); /* Command queuing. These correspond to the MPSSE commands with the same names, but no need to care * about bit/byte transfer or data length limitation. Read data is guaranteed to be available only * after the following mpsse_flush(). */ -void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, - unsigned length, uint8_t mode); -void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, unsigned length, +void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, + unsigned int length, uint8_t mode); +void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned int in_offset, unsigned int length, uint8_t mode); -void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in, - unsigned in_offset, unsigned length, uint8_t mode); -void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, - unsigned length, bool tdi, uint8_t mode); -void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in, - unsigned in_offset, unsigned length, bool tdi, uint8_t mode); +void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in, + unsigned int in_offset, unsigned int length, uint8_t mode); +void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, + unsigned int length, bool tdi, uint8_t mode); +void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in, + unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode); void mpsse_set_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir); void mpsse_set_data_bits_high_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir); void mpsse_read_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t *data); diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c index d26a51048..bdd338895 100644 --- a/src/jtag/drivers/parport.c +++ b/src/jtag/drivers/parport.c @@ -45,21 +45,31 @@ #include #endif -/* parallel port cable description - */ +// Parallel port cable description. struct cable { const char *name; - uint8_t TDO_MASK; /* status port bit containing current TDO value */ - uint8_t TRST_MASK; /* data port bit for TRST */ - uint8_t TMS_MASK; /* data port bit for TMS */ - uint8_t TCK_MASK; /* data port bit for TCK */ - uint8_t TDI_MASK; /* data port bit for TDI */ - uint8_t SRST_MASK; /* data port bit for SRST */ - uint8_t OUTPUT_INVERT; /* data port bits that should be inverted */ - uint8_t INPUT_INVERT; /* status port that should be inverted */ - uint8_t PORT_INIT; /* initialize data port with this value */ - uint8_t PORT_EXIT; /* de-initialize data port with this value */ - uint8_t LED_MASK; /* data port bit for LED */ + // Status port bit containing current TDO value. + uint8_t tdo_mask; + // Data port bit for TRST. + uint8_t trst_mask; + // Data port bit for TMD. + uint8_t tms_mask; + // Data port bit for TCK. + uint8_t tck_mask; + // Data port bit for TDI. + uint8_t tdi_mask; + // Data port bit for SRST. + uint8_t srst_mask; + // Data port bits that should be inverted. + uint8_t output_invert; + // Status port that should be inverted. + uint8_t input_invert; + // Initialize data port with this value. + uint8_t port_init; + // De-initialize data port with this value. + uint8_t port_exit; + // Data port bit for LED. + uint8_t led_mask; }; static const struct cable cables[] = { @@ -87,15 +97,14 @@ static const struct cable cables[] = { { NULL, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }; -/* configuration */ +// Configuration variables. static char *parport_cable; static uint16_t parport_port; static bool parport_exit; static uint32_t parport_toggling_time_ns = 1000; static int wait_states; -/* interface variables - */ +// Interface variables. static const struct cable *cable; static uint8_t dataport_value; @@ -116,7 +125,7 @@ static bb_value_t parport_read(void) data = inb(statusport); #endif - if ((data ^ cable->INPUT_INVERT) & cable->TDO_MASK) + if ((data ^ cable->input_invert) & cable->tdo_mask) return BB_HIGH; else return BB_LOW; @@ -125,7 +134,7 @@ static bb_value_t parport_read(void) static inline void parport_write_data(void) { uint8_t output; - output = dataport_value ^ cable->OUTPUT_INVERT; + output = dataport_value ^ cable->output_invert; #if PARPORT_USE_PPDEV == 1 ioctl(device_handle, PPWDATA, &output); @@ -143,19 +152,19 @@ static int parport_write(int tck, int tms, int tdi) int i = wait_states + 1; if (tck) - dataport_value |= cable->TCK_MASK; + dataport_value |= cable->tck_mask; else - dataport_value &= ~cable->TCK_MASK; + dataport_value &= ~cable->tck_mask; if (tms) - dataport_value |= cable->TMS_MASK; + dataport_value |= cable->tms_mask; else - dataport_value &= ~cable->TMS_MASK; + dataport_value &= ~cable->tms_mask; if (tdi) - dataport_value |= cable->TDI_MASK; + dataport_value |= cable->tdi_mask; else - dataport_value &= ~cable->TDI_MASK; + dataport_value &= ~cable->tdi_mask; while (i-- > 0) parport_write_data(); @@ -163,33 +172,32 @@ static int parport_write(int tck, int tms, int tdi) return ERROR_OK; } -/* (1) assert or (0) deassert reset lines */ +// (1) assert or (0) deassert reset lines. static int parport_reset(int trst, int srst) { LOG_DEBUG("trst: %i, srst: %i", trst, srst); if (trst == 0) - dataport_value |= cable->TRST_MASK; + dataport_value |= cable->trst_mask; else if (trst == 1) - dataport_value &= ~cable->TRST_MASK; + dataport_value &= ~cable->trst_mask; if (srst == 0) - dataport_value |= cable->SRST_MASK; + dataport_value |= cable->srst_mask; else if (srst == 1) - dataport_value &= ~cable->SRST_MASK; + dataport_value &= ~cable->srst_mask; parport_write_data(); return ERROR_OK; } -/* turn LED on parport adapter on (1) or off (0) */ -static int parport_led(int on) +static int parport_led(bool on) { if (on) - dataport_value |= cable->LED_MASK; + dataport_value |= cable->led_mask; else - dataport_value &= ~cable->LED_MASK; + dataport_value &= ~cable->led_mask; parport_write_data(); @@ -204,7 +212,7 @@ static int parport_speed(int speed) static int parport_khz(int khz, int *jtag_speed) { - if (khz == 0) { + if (!khz) { LOG_DEBUG("RCLK not supported"); return ERROR_FAIL; } @@ -248,10 +256,10 @@ static int parport_get_giveio_access(void) #endif static struct bitbang_interface parport_bitbang = { - .read = &parport_read, - .write = &parport_write, - .blink = &parport_led, - }; + .read = &parport_read, + .write = &parport_write, + .blink = &parport_led, +}; static int parport_init(void) { @@ -268,7 +276,7 @@ static int parport_init(void) } while (cur_cable->name) { - if (strcmp(cur_cable->name, parport_cable) == 0) { + if (!strcmp(cur_cable->name, parport_cable)) { cable = cur_cable; break; } @@ -280,7 +288,7 @@ static int parport_init(void) return ERROR_JTAG_INIT_FAILED; } - dataport_value = cable->PORT_INIT; + dataport_value = cable->port_init; #if PARPORT_USE_PPDEV == 1 if (device_handle > 0) { @@ -332,7 +340,7 @@ static int parport_init(void) #endif /* not __FreeBSD__, __FreeBSD_kernel__ */ #else /* not PARPORT_USE_PPDEV */ - if (parport_port == 0) { + if (!parport_port) { parport_port = 0x378; LOG_WARNING("No parport port specified, using default '0x378' (LPT1)"); } @@ -351,7 +359,7 @@ static int parport_init(void) } LOG_DEBUG("...privileges granted"); - /* make sure parallel port is in right mode (clear tristate and interrupt */ + // Make sure parallel port is in right mode (clear tristate and interrupt. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) outb(parport_port + 2, 0x0); #else @@ -364,7 +372,7 @@ static int parport_init(void) return ERROR_FAIL; if (parport_write(0, 0, 0) != ERROR_OK) return ERROR_FAIL; - if (parport_led(1) != ERROR_OK) + if (parport_led(true) != ERROR_OK) return ERROR_FAIL; bitbang_interface = &parport_bitbang; @@ -374,11 +382,11 @@ static int parport_init(void) static int parport_quit(void) { - if (parport_led(0) != ERROR_OK) + if (parport_led(false) != ERROR_OK) return ERROR_FAIL; if (parport_exit) { - dataport_value = cable->PORT_EXIT; + dataport_value = cable->port_exit; parport_write_data(); } @@ -388,13 +396,13 @@ static int parport_quit(void) return ERROR_OK; } -COMMAND_HANDLER(parport_handle_parport_port_command) +COMMAND_HANDLER(parport_handle_port_command) { if (CMD_ARGC == 1) { - /* only if the port wasn't overwritten by cmdline */ - if (parport_port == 0) + // Only if the port wasn't overwritten by cmdline. + if (!parport_port) { COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], parport_port); - else { + } else { LOG_ERROR("The parport port was already configured!"); return ERROR_FAIL; } @@ -405,14 +413,14 @@ COMMAND_HANDLER(parport_handle_parport_port_command) return ERROR_OK; } -COMMAND_HANDLER(parport_handle_parport_cable_command) +COMMAND_HANDLER(parport_handle_cable_command) { - if (CMD_ARGC == 0) + if (!CMD_ARGC) return ERROR_OK; - /* only if the cable name wasn't overwritten by cmdline */ + // Only if the cable name wasn't overwritten by cmdline. if (!parport_cable) { - /* REVISIT first verify that it's listed in cables[] ... */ + // TODO: REVISIT first verify that it's listed in cables[]. parport_cable = malloc(strlen(CMD_ARGV[0]) + sizeof(char)); if (!parport_cable) { LOG_ERROR("Out of memory"); @@ -421,7 +429,7 @@ COMMAND_HANDLER(parport_handle_parport_cable_command) strcpy(parport_cable, CMD_ARGV[0]); } - /* REVISIT it's probably worth returning the current value ... */ + // TODO: REVISIT it's probably worth returning the current value. return ERROR_OK; } @@ -436,7 +444,7 @@ COMMAND_HANDLER(parport_handle_write_on_exit_command) return ERROR_OK; } -COMMAND_HANDLER(parport_handle_parport_toggling_time_command) +COMMAND_HANDLER(parport_handle_toggling_time_command) { if (CMD_ARGC == 1) { uint32_t ns; @@ -445,7 +453,7 @@ COMMAND_HANDLER(parport_handle_parport_toggling_time_command) if (retval != ERROR_OK) return retval; - if (ns == 0) { + if (!ns) { LOG_ERROR("0 ns is not a valid parport toggling time"); return ERROR_FAIL; } @@ -453,9 +461,11 @@ COMMAND_HANDLER(parport_handle_parport_toggling_time_command) parport_toggling_time_ns = ns; retval = adapter_get_speed(&wait_states); if (retval != ERROR_OK) { - /* if adapter_get_speed fails then the clock_mode - * has not been configured, this happens if parport_toggling_time is - * called before the adapter speed is set */ + /* + * If adapter_get_speed fails then the clock_mode has + * not been configured, this happens if toggling_time is + * called before the adapter speed is set. + */ LOG_INFO("no parport speed set - defaulting to zero wait states"); wait_states = 0; } @@ -470,7 +480,7 @@ COMMAND_HANDLER(parport_handle_parport_toggling_time_command) static const struct command_registration parport_subcommand_handlers[] = { { .name = "port", - .handler = parport_handle_parport_port_command, + .handler = parport_handle_port_command, .mode = COMMAND_CONFIG, .help = "Display the address of the I/O port (e.g. 0x378) " "or the number of the '/dev/parport' device used. " @@ -479,11 +489,11 @@ static const struct command_registration parport_subcommand_handlers[] = { }, { .name = "cable", - .handler = parport_handle_parport_cable_command, + .handler = parport_handle_cable_command, .mode = COMMAND_CONFIG, .help = "Set the layout of the parallel port cable " "used to connect to the target.", - /* REVISIT there's no way to list layouts we know ... */ + // TODO: REVISIT there's no way to list layouts we know. .usage = "[layout]", }, { @@ -496,7 +506,7 @@ static const struct command_registration parport_subcommand_handlers[] = { }, { .name = "toggling_time", - .handler = parport_handle_parport_toggling_time_command, + .handler = parport_handle_toggling_time_command, .mode = COMMAND_CONFIG, .help = "Displays or assigns how many nanoseconds it " "takes for the hardware to toggle TCK.", diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c index edd36f2e6..91a8532b7 100644 --- a/src/jtag/drivers/remote_bitbang.c +++ b/src/jtag/drivers/remote_bitbang.c @@ -251,7 +251,7 @@ static int remote_bitbang_sleep(unsigned int microseconds) return remote_bitbang_flush(); } -static int remote_bitbang_blink(int on) +static int remote_bitbang_blink(bool on) { char c = on ? 'B' : 'b'; return remote_bitbang_queue(c, FLUSH_SEND_BUF); diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 8cf3b0c73..0385e4d85 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -2754,7 +2754,7 @@ static int stlink_usb_read_mem32_noaddrinc(void *handle, uint8_t ap_num, uint32_ { struct stlink_usb_handle *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_MEM_RD_NO_INC)) return ERROR_COMMAND_NOTFOUND; @@ -2796,7 +2796,7 @@ static int stlink_usb_write_mem32_noaddrinc(void *handle, uint8_t ap_num, uint32 { struct stlink_usb_handle *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_MEM_WR_NO_INC)) return ERROR_COMMAND_NOTFOUND; @@ -3740,7 +3740,7 @@ static int stlink_open(struct hl_interface_param *param, enum stlink_mode mode, h->st_mode = mode; - for (unsigned i = 0; param->vid[i]; i++) { + for (unsigned int i = 0; param->vid[i]; i++) { LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s", h->st_mode, param->vid[i], param->pid[i], adapter_get_required_serial() ? adapter_get_required_serial() : ""); @@ -3947,7 +3947,7 @@ static int stlink_usb_rw_misc_out(void *handle, uint32_t items, const uint8_t *b LOG_DEBUG_IO("%s(%" PRIu32 ")", __func__, items); - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_RW_MISC)) return ERROR_COMMAND_NOTFOUND; @@ -3968,7 +3968,7 @@ static int stlink_usb_rw_misc_in(void *handle, uint32_t items, uint8_t *buffer) LOG_DEBUG_IO("%s(%" PRIu32 ")", __func__, items); - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_RW_MISC)) return ERROR_COMMAND_NOTFOUND; diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c index ad3bc6e37..3a248e388 100644 --- a/src/jtag/drivers/ulink.c +++ b/src/jtag/drivers/ulink.c @@ -606,7 +606,7 @@ static void ulink_clear_queue(struct ulink *device) /* IN payload MUST be freed ONLY if no other commands use the * payload_in_start buffer */ - if (current->free_payload_in_start == true) { + if (current->free_payload_in_start) { free(current->payload_in_start); current->payload_in_start = NULL; current->payload_in = NULL; @@ -1861,7 +1861,7 @@ static int ulink_post_process_queue(struct ulink *device) /* Check if a corresponding OpenOCD command is stored for this * OpenULINK command */ - if ((current->needs_postprocessing == true) && (openocd_cmd)) { + if (current->needs_postprocessing && openocd_cmd) { switch (openocd_cmd->type) { case JTAG_SCAN: ret = ulink_post_process_scan(current); @@ -2131,7 +2131,7 @@ static int ulink_init(void) download_firmware = true; } - if (download_firmware == true) { + if (download_firmware) { LOG_INFO("Loading OpenULINK firmware. This is reversible by power-cycling" " ULINK device."); ret = ulink_load_firmware_and_renumerate(&ulink_handle, diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c index de0d2d847..8f0ed96f3 100644 --- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c +++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c @@ -30,7 +30,7 @@ #define SECTION_BUFFERSIZE 16384 static int ublast2_libusb_read(struct ublast_lowlevel *low, uint8_t *buf, - unsigned size, uint32_t *bytes_read) + unsigned int size, uint32_t *bytes_read) { int ret, tmp = 0; @@ -215,7 +215,7 @@ static int ublast2_libusb_init(struct ublast_lowlevel *low) const uint16_t vids_renum[] = { low->ublast_vid, 0 }; const uint16_t pids_renum[] = { low->ublast_pid, 0 }; - if (renumeration == false) { + if (!renumeration) { if (jtag_libusb_open(vids_renum, pids_renum, NULL, &low->libusb_dev, NULL) != ERROR_OK) { LOG_ERROR("Altera USB-Blaster II not found"); return ERROR_FAIL; diff --git a/src/jtag/drivers/usb_blaster/ublast_access.h b/src/jtag/drivers/usb_blaster/ublast_access.h index 3e138bd23..e9c926813 100644 --- a/src/jtag/drivers/usb_blaster/ublast_access.h +++ b/src/jtag/drivers/usb_blaster/ublast_access.h @@ -30,7 +30,7 @@ struct ublast_lowlevel { int (*write)(struct ublast_lowlevel *low, uint8_t *buf, int size, uint32_t *bytes_written); - int (*read)(struct ublast_lowlevel *low, uint8_t *buf, unsigned size, + int (*read)(struct ublast_lowlevel *low, uint8_t *buf, unsigned int size, uint32_t *bytes_read); int (*open)(struct ublast_lowlevel *low); int (*close)(struct ublast_lowlevel *low); diff --git a/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c b/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c index eb312ef4e..9647f2b82 100644 --- a/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c +++ b/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c @@ -28,7 +28,7 @@ static struct ftdi_context *ublast_getftdic(struct ublast_lowlevel *low) } static int ublast_ftdi_read(struct ublast_lowlevel *low, uint8_t *buf, - unsigned size, uint32_t *bytes_read) + unsigned int size, uint32_t *bytes_read) { int retval; int timeout = 100; diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c index 53dd158f6..496466ca3 100644 --- a/src/jtag/drivers/usb_blaster/usb_blaster.c +++ b/src/jtag/drivers/usb_blaster/usb_blaster.c @@ -158,7 +158,7 @@ static char *hexdump(uint8_t *buf, unsigned int size) return str; } -static int ublast_buf_read(uint8_t *buf, unsigned size, uint32_t *bytes_read) +static int ublast_buf_read(uint8_t *buf, unsigned int size, uint32_t *bytes_read) { int ret = info.drv->read(info.drv, buf, size, bytes_read); char *str = hexdump(buf, *bytes_read); diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c index f25208774..6e12b9a79 100644 --- a/src/jtag/drivers/xds110.c +++ b/src/jtag/drivers/xds110.c @@ -1887,7 +1887,7 @@ static int xds110_speed(int speed) } else { - const double XDS110_TCK_PULSE_INCREMENT = 66.0; + const double xds110_tck_pulse_increment = 66.0; freq_to_use = speed * 1000; /* Hz */ delay_count = 0; @@ -1908,7 +1908,7 @@ static int xds110_speed(int speed) double current_value = max_freq_pulse_duration; while (current_value < freq_to_pulse_width_in_ns) { - current_value += XDS110_TCK_PULSE_INCREMENT; + current_value += xds110_tck_pulse_increment; ++delay_count; } @@ -1919,9 +1919,9 @@ static int xds110_speed(int speed) if (delay_count) { double diff_freq_1 = freq_to_use - (one_giga / (max_freq_pulse_duration + - (XDS110_TCK_PULSE_INCREMENT * delay_count))); + (xds110_tck_pulse_increment * delay_count))); double diff_freq_2 = (one_giga / (max_freq_pulse_duration + - (XDS110_TCK_PULSE_INCREMENT * (delay_count - 1)))) - + (xds110_tck_pulse_increment * (delay_count - 1)))) - freq_to_use; /* One less count value yields a better match */ diff --git a/src/jtag/drivers/xlnx-pcie-xvc.c b/src/jtag/drivers/xlnx-pcie-xvc.c index b5c7e2fd6..d90a022cd 100644 --- a/src/jtag/drivers/xlnx-pcie-xvc.c +++ b/src/jtag/drivers/xlnx-pcie-xvc.c @@ -43,7 +43,7 @@ struct xlnx_pcie_xvc { int fd; - unsigned offset; + unsigned int offset; char *device; }; diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c index c73f6c8d3..e826f7910 100644 --- a/src/jtag/hla/hla_interface.c +++ b/src/jtag/hla/hla_interface.c @@ -76,7 +76,7 @@ int hl_interface_init_target(struct target *t) if (res != ERROR_OK) return res; - unsigned ii, limit = t->tap->expected_ids_cnt; + unsigned int ii, limit = t->tap->expected_ids_cnt; int found = 0; for (ii = 0; ii < limit; ii++) { @@ -264,7 +264,7 @@ COMMAND_HANDLER(hl_interface_handle_vid_pid_command) return ERROR_COMMAND_SYNTAX_ERROR; } - unsigned i; + unsigned int i; for (i = 0; i < CMD_ARGC; i += 2) { COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i], hl_if.param.vid[i / 2]); COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], hl_if.param.pid[i / 2]); @@ -348,7 +348,7 @@ static const struct command_registration hl_interface_subcommand_handlers[] = { .help = "select which ST-Link backend to use", .usage = "usb | tcp [port]", }, - { + { .name = "command", .handler = &interface_handle_hla_command, .mode = COMMAND_EXEC, diff --git a/src/jtag/interface.c b/src/jtag/interface.c index 1230bb1b3..87d704db9 100644 --- a/src/jtag/interface.c +++ b/src/jtag/interface.c @@ -343,7 +343,7 @@ static const struct name_mapping { const char *tap_state_name(tap_state_t state) { - unsigned i; + unsigned int i; for (i = 0; i < ARRAY_SIZE(tap_name_mapping); i++) { if (tap_name_mapping[i].symbol == state) @@ -354,7 +354,7 @@ const char *tap_state_name(tap_state_t state) tap_state_t tap_state_by_name(const char *name) { - unsigned i; + unsigned int i; for (i = 0; i < ARRAY_SIZE(tap_name_mapping); i++) { /* be nice to the human */ @@ -376,11 +376,11 @@ tap_state_t jtag_debug_state_machine_(const void *tms_buf, const void *tdi_buf, { const uint8_t *tms_buffer; const uint8_t *tdi_buffer; - unsigned tap_bytes; - unsigned cur_byte; - unsigned cur_bit; + unsigned int tap_bytes; + unsigned int cur_byte; + unsigned int cur_bit; - unsigned tap_out_bits; + unsigned int tap_out_bits; char tms_str[33]; char tdi_str[33]; @@ -400,7 +400,7 @@ tap_state_t jtag_debug_state_machine_(const void *tms_buf, const void *tdi_buf, for (cur_byte = 0; cur_byte < tap_bytes; cur_byte++) { for (cur_bit = 0; cur_bit < 8; cur_bit++) { /* make sure we do not run off the end of the buffers */ - unsigned tap_bit = cur_byte * 8 + cur_bit; + unsigned int tap_bit = cur_byte * 8 + cur_bit; if (tap_bit == tap_bits) break; diff --git a/src/jtag/interface.h b/src/jtag/interface.h index 28c1458cb..b448851dc 100644 --- a/src/jtag/interface.h +++ b/src/jtag/interface.h @@ -159,7 +159,7 @@ tap_state_t jtag_debug_state_machine_(const void *tms_buf, const void *tdi_buf, * @returns the final TAP state; pass as @a start_tap_state in following call. */ static inline tap_state_t jtag_debug_state_machine(const void *tms_buf, - const void *tdi_buf, unsigned tap_len, tap_state_t start_tap_state) + const void *tdi_buf, unsigned int tap_len, tap_state_t start_tap_state) { if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) return jtag_debug_state_machine_(tms_buf, tdi_buf, tap_len, start_tap_state); @@ -183,7 +183,7 @@ struct jtag_interface { /** * Bit vector listing capabilities exposed by this driver. */ - unsigned supported; + unsigned int supported; #define DEBUG_CAP_TMS_SEQ (1 << 0) /** diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h index 45b0bf619..1b1094dd5 100644 --- a/src/jtag/minidriver.h +++ b/src/jtag/minidriver.h @@ -54,7 +54,7 @@ int interface_jtag_add_tlr(void); int interface_jtag_add_pathmove(unsigned int num_states, const tap_state_t *path); int interface_jtag_add_runtest(unsigned int num_cycles, tap_state_t endstate); -int interface_add_tms_seq(unsigned num_bits, +int interface_add_tms_seq(unsigned int num_bits, const uint8_t *bits, enum tap_state state); /** diff --git a/src/jtag/swd.h b/src/jtag/swd.h index 5f626c1bf..3fe1365b5 100644 --- a/src/jtag/swd.h +++ b/src/jtag/swd.h @@ -101,7 +101,7 @@ static const uint8_t swd_seq_line_reset[] = { /* At least 2 idle (low) cycles */ 0x00, }; -static const unsigned swd_seq_line_reset_len = 64; +static const unsigned int swd_seq_line_reset_len = 64; /** * JTAG-to-SWD sequence. @@ -122,7 +122,7 @@ static const uint8_t swd_seq_jtag_to_swd[] = { /* At least 2 idle (low) cycles */ 0x00, }; -static const unsigned swd_seq_jtag_to_swd_len = 136; +static const unsigned int swd_seq_jtag_to_swd_len = 136; /** * SWD-to-JTAG sequence. @@ -141,7 +141,7 @@ static const uint8_t swd_seq_swd_to_jtag[] = { /* At least 5 TCK/SWCLK cycles with TMS/SWDIO high */ 0xff, }; -static const unsigned swd_seq_swd_to_jtag_len = 80; +static const unsigned int swd_seq_swd_to_jtag_len = 80; /** * SWD-to-dormant sequence. @@ -156,7 +156,7 @@ static const uint8_t swd_seq_swd_to_dormant[] = { /* Switching sequence from SWD to dormant */ 0xbc, 0xe3, }; -static const unsigned swd_seq_swd_to_dormant_len = 72; +static const unsigned int swd_seq_swd_to_dormant_len = 72; /** * Dormant-to-SWD sequence. @@ -187,7 +187,7 @@ static const uint8_t swd_seq_dormant_to_swd[] = { /* At least 2 idle (low) cycles */ 0x00, }; -static const unsigned swd_seq_dormant_to_swd_len = 224; +static const unsigned int swd_seq_dormant_to_swd_len = 224; /** * JTAG-to-dormant sequence. @@ -208,7 +208,7 @@ static const uint8_t swd_seq_jtag_to_dormant[] = { 0x77, /* ((0xbb >> 7) & GENMASK(0, 0)) | ((0xbb << 1) & GENMASK(7, 1)) */ 0x67, /* ((0xbb >> 7) & GENMASK(0, 0)) | ((0x33 << 1) & GENMASK(7, 1)) */ }; -static const unsigned swd_seq_jtag_to_dormant_len = 40; +static const unsigned int swd_seq_jtag_to_dormant_len = 40; /** * Dormant-to-JTAG sequence. @@ -241,7 +241,7 @@ static const uint8_t swd_seq_dormant_to_jtag[] = { /* put the TAP in Run/Test Idle */ 0x00, }; -static const unsigned swd_seq_dormant_to_jtag_len = 160; +static const unsigned int swd_seq_dormant_to_jtag_len = 160; struct swd_driver { /** diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index 624b4e4c2..790aedfc4 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -803,10 +803,8 @@ COMMAND_HANDLER(handle_scan_chain_command) while (tap) { uint32_t expected, expected_mask, ii; - snprintf(expected_id, sizeof(expected_id), "0x%08x", - (unsigned)((tap->expected_ids_cnt > 0) - ? tap->expected_ids[0] - : 0)); + snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32, + (tap->expected_ids_cnt > 0) ? tap->expected_ids[0] : 0); if (tap->ignore_version) expected_id[2] = '*'; @@ -825,8 +823,7 @@ COMMAND_HANDLER(handle_scan_chain_command) (unsigned int)(expected_mask)); for (ii = 1; ii < tap->expected_ids_cnt; ii++) { - snprintf(expected_id, sizeof(expected_id), "0x%08x", - (unsigned) tap->expected_ids[ii]); + snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32, tap->expected_ids[ii]); if (tap->ignore_version) expected_id[2] = '*'; @@ -846,7 +843,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_delay_command) if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; if (CMD_ARGC == 1) { - unsigned delay; + unsigned int delay; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay); jtag_set_ntrst_delay(delay); @@ -860,7 +857,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command) if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; if (CMD_ARGC == 1) { - unsigned delay; + unsigned int delay; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay); jtag_set_ntrst_assert_width(delay); @@ -876,7 +873,7 @@ COMMAND_HANDLER(handle_jtag_rclk_command) int retval = ERROR_OK; if (CMD_ARGC == 1) { - unsigned khz = 0; + unsigned int khz = 0; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz); retval = adapter_config_rclk(khz); @@ -902,7 +899,7 @@ COMMAND_HANDLER(handle_runtest_command) if (CMD_ARGC != 1) return ERROR_COMMAND_SYNTAX_ERROR; - unsigned num_clocks; + unsigned int num_clocks; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num_clocks); jtag_add_runtest(num_clocks, TAP_IDLE); diff --git a/src/openocd.c b/src/openocd.c index 54c5eb34f..7a5147050 100644 --- a/src/openocd.c +++ b/src/openocd.c @@ -258,7 +258,7 @@ static struct command_context *setup_command_handler(Jim_Interp *interp) &arm_tpiu_swo_register_commands, NULL }; - for (unsigned i = 0; command_registrants[i]; i++) { + for (unsigned int i = 0; command_registrants[i]; i++) { int retval = (*command_registrants[i])(cmd_ctx); if (retval != ERROR_OK) { command_done(cmd_ctx); diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c index c1e4e8419..f4ee33a49 100644 --- a/src/rtos/chibios.c +++ b/src/rtos/chibios.c @@ -31,7 +31,7 @@ struct chibios_chdebug { char ch_identifier[4]; /**< @brief Always set to "main". */ uint8_t ch_zero; /**< @brief Must be zero. */ uint8_t ch_size; /**< @brief Size of this structure. */ - uint16_t ch_version; /**< @brief Encoded ChibiOS/RT version. */ + uint8_t ch_version[2]; /**< @brief Encoded ChibiOS/RT version. */ uint8_t ch_ptrsize; /**< @brief Size of a pointer. */ uint8_t ch_timesize; /**< @brief Size of a @p systime_t. */ uint8_t ch_threadsize; /**< @brief Size of a @p Thread struct. */ @@ -171,13 +171,7 @@ static int chibios_update_memory_signature(struct rtos *rtos) " expected. Assuming compatibility..."); } - /* Convert endianness of version field */ - const uint8_t *versiontarget = (const uint8_t *) - &signature->ch_version; - signature->ch_version = rtos->target->endianness == TARGET_LITTLE_ENDIAN ? - le_to_h_u32(versiontarget) : be_to_h_u32(versiontarget); - - const uint16_t ch_version = signature->ch_version; + const uint16_t ch_version = target_buffer_get_u16(rtos->target, signature->ch_version); LOG_INFO("Successfully loaded memory map of ChibiOS/RT target " "running version %i.%i.%i", GET_CH_KERNEL_MAJOR(ch_version), GET_CH_KERNEL_MINOR(ch_version), GET_CH_KERNEL_PATCH(ch_version)); diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c index e82ab6f87..f5234d2c8 100644 --- a/src/rtos/hwthread.c +++ b/src/rtos/hwthread.c @@ -261,7 +261,7 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, int j = 0; for (int i = 0; i < reg_list_size; i++) { - if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden) continue; j++; } @@ -274,7 +274,7 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, j = 0; for (int i = 0; i < reg_list_size; i++) { - if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden) continue; if (!reg_list[i]->valid) { retval = reg_list[i]->type->get(reg_list[i]); @@ -326,7 +326,7 @@ static int hwthread_get_thread_reg_value(struct rtos *rtos, int64_t thread_id, return ERROR_FAIL; *size = reg->size; - unsigned bytes = DIV_ROUND_UP(reg->size, 8); + unsigned int bytes = DIV_ROUND_UP(reg->size, 8); *value = malloc(bytes); if (!*value) { LOG_ERROR("Failed to allocate memory for %d-bit register.", reg->size); diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c index b5e8e9add..269758e94 100644 --- a/src/rtos/rtos.c +++ b/src/rtos/rtos.c @@ -397,7 +397,7 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa return ERROR_OK; } else if (strncmp(packet, "qSymbol", 7) == 0) { if (rtos_qsymbol(connection, packet, packet_size) == 1) { - if (target->rtos_auto_detect == true) { + if (target->rtos_auto_detect) { target->rtos_auto_detect = false; target->rtos->type->create(target); } diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c index 85531377d..6ddee0a93 100644 --- a/src/server/gdb_server.c +++ b/src/server/gdb_server.c @@ -116,7 +116,7 @@ static int gdb_error(struct connection *connection, int retval); static char *gdb_port; static char *gdb_port_next; -static void gdb_log_callback(void *priv, const char *file, unsigned line, +static void gdb_log_callback(void *priv, const char *file, unsigned int line, const char *function, const char *string); static void gdb_sig_halted(struct connection *connection); @@ -376,7 +376,7 @@ static int gdb_putback_char(struct connection *connection, int last_char) /* The only way we can detect that the socket is closed is the first time * we write to it, we will fail. Subsequent write operations will * succeed. Shudder! */ -static int gdb_write(struct connection *connection, void *data, int len) +static int gdb_write(struct connection *connection, const void *data, int len) { struct gdb_connection *gdb_con = connection->priv; if (gdb_con->closed) { @@ -392,7 +392,7 @@ static int gdb_write(struct connection *connection, void *data, int len) return ERROR_SERVER_REMOTE_CLOSED; } -static void gdb_log_incoming_packet(struct connection *connection, char *packet) +static void gdb_log_incoming_packet(struct connection *connection, const char *packet) { if (!LOG_LEVEL_IS(LOG_LVL_DEBUG)) return; @@ -401,7 +401,7 @@ static void gdb_log_incoming_packet(struct connection *connection, char *packet) struct gdb_connection *gdb_connection = connection->priv; /* Avoid dumping non-printable characters to the terminal */ - const unsigned packet_len = strlen(packet); + const unsigned int packet_len = strlen(packet); const char *nonprint = find_nonprint_char(packet, packet_len); if (nonprint) { /* Does packet at least have a prefix that is printable? @@ -425,7 +425,7 @@ static void gdb_log_incoming_packet(struct connection *connection, char *packet) } } -static void gdb_log_outgoing_packet(struct connection *connection, char *packet_buf, +static void gdb_log_outgoing_packet(struct connection *connection, const char *packet_buf, unsigned int packet_len, unsigned char checksum) { if (!LOG_LEVEL_IS(LOG_LVL_DEBUG)) @@ -443,7 +443,7 @@ static void gdb_log_outgoing_packet(struct connection *connection, char *packet_ } static int gdb_put_packet_inner(struct connection *connection, - char *buffer, int len) + const char *buffer, int len) { int i; unsigned char my_checksum = 0; @@ -565,7 +565,7 @@ static int gdb_put_packet_inner(struct connection *connection, return ERROR_OK; } -int gdb_put_packet(struct connection *connection, char *buffer, int len) +int gdb_put_packet(struct connection *connection, const char *buffer, int len) { struct gdb_connection *gdb_con = connection->priv; gdb_con->busy = true; @@ -1249,7 +1249,7 @@ static void gdb_target_to_reg(struct target *target, int i; for (i = 0; i < str_len; i += 2) { - unsigned t; + unsigned int t; if (sscanf(tstr + i, "%02x", &t) != 1) { LOG_ERROR("BUG: unable to convert register value"); exit(-1); @@ -1308,7 +1308,7 @@ static int gdb_get_registers_packet(struct connection *connection, return gdb_error(connection, retval); for (i = 0; i < reg_list_size; i++) { - if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden) continue; reg_packet_size += DIV_ROUND_UP(reg_list[i]->size, 8) * 2; } @@ -1322,7 +1322,7 @@ static int gdb_get_registers_packet(struct connection *connection, reg_packet_p = reg_packet; for (i = 0; i < reg_list_size; i++) { - if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden) continue; retval = gdb_get_reg_value_as_str(target, reg_packet_p, reg_list[i]); if (retval != ERROR_OK && gdb_report_register_access_error) { @@ -2005,8 +2005,8 @@ static int gdb_memory_map(struct connection *connection, compare_bank); for (unsigned int i = 0; i < target_flash_banks; i++) { - unsigned sector_size = 0; - unsigned group_len = 0; + unsigned int sector_size = 0; + unsigned int group_len = 0; p = banks[i]; @@ -2311,7 +2311,7 @@ static int get_reg_features_list(struct target *target, char const **feature_lis *feature_list = calloc(1, sizeof(char *)); for (int i = 0; i < reg_list_size; i++) { - if (reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i]->exist || reg_list[i]->hidden) continue; if (reg_list[i]->feature @@ -2521,7 +2521,7 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o int i; for (i = 0; i < reg_list_size; i++) { - if (reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i]->exist || reg_list[i]->hidden) continue; if (strcmp(reg_list[i]->feature->name, features[current_feature])) @@ -3563,7 +3563,7 @@ static int gdb_fileio_response_packet(struct connection *connection, return ERROR_OK; } -static void gdb_log_callback(void *priv, const char *file, unsigned line, +static void gdb_log_callback(void *priv, const char *file, unsigned int line, const char *function, const char *string) { struct connection *connection = priv; diff --git a/src/server/gdb_server.h b/src/server/gdb_server.h index 4288ceb87..1a626ebd9 100644 --- a/src/server/gdb_server.h +++ b/src/server/gdb_server.h @@ -28,7 +28,7 @@ int gdb_target_add_all(struct target *target); int gdb_register_commands(struct command_context *command_context); void gdb_service_free(void); -int gdb_put_packet(struct connection *connection, char *buffer, int len); +int gdb_put_packet(struct connection *connection, const char *buffer, int len); int gdb_get_actual_connections(void); diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c index a596afef0..7818af2db 100644 --- a/src/server/telnet_server.c +++ b/src/server/telnet_server.c @@ -93,7 +93,7 @@ static int telnet_output(struct command_context *cmd_ctx, const char *line) return telnet_outputline(connection, line); } -static void telnet_log_callback(void *priv, const char *file, unsigned line, +static void telnet_log_callback(void *priv, const char *file, unsigned int line, const char *function, const char *string) { struct connection *connection = priv; diff --git a/src/svf/svf.c b/src/svf/svf.c index 470889948..9dd2463c0 100644 --- a/src/svf/svf.c +++ b/src/svf/svf.c @@ -245,7 +245,7 @@ static int svf_last_printed_percentage = -1; #define SVF_BUF_LOG(_lvl, _buf, _nbits, _desc) \ svf_hexbuf_print(LOG_LVL_##_lvl, __FILE__, __LINE__, __func__, _buf, _nbits, _desc) -static void svf_hexbuf_print(int dbg_lvl, const char *file, unsigned line, +static void svf_hexbuf_print(int dbg_lvl, const char *file, unsigned int line, const char *function, const uint8_t *buf, int bit_len, const char *desc) { @@ -316,7 +316,7 @@ static void svf_free_xxd_para(struct svf_xxr_para *para) int svf_add_statemove(tap_state_t state_to) { tap_state_t state_from = cmd_queue_cur_state; - unsigned index_var; + unsigned int index_var; /* when resetting, be paranoid and ignore current state */ if (state_to == TAP_RESET) { diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c index 8d54a50fb..fee1a2485 100644 --- a/src/target/adi_v5_jtag.c +++ b/src/target/adi_v5_jtag.c @@ -736,7 +736,7 @@ static int jtag_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq) return retval; } -static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg, +static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned int reg, uint32_t *data) { int retval = jtag_limit_queue_size(dap); @@ -749,7 +749,7 @@ static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg, return retval; } -static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg, +static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data) { int retval = jtag_limit_queue_size(dap); @@ -763,7 +763,7 @@ static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg, } /** Select the AP register bank */ -static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg) +static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned int reg) { int retval; struct adiv5_dap *dap = ap->dap; @@ -818,7 +818,7 @@ static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg) return ERROR_OK; } -static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg, +static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data) { int retval = jtag_limit_queue_size(ap->dap); @@ -840,7 +840,7 @@ static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg, return retval; } -static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned reg, +static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data) { int retval = jtag_limit_queue_size(ap->dap); diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c index 123100588..dda1b0674 100644 --- a/src/target/adi_v5_swd.c +++ b/src/target/adi_v5_swd.c @@ -485,7 +485,7 @@ static int swd_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack) return check_sync(dap); } -static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg, +static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned int reg, uint32_t *data) { int retval = swd_check_reconnect(dap); @@ -499,7 +499,7 @@ static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg, return swd_queue_dp_read_inner(dap, reg, data); } -static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg, +static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data) { const struct swd_driver *swd = adiv5_dap_swd_driver(dap); @@ -517,7 +517,7 @@ static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg, } /** Select the AP register bank */ -static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg) +static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned int reg) { int retval; struct adiv5_dap *dap = ap->dap; @@ -567,7 +567,7 @@ static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg) return ERROR_OK; } -static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned reg, +static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data) { struct adiv5_dap *dap = ap->dap; @@ -592,7 +592,7 @@ static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned reg, return check_sync(dap); } -static int swd_queue_ap_write(struct adiv5_ap *ap, unsigned reg, +static int swd_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data) { struct adiv5_dap *dap = ap->dap; diff --git a/src/target/arc.c b/src/target/arc.c index 72e4d918d..28ce93947 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -516,7 +516,7 @@ static int arc_get_gdb_reg_list(struct target *target, struct reg **reg_list[], unsigned long i = 0; struct reg_cache *reg_cache = target->reg_cache; while (reg_cache) { - for (unsigned j = 0; j < reg_cache->num_regs; j++, i++) + for (unsigned int j = 0; j < reg_cache->num_regs; j++, i++) (*reg_list)[i] = ®_cache->reg_list[j]; reg_cache = reg_cache->next; } @@ -527,7 +527,7 @@ static int arc_get_gdb_reg_list(struct target *target, struct reg **reg_list[], unsigned long gdb_reg_number = 0; struct reg_cache *reg_cache = target->reg_cache; while (reg_cache) { - for (unsigned j = 0; + for (unsigned int j = 0; j < reg_cache->num_regs && gdb_reg_number <= arc->last_general_reg; j++) { if (reg_cache->reg_list[j].exist) { diff --git a/src/target/arm.h b/src/target/arm.h index 0de322a5a..79ec99d11 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -143,8 +143,8 @@ enum { ARM_VFP_V3_FPSCR, }; -const char *arm_mode_name(unsigned psr_mode); -bool is_arm_mode(unsigned psr_mode); +const char *arm_mode_name(unsigned int psr_mode); +bool is_arm_mode(unsigned int psr_mode); /** The PSR "T" and "J" bits define the mode of "classic ARM" cores. */ enum arm_state { @@ -325,7 +325,7 @@ int arm_blank_check_memory(struct target *target, struct target_memory_check_block *blocks, int num_blocks, uint8_t erased_value); void arm_set_cpsr(struct arm *arm, uint32_t cpsr); -struct reg *arm_reg_current(struct arm *arm, unsigned regnum); -struct reg *armv8_reg_current(struct arm *arm, unsigned regnum); +struct reg *arm_reg_current(struct arm *arm, unsigned int regnum); +struct reg *armv8_reg_current(struct arm *arm, unsigned int regnum); #endif /* OPENOCD_TARGET_ARM_H */ diff --git a/src/target/arm11.c b/src/target/arm11.c index 50aaa86f1..c583a2ebd 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -43,7 +43,7 @@ static int arm11_check_init(struct arm11_common *arm11) CHECK_RETVAL(arm11_read_dscr(arm11)); if (!(arm11->dscr & DSCR_HALT_DBG_MODE)) { - LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr); + LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr); LOG_DEBUG("Bringing target into debug mode"); arm11->dscr |= DSCR_HALT_DBG_MODE; @@ -241,8 +241,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp) registers hold data that was written by one side (CPU or JTAG) and not read out by the other side. */ - LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08x)", - (unsigned) arm11->dscr); + LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08" PRIx32 ")", arm11->dscr); return ERROR_FAIL; } } @@ -479,7 +478,7 @@ static int arm11_resume(struct target *target, int current, /* activate all breakpoints */ if (true) { struct breakpoint *bp; - unsigned brp_num = 0; + unsigned int brp_num = 0; for (bp = target->breakpoints; bp; bp = bp->next) { struct arm11_sc7_action brp[2]; @@ -516,7 +515,7 @@ static int arm11_resume(struct target *target, int current, while (1) { CHECK_RETVAL(arm11_read_dscr(arm11)); - LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr); + LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr); if (arm11->dscr & DSCR_CORE_RESTARTED) break; @@ -662,7 +661,7 @@ static int arm11_step(struct target *target, int current, | DSCR_CORE_HALTED; CHECK_RETVAL(arm11_read_dscr(arm11)); - LOG_DEBUG("DSCR %08x e", (unsigned) arm11->dscr); + LOG_DEBUG("DSCR %08" PRIx32 " e", arm11->dscr); if ((arm11->dscr & mask) == mask) break; @@ -1012,10 +1011,8 @@ static int arm11_write_memory_inner(struct target *target, return retval; if (address + size * count != r0) { - LOG_ERROR("Data transfer failed. Expected end " - "address 0x%08x, got 0x%08x", - (unsigned) (address + size * count), - (unsigned) r0); + LOG_ERROR("Data transfer failed. Expected end address 0x%08" PRIx32 ", got 0x%08" PRIx32, + address + size * count, r0); if (burst) LOG_ERROR( diff --git a/src/target/arm11.h b/src/target/arm11.h index 1f56f7bba..40a3f9024 100644 --- a/src/target/arm11.h +++ b/src/target/arm11.h @@ -39,7 +39,7 @@ struct arm11_common { /** Debug module state. */ struct arm_dpm dpm; struct arm11_sc7_action *bpwp_actions; - unsigned bpwp_n; + unsigned int bpwp_n; size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */ size_t free_brps; /**< Number of breakpoints allocated */ diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index b670bd7f7..36325911a 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -242,7 +242,7 @@ int arm11_add_debug_scan_n(struct arm11_common *arm11, static void arm11_add_debug_inst(struct arm11_common *arm11, uint32_t inst, uint8_t *flag, tap_state_t state) { - JTAG_DEBUG("INST <= 0x%08x", (unsigned) inst); + JTAG_DEBUG("INST <= 0x%08" PRIx32, inst); struct scan_field itr[2]; @@ -282,9 +282,7 @@ int arm11_read_dscr(struct arm11_common *arm11) CHECK_RETVAL(jtag_execute_queue()); if (arm11->dscr != dscr) - JTAG_DEBUG("DSCR = %08x (OLD %08x)", - (unsigned) dscr, - (unsigned) arm11->dscr); + JTAG_DEBUG("DSCR = %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr); arm11->dscr = dscr; @@ -317,9 +315,7 @@ int arm11_write_dscr(struct arm11_common *arm11, uint32_t dscr) CHECK_RETVAL(jtag_execute_queue()); - JTAG_DEBUG("DSCR <= %08x (OLD %08x)", - (unsigned) dscr, - (unsigned) arm11->dscr); + JTAG_DEBUG("DSCR <= %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr); arm11->dscr = dscr; @@ -509,8 +505,8 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11, CHECK_RETVAL(jtag_execute_queue()); - JTAG_DEBUG("DTR _data %08x ready %d n_retry %d", - (unsigned) _data, ready, n_retry); + JTAG_DEBUG("DTR _data %08" PRIx32 " ready %d n_retry %d", + _data, ready, n_retry); int64_t then = 0; @@ -571,8 +567,8 @@ static int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, chain5_fields[2].in_value = NULL; uint8_t *readies; - unsigned readies_num = count; - unsigned bytes = sizeof(*readies)*readies_num; + unsigned int readies_num = count; + unsigned int bytes = sizeof(*readies) * readies_num; readies = malloc(bytes); if (!readies) { @@ -596,7 +592,7 @@ static int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, int retval = jtag_execute_queue(); if (retval == ERROR_OK) { - unsigned error_count = 0; + unsigned int error_count = 0; for (size_t i = 0; i < readies_num; i++) { if (readies[i] != 1) @@ -754,8 +750,8 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11, CHECK_RETVAL(jtag_execute_queue()); - JTAG_DEBUG("DTR _data %08x ready %d n_retry %d", - (unsigned) _data, ready, n_retry); + JTAG_DEBUG("DTR _data %08" PRIx32 " ready %d n_retry %d", + _data, ready, n_retry); int64_t then = 0; @@ -878,9 +874,8 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions, /* Timeout here so we don't get stuck. */ int i_n = 0; while (1) { - JTAG_DEBUG("SC7 <= c%-3d Data %08x %s", - (unsigned) address_out, - (unsigned) data_out, + JTAG_DEBUG("SC7 <= c%-3" PRIu8 " Data %08" PRIx32 " %s", + address_out, data_out, n_rw ? "write" : "read"); arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain7_fields), @@ -908,7 +903,7 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions, } if (!n_rw) - JTAG_DEBUG("SC7 => Data %08x", (unsigned) data_in); + JTAG_DEBUG("SC7 => Data %08" PRIx32, data_in); if (i > 0) { if (actions[i - 1].address != address_in) @@ -1047,7 +1042,7 @@ static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm, * and watchpoint operations instead of running them right away. Since we * pre-allocated our vector, we don't need to worry about space. */ -static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, +static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t, uint32_t addr, uint32_t control) { struct arm11_common *arm11 = dpm_to_arm11(dpm); @@ -1084,7 +1079,7 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, return ERROR_OK; } -static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) +static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t) { struct arm11_common *arm11 = dpm_to_arm11(dpm); struct arm11_sc7_action *action; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 3bacfaefd..7e31306b6 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -821,9 +821,9 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) else if (strcmp(CMD_ARGV[0], "none") == 0) { /* do nothing */ } else { - for (unsigned i = 0; i < CMD_ARGC; i++) { + for (unsigned int i = 0; i < CMD_ARGC; i++) { /* go through list of vectors */ - unsigned j; + unsigned int j; for (j = 0; arm9tdmi_vectors[j].name; j++) { if (strcmp(CMD_ARGV[i], arm9tdmi_vectors[j].name) == 0) { vector_catch_value |= arm9tdmi_vectors[j].value; @@ -850,7 +850,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) } /* output current settings */ - for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) { + for (unsigned int i = 0; arm9tdmi_vectors[i].name; i++) { command_print(CMD, "%s: %s", arm9tdmi_vectors[i].name, (vector_catch_value & arm9tdmi_vectors[i].value) ? "catch" : "don't catch"); diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 3a5afc605..eaaa209b9 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1532,6 +1532,7 @@ static const struct dap_part_nums { { ARM_ID, 0xc17, "Cortex-R7 Debug", "(Debug Unit)", }, { ARM_ID, 0xd03, "Cortex-A53 Debug", "(Debug Unit)", }, { ARM_ID, 0xd04, "Cortex-A35 Debug", "(Debug Unit)", }, + { ARM_ID, 0xd05, "Cortex-A55 Debug", "(Debug Unit)", }, { ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", }, { ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", }, { ARM_ID, 0xd0b, "Cortex-A76 Debug", "(Debug Unit)", }, diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 92c3dbc3a..ebd2752bd 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -454,17 +454,17 @@ struct dap_ops { int (*send_sequence)(struct adiv5_dap *dap, enum swd_special_seq seq); /** DP register read. */ - int (*queue_dp_read)(struct adiv5_dap *dap, unsigned reg, + int (*queue_dp_read)(struct adiv5_dap *dap, unsigned int reg, uint32_t *data); /** DP register write. */ - int (*queue_dp_write)(struct adiv5_dap *dap, unsigned reg, + int (*queue_dp_write)(struct adiv5_dap *dap, unsigned int reg, uint32_t data); /** AP register read. */ - int (*queue_ap_read)(struct adiv5_ap *ap, unsigned reg, + int (*queue_ap_read)(struct adiv5_ap *ap, unsigned int reg, uint32_t *data); /** AP register write. */ - int (*queue_ap_write)(struct adiv5_ap *ap, unsigned reg, + int (*queue_ap_write)(struct adiv5_ap *ap, unsigned int reg, uint32_t data); /** AP operation abort. */ @@ -553,7 +553,7 @@ static inline int dap_send_sequence(struct adiv5_dap *dap, * @return ERROR_OK for success, else a fault code. */ static inline int dap_queue_dp_read(struct adiv5_dap *dap, - unsigned reg, uint32_t *data) + unsigned int reg, uint32_t *data) { assert(dap->ops); return dap->ops->queue_dp_read(dap, reg, data); @@ -571,7 +571,7 @@ static inline int dap_queue_dp_read(struct adiv5_dap *dap, * @return ERROR_OK for success, else a fault code. */ static inline int dap_queue_dp_write(struct adiv5_dap *dap, - unsigned reg, uint32_t data) + unsigned int reg, uint32_t data) { assert(dap->ops); return dap->ops->queue_dp_write(dap, reg, data); @@ -588,7 +588,7 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap, * @return ERROR_OK for success, else a fault code. */ static inline int dap_queue_ap_read(struct adiv5_ap *ap, - unsigned reg, uint32_t *data) + unsigned int reg, uint32_t *data) { assert(ap->dap->ops); if (ap->refcount == 0) { @@ -608,7 +608,7 @@ static inline int dap_queue_ap_read(struct adiv5_ap *ap, * @return ERROR_OK for success, else a fault code. */ static inline int dap_queue_ap_write(struct adiv5_ap *ap, - unsigned reg, uint32_t data) + unsigned int reg, uint32_t data) { assert(ap->dap->ops); if (ap->refcount == 0) { @@ -659,7 +659,7 @@ static inline int dap_sync(struct adiv5_dap *dap) return ERROR_OK; } -static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned reg, +static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned int reg, uint32_t *value) { int retval; @@ -671,7 +671,7 @@ static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned reg, return dap_run(dap); } -static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned reg, +static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value, int timeout) { assert(timeout > 0); diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 749274f36..8619f8f82 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -114,7 +114,7 @@ static int evaluate_pld(uint32_t opcode, if ((opcode & 0x0d30f000) == 0x0510f000) { uint8_t rn; uint8_t u; - unsigned offset; + unsigned int offset; instruction->type = ARM_PLD; rn = (opcode & 0xf0000) >> 16; @@ -266,18 +266,18 @@ static int evaluate_srs(uint32_t opcode, case 0x08400000: snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 - "\tSRS%s\tSP%s, #%d", + "\tSRS%s\tSP%s, #%" PRIu32, address, opcode, mode, wback, - (unsigned)(opcode & 0x1f)); + opcode & 0x1f); break; case 0x08100000: snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 - "\tRFE%s\tr%d%s", + "\tRFE%s\tr%" PRIu32 "%s", address, opcode, mode, - (unsigned)((opcode >> 16) & 0xf), wback); + (opcode >> 16) & 0xf, wback); break; default: return evaluate_unknown(opcode, address, instruction); @@ -701,9 +701,9 @@ static int evaluate_load_store(uint32_t opcode, static int evaluate_extend(uint32_t opcode, uint32_t address, char *cp) { - unsigned rm = (opcode >> 0) & 0xf; - unsigned rd = (opcode >> 12) & 0xf; - unsigned rn = (opcode >> 16) & 0xf; + unsigned int rm = (opcode >> 0) & 0xf; + unsigned int rd = (opcode >> 12) & 0xf; + unsigned int rn = (opcode >> 16) & 0xf; char *type, *rot; switch ((opcode >> 24) & 0x3) { @@ -842,7 +842,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address, /* halfword pack */ if ((opcode & 0x01f00020) == 0x00800000) { char *type, *shift; - unsigned imm = (unsigned) (opcode >> 7) & 0x1f; + unsigned int imm = (opcode >> 7) & 0x1f; if (opcode & (1 << 6)) { type = "TB"; @@ -865,7 +865,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address, /* word saturate */ if ((opcode & 0x01a00020) == 0x00a00000) { char *shift; - unsigned imm = (unsigned) (opcode >> 7) & 0x1f; + unsigned int imm = (opcode >> 7) & 0x1f; if (opcode & (1 << 6)) { shift = "ASR"; @@ -892,7 +892,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address, /* multiplies */ if ((opcode & 0x01f00080) == 0x01000000) { - unsigned rn = (opcode >> 12) & 0xf; + unsigned int rn = (opcode >> 12) & 0xf; if (rn != 0xf) sprintf(cp, "SML%cD%s%s\tr%d, r%d, r%d, r%d", @@ -925,7 +925,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address, return ERROR_OK; } if ((opcode & 0x01f00000) == 0x01500000) { - unsigned rn = (opcode >> 12) & 0xf; + unsigned int rn = (opcode >> 12) & 0xf; switch (opcode & 0xc0) { case 3: @@ -1001,8 +1001,8 @@ static int evaluate_media(uint32_t opcode, uint32_t address, return ERROR_OK; } if (mnemonic) { - unsigned rm = (opcode >> 0) & 0xf; - unsigned rd = (opcode >> 12) & 0xf; + unsigned int rm = (opcode >> 0) & 0xf; + unsigned int rd = (opcode >> 12) & 0xf; sprintf(cp, "%s%s\tr%d, r%d", mnemonic, COND(opcode), rm, rd); return ERROR_OK; @@ -2046,8 +2046,7 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address, return evaluate_cdp_mcr_mrc(opcode, address, instruction); } - LOG_ERROR("ARM: should never reach this point (opcode=%08x)", - (unsigned) opcode); + LOG_ERROR("ARM: should never reach this point (opcode=%08" PRIx32 ")", opcode); return -1; } @@ -2748,7 +2747,7 @@ static int evaluate_cond_branch_thumb(uint16_t opcode, static int evaluate_cb_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { - unsigned offset; + unsigned int offset; /* added in Thumb2 */ offset = (opcode >> 3) & 0x1f; @@ -2859,7 +2858,7 @@ static int evaluate_hint_thumb(uint16_t opcode, uint32_t address, static int evaluate_ifthen_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { - unsigned cond = (opcode >> 4) & 0x0f; + unsigned int cond = (opcode >> 4) & 0x0f; char *x = "", *y = "", *z = ""; if (opcode & 0x01) diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index 1be567475..8317da997 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -171,7 +171,7 @@ struct arm_instruction { uint32_t opcode; /* return value ... Thumb-2 sizes vary */ - unsigned instruction_size; + unsigned int instruction_size; union { struct arm_b_bl_bx_blx_instr b_bl_bx_blx; diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index 9f3a444af..0b2db77c5 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -59,7 +59,7 @@ static int dpm_mrc(struct target *target, int cpnum, ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2), value); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -82,7 +82,7 @@ static int dpm_mrrc(struct target *target, int cpnum, ARMV5_T_MRRC(cpnum, op, 0, 1, crm), value); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -107,7 +107,7 @@ static int dpm_mcr(struct target *target, int cpnum, ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2), value); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -129,7 +129,7 @@ static int dpm_mcrr(struct target *target, int cpnum, retval = dpm->instr_write_data_r0_r1(dpm, ARMV5_T_MCRR(cpnum, op, 0, 1, crm), value); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -167,7 +167,7 @@ int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode) } /* Read 64bit VFP registers */ -static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum) +static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int regnum) { int retval = ERROR_FAIL; uint32_t value_r0, value_r1; @@ -198,15 +198,14 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum) buf_set_u32(r->value + 4, 0, 32, value_r1); r->valid = true; r->dirty = false; - LOG_DEBUG("READ: %s, %8.8x, %8.8x", r->name, - (unsigned) value_r0, (unsigned) value_r1); + LOG_DEBUG("READ: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1); } return retval; } /* just read the register -- rely on the core mode being right */ -int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) +int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum) { uint32_t value; int retval; @@ -266,14 +265,14 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) buf_set_u32(r->value, 0, 32, value); r->valid = true; r->dirty = false; - LOG_DEBUG("READ: %s, %8.8x", r->name, (unsigned) value); + LOG_DEBUG("READ: %s, %8.8" PRIx32, r->name, value); } return retval; } /* Write 64bit VFP registers */ -static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum) +static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int regnum) { int retval = ERROR_FAIL; uint32_t value_r0 = buf_get_u32(r->value, 0, 32); @@ -302,15 +301,14 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum if (retval == ERROR_OK) { r->dirty = false; - LOG_DEBUG("WRITE: %s, %8.8x, %8.8x", r->name, - (unsigned) value_r0, (unsigned) value_r1); + LOG_DEBUG("WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1); } return retval; } /* just write the register -- rely on the core mode being right */ -static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) +static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum) { int retval; uint32_t value = buf_get_u32(r->value, 0, 32); @@ -351,7 +349,7 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) if (retval == ERROR_OK) { r->dirty = false; - LOG_DEBUG("WRITE: %s, %8.8x", r->name, (unsigned) value); + LOG_DEBUG("WRITE: %s, %8.8" PRIx32, r->name, value); } return retval; @@ -388,7 +386,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm) return retval; /* read R0 and R1 first (it's used for scratch), then CPSR */ - for (unsigned i = 0; i < 2; i++) { + for (unsigned int i = 0; i < 2; i++) { r = arm->core_cache->reg_list + i; if (!r->valid) { retval = arm_dpm_read_reg(dpm, r, i); @@ -406,7 +404,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm) arm_set_cpsr(arm, cpsr); /* REVISIT we can probably avoid reading R1..R14, saving time... */ - for (unsigned i = 2; i < 16; i++) { + for (unsigned int i = 2; i < 16; i++) { r = arm_reg_current(arm, i); if (r->valid) continue; @@ -424,7 +422,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm) */ fail: - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -503,7 +501,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) * cope with the hand-crafted breakpoint code. */ if (arm->target->type->add_breakpoint == dpm_add_breakpoint) { - for (unsigned i = 0; i < dpm->nbp; i++) { + for (unsigned int i = 0; i < dpm->nbp; i++) { struct dpm_bp *dbp = dpm->dbp + i; struct breakpoint *bp = dbp->bp; @@ -515,7 +513,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) } /* enable/disable watchpoints */ - for (unsigned i = 0; i < dpm->nwp; i++) { + for (unsigned int i = 0; i < dpm->nwp; i++) { struct dpm_wp *dwp = dpm->dwp + i; struct watchpoint *wp = dwp->wp; @@ -540,9 +538,9 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) did_write = false; /* check everything except our scratch registers R0 and R1 */ - for (unsigned i = 2; i < cache->num_regs; i++) { + for (unsigned int i = 2; i < cache->num_regs; i++) { struct arm_reg *r; - unsigned regnum; + unsigned int regnum; /* also skip PC, CPSR, and non-dirty */ if (i == 15) @@ -627,14 +625,14 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) arm->pc->dirty = false; /* flush R0 and R1 (our scratch registers) */ - for (unsigned i = 0; i < 2; i++) { + for (unsigned int i = 0; i < 2; i++) { retval = dpm_write_reg(dpm, &cache->reg_list[i], i); if (retval != ERROR_OK) goto done; cache->reg_list[i].dirty = false; } - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); done: return retval; } @@ -645,7 +643,7 @@ done: * or MODE_ANY. */ static enum arm_mode dpm_mapmode(struct arm *arm, - unsigned num, enum arm_mode mode) + unsigned int num, enum arm_mode mode) { enum arm_mode amode = arm->core_mode; @@ -721,10 +719,10 @@ static int arm_dpm_read_core_reg(struct target *target, struct reg *r, /* always clean up, regardless of error */ if (mode != ARM_MODE_ANY) - /* (void) */ arm_dpm_modeswitch(dpm, ARM_MODE_ANY); + arm_dpm_modeswitch(dpm, ARM_MODE_ANY); fail: - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -763,10 +761,10 @@ static int arm_dpm_write_core_reg(struct target *target, struct reg *r, /* always clean up, regardless of error */ if (mode != ARM_MODE_ANY) - /* (void) */ arm_dpm_modeswitch(dpm, ARM_MODE_ANY); + arm_dpm_modeswitch(dpm, ARM_MODE_ANY); fail: - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -795,7 +793,7 @@ static int arm_dpm_full_context(struct target *target) * Pick some mode with unread registers and read them all. * Repeat until done. */ - for (unsigned i = 0; i < cache->num_regs; i++) { + for (unsigned int i = 0; i < cache->num_regs; i++) { struct arm_reg *r; if (!cache->reg_list[i].exist || cache->reg_list[i].valid) @@ -833,7 +831,7 @@ static int arm_dpm_full_context(struct target *target) } while (did_read); retval = arm_dpm_modeswitch(dpm, ARM_MODE_ANY); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); done: return retval; } @@ -923,7 +921,7 @@ static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp) if (bp->type == BKPT_SOFT) LOG_DEBUG("using HW bkpt, not SW..."); - for (unsigned i = 0; i < dpm->nbp; i++) { + for (unsigned int i = 0; i < dpm->nbp; i++) { if (!dpm->dbp[i].bp) { retval = dpm_bpwp_setup(dpm, &dpm->dbp[i].bpwp, bp->address, bp->length); @@ -942,7 +940,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp) struct arm_dpm *dpm = arm->dpm; int retval = ERROR_COMMAND_SYNTAX_ERROR; - for (unsigned i = 0; i < dpm->nbp; i++) { + for (unsigned int i = 0; i < dpm->nbp; i++) { if (dpm->dbp[i].bp == bp) { dpm->dbp[i].bp = NULL; dpm->dbp[i].bpwp.dirty = true; @@ -956,7 +954,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp) return retval; } -static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t, +static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned int index_t, struct watchpoint *wp) { int retval; @@ -999,7 +997,7 @@ static int dpm_add_watchpoint(struct target *target, struct watchpoint *wp) int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; if (dpm->bpwp_enable) { - for (unsigned i = 0; i < dpm->nwp; i++) { + for (unsigned int i = 0; i < dpm->nwp; i++) { if (!dpm->dwp[i].wp) { retval = dpm_watchpoint_setup(dpm, i, wp); break; @@ -1016,7 +1014,7 @@ static int dpm_remove_watchpoint(struct target *target, struct watchpoint *wp) struct arm_dpm *dpm = arm->dpm; int retval = ERROR_COMMAND_SYNTAX_ERROR; - for (unsigned i = 0; i < dpm->nwp; i++) { + for (unsigned int i = 0; i < dpm->nwp; i++) { if (dpm->dwp[i].wp == wp) { dpm->dwp[i].wp = NULL; dpm->dwp[i].bpwp.dirty = true; @@ -1163,7 +1161,7 @@ int arm_dpm_initialize(struct arm_dpm *dpm) { /* Disable all breakpoints and watchpoints at startup. */ if (dpm->bpwp_disable) { - unsigned i; + unsigned int i; for (i = 0; i < dpm->nbp; i++) { dpm->dbp[i].bpwp.number = i; diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h index 2da463111..16c801ea5 100644 --- a/src/target/arm_dpm.h +++ b/src/target/arm_dpm.h @@ -19,7 +19,7 @@ */ struct dpm_bpwp { - unsigned number; + unsigned int number; uint32_t address; uint32_t control; /* true if hardware state needs flushing */ @@ -109,7 +109,7 @@ struct arm_dpm { uint32_t opcode, uint64_t *data); struct reg *(*arm_reg_current)(struct arm *arm, - unsigned regnum); + unsigned int regnum); /* BREAKPOINT/WATCHPOINT SUPPORT */ @@ -119,7 +119,7 @@ struct arm_dpm { * must currently be disabled. Indices 0..15 are used for * breakpoints; indices 16..31 are for watchpoints. */ - int (*bpwp_enable)(struct arm_dpm *dpm, unsigned index_value, + int (*bpwp_enable)(struct arm_dpm *dpm, unsigned int index_value, uint32_t addr, uint32_t control); /** @@ -127,15 +127,15 @@ struct arm_dpm { * hardware control registers. Indices are the same ones * accepted by bpwp_enable(). */ - int (*bpwp_disable)(struct arm_dpm *dpm, unsigned index_value); + int (*bpwp_disable)(struct arm_dpm *dpm, unsigned int index_value); /* The breakpoint and watchpoint arrays are private to the * DPM infrastructure. There are nbp indices in the dbp * array. There are nwp indices in the dwp array. */ - unsigned nbp; - unsigned nwp; + unsigned int nbp; + unsigned int nwp; struct dpm_bp *dbp; struct dpm_wp *dwp; @@ -158,7 +158,7 @@ struct arm_dpm { int arm_dpm_setup(struct arm_dpm *dpm); int arm_dpm_initialize(struct arm_dpm *dpm); -int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum); +int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum); int arm_dpm_read_current_registers(struct arm_dpm *dpm); int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode); diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 1886d5e1f..c1836bc7a 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -168,9 +168,9 @@ static const struct { }; /** Map PSR mode bits to the name of an ARM processor operating mode. */ -const char *arm_mode_name(unsigned psr_mode) +const char *arm_mode_name(unsigned int psr_mode) { - for (unsigned i = 0; i < ARRAY_SIZE(arm_mode_data); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(arm_mode_data); i++) { if (arm_mode_data[i].psr == psr_mode) return arm_mode_data[i].name; } @@ -179,9 +179,9 @@ const char *arm_mode_name(unsigned psr_mode) } /** Return true iff the parameter denotes a valid ARM processor mode. */ -bool is_arm_mode(unsigned psr_mode) +bool is_arm_mode(unsigned int psr_mode) { - for (unsigned i = 0; i < ARRAY_SIZE(arm_mode_data); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(arm_mode_data); i++) { if (arm_mode_data[i].psr == psr_mode) return true; } @@ -272,8 +272,8 @@ static const struct { * CPSR -or- SPSR depending on whether 'mode' is MODE_ANY. * (Exception modes have both CPSR and SPSR registers ...) */ - unsigned cookie; - unsigned gdb_index; + unsigned int cookie; + unsigned int gdb_index; enum arm_mode mode; } arm_core_regs[] = { /* IMPORTANT: we guarantee that the first eight cached registers @@ -482,7 +482,7 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr) } arm->core_state = state; - LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr, + LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr, arm_mode_name(mode), arm_state_strings[arm->core_state]); } @@ -499,7 +499,7 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr) * However, R8..R14, and SPSR (arm->spsr) *must* be mapped. * CPSR (arm->cpsr) is also not mapped. */ -struct reg *arm_reg_current(struct arm *arm, unsigned regnum) +struct reg *arm_reg_current(struct arm *arm, unsigned int regnum) { struct reg *r; @@ -840,7 +840,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) regs = arm->core_cache->reg_list; - for (unsigned mode = 0; mode < ARRAY_SIZE(arm_mode_data); mode++) { + for (unsigned int mode = 0; mode < ARRAY_SIZE(arm_mode_data); mode++) { const char *name; char *sep = "\n"; char *shadow = ""; @@ -875,11 +875,11 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) sep, name, shadow); /* display N rows of up to 4 registers each */ - for (unsigned i = 0; i < arm_mode_data[mode].n_indices; ) { + for (unsigned int i = 0; i < arm_mode_data[mode].n_indices; ) { char output[80]; int output_len = 0; - for (unsigned j = 0; j < 4; j++, i++) { + for (unsigned int j = 0; j < 4; j++, i++) { uint32_t value; struct reg *reg = regs; @@ -1750,7 +1750,7 @@ cleanup: static int arm_full_context(struct target *target) { struct arm *arm = target_to_arm(target); - unsigned num_regs = arm->core_cache->num_regs; + unsigned int num_regs = arm->core_cache->num_regs; struct reg *reg = arm->core_cache->reg_list; int retval = ERROR_OK; diff --git a/src/target/armv7a.c b/src/target/armv7a.c index dc3752e0b..e22d309a0 100644 --- a/src/target/armv7a.c +++ b/src/target/armv7a.c @@ -74,7 +74,7 @@ static void armv7a_show_fault_registers(struct target *target) ", IFAR: %8.8" PRIx32, ifsr, ifar); done: - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); } diff --git a/src/target/armv7a_cache_l2x.h b/src/target/armv7a_cache_l2x.h index d5f1a6f0e..ea726ec58 100644 --- a/src/target/armv7a_cache_l2x.h +++ b/src/target/armv7a_cache_l2x.h @@ -122,16 +122,16 @@ struct outer_cache_fns { void (*resume)(void); /* This is an ARM L2C thing */ - void (*write_sec)(unsigned long, unsigned); + void (*write_sec)(unsigned long, unsigned int); void (*configure)(const struct l2x0_regs *); }; struct l2c_init_data { const char *type; - unsigned way_size_0; - unsigned num_lock; + unsigned int way_size_0; + unsigned int num_lock; - void (*enable)(uint32_t, uint32_t, unsigned); + void (*enable)(uint32_t, uint32_t, unsigned int); void (*fixup)(uint32_t, uint32_t, struct outer_cache_fns *); void (*save)(uint32_t); void (*configure)(uint32_t); diff --git a/src/target/armv7m.c b/src/target/armv7m.c index d508af7bf..a403b25a9 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -74,9 +74,9 @@ const int armv7m_msp_reg_map[ARMV7M_NUM_CORE_REGS] = { * doesn't include basepri or faultmask registers. */ static const struct { - unsigned id; + unsigned int id; const char *name; - unsigned bits; + unsigned int bits; enum reg_type type; const char *group; const char *feature; @@ -530,7 +530,7 @@ int armv7m_start_algorithm(struct target *target, } /* Store all non-debug execution registers to armv7m_algorithm_info context */ - for (unsigned i = 0; i < armv7m->arm.core_cache->num_regs; i++) { + for (unsigned int i = 0; i < armv7m->arm.core_cache->num_regs; i++) { struct reg *reg = &armv7m->arm.core_cache->reg_list[i]; if (!reg->exist) continue; diff --git a/src/target/armv8.c b/src/target/armv8.c index b54ef13d3..61d72741a 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -36,7 +36,7 @@ static const char * const armv8_state_strings[] = { static const struct { const char *name; - unsigned psr; + unsigned int psr; } armv8_mode_data[] = { { .name = "USR", @@ -105,9 +105,9 @@ static const struct { }; /** Map PSR mode bits to the name of an ARM processor operating mode. */ -const char *armv8_mode_name(unsigned psr_mode) +const char *armv8_mode_name(unsigned int psr_mode) { - for (unsigned i = 0; i < ARRAY_SIZE(armv8_mode_data); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(armv8_mode_data); i++) { if (armv8_mode_data[i].psr == psr_mode) return armv8_mode_data[i].name; } @@ -683,7 +683,7 @@ static int armv8_read_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum, struct arm_dpm *dpm = &armv8->dpm; struct reg *reg_r1 = dpm->arm->core_cache->reg_list + ARMV8_R1; uint32_t value_r0 = 0, value_r1 = 0; - unsigned num = (regnum - ARMV8_V0) << 1; + unsigned int num = (regnum - ARMV8_V0) << 1; switch (regnum) { case ARMV8_V0 ... ARMV8_V15: @@ -817,7 +817,7 @@ static int armv8_write_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum struct arm_dpm *dpm = &armv8->dpm; struct reg *reg_r1 = dpm->arm->core_cache->reg_list + ARMV8_R1; uint32_t value_r0 = 0, value_r1 = 0; - unsigned num = (regnum - ARMV8_V0) << 1; + unsigned int num = (regnum - ARMV8_V0) << 1; switch (regnum) { case ARMV8_V0 ... ARMV8_V15: @@ -961,7 +961,7 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr) arm->core_state = state; arm->core_mode = mode; - LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr, + LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr, armv8_mode_name(arm->core_mode), armv8_state_strings[arm->core_state]); } @@ -1010,7 +1010,7 @@ static void armv8_show_fault_registers32(struct armv8_common *armv8) ", IFAR: %8.8" PRIx32, ifsr, ifar); done: - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); } static __attribute__((unused)) void armv8_show_fault_registers(struct target *target) @@ -1506,9 +1506,9 @@ static struct reg_data_type aarch64_flags_cpsr[] = { }; static const struct { - unsigned id; + unsigned int id; const char *name; - unsigned bits; + unsigned int bits; enum arm_mode mode; enum reg_type type; const char *group; @@ -1611,10 +1611,10 @@ static const struct { }; static const struct { - unsigned id; - unsigned mapping; + unsigned int id; + unsigned int mapping; const char *name; - unsigned bits; + unsigned int bits; enum arm_mode mode; enum reg_type type; const char *group; @@ -1881,7 +1881,7 @@ struct reg_cache *armv8_build_reg_cache(struct target *target) return cache; } -struct reg *armv8_reg_current(struct arm *arm, unsigned regnum) +struct reg *armv8_reg_current(struct arm *arm, unsigned int regnum) { struct reg *r; diff --git a/src/target/armv8.h b/src/target/armv8.h index 156b5f8bb..349c8f002 100644 --- a/src/target/armv8.h +++ b/src/target/armv8.h @@ -329,7 +329,7 @@ static inline unsigned int armv8_curel_from_core_mode(enum arm_mode core_mode) } } -const char *armv8_mode_name(unsigned psr_mode); +const char *armv8_mode_name(unsigned int psr_mode); void armv8_select_reg_access(struct armv8_common *armv8, bool is_aarch64); int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value); diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index 271bd91c3..d1cee8a10 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -417,7 +417,7 @@ static int dpmv8_instr_read_data_r0_64(struct arm_dpm *dpm, } #if 0 -static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, +static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t, target_addr_t addr, uint32_t control) { struct armv8_common *armv8 = dpm->arm->arch_info; @@ -441,8 +441,7 @@ static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, vr += 16 * index_t; cr += 16 * index_t; - LOG_DEBUG("A8: bpwp enable, vr %08x cr %08x", - (unsigned) vr, (unsigned) cr); + LOG_DEBUG("A8: bpwp enable, vr %08" PRIx32 " cr %08" PRIx32, vr, cr); retval = mem_ap_write_atomic_u32(armv8->debug_ap, vr, addr); if (retval != ERROR_OK) @@ -451,7 +450,7 @@ static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, } #endif -static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) +static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t) { struct armv8_common *armv8 = dpm->arm->arch_info; uint32_t cr; @@ -469,7 +468,7 @@ static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) } cr += 16 * index_t; - LOG_DEBUG("A: bpwp disable, cr %08x", (unsigned) cr); + LOG_DEBUG("A: bpwp disable, cr %08" PRIx32, cr); /* clear control register */ return mem_ap_write_atomic_u32(armv8->debug_ap, cr, 0); @@ -501,7 +500,7 @@ static int dpmv8_mrc(struct target *target, int cpnum, ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2), value); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -526,7 +525,7 @@ static int dpmv8_mcr(struct target *target, int cpnum, ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2), value); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -642,7 +641,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode) /* * Common register read, relies on armv8_select_reg_access() having been called. */ -static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) +static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum) { struct armv8_common *armv8 = dpm->arm->arch_info; int retval = ERROR_FAIL; @@ -685,7 +684,7 @@ static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) /* * Common register write, relies on armv8_select_reg_access() having been called. */ -static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) +static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum) { struct armv8_common *armv8 = dpm->arm->arch_info; int retval = ERROR_FAIL; @@ -888,7 +887,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) * cope with the hand-crafted breakpoint code. */ if (arm->target->type->add_breakpoint == dpmv8_add_breakpoint) { - for (unsigned i = 0; i < dpm->nbp; i++) { + for (unsigned int i = 0; i < dpm->nbp; i++) { struct dpm_bp *dbp = dpm->dbp + i; struct breakpoint *bp = dbp->bp; @@ -900,7 +899,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) } /* enable/disable watchpoints */ - for (unsigned i = 0; i < dpm->nwp; i++) { + for (unsigned int i = 0; i < dpm->nwp; i++) { struct dpm_wp *dwp = dpm->dwp + i; struct watchpoint *wp = dwp->wp; @@ -920,7 +919,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) goto done; /* check everything except our scratch register R0 */ - for (unsigned i = 1; i < cache->num_regs; i++) { + for (unsigned int i = 1; i < cache->num_regs; i++) { struct arm_reg *r; /* skip non-existent */ @@ -992,7 +991,7 @@ static int armv8_dpm_read_core_reg(struct target *target, struct reg *r, goto fail; fail: - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); return retval; } @@ -1048,7 +1047,7 @@ static int armv8_dpm_full_context(struct target *target) * Pick some mode with unread registers and read them all. * Repeat until done. */ - for (unsigned i = 0; i < cache->num_regs; i++) { + for (unsigned int i = 0; i < cache->num_regs; i++) { struct arm_reg *r; if (!cache->reg_list[i].exist || cache->reg_list[i].valid) @@ -1086,7 +1085,7 @@ static int armv8_dpm_full_context(struct target *target) } while (did_read); retval = armv8_dpm_modeswitch(dpm, ARM_MODE_ANY); - /* (void) */ dpm->finish(dpm); + dpm->finish(dpm); done: return retval; } @@ -1176,7 +1175,7 @@ static int dpmv8_add_breakpoint(struct target *target, struct breakpoint *bp) if (bp->type == BKPT_SOFT) LOG_DEBUG("using HW bkpt, not SW..."); - for (unsigned i = 0; i < dpm->nbp; i++) { + for (unsigned int i = 0; i < dpm->nbp; i++) { if (!dpm->dbp[i].bp) { retval = dpmv8_bpwp_setup(dpm, &dpm->dbp[i].bpwp, bp->address, bp->length); @@ -1195,7 +1194,7 @@ static int dpmv8_remove_breakpoint(struct target *target, struct breakpoint *bp) struct arm_dpm *dpm = arm->dpm; int retval = ERROR_COMMAND_SYNTAX_ERROR; - for (unsigned i = 0; i < dpm->nbp; i++) { + for (unsigned int i = 0; i < dpm->nbp; i++) { if (dpm->dbp[i].bp == bp) { dpm->dbp[i].bp = NULL; dpm->dbp[i].bpwp.dirty = true; @@ -1209,7 +1208,7 @@ static int dpmv8_remove_breakpoint(struct target *target, struct breakpoint *bp) return retval; } -static int dpmv8_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t, +static int dpmv8_watchpoint_setup(struct arm_dpm *dpm, unsigned int index_t, struct watchpoint *wp) { int retval; @@ -1252,7 +1251,7 @@ static int dpmv8_add_watchpoint(struct target *target, struct watchpoint *wp) int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; if (dpm->bpwp_enable) { - for (unsigned i = 0; i < dpm->nwp; i++) { + for (unsigned int i = 0; i < dpm->nwp; i++) { if (!dpm->dwp[i].wp) { retval = dpmv8_watchpoint_setup(dpm, i, wp); break; @@ -1269,7 +1268,7 @@ static int dpmv8_remove_watchpoint(struct target *target, struct watchpoint *wp) struct arm_dpm *dpm = arm->dpm; int retval = ERROR_COMMAND_SYNTAX_ERROR; - for (unsigned i = 0; i < dpm->nwp; i++) { + for (unsigned int i = 0; i < dpm->nwp; i++) { if (dpm->dwp[i].wp == wp) { dpm->dwp[i].wp = NULL; dpm->dwp[i].bpwp.dirty = true; @@ -1485,7 +1484,7 @@ int armv8_dpm_initialize(struct arm_dpm *dpm) { /* Disable all breakpoints and watchpoints at startup. */ if (dpm->bpwp_disable) { - unsigned i; + unsigned int i; for (i = 0; i < dpm->nbp; i++) { dpm->dbp[i].bpwp.number = i; diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 2de77c960..086aafe19 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -571,7 +571,7 @@ static int cortex_a_instr_read_data_r0_r1(struct arm_dpm *dpm, return retval; } -static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, +static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t, uint32_t addr, uint32_t control) { struct cortex_a_common *a = dpm_to_a(dpm); @@ -595,8 +595,7 @@ static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, vr += 4 * index_t; cr += 4 * index_t; - LOG_DEBUG("A: bpwp enable, vr %08x cr %08x", - (unsigned) vr, (unsigned) cr); + LOG_DEBUG("A: bpwp enable, vr %08" PRIx32 " cr %08" PRIx32, vr, cr); retval = mem_ap_write_atomic_u32(a->armv7a_common.debug_ap, vr, addr); @@ -607,7 +606,7 @@ static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, return retval; } -static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) +static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t) { struct cortex_a_common *a = dpm_to_a(dpm); uint32_t cr; @@ -625,7 +624,7 @@ static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) } cr += 4 * index_t; - LOG_DEBUG("A: bpwp disable, cr %08x", (unsigned) cr); + LOG_DEBUG("A: bpwp disable, cr %08" PRIx32, cr); /* clear control register */ return mem_ap_write_atomic_u32(a->armv7a_common.debug_ap, cr, 0); diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 3b95b648e..e78d2e29b 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -898,7 +898,7 @@ static int cortex_m_debug_entry(struct target *target) arm->core_mode = ARM_MODE_HANDLER; arm->map = armv7m_msp_reg_map; } else { - unsigned control = buf_get_u32(arm->core_cache + unsigned int control = buf_get_u32(arm->core_cache ->reg_list[ARMV7M_CONTROL].value, 0, 3); /* is this thread privileged? */ @@ -989,6 +989,18 @@ static int cortex_m_poll_one(struct target *target) * and keep it until the next poll to allow its detection */ return ERROR_OK; } + + /* refresh status bits */ + retval = cortex_m_read_dhcsr_atomic_sticky(target); + if (retval != ERROR_OK) + return retval; + + /* If still under reset, quit and re-check at next poll */ + if (cortex_m->dcb_dhcsr_cumulated_sticky & S_RESET_ST) { + cortex_m->dcb_dhcsr_cumulated_sticky &= ~S_RESET_ST; + return ERROR_OK; + } + /* S_RESET_ST was expected (in a reset command). Continue processing * to quickly get out of TARGET_RESET state */ } @@ -1521,7 +1533,7 @@ static int cortex_m_step(struct target *target, int current, /* if no bkpt instruction is found at pc then we can perform * a normal step, otherwise we have to manually step over the bkpt * instruction - as such simulate a step */ - if (bkpt_inst_found == false) { + if (!bkpt_inst_found) { if (cortex_m->isrmasking_mode != CORTEX_M_ISRMASK_AUTO) { /* Automatic ISR masking mode off: Just step over the next * instruction, with interrupts on or off as appropriate. */ @@ -2081,11 +2093,9 @@ static int cortex_m_set_watchpoint(struct target *target, struct watchpoint *wat target_write_u32(target, comparator->dwt_comparator_address + 8, comparator->function); - LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%d 0x%08x 0x%x 0x%05x", + LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%d 0x%08" PRIx32 " 0x%" PRIx32 " 0x%05" PRIx32, watchpoint->unique_id, dwt_num, - (unsigned) comparator->comp, - (unsigned) comparator->mask, - (unsigned) comparator->function); + comparator->comp, comparator->mask, comparator->function); return ERROR_OK; } @@ -2102,9 +2112,9 @@ static int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *w unsigned int dwt_num = watchpoint->number; - LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%u address: 0x%08x clear", + LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%u address: " TARGET_ADDR_FMT " clear", watchpoint->unique_id, dwt_num, - (unsigned) watchpoint->address); + watchpoint->address); if (dwt_num >= cortex_m->dwt_num_comp) { LOG_TARGET_DEBUG(target, "Invalid DWT Comparator number in watchpoint"); @@ -2144,7 +2154,7 @@ int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint } /* hardware allows address masks of up to 32K */ - unsigned mask; + unsigned int mask; for (mask = 0; mask < 16; mask++) { if ((1u << mask) == watchpoint->length) @@ -2380,7 +2390,7 @@ static int cortex_m_dwt_set_reg(struct reg *reg, uint8_t *buf) struct dwt_reg { uint32_t addr; const char *name; - unsigned size; + unsigned int size; }; static const struct dwt_reg dwt_base_regs[] = { @@ -2948,7 +2958,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command) static const struct { char name[10]; - unsigned mask; + unsigned int mask; } vec_ids[] = { { "hard_err", VC_HARDERR, }, { "int_err", VC_INTERR, }, @@ -2974,7 +2984,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command) return retval; if (CMD_ARGC > 0) { - unsigned catch = 0; + unsigned int catch = 0; if (CMD_ARGC == 1) { if (strcmp(CMD_ARGV[0], "all") == 0) { @@ -2986,7 +2996,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command) goto write; } while (CMD_ARGC-- > 0) { - unsigned i; + unsigned int i; for (i = 0; i < ARRAY_SIZE(vec_ids); i++) { if (strcmp(CMD_ARGV[CMD_ARGC], vec_ids[i].name) != 0) continue; @@ -3019,7 +3029,7 @@ write: */ } - for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(vec_ids); i++) { command_print(CMD, "%9s: %s", vec_ids[i].name, (demcr & vec_ids[i].mask) ? "catch" : "ignore"); } diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c index 1e7180318..0547947ef 100644 --- a/src/target/dsp563xx.c +++ b/src/target/dsp563xx.c @@ -220,9 +220,9 @@ enum dsp563xx_reg_idx { }; static const struct { - unsigned id; + unsigned int id; const char *name; - unsigned bits; + unsigned int bits; /* effective addressing mode encoding */ uint8_t eame; uint32_t instr_mask; @@ -1135,7 +1135,7 @@ static int dsp563xx_resume(struct target *target, current = 0; } - LOG_DEBUG("%s %08X %08X", __func__, current, (unsigned) address); + LOG_DEBUG("%s %08X %08" TARGET_PRIXADDR, __func__, current, address); err = dsp563xx_restore_context(target); if (err != ERROR_OK) @@ -1199,7 +1199,7 @@ static int dsp563xx_step_ex(struct target *target, current = 0; } - LOG_DEBUG("%s %08X %08X", __func__, current, (unsigned) address); + LOG_DEBUG("%s %08X %08" PRIX32, __func__, current, address); err = dsp563xx_jtag_debug_request(target); if (err != ERROR_OK) @@ -1260,15 +1260,15 @@ static int dsp563xx_step_ex(struct target *target, err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABFR, &dr_in); if (err != ERROR_OK) return err; - LOG_DEBUG("fetch: %08X", (unsigned) dr_in&0x00ffffff); + LOG_DEBUG("fetch: %08" PRIX32, dr_in & 0x00ffffff); err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABDR, &dr_in); if (err != ERROR_OK) return err; - LOG_DEBUG("decode: %08X", (unsigned) dr_in&0x00ffffff); + LOG_DEBUG("decode: %08" PRIX32, dr_in & 0x00ffffff); err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABEX, &dr_in); if (err != ERROR_OK) return err; - LOG_DEBUG("execute: %08X", (unsigned) dr_in&0x00ffffff); + LOG_DEBUG("execute: %08" PRIX32, dr_in & 0x00ffffff); /* reset trace mode */ err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OSCR, 0x000000); diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c index c90bca3c1..8b3b1c49b 100644 --- a/src/target/dsp5680xx.c +++ b/src/target/dsp5680xx.c @@ -1172,7 +1172,7 @@ static int dsp5680xx_read(struct target *t, target_addr_t a, uint32_t size, dsp5680xx_context.flush = 0; int counter = FLUSH_COUNT_READ_WRITE; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { if (--counter == 0) { dsp5680xx_context.flush = 1; counter = FLUSH_COUNT_READ_WRITE; diff --git a/src/target/esirisc.c b/src/target/esirisc.c index 14d34ff04..611141439 100644 --- a/src/target/esirisc.c +++ b/src/target/esirisc.c @@ -283,7 +283,7 @@ static int esirisc_save_context(struct target *target) LOG_DEBUG("-"); - for (unsigned i = 0; i < esirisc->reg_cache->num_regs; ++i) { + for (unsigned int i = 0; i < esirisc->reg_cache->num_regs; ++i) { struct reg *reg = esirisc->reg_cache->reg_list + i; struct esirisc_reg *reg_info = reg->arch_info; @@ -300,7 +300,7 @@ static int esirisc_restore_context(struct target *target) LOG_DEBUG("-"); - for (unsigned i = 0; i < esirisc->reg_cache->num_regs; ++i) { + for (unsigned int i = 0; i < esirisc->reg_cache->num_regs; ++i) { struct reg *reg = esirisc->reg_cache->reg_list + i; struct esirisc_reg *reg_info = reg->arch_info; diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c index 376ea1db7..a70d9d74b 100644 --- a/src/target/esirisc_trace.c +++ b/src/target/esirisc_trace.c @@ -287,9 +287,9 @@ static int esirisc_trace_init(struct target *target) } static int esirisc_trace_buf_get_u32(uint8_t *buffer, uint32_t size, - unsigned *pos, unsigned count, uint32_t *value) + unsigned int *pos, unsigned int count, uint32_t *value) { - const unsigned num_bits = size * 8; + const unsigned int num_bits = size * 8; if (*pos+count > num_bits) return ERROR_FAIL; @@ -301,7 +301,7 @@ static int esirisc_trace_buf_get_u32(uint8_t *buffer, uint32_t size, } static int esirisc_trace_buf_get_pc(struct target *target, uint8_t *buffer, uint32_t size, - unsigned *pos, uint32_t *value) + unsigned int *pos, uint32_t *value) { struct esirisc_common *esirisc = target_to_esirisc(target); struct esirisc_trace *trace_info = &esirisc->trace_info; @@ -380,7 +380,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b const uint32_t num_bits = size * 8; int retval; - unsigned pos = 0; + unsigned int pos = 0; while (pos < num_bits) { uint32_t id; @@ -484,7 +484,7 @@ static int esirisc_trace_analyze_simple(struct command_invocation *cmd, uint8_t const uint32_t num_bits = size * 8; int retval; - unsigned pos = 0; + unsigned int pos = 0; while (pos < num_bits) { uint32_t pc; diff --git a/src/target/etb.h b/src/target/etb.h index fa75600ad..1d0c08b2c 100644 --- a/src/target/etb.h +++ b/src/target/etb.h @@ -32,7 +32,7 @@ struct etb { uint32_t ram_width; /** how much trace buffer to fill after trigger */ - unsigned trigger_percent; + unsigned int trigger_percent; }; struct etb_reg { diff --git a/src/target/etm.c b/src/target/etm.c index d083017f7..53d5cb68c 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -220,10 +220,10 @@ static const struct reg_arch_type etm_scan6_type = { /* Look up register by ID ... most ETM instances only * support a subset of the possible registers. */ -static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned id) +static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned int id) { struct reg_cache *cache = etm_ctx->reg_cache; - unsigned i; + unsigned int i; for (i = 0; i < cache->num_regs; i++) { struct etm_reg *reg = cache->reg_list[i].arch_info; @@ -238,9 +238,9 @@ static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned id) return NULL; } -static void etm_reg_add(unsigned bcd_vers, struct arm_jtag *jtag_info, +static void etm_reg_add(unsigned int bcd_vers, struct arm_jtag *jtag_info, struct reg_cache *cache, struct etm_reg *ereg, - const struct etm_reg_info *r, unsigned nreg) + const struct etm_reg_info *r, unsigned int nreg) { struct reg *reg = cache->reg_list; @@ -281,7 +281,7 @@ struct reg_cache *etm_build_reg_cache(struct target *target, struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache)); struct reg *reg_list = NULL; struct etm_reg *arch_info = NULL; - unsigned bcd_vers, config; + unsigned int bcd_vers, config; /* the actual registers are kept in two arrays */ reg_list = calloc(128, sizeof(struct reg)); @@ -320,9 +320,8 @@ struct reg_cache *etm_build_reg_cache(struct target *target, etm_reg_add(0x20, jtag_info, reg_cache, arch_info, etm_core + 1, 1); etm_get_reg(reg_list + 1); - etm_ctx->id = buf_get_u32( - arch_info[1].value, 0, 32); - LOG_DEBUG("ETM ID: %08x", (unsigned) etm_ctx->id); + etm_ctx->id = buf_get_u32(arch_info[1].value, 0, 32); + LOG_DEBUG("ETM ID: %08" PRIx32, etm_ctx->id); bcd_vers = 0x10 + (((etm_ctx->id) >> 4) & 0xff); } else { @@ -1495,7 +1494,7 @@ COMMAND_HANDLER(handle_etm_info_command) etm_get_reg(etm_sys_config_reg); config = buf_get_u32(etm_sys_config_reg->value, 0, 32); - LOG_DEBUG("ETM SYS CONFIG %08x", (unsigned) config); + LOG_DEBUG("ETM SYS CONFIG %08" PRIx32, config); max_port_size = config & 0x7; if (etm->bcd_vers >= 0x30) @@ -1591,7 +1590,7 @@ COMMAND_HANDLER(handle_etm_status_command) if (!reg) return ERROR_FAIL; if (etm_get_reg(reg) == ERROR_OK) { - unsigned s = buf_get_u32(reg->value, 0, reg->size); + unsigned int s = buf_get_u32(reg->value, 0, reg->size); command_print(CMD, "etm: %s%s%s%s", /* bit(1) == progbit */ diff --git a/src/target/hla_target.c b/src/target/hla_target.c index d6f2afb4e..6b0d2e95e 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -258,7 +258,7 @@ static int adapter_debug_entry(struct target *target) arm->core_mode = ARM_MODE_HANDLER; arm->map = armv7m_msp_reg_map; } else { - unsigned control = buf_get_u32(arm->core_cache + unsigned int control = buf_get_u32(arm->core_cache ->reg_list[ARMV7M_CONTROL].value, 0, 3); /* is this thread privileged? */ diff --git a/src/target/image.c b/src/target/image.c index 9175c200a..6864e4e82 100644 --- a/src/target/image.c +++ b/src/target/image.c @@ -194,7 +194,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, } while (count-- > 0) { - unsigned value; + unsigned int value; sscanf(&lpsz_line[bytes_read], "%2x", &value); ihex->buffer[cooked_bytes] = (uint8_t)value; cal_checksum += (uint8_t)ihex->buffer[cooked_bytes]; @@ -863,7 +863,7 @@ static int image_mot_buffer_complete_inner(struct image *image, } while (count-- > 0) { - unsigned value; + unsigned int value; sscanf(&lpsz_line[bytes_read], "%2x", &value); mot->buffer[cooked_bytes] = (uint8_t)value; cal_checksum += (uint8_t)mot->buffer[cooked_bytes]; diff --git a/src/target/lakemont.c b/src/target/lakemont.c index 1fcd6426a..0340d0d0b 100644 --- a/src/target/lakemont.c +++ b/src/target/lakemont.c @@ -67,7 +67,7 @@ static const struct { const char *name; uint64_t op; uint8_t pm_idx; - unsigned bits; + unsigned int bits; enum reg_type type; const char *group; const char *feature; @@ -597,7 +597,7 @@ static int read_all_core_hw_regs(struct target *t) { int err; uint32_t regval; - unsigned i; + unsigned int i; struct x86_32_common *x86_32 = target_to_x86_32(t); for (i = 0; i < (x86_32->cache->num_regs); i++) { if (regs[i].pm_idx == NOT_AVAIL_REG) @@ -616,7 +616,7 @@ static int read_all_core_hw_regs(struct target *t) static int write_all_core_hw_regs(struct target *t) { int err; - unsigned i; + unsigned int i; struct x86_32_common *x86_32 = target_to_x86_32(t); for (i = 0; i < (x86_32->cache->num_regs); i++) { if (regs[i].pm_idx == NOT_AVAIL_REG) diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c index 61a9475e6..411402077 100644 --- a/src/target/mem_ap.c +++ b/src/target/mem_ap.c @@ -75,7 +75,6 @@ static void mem_ap_deinit_target(struct target *target) free(target->private_config); free(target->arch_info); - return; } static int mem_ap_arch_state(struct target *target) diff --git a/src/target/mips32.c b/src/target/mips32.c index 81faab72d..dd40558a1 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -31,10 +31,10 @@ static const char *mips_isa_strings[] = { /* * GDB registers - * based on gdb-7.6.2/gdb/features/mips-{fpu,cp0,cpu}.xml + * based on gdb-7.6.2/gdb/features/mips-{fpu,cp0,cpu,dsp}.xml */ static const struct { - unsigned id; + unsigned int id; const char *name; enum reg_type type; const char *group; @@ -156,6 +156,22 @@ static const struct { "org.gnu.gdb.mips.cpu", 0 }, { MIPS32_REGLIST_C0_GUESTCTL1_INDEX, "guestCtl1", REG_TYPE_INT, NULL, "org.gnu.gdb.mips.cp0", 0 }, + + { MIPS32_REGLIST_DSP_INDEX + 0, "hi1", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, + { MIPS32_REGLIST_DSP_INDEX + 1, "lo1", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, + { MIPS32_REGLIST_DSP_INDEX + 2, "hi2", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, + { MIPS32_REGLIST_DSP_INDEX + 3, "lo2", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, + { MIPS32_REGLIST_DSP_INDEX + 4, "hi3", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, + { MIPS32_REGLIST_DSP_INDEX + 5, "lo3", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, + + { MIPS32_REGLIST_DSP_DSPCTL_INDEX, "dspctl", REG_TYPE_INT, NULL, + "org.gnu.gdb.mips.dsp", 0 }, }; #define MIPS32_NUM_REGS ARRAY_SIZE(mips32_regs) @@ -211,13 +227,11 @@ static const struct { static const struct { const char *name; } mips32_dsp_regs[MIPS32NUMDSPREGS] = { - { "hi0"}, { "hi1"}, - { "hi2"}, - { "hi3"}, - { "lo0"}, { "lo1"}, + { "hi2"}, { "lo2"}, + { "hi3"}, { "lo3"}, { "control"}, }; @@ -328,7 +342,12 @@ static int mips32_read_core_reg(struct target *target, unsigned int num) if (num >= MIPS32_NUM_REGS) return ERROR_COMMAND_SYNTAX_ERROR; - if (num >= MIPS32_REGLIST_C0_INDEX) { + if (num >= MIPS32_REGLIST_DSP_INDEX) { + /* DSP */ + cnum = num - MIPS32_REGLIST_DSP_INDEX; + reg_value = mips32->core_regs.dsp[cnum]; + buf_set_u32(mips32->core_cache->reg_list[num].value, 0, 32, reg_value); + } else if (num >= MIPS32_REGLIST_C0_INDEX) { /* CP0 */ cnum = num - MIPS32_REGLIST_C0_INDEX; reg_value = mips32->core_regs.cp0[cnum]; @@ -371,7 +390,12 @@ static int mips32_write_core_reg(struct target *target, unsigned int num) if (num >= MIPS32_NUM_REGS) return ERROR_COMMAND_SYNTAX_ERROR; - if (num >= MIPS32_REGLIST_C0_INDEX) { + if (num >= MIPS32_REGLIST_DSP_INDEX) { + /* DSP */ + cnum = num - MIPS32_REGLIST_DSP_INDEX; + reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32); + mips32->core_regs.dsp[cnum] = (uint32_t)reg_value; + } else if (num >= MIPS32_REGLIST_C0_INDEX) { /* CP0 */ cnum = num - MIPS32_REGLIST_C0_INDEX; reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32); @@ -1026,10 +1050,20 @@ int mips32_cpu_probe(struct target *target) /* reads dsp implementation info from CP0 Config3 register {DSPP, DSPREV}*/ static void mips32_read_config_dsp(struct mips32_common *mips32, struct mips_ejtag *ejtag_info) { - uint32_t dsp_present = ((ejtag_info->config[3] & MIPS32_CONFIG3_DSPP_MASK) >> MIPS32_CONFIG3_DSPP_SHIFT); + uint32_t retval, status_value, dsp_present; + bool dsp_enabled; + + retval = mips32_cp0_read(ejtag_info, &status_value, MIPS32_C0_STATUS, 0); + if (retval != ERROR_OK) { + LOG_ERROR("Failed to read cp0 status register"); + return; + } + + dsp_present = ((ejtag_info->config[3] & MIPS32_CONFIG3_DSPP_MASK) >> MIPS32_CONFIG3_DSPP_SHIFT); + dsp_enabled = (status_value & BIT(MIPS32_CP0_STATUS_MX_SHIFT)) != 0; if (dsp_present) { mips32->dsp_imp = ((ejtag_info->config[3] & MIPS32_CONFIG3_DSPREV_MASK) >> MIPS32_CONFIG3_DSPREV_SHIFT) + 1; - LOG_USER("DSP implemented: %s, rev %d", "yes", mips32->dsp_imp); + LOG_USER("DSP implemented: rev %d, %s", mips32->dsp_imp, dsp_enabled ? "enabled" : "disabled"); } else { LOG_USER("DSP implemented: %s", "no"); } @@ -1153,7 +1187,7 @@ int mips32_read_config_regs(struct target *target) mips32->isa_imp = MIPS32_MIPS16; LOG_USER("ISA implemented: %s%s", "MIPS32, MIPS16", buf); } else if (ejtag_info->config_regs >= 4) { /* config3 implemented */ - unsigned isa_imp = (ejtag_info->config[3] & MIPS32_CONFIG3_ISA_MASK) >> MIPS32_CONFIG3_ISA_SHIFT; + unsigned int isa_imp = (ejtag_info->config[3] & MIPS32_CONFIG3_ISA_MASK) >> MIPS32_CONFIG3_ISA_SHIFT; if (isa_imp == 1) { mips32->isa_imp = MMIPS32_ONLY; LOG_USER("ISA implemented: %s%s", "microMIPS32", buf); @@ -1747,13 +1781,11 @@ static int mips32_pracc_read_dsp_reg(struct mips_ejtag *ejtag_info, uint32_t *va }; uint32_t dsp_read_code[] = { - MIPS32_MFHI(isa, t0), /* mfhi t0 ($ac0) - OPCODE - 0x00004010 */ MIPS32_DSP_MFHI(t0, 1), /* mfhi t0,$ac1 - OPCODE - 0x00204010 */ - MIPS32_DSP_MFHI(t0, 2), /* mfhi t0,$ac2 - OPCODE - 0x00404010 */ - MIPS32_DSP_MFHI(t0, 3), /* mfhi t0,$ac3 - OPCODE - 0x00604010*/ - MIPS32_MFLO(isa, t0), /* mflo t0 ($ac0) - OPCODE - 0x00004012 */ MIPS32_DSP_MFLO(t0, 1), /* mflo t0,$ac1 - OPCODE - 0x00204012 */ + MIPS32_DSP_MFHI(t0, 2), /* mfhi t0,$ac2 - OPCODE - 0x00404010 */ MIPS32_DSP_MFLO(t0, 2), /* mflo t0,$ac2 - OPCODE - 0x00404012 */ + MIPS32_DSP_MFHI(t0, 3), /* mfhi t0,$ac3 - OPCODE - 0x00604010*/ MIPS32_DSP_MFLO(t0, 3), /* mflo t0,$ac3 - OPCODE - 0x00604012 */ MIPS32_DSP_RDDSP(t0, 0x3F), /* rddsp t0, 0x3f (DSPCtl) - OPCODE - 0x7c3f44b8 */ }; @@ -1824,13 +1856,11 @@ static int mips32_pracc_write_dsp_reg(struct mips_ejtag *ejtag_info, uint32_t va }; uint32_t dsp_write_code[] = { - MIPS32_MTHI(isa, t0), /* mthi t0 ($ac0) - OPCODE - 0x01000011 */ MIPS32_DSP_MTHI(t0, 1), /* mthi t0, $ac1 - OPCODE - 0x01000811 */ - MIPS32_DSP_MTHI(t0, 2), /* mthi t0, $ac2 - OPCODE - 0x01001011 */ - MIPS32_DSP_MTHI(t0, 3), /* mthi t0, $ac3 - OPCODE - 0x01001811 */ - MIPS32_MTLO(isa, t0), /* mtlo t0 ($ac0) - OPCODE - 0x01000013 */ MIPS32_DSP_MTLO(t0, 1), /* mtlo t0, $ac1 - OPCODE - 0x01000813 */ + MIPS32_DSP_MTHI(t0, 2), /* mthi t0, $ac2 - OPCODE - 0x01001011 */ MIPS32_DSP_MTLO(t0, 2), /* mtlo t0, $ac2 - OPCODE - 0x01001013 */ + MIPS32_DSP_MTHI(t0, 3), /* mthi t0, $ac3 - OPCODE - 0x01001811 */ MIPS32_DSP_MTLO(t0, 3), /* mtlo t0, $ac3 - OPCODE - 0x01001813 */ MIPS32_DSP_WRDSP(t0, 0x1F), /* wrdsp t0, 0x1f (DSPCtl) - OPCODE - 0x7d00fcf8*/ }; @@ -2107,15 +2137,18 @@ static int mips32_dsp_find_register_by_name(const char *reg_name) * * @return ERROR_OK on success; error code on failure. */ -static int mips32_dsp_get_all_regs(struct command_invocation *cmd, struct mips_ejtag *ejtag_info) +static int mips32_dsp_get_all_regs(struct command_invocation *cmd, struct mips32_common *mips32) { uint32_t value = 0; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; for (int i = 0; i < MIPS32NUMDSPREGS; i++) { int retval = mips32_pracc_read_dsp_reg(ejtag_info, &value, i); if (retval != ERROR_OK) { command_print(CMD, "couldn't access reg %s", mips32_dsp_regs[i].name); return retval; } + mips32->core_regs.dsp[i] = value; + mips32->core_cache->reg_list[MIPS32_REGLIST_DSP_INDEX + i].dirty = 1; command_print(CMD, "%*s: 0x%8.8x", 7, mips32_dsp_regs[i].name, value); } return ERROR_OK; @@ -2132,20 +2165,28 @@ static int mips32_dsp_get_all_regs(struct command_invocation *cmd, struct mips_e * * @return ERROR_OK on success; error code on failure. */ -static int mips32_dsp_get_register(struct command_invocation *cmd, struct mips_ejtag *ejtag_info) +static int mips32_dsp_get_register(struct command_invocation *cmd, struct mips32_common *mips32) { uint32_t value = 0; int index = mips32_dsp_find_register_by_name(CMD_ARGV[0]); + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; if (index == MIPS32NUMDSPREGS) { command_print(CMD, "ERROR: register '%s' not found", CMD_ARGV[0]); return ERROR_COMMAND_SYNTAX_ERROR; } int retval = mips32_pracc_read_dsp_reg(ejtag_info, &value, index); - if (retval != ERROR_OK) + if (retval != ERROR_OK) { command_print(CMD, "ERROR: Could not access dsp register %s", CMD_ARGV[0]); - else - command_print(CMD, "0x%8.8x", value); + return retval; + } + + command_print(CMD, "0x%8.8x", value); + + if (mips32->core_regs.dsp[index] != value) { + mips32->core_regs.dsp[index] = value; + mips32->core_cache->reg_list[MIPS32_REGLIST_DSP_INDEX + index].dirty = 1; + } return retval; } @@ -2162,9 +2203,10 @@ static int mips32_dsp_get_register(struct command_invocation *cmd, struct mips_e * * @return ERROR_OK on success; error code on failure. */ -static int mips32_dsp_set_register(struct command_invocation *cmd, struct mips_ejtag *ejtag_info) +static int mips32_dsp_set_register(struct command_invocation *cmd, struct mips32_common *mips32) { uint32_t value; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; int index = mips32_dsp_find_register_by_name(CMD_ARGV[0]); if (index == MIPS32NUMDSPREGS) { command_print(CMD, "ERROR: register '%s' not found", CMD_ARGV[0]); @@ -2174,8 +2216,13 @@ static int mips32_dsp_set_register(struct command_invocation *cmd, struct mips_e COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); int retval = mips32_pracc_write_dsp_reg(ejtag_info, value, index); - if (retval != ERROR_OK) + if (retval != ERROR_OK) { command_print(CMD, "Error: could not write to dsp register %s", CMD_ARGV[0]); + return retval; + } + + mips32->core_regs.dsp[index] = value; + mips32->core_cache->reg_list[MIPS32_REGLIST_DSP_INDEX + index].dirty = 1; return retval; } @@ -2193,7 +2240,6 @@ COMMAND_HANDLER(mips32_handle_dsp_command) int retval, tmp; struct target *target = get_current_target(CMD_CTX); struct mips32_common *mips32 = target_to_mips32(target); - struct mips_ejtag *ejtag_info = &mips32->ejtag_info; retval = mips32_verify_pointer(CMD, mips32); if (retval != ERROR_OK) @@ -2217,10 +2263,10 @@ COMMAND_HANDLER(mips32_handle_dsp_command) switch (CMD_ARGC) { case 0: - retval = mips32_dsp_get_all_regs(CMD, ejtag_info); + retval = mips32_dsp_get_all_regs(CMD, mips32); break; case 1: - retval = mips32_dsp_get_register(CMD, ejtag_info); + retval = mips32_dsp_get_register(CMD, mips32); break; case 2: tmp = *CMD_ARGV[0]; @@ -2228,7 +2274,7 @@ COMMAND_HANDLER(mips32_handle_dsp_command) command_print(CMD, "Error: invalid dsp command format"); retval = ERROR_COMMAND_ARGUMENT_INVALID; } else { - retval = mips32_dsp_set_register(CMD, ejtag_info); + retval = mips32_dsp_set_register(CMD, mips32); } break; default: diff --git a/src/target/mips32.h b/src/target/mips32.h index a557f3117..3d919e7dd 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -69,7 +69,7 @@ #define MIPS32_SCAN_DELAY_LEGACY_MODE 2000000 -#define MIPS32NUMDSPREGS 9 +#define MIPS32NUMDSPREGS 7 /* Bit Mask indicating CP0 register supported by this core */ #define MIPS_CP0_MK4 0x0001 @@ -78,6 +78,7 @@ #define MIPS_CP0_IAPTIV 0x0008 /* CP0 Status register fields */ +#define MIPS32_CP0_STATUS_MX_SHIFT 24 #define MIPS32_CP0_STATUS_FR_SHIFT 26 #define MIPS32_CP0_STATUS_CU1_SHIFT 29 @@ -211,6 +212,7 @@ static const struct mips32_cp0 { enum { MIPS32_PC = 37, MIPS32_FIR = 71, + MIPS32_DSPCTL = 78, MIPS32NUMCOREREGS }; @@ -220,11 +222,13 @@ enum { #define MIPS32_REG_FP_COUNT 32 #define MIPS32_REG_FPC_COUNT 2 #define MIPS32_REG_C0_COUNT 5 +#define MIPS32_REG_DSP_COUNT 7 #define MIPS32_REGLIST_GP_INDEX 0 #define MIPS32_REGLIST_FP_INDEX (MIPS32_REGLIST_GP_INDEX + MIPS32_REG_GP_COUNT) #define MIPS32_REGLIST_FPC_INDEX (MIPS32_REGLIST_FP_INDEX + MIPS32_REG_FP_COUNT) #define MIPS32_REGLIST_C0_INDEX (MIPS32_REGLIST_FPC_INDEX + MIPS32_REG_FPC_COUNT) +#define MIPS32_REGLIST_DSP_INDEX (MIPS32_REGLIST_C0_INDEX + MIPS32_REG_C0_COUNT) #define MIPS32_REGLIST_C0_STATUS_INDEX (MIPS32_REGLIST_C0_INDEX + 0) #define MIPS32_REGLIST_C0_BADVADDR_INDEX (MIPS32_REGLIST_C0_INDEX + 1) @@ -238,6 +242,10 @@ enum { #define MIPS32_REG_C0_PC_INDEX 3 #define MIPS32_REG_C0_GUESTCTL1_INDEX 4 +#define MIPS32_REGLIST_DSP_DSPCTL_INDEX (MIPS32_REGLIST_DSP_INDEX + 6) + +#define MIPS32_REG_DSP_DSPCTL_INDEX 6 + enum mips32_isa_mode { MIPS32_ISA_MIPS32 = 0, MIPS32_ISA_MIPS16E = 1, @@ -377,6 +385,7 @@ struct mips32_core_regs { uint64_t fpr[MIPS32_REG_FP_COUNT]; uint32_t fpcr[MIPS32_REG_FPC_COUNT]; uint32_t cp0[MIPS32_REG_C0_COUNT]; + uint32_t dsp[MIPS32_REG_DSP_COUNT]; }; struct mips32_common { diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index aaf3875fb..587e20d2b 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -212,7 +212,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i store_pending--; } else { /* read/fetch access */ - if (!final_check) { /* executing function code */ + if (!final_check) { /* executing function code */ /* check address */ if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) { LOG_DEBUG("reading at unexpected address %" PRIx32 ", expected %x", @@ -243,7 +243,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i if (code_count == ctx->code_count) /* last instruction, start final check */ final_check = 1; - } else { /* final check after function code shifted out */ + } else { /* final check after function code shifted out */ /* check address */ if (ejtag_info->pa_addr == MIPS32_PRACC_TEXT) { if (!pass) { /* first pass through pracc text */ @@ -275,7 +275,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i } instr = MIPS32_NOP; /* shift out NOPs instructions */ code_count++; - } + } /* Send instruction out */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); @@ -370,7 +370,7 @@ int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_in return ERROR_FAIL; } - unsigned num_clocks = + unsigned int num_clocks = ((uint64_t)(ejtag_info->scan_delay) * adapter_get_speed_khz() + 500000) / 1000000; uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC; @@ -878,6 +878,7 @@ int mips32_pracc_write_regs(struct mips32_common *mips32) uint32_t *c0rs = mips32->core_regs.cp0; bool fpu_in_64bit = ((c0rs[0] & BIT(MIPS32_CP0_STATUS_FR_SHIFT)) != 0); bool fp_enabled = ((c0rs[0] & BIT(MIPS32_CP0_STATUS_CU1_SHIFT)) != 0); + bool dsp_enabled = ((c0rs[0] & BIT(MIPS32_CP0_STATUS_MX_SHIFT)) != 0); uint32_t rel = (ejtag_info->config[0] & MIPS32_CONFIG0_AR_MASK) >> MIPS32_CONFIG0_AR_SHIFT; pracc_queue_init(&ctx); @@ -943,6 +944,34 @@ int mips32_pracc_write_regs(struct mips32_common *mips32) pracc_add(&ctx, 0, MIPS32_EHB(ctx.isa)); } + /* Store DSP Accumulators */ + if (mips32->dsp_imp && dsp_enabled) { + /* Struct of mips32_dsp_regs: {ac{hi, lo}1-3, dspctl} */ + uint32_t *dspr = mips32->core_regs.dsp; + size_t dsp_regs = ARRAY_SIZE(mips32->core_regs.dsp); + + /* Starts from ac1, core_regs.dsp contains dspctl register, therefore - 1 */ + for (size_t index = 0; index != ((dsp_regs - 1) / 2); index++) { + /* Every accumulator have 2 registers, hi and lo, and core_regs.dsp stores ac[1~3] */ + /* reads hi[ac] from core_regs array */ + pracc_add_li32(&ctx, 2, dspr[index * 2], 0); + /* reads lo[ac] from core_regs array */ + pracc_add_li32(&ctx, 3, dspr[(index * 2) + 1], 0); + + /* Write to accumulator 1~3 and index starts from 0, therefore ac = index + 1 */ + size_t ac = index + 1; + pracc_add(&ctx, 0, MIPS32_DSP_MTHI(2, ac)); + pracc_add(&ctx, 0, MIPS32_DSP_MTLO(3, ac)); + } + + /* DSPCTL is the last element of register store */ + pracc_add_li32(&ctx, 2, dspr[6], 0); + pracc_add(&ctx, 0, MIPS32_DSP_WRDSP(2, 0x1F)); + + if (rel > MIPS32_RELEASE_1) + pracc_add(&ctx, 0, MIPS32_EHB(ctx.isa)); + } + /* load registers 2 to 31 with li32, optimize */ for (int i = 2; i < 32; i++) pracc_add_li32(&ctx, i, gprs[i], 1); @@ -1064,14 +1093,16 @@ int mips32_pracc_read_regs(struct mips32_common *mips32) unsigned int offset_cp0 = ((uint8_t *)&core_regs->cp0[0]) - (uint8_t *)core_regs; unsigned int offset_fpr = ((uint8_t *)&core_regs->fpr[0]) - (uint8_t *)core_regs; unsigned int offset_fpcr = ((uint8_t *)&core_regs->fpcr[0]) - (uint8_t *)core_regs; - bool fp_enabled; + unsigned int offset_dsp = ((uint8_t *)&core_regs->dsp[0]) - (uint8_t *)core_regs; + bool fp_enabled, dsp_enabled; /* - * This procedure has to be in 2 distinctive steps, because we can - * only know whether FP is enabled after reading CP0. + * This procedure has to be in 3 distinctive steps, because we can + * only know whether FP and DSP are enabled after reading CP0. * - * Step 1: Read everything except CP1 stuff + * Step 1: Read everything except CP1 and DSP stuff * Step 2: Read CP1 stuff if FP is implemented + * Step 3: Read DSP registers if dsp is implemented */ pracc_queue_init(&ctx); @@ -1149,6 +1180,50 @@ int mips32_pracc_read_regs(struct mips32_common *mips32) pracc_queue_free(&ctx); } + + dsp_enabled = (mips32->core_regs.cp0[MIPS32_REG_C0_STATUS_INDEX] & BIT(MIPS32_CP0_STATUS_MX_SHIFT)) != 0; + if (mips32->dsp_imp && dsp_enabled) { + pracc_queue_init(&ctx); + + mips32_pracc_store_regs_set_base_addr(&ctx); + + /* Struct of mips32_dsp_regs[7]: {ac{hi, lo}1-3, dspctl} */ + size_t dsp_regs = ARRAY_SIZE(mips32->core_regs.dsp); + /* Starts from ac1, core_regs.dsp have dspctl register, therefore - 1 */ + for (size_t index = 0; index != ((dsp_regs - 1) / 2); index++) { + /* Every accumulator have 2 registers, hi&lo, and core_regs.dsp stores ac[1~3] */ + /* Reads offset of hi[ac] from core_regs array */ + size_t offset_hi = offset_dsp + ((index * 2) * sizeof(uint32_t)); + /* Reads offset of lo[ac] from core_regs array */ + size_t offset_lo = offset_dsp + (((index * 2) + 1) * sizeof(uint32_t)); + + /* DSP Ac registers starts from 1 and index starts from 0, therefore ac = index + 1 */ + size_t ac = index + 1; + pracc_add(&ctx, 0, MIPS32_DSP_MFHI(8, ac)); + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + offset_hi, + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + offset_hi, 1)); + pracc_add(&ctx, 0, MIPS32_DSP_MFLO(8, ac)); + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + offset_lo, + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + offset_lo, 1)); + } + + /* DSPCTL is the last element of register store */ + pracc_add(&ctx, 0, MIPS32_DSP_RDDSP(8, 0x3F)); + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + offset_dsp + ((dsp_regs - 1) * sizeof(uint32_t)), + MIPS32_SW(ctx.isa, 8, + PRACC_OUT_OFFSET + offset_dsp + ((dsp_regs - 1) * sizeof(uint32_t)), 1)); + + mips32_pracc_store_regs_restore(&ctx); + + /* jump to start */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); + /* load $15 in DeSave */ + pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, 31, 0)); + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, (uint32_t *)&mips32->core_regs, 1); + + pracc_queue_free(&ctx); + } return ctx.retval; } @@ -1287,7 +1362,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are pracc_swap16_array(ejtag_info, jmp_code, ARRAY_SIZE(jmp_code)); /* execute jump code, with no address check */ - for (unsigned i = 0; i < ARRAY_SIZE(jmp_code); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(jmp_code); i++) { int retval = wait_for_pracc_rw(ejtag_info); if (retval != ERROR_OK) return retval; @@ -1322,7 +1397,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA); mips_ejtag_fastdata_scan(ejtag_info, 1, &val); - unsigned num_clocks = 0; /* like in legacy code */ + unsigned int num_clocks = 0; /* like in legacy code */ if (ejtag_info->mode != 0) num_clocks = ((uint64_t)(ejtag_info->scan_delay) * adapter_get_speed_khz() + 500000) / 1000000; diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h index f78f89153..a0244a695 100644 --- a/src/target/mips32_pracc.h +++ b/src/target/mips32_pracc.h @@ -45,7 +45,7 @@ struct pa_list { struct pracc_queue_info { struct mips_ejtag *ejtag_info; - unsigned isa; + unsigned int isa; int retval; int code_count; int store_count; diff --git a/src/target/mips64.c b/src/target/mips64.c index 48f4563dc..3d193a300 100644 --- a/src/target/mips64.c +++ b/src/target/mips64.c @@ -21,7 +21,7 @@ #include "mips64.h" static const struct { - unsigned id; + unsigned int id; const char *name; enum reg_type type; const char *group; @@ -332,8 +332,8 @@ int mips64_save_context(struct target *target) if (retval != ERROR_OK) return retval; - for (unsigned i = 0; i < MIPS64_NUM_REGS; i++) - retval = mips64->read_core_reg(target, i); + for (unsigned int i = 0; i < MIPS64_NUM_REGS; i++) + retval = mips64->read_core_reg(target, i); return retval; } @@ -343,7 +343,7 @@ int mips64_restore_context(struct target *target) struct mips64_common *mips64 = target->arch_info; struct mips_ejtag *ejtag_info = &mips64->ejtag_info; - for (unsigned i = 0; i < MIPS64_NUM_REGS; i++) { + for (unsigned int i = 0; i < MIPS64_NUM_REGS; i++) { if (mips64->core_cache->reg_list[i].dirty) mips64->write_core_reg(target, i); } @@ -379,7 +379,7 @@ int mips64_build_reg_cache(struct target *target) struct reg_cache **cache_p, *cache; struct mips64_core_reg *arch_info = NULL; struct reg *reg_list = NULL; - unsigned i; + unsigned int i; cache = calloc(1, sizeof(*cache)); if (!cache) { diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c index b083f5ce8..8cfce32e3 100644 --- a/src/target/mips64_pracc.c +++ b/src/target/mips64_pracc.c @@ -27,13 +27,13 @@ struct mips64_pracc_context { uint64_t *local_iparam; - unsigned num_iparam; + unsigned int num_iparam; uint64_t *local_oparam; - unsigned num_oparam; + unsigned int num_oparam; const uint32_t *code; - unsigned code_len; + unsigned int code_len; uint64_t stack[STACK_DEPTH]; - unsigned stack_offset; + unsigned int stack_offset; struct mips_ejtag *ejtag_info; }; @@ -65,7 +65,7 @@ static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl) static int mips64_pracc_exec_read(struct mips64_pracc_context *ctx, uint64_t address) { struct mips_ejtag *ejtag_info = ctx->ejtag_info; - unsigned offset; + unsigned int offset; uint32_t ejtag_ctrl; uint64_t data; int rc; @@ -154,7 +154,7 @@ static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t ad { uint32_t ejtag_ctrl; uint64_t data; - unsigned offset; + unsigned int offset; struct mips_ejtag *ejtag_info = ctx->ejtag_info; int rc; @@ -209,9 +209,9 @@ static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t ad } int mips64_pracc_exec(struct mips_ejtag *ejtag_info, - unsigned code_len, const uint32_t *code, - unsigned num_param_in, uint64_t *param_in, - unsigned num_param_out, uint64_t *param_out) + unsigned int code_len, const uint32_t *code, + unsigned int num_param_in, uint64_t *param_in, + unsigned int num_param_out, uint64_t *param_out) { uint32_t ejtag_ctrl; uint64_t address = 0, address_prev = 0; @@ -219,7 +219,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info, int retval; int pass = 0; bool first_time_call = true; - unsigned i; + unsigned int i; for (i = 0; i < code_len; i++) LOG_DEBUG("%08" PRIx32, code[i]); @@ -354,11 +354,11 @@ static int mips64_pracc_read_u64(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_read_mem64(struct mips_ejtag *ejtag_info, uint64_t addr, - unsigned count, uint64_t *buf) + unsigned int count, uint64_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_read_u64(ejtag_info, addr + 8*i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -414,11 +414,11 @@ static int mips64_pracc_read_u32(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_read_mem32(struct mips_ejtag *ejtag_info, uint64_t addr, - unsigned count, uint32_t *buf) + unsigned int count, uint32_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_read_u32(ejtag_info, addr + 4 * i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -474,11 +474,11 @@ static int mips64_pracc_read_u16(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_read_mem16(struct mips_ejtag *ejtag_info, uint64_t addr, - unsigned count, uint16_t *buf) + unsigned int count, uint16_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_read_u16(ejtag_info, addr + 2*i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -534,11 +534,11 @@ static int mips64_pracc_read_u8(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint64_t addr, - unsigned count, uint8_t *buf) + unsigned int count, uint8_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_read_u8(ejtag_info, addr + i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -547,7 +547,7 @@ static int mips64_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint64_t addr, } int mips64_pracc_read_mem(struct mips_ejtag *ejtag_info, uint64_t addr, - unsigned size, unsigned count, void *buf) + unsigned int size, unsigned int count, void *buf) { switch (size) { case 1: @@ -612,11 +612,11 @@ static int mips64_pracc_write_u64(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_write_mem64(struct mips_ejtag *ejtag_info, - uint64_t addr, unsigned count, uint64_t *buf) + uint64_t addr, unsigned int count, uint64_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_write_u64(ejtag_info, addr + 8 * i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -674,11 +674,11 @@ static int mips64_pracc_write_u32(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_write_mem32(struct mips_ejtag *ejtag_info, uint64_t addr, - unsigned count, uint32_t *buf) + unsigned int count, uint32_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_write_u32(ejtag_info, addr + 4 * i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -734,11 +734,11 @@ static int mips64_pracc_write_u16(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_write_mem16(struct mips_ejtag *ejtag_info, - uint64_t addr, unsigned count, uint16_t *buf) + uint64_t addr, unsigned int count, uint16_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_write_u16(ejtag_info, addr + 2 * i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -795,11 +795,11 @@ static int mips64_pracc_write_u8(struct mips_ejtag *ejtag_info, uint64_t addr, } static int mips64_pracc_write_mem8(struct mips_ejtag *ejtag_info, - uint64_t addr, unsigned count, uint8_t *buf) + uint64_t addr, unsigned int count, uint8_t *buf) { int retval = ERROR_OK; - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { retval = mips64_pracc_write_u8(ejtag_info, addr + i, &buf[i]); if (retval != ERROR_OK) return retval; @@ -808,8 +808,8 @@ static int mips64_pracc_write_mem8(struct mips_ejtag *ejtag_info, } int mips64_pracc_write_mem(struct mips_ejtag *ejtag_info, - uint64_t addr, unsigned size, - unsigned count, void *buf) + uint64_t addr, unsigned int size, + unsigned int count, void *buf) { switch (size) { case 1: @@ -1270,7 +1270,7 @@ int mips64_pracc_read_regs(struct mips_ejtag *ejtag_info, uint64_t *regs) int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source, bool write_t, uint64_t addr, - unsigned count, uint64_t *buf) + unsigned int count, uint64_t *buf) { uint32_t handler_code[] = { /* caution when editing, table is modified below */ @@ -1321,7 +1321,7 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, }; int retval; - unsigned i; + unsigned int i; uint32_t ejtag_ctrl, address32; uint64_t address, val; @@ -1385,7 +1385,7 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, mips64_ejtag_fastdata_scan(ejtag_info, 1, &val); /* like in legacy code */ - unsigned num_clocks = 0; + unsigned int num_clocks = 0; if (ejtag_info->mode != 0) num_clocks = ((uint64_t)(ejtag_info->scan_delay) * adapter_get_speed_khz() + 500000) / 1000000; LOG_DEBUG("num_clocks=%d", num_clocks); diff --git a/src/target/mips64_pracc.h b/src/target/mips64_pracc.h index 19d151946..2bdc856b9 100644 --- a/src/target/mips64_pracc.h +++ b/src/target/mips64_pracc.h @@ -40,20 +40,22 @@ #define MIPS64_PRACC_ADDR_STEP 4 #define MIPS64_PRACC_DATA_STEP 8 -int mips64_pracc_read_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned size, unsigned count, void *buf); -int mips64_pracc_write_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned size, unsigned count, void *buf); +int mips64_pracc_read_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned int size, + unsigned int count, void *buf); +int mips64_pracc_write_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned int size, + unsigned int count, void *buf); int mips64_pracc_read_regs(struct mips_ejtag *ejtag_info, uint64_t *regs); int mips64_pracc_write_regs(struct mips_ejtag *ejtag_info, uint64_t *regs); int mips64_pracc_exec(struct mips_ejtag *ejtag_info, - unsigned code_len, const uint32_t *code, - unsigned num_param_in, uint64_t *param_in, - unsigned num_param_out, uint64_t *param_out); + unsigned int code_len, const uint32_t *code, + unsigned int num_param_in, uint64_t *param_in, + unsigned int num_param_out, uint64_t *param_out); int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source, bool write_t, uint64_t addr, - unsigned count, uint64_t *buf); + unsigned int count, uint64_t *buf); #endif /* OPENOCD_TARGET_MIPS64_PRACC_H */ diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index 389461cae..2ff4aa926 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -493,7 +493,7 @@ int mips64_ejtag_config_step(struct mips_ejtag *ejtag_info, bool enable_step) MIPS64_NOP, }; const uint32_t *code = enable_step ? code_enable : code_disable; - unsigned code_len = enable_step ? ARRAY_SIZE(code_enable) : + unsigned int code_len = enable_step ? ARRAY_SIZE(code_enable) : ARRAY_SIZE(code_disable); return mips64_pracc_exec(ejtag_info, diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h index 7376e5141..30a46903f 100644 --- a/src/target/mips_ejtag.h +++ b/src/target/mips_ejtag.h @@ -214,7 +214,7 @@ struct mips_ejtag { uint32_t reg8; uint32_t reg9; - unsigned scan_delay; + unsigned int scan_delay; int mode; uint32_t pa_ctrl; uint32_t pa_addr; diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c index e4003a213..f401ea9fb 100644 --- a/src/target/openrisc/or1k_du_adv.c +++ b/src/target/openrisc/or1k_du_adv.c @@ -362,7 +362,7 @@ static int adbg_ctrl_read(struct or1k_jtag *jtag_info, uint32_t regidx, default: LOG_ERROR("Illegal debug chain selected (%i) while doing control read", jtag_info->or1k_jtag_module_selected); - return ERROR_FAIL; + return ERROR_FAIL; } /* Zero MSB = op for module, not top-level debug unit */ diff --git a/src/target/register.h b/src/target/register.h index 1e4f2e088..b9af401b4 100644 --- a/src/target/register.h +++ b/src/target/register.h @@ -145,7 +145,7 @@ struct reg_cache { const char *name; struct reg_cache *next; struct reg *reg_list; - unsigned num_regs; + unsigned int num_regs; }; struct reg_arch_type { diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c index 349820aa6..4de81a0de 100644 --- a/src/target/riscv/batch.c +++ b/src/target/riscv/batch.c @@ -358,14 +358,14 @@ size_t riscv_batch_add_dmi_read(struct riscv_batch *batch, uint64_t address, return batch->read_keys_used++; } -unsigned int riscv_batch_get_dmi_read_op(const struct riscv_batch *batch, size_t key) +uint32_t riscv_batch_get_dmi_read_op(const struct riscv_batch *batch, size_t key) { assert(key < batch->read_keys_used); size_t index = batch->read_keys[key]; assert(index < batch->used_scans); uint8_t *base = batch->data_in + DMI_SCAN_BUF_SIZE * index; /* extract "op" field from the DMI read result */ - return (unsigned int)buf_get_u32(base, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH); + return buf_get_u32(base, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH); } uint32_t riscv_batch_get_dmi_read_data(const struct riscv_batch *batch, size_t key) diff --git a/src/target/riscv/batch.h b/src/target/riscv/batch.h index 6fcfeb216..67b7ecc9d 100644 --- a/src/target/riscv/batch.h +++ b/src/target/riscv/batch.h @@ -216,7 +216,7 @@ riscv_batch_add_dm_read(struct riscv_batch *batch, uint64_t address, riscv_get_dmi_address(batch->target, address), delay_type); } -unsigned int riscv_batch_get_dmi_read_op(const struct riscv_batch *batch, size_t key); +uint32_t riscv_batch_get_dmi_read_op(const struct riscv_batch *batch, size_t key); uint32_t riscv_batch_get_dmi_read_data(const struct riscv_batch *batch, size_t key); /* Scans in a NOP. */ diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index a94bf029b..8e6a59a7c 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -190,6 +190,9 @@ typedef struct { uint8_t dataaccess; int16_t dataaddr; + /* The width of the hartsel field. */ + unsigned int hartsellen; + /* DM that provides access to this target. */ dm013_info_t *dm; @@ -2600,7 +2603,7 @@ static int sample_memory_bus_v1(struct target *target, /* Discard the batch when we encounter a busy state on the DMI level. * It's too much hassle to try to recover partial data. We'll try again * with a larger DMI delay. */ - unsigned int sbcs_read_op = riscv_batch_get_dmi_read_op(batch, sbcs_read_index); + const uint32_t sbcs_read_op = riscv_batch_get_dmi_read_op(batch, sbcs_read_index); if (sbcs_read_op == DTM_DMI_OP_BUSY) { result = increase_dmi_busy_delay(target); if (result != ERROR_OK) { diff --git a/src/target/stm8.c b/src/target/stm8.c index 227101b6f..2b3466dac 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -38,7 +38,7 @@ static int (*adapter_speed)(int speed); extern struct adapter_driver *adapter_driver; static const struct { - unsigned id; + unsigned int id; const char *name; const uint8_t bits; enum reg_type type; diff --git a/src/target/target.c b/src/target/target.c index 3f412a0f6..4716499c5 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1449,14 +1449,14 @@ int target_gdb_fileio_end(struct target *target, int retcode, int fileio_errno, target_addr_t target_address_max(struct target *target) { - unsigned bits = target_address_bits(target); + unsigned int bits = target_address_bits(target); if (sizeof(target_addr_t) * 8 == bits) return (target_addr_t) -1; else return (((target_addr_t) 1) << bits) - 1; } -unsigned target_address_bits(struct target *target) +unsigned int target_address_bits(struct target *target) { if (target->type->address_bits) return target->type->address_bits(target); @@ -3032,14 +3032,14 @@ COMMAND_HANDLER(handle_reg_command) unsigned int count = 0; while (cache) { - unsigned i; + unsigned int i; command_print(CMD, "===== %s", cache->name); for (i = 0, reg = cache->reg_list; i < cache->num_regs; i++, reg++, count++) { - if (reg->exist == false || reg->hidden) + if (!reg->exist || reg->hidden) continue; /* only print cached values if they are valid */ if (reg->valid) { @@ -3067,13 +3067,13 @@ COMMAND_HANDLER(handle_reg_command) /* access a single register by its ordinal number */ if ((CMD_ARGV[0][0] >= '0') && (CMD_ARGV[0][0] <= '9')) { - unsigned num; + unsigned int num; COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num); struct reg_cache *cache = target->reg_cache; unsigned int count = 0; while (cache) { - unsigned i; + unsigned int i; for (i = 0; i < cache->num_regs; i++) { if (count++ == num) { reg = &cache->reg_list[i]; @@ -3191,7 +3191,7 @@ COMMAND_HANDLER(handle_wait_halt_command) if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; - unsigned ms = DEFAULT_HALT_TIMEOUT; + unsigned int ms = DEFAULT_HALT_TIMEOUT; if (1 == CMD_ARGC) { int retval = parse_uint(CMD_ARGV[0], &ms); if (retval != ERROR_OK) @@ -3254,7 +3254,7 @@ COMMAND_HANDLER(handle_halt_command) return retval; if (CMD_ARGC == 1) { - unsigned wait_local; + unsigned int wait_local; retval = parse_uint(CMD_ARGV[0], &wait_local); if (retval != ERROR_OK) return ERROR_COMMAND_SYNTAX_ERROR; @@ -3339,13 +3339,13 @@ COMMAND_HANDLER(handle_step_command) void target_handle_md_output(struct command_invocation *cmd, struct target *target, target_addr_t address, unsigned size, - unsigned count, const uint8_t *buffer, bool include_address) + unsigned int count, const uint8_t *buffer, bool include_address) { - const unsigned line_bytecnt = 32; - unsigned line_modulo = line_bytecnt / size; + const unsigned int line_bytecnt = 32; + unsigned int line_modulo = line_bytecnt / size; char output[line_bytecnt * 4 + 1]; - unsigned output_len = 0; + unsigned int output_len = 0; const char *value_fmt; switch (size) { @@ -3406,7 +3406,7 @@ COMMAND_HANDLER(handle_md_command) if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; - unsigned size = 0; + unsigned int size = 0; switch (CMD_NAME[2]) { case 'd': size = 8; @@ -3439,7 +3439,7 @@ COMMAND_HANDLER(handle_md_command) target_addr_t address; COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address); - unsigned count = 1; + unsigned int count = 1; if (CMD_ARGC == 2) COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], count); @@ -3466,22 +3466,22 @@ typedef int (*target_write_fn)(struct target *target, static int target_fill_mem(struct target *target, target_addr_t address, target_write_fn fn, - unsigned data_size, + unsigned int data_size, /* value */ uint64_t b, /* count */ - unsigned c) + unsigned int c) { /* We have to write in reasonably large chunks to be able * to fill large memory areas with any sane speed */ - const unsigned chunk_size = 16384; + const unsigned int chunk_size = 16384; uint8_t *target_buf = malloc(chunk_size * data_size); if (!target_buf) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } - for (unsigned i = 0; i < chunk_size; i++) { + for (unsigned int i = 0; i < chunk_size; i++) { switch (data_size) { case 8: target_buffer_set_u64(target, target_buf + i * data_size, b); @@ -3502,8 +3502,8 @@ static int target_fill_mem(struct target *target, int retval = ERROR_OK; - for (unsigned x = 0; x < c; x += chunk_size) { - unsigned current; + for (unsigned int x = 0; x < c; x += chunk_size) { + unsigned int current; current = c - x; if (current > chunk_size) current = chunk_size; @@ -3540,12 +3540,12 @@ COMMAND_HANDLER(handle_mw_command) uint64_t value; COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], value); - unsigned count = 1; + unsigned int count = 1; if (CMD_ARGC == 3) COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], count); struct target *target = get_current_target(CMD_CTX); - unsigned wordsize; + unsigned int wordsize; switch (CMD_NAME[2]) { case 'd': wordsize = 8; @@ -3841,11 +3841,11 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver for (t = 0; t < buf_cnt; t++) { if (data[t] != buffer[t]) { command_print(CMD, - "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x", - diffs, - (unsigned)(t + image.sections[i].base_address), - data[t], - buffer[t]); + "diff %d address " TARGET_ADDR_FMT ". Was 0x%02" PRIx8 " instead of 0x%02" PRIx8, + diffs, + t + image.sections[i].base_address, + data[t], + buffer[t]); if (diffs++ >= 127) { command_print(CMD, "More than 128 errors, the rest are not printed."); free(data); @@ -4580,7 +4580,7 @@ static int target_jim_write_memory(Jim_Interp *interp, int argc, } struct command_context *cmd_ctx = current_command_context(interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); struct target *target = get_current_target(cmd_ctx); const size_t buffersize = 4096; @@ -4723,7 +4723,7 @@ static int target_jim_get_reg(Jim_Interp *interp, int argc, return JIM_ERR; struct command_context *cmd_ctx = current_command_context(interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); const struct target *target = get_current_target(cmd_ctx); for (int i = 0; i < length; i++) { @@ -5991,7 +5991,7 @@ static int get_target_with_common_rtos_type(struct command_invocation *cmd, COMMAND_HANDLER(handle_target_smp) { - static int smp_group = 1; + static unsigned int smp_group = 1; if (CMD_ARGC == 0) { LOG_DEBUG("Empty SMP target"); diff --git a/src/target/target.h b/src/target/target.h index 9ff2f78d2..2f4c1a02f 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -190,7 +190,7 @@ struct target { * poll too quickly because we'll just overwhelm the user with error * messages. */ struct backoff_timer backoff; - int smp; /* Unique non-zero number for each SMP group */ + unsigned int smp; /* Unique non-zero number for each SMP group */ struct list_head *smp_targets; /* list all targets in this smp group/cluster * The head of the list is shared between the * cluster, thus here there is a pointer */ @@ -691,7 +691,7 @@ target_addr_t target_address_max(struct target *target); * * This routine is a wrapper for target->type->address_bits. */ -unsigned target_address_bits(struct target *target); +unsigned int target_address_bits(struct target *target); /** * Return the number of data bits this target supports. @@ -785,7 +785,7 @@ void target_handle_event(struct target *t, enum target_event e); void target_handle_md_output(struct command_invocation *cmd, struct target *target, target_addr_t address, unsigned size, - unsigned count, const uint8_t *buffer, bool include_address); + unsigned int count, const uint8_t *buffer, bool include_address); int target_profiling_default(struct target *target, uint32_t *samples, uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds); diff --git a/src/target/target_type.h b/src/target/target_type.h index bc42c2d16..f35a59c5f 100644 --- a/src/target/target_type.h +++ b/src/target/target_type.h @@ -303,7 +303,7 @@ struct target_type { /* Return the number of address bits this target supports. This will * typically be 32 for 32-bit targets, and 64 for 64-bit targets. If not * implemented, it's assumed to be 32. */ - unsigned (*address_bits)(struct target *target); + unsigned int (*address_bits)(struct target *target); /* Return the number of system bus data bits this target supports. This * will typically be 32 for 32-bit targets, and 64 for 64-bit targets. If diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c index ecaf52b3a..2c60b9f7e 100644 --- a/src/target/x86_32_common.c +++ b/src/target/x86_32_common.c @@ -1330,14 +1330,14 @@ static int write_hw_reg_from_cache(struct target *t, int num) /* x86 32 commands */ static void handle_iod_output(struct command_invocation *cmd, - struct target *target, uint32_t address, unsigned size, - unsigned count, const uint8_t *buffer) + struct target *target, uint32_t address, unsigned int size, + unsigned int count, const uint8_t *buffer) { - const unsigned line_bytecnt = 32; - unsigned line_modulo = line_bytecnt / size; + const unsigned int line_bytecnt = 32; + unsigned int line_modulo = line_bytecnt / size; char output[line_bytecnt * 4 + 1]; - unsigned output_len = 0; + unsigned int output_len = 0; const char *value_fmt; switch (size) { @@ -1356,12 +1356,12 @@ static void handle_iod_output(struct command_invocation *cmd, return; } - for (unsigned i = 0; i < count; i++) { + for (unsigned int i = 0; i < count; i++) { if (i % line_modulo == 0) { output_len += snprintf(output + output_len, sizeof(output) - output_len, - "0x%8.8x: ", - (unsigned)(address + (i*size))); + "0x%8.8" PRIx32 ": ", + address + (i * size)); } uint32_t value = 0; @@ -1399,7 +1399,7 @@ COMMAND_HANDLER(handle_iod_command) return ERROR_COMMAND_SYNTAX_ERROR; } - unsigned size = 0; + unsigned int size = 0; switch (CMD_NAME[2]) { case 'w': size = 4; @@ -1413,7 +1413,7 @@ COMMAND_HANDLER(handle_iod_command) default: return ERROR_COMMAND_SYNTAX_ERROR; } - unsigned count = 1; + unsigned int count = 1; uint8_t *buffer = calloc(count, size); struct target *target = get_current_target(CMD_CTX); int retval = x86_32_common_read_io(target, address, size, buffer); @@ -1425,7 +1425,7 @@ COMMAND_HANDLER(handle_iod_command) static int target_fill_io(struct target *target, uint32_t address, - unsigned data_size, + unsigned int data_size, /* value */ uint32_t b) { @@ -1458,7 +1458,7 @@ COMMAND_HANDLER(handle_iow_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); struct target *target = get_current_target(CMD_CTX); - unsigned wordsize; + unsigned int wordsize; switch (CMD_NAME[2]) { case 'w': wordsize = 4; diff --git a/src/target/xscale.c b/src/target/xscale.c index fbf43516d..155abaef1 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -840,7 +840,7 @@ static int xscale_debug_entry(struct target *target) struct arm *arm = &xscale->arm; uint32_t pc; uint32_t buffer[10]; - unsigned i; + unsigned int i; int retval; uint32_t moe; @@ -1515,7 +1515,7 @@ static int xscale_deassert_reset(struct target *target) */ { uint32_t address; - unsigned buf_cnt; + unsigned int buf_cnt; const uint8_t *buffer = xscale_debug_handler; int retval; @@ -1539,11 +1539,11 @@ static int xscale_deassert_reset(struct target *target) * coprocessors, trace data, etc. */ address = xscale->handler_address; - for (unsigned binary_size = sizeof(xscale_debug_handler); + for (unsigned int binary_size = sizeof(xscale_debug_handler); binary_size > 0; binary_size -= buf_cnt, buffer += buf_cnt) { uint32_t cache_line[8]; - unsigned i; + unsigned int i; buf_cnt = binary_size; if (buf_cnt > 32) @@ -3215,7 +3215,7 @@ COMMAND_HANDLER(xscale_handle_idcache_command) static const struct { char name[15]; - unsigned mask; + unsigned int mask; } vec_ids[] = { { "fiq", DCSR_TF, }, { "irq", DCSR_TI, }, @@ -3250,7 +3250,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command) } } while (CMD_ARGC-- > 0) { - unsigned i; + unsigned int i; for (i = 0; i < ARRAY_SIZE(vec_ids); i++) { if (strcmp(CMD_ARGV[CMD_ARGC], vec_ids[i].name)) continue; @@ -3268,7 +3268,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command) } dcsr_value = buf_get_u32(dcsr_reg->value, 0, 32); - for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(vec_ids); i++) { command_print(CMD, "%15s: %s", vec_ids[i].name, (dcsr_value & vec_ids[i].mask) ? "catch" : "ignore"); } diff --git a/src/transport/transport.c b/src/transport/transport.c index bf306e731..c7293e7fd 100644 --- a/src/transport/transport.c +++ b/src/transport/transport.c @@ -176,8 +176,8 @@ struct transport *get_current_transport(void) COMMAND_HELPER(transport_list_parse, char ***vector) { char **argv; - unsigned n = CMD_ARGC; - unsigned j = 0; + unsigned int n = CMD_ARGC; + unsigned int j = 0; *vector = NULL; @@ -189,7 +189,7 @@ COMMAND_HELPER(transport_list_parse, char ***vector) if (!argv) return ERROR_FAIL; - for (unsigned i = 0; i < n; i++) { + for (unsigned int i = 0; i < n; i++) { struct transport *t; for (t = transport_list; t; t = t->next) { @@ -208,7 +208,7 @@ COMMAND_HELPER(transport_list_parse, char ***vector) return ERROR_OK; fail: - for (unsigned i = 0; i < n; i++) + for (unsigned int i = 0; i < n; i++) free(argv[i]); free(argv); return ERROR_FAIL; diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c index 0266c2120..74a4dcfde 100644 --- a/src/xsvf/xsvf.c +++ b/src/xsvf/xsvf.c @@ -217,7 +217,7 @@ COMMAND_HANDLER(handle_xsvf_command) bool collecting_path = false; tap_state_t path[XSTATE_MAX_PATH]; - unsigned pathlen = 0; + unsigned int pathlen = 0; /* a flag telling whether to clock TCK during waits, * or simply sleep, controlled by virt2 diff --git a/tcl/board/st_b-l475e-iot01a.cfg b/tcl/board/st_b-l475e-iot01a.cfg index e75c99d7a..3f3db125c 100644 --- a/tcl/board/st_b-l475e-iot01a.cfg +++ b/tcl/board/st_b-l475e-iot01a.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 96KB set WORKAREASIZE 0x18000 diff --git a/tcl/board/st_nucleo_8l152r8.cfg b/tcl/board/st_nucleo_8l152r8.cfg index 7cb8bcecd..681b5a243 100644 --- a/tcl/board/st_nucleo_8l152r8.cfg +++ b/tcl/board/st_nucleo_8l152r8.cfg @@ -3,7 +3,7 @@ # This is a ST NUCLEO 8L152R8 board with a single STM8L152R8T6 chip. # http://www.st.com/en/evaluation-tools/nucleo-8l152r8.html -source [find interface/stlink-dap.cfg] +source [find interface/stlink.cfg] transport select swim diff --git a/tcl/board/st_nucleo_8s208rb.cfg b/tcl/board/st_nucleo_8s208rb.cfg index 0d3c0c912..0f6bde215 100644 --- a/tcl/board/st_nucleo_8s208rb.cfg +++ b/tcl/board/st_nucleo_8s208rb.cfg @@ -3,7 +3,7 @@ # This is a ST NUCLEO 8S208RB board with a single STM8S208RBT6 chip. # https://www.st.com/en/evaluation-tools/nucleo-8s208rb.html -source [find interface/stlink-dap.cfg] +source [find interface/stlink.cfg] transport select swim diff --git a/tcl/board/st_nucleo_f0.cfg b/tcl/board/st_nucleo_f0.cfg index 31a95f59d..00c131fd6 100644 --- a/tcl/board/st_nucleo_f0.cfg +++ b/tcl/board/st_nucleo_f0.cfg @@ -10,7 +10,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f0x.cfg] diff --git a/tcl/board/st_nucleo_f103rb.cfg b/tcl/board/st_nucleo_f103rb.cfg index 9815d4546..892bdda99 100644 --- a/tcl/board/st_nucleo_f103rb.cfg +++ b/tcl/board/st_nucleo_f103rb.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f1x.cfg] diff --git a/tcl/board/st_nucleo_f3.cfg b/tcl/board/st_nucleo_f3.cfg index 883372494..38f49e3d5 100644 --- a/tcl/board/st_nucleo_f3.cfg +++ b/tcl/board/st_nucleo_f3.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f3x.cfg] diff --git a/tcl/board/st_nucleo_f4.cfg b/tcl/board/st_nucleo_f4.cfg index a1908e403..7617a1758 100644 --- a/tcl/board/st_nucleo_f4.cfg +++ b/tcl/board/st_nucleo_f4.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f4x.cfg] diff --git a/tcl/board/st_nucleo_f7.cfg b/tcl/board/st_nucleo_f7.cfg index 9c5b36ea4..41f8b2129 100644 --- a/tcl/board/st_nucleo_f7.cfg +++ b/tcl/board/st_nucleo_f7.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f7x.cfg] diff --git a/tcl/board/st_nucleo_g0.cfg b/tcl/board/st_nucleo_g0.cfg index f8e67a043..f22a7e397 100644 --- a/tcl/board/st_nucleo_g0.cfg +++ b/tcl/board/st_nucleo_g0.cfg @@ -12,7 +12,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32g0x.cfg] diff --git a/tcl/board/st_nucleo_g4.cfg b/tcl/board/st_nucleo_g4.cfg index 8e583e77d..309f7a4c8 100644 --- a/tcl/board/st_nucleo_g4.cfg +++ b/tcl/board/st_nucleo_g4.cfg @@ -12,7 +12,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32g4x.cfg] diff --git a/tcl/board/st_nucleo_h743zi.cfg b/tcl/board/st_nucleo_h743zi.cfg index b857b00e0..be2d42fb8 100644 --- a/tcl/board/st_nucleo_h743zi.cfg +++ b/tcl/board/st_nucleo_h743zi.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32h7x_dual_bank.cfg] diff --git a/tcl/board/st_nucleo_h745zi.cfg b/tcl/board/st_nucleo_h745zi.cfg index ad563b7d3..84865f422 100644 --- a/tcl/board/st_nucleo_h745zi.cfg +++ b/tcl/board/st_nucleo_h745zi.cfg @@ -2,7 +2,7 @@ # This is an ST NUCLEO-H745ZI-Q board with single STM32H745ZITx chip. -source [find interface/stlink-dap.cfg] +source [find interface/stlink.cfg] transport select dapdirect_swd # STM32H745xx devices are dual core (Cortex-M7 and Cortex-M4) diff --git a/tcl/board/st_nucleo_l073rz.cfg b/tcl/board/st_nucleo_l073rz.cfg index 10fac5ef8..317c86e21 100644 --- a/tcl/board/st_nucleo_l073rz.cfg +++ b/tcl/board/st_nucleo_l073rz.cfg @@ -4,7 +4,7 @@ # http://www.st.com/en/evaluation-tools/nucleo-l073rz.html source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set WORKAREASIZE 0x2000 diff --git a/tcl/board/st_nucleo_l1.cfg b/tcl/board/st_nucleo_l1.cfg index 50688d2b6..d7474d0fe 100644 --- a/tcl/board/st_nucleo_l1.cfg +++ b/tcl/board/st_nucleo_l1.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32l1x_dual_bank.cfg] diff --git a/tcl/board/st_nucleo_l4.cfg b/tcl/board/st_nucleo_l4.cfg index 8c63d8cbf..b0a75afe0 100644 --- a/tcl/board/st_nucleo_l4.cfg +++ b/tcl/board/st_nucleo_l4.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32l4x.cfg] diff --git a/tcl/board/st_nucleo_l5.cfg b/tcl/board/st_nucleo_l5.cfg index 6450f08b8..626914aa7 100644 --- a/tcl/board/st_nucleo_l5.cfg +++ b/tcl/board/st_nucleo_l5.cfg @@ -3,7 +3,7 @@ # This is for STM32L5 Nucleo Dev Boards. # http://www.st.com/en/evaluation-tools/stm32-mcu-nucleo.html -source [find interface/stlink-dap.cfg] +source [find interface/stlink.cfg] transport select dapdirect_swd diff --git a/tcl/board/st_nucleo_wb55.cfg b/tcl/board/st_nucleo_wb55.cfg index 29b7ec98d..ab7307c68 100644 --- a/tcl/board/st_nucleo_wb55.cfg +++ b/tcl/board/st_nucleo_wb55.cfg @@ -6,7 +6,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32wbx.cfg] diff --git a/tcl/board/stm320518_eval_stlink.cfg b/tcl/board/stm320518_eval_stlink.cfg index 153f7e5cb..997bb4af9 100644 --- a/tcl/board/stm320518_eval_stlink.cfg +++ b/tcl/board/stm320518_eval_stlink.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 8KB set WORKAREASIZE 0x2000 diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg index d5296720c..4233d04f1 100644 --- a/tcl/board/stm3220g_eval_stlink.cfg +++ b/tcl/board/stm3220g_eval_stlink.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm3241g_eval_stlink.cfg b/tcl/board/stm3241g_eval_stlink.cfg index d2d579077..3bccd2866 100644 --- a/tcl/board/stm3241g_eval_stlink.cfg +++ b/tcl/board/stm3241g_eval_stlink.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32429i_eval_stlink.cfg b/tcl/board/stm32429i_eval_stlink.cfg index be3c48226..7d04aa7f3 100644 --- a/tcl/board/stm32429i_eval_stlink.cfg +++ b/tcl/board/stm32429i_eval_stlink.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32439i_eval_stlink.cfg b/tcl/board/stm32439i_eval_stlink.cfg index 7a1a396fc..b9ea084df 100644 --- a/tcl/board/stm32439i_eval_stlink.cfg +++ b/tcl/board/stm32439i_eval_stlink.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f0discovery.cfg b/tcl/board/stm32f0discovery.cfg index 60fb4a65e..398ecc103 100644 --- a/tcl/board/stm32f0discovery.cfg +++ b/tcl/board/stm32f0discovery.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set WORKAREASIZE 0x2000 source [find target/stm32f0x.cfg] diff --git a/tcl/board/stm32f3discovery.cfg b/tcl/board/stm32f3discovery.cfg index f28e11f6a..73c349a6e 100644 --- a/tcl/board/stm32f3discovery.cfg +++ b/tcl/board/stm32f3discovery.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f3x.cfg] diff --git a/tcl/board/stm32f412g-disco.cfg b/tcl/board/stm32f412g-disco.cfg index 757b25d75..30a9537f0 100644 --- a/tcl/board/stm32f412g-disco.cfg +++ b/tcl/board/stm32f412g-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f413h-disco.cfg b/tcl/board/stm32f413h-disco.cfg index 6abf49551..c82d0d434 100644 --- a/tcl/board/stm32f413h-disco.cfg +++ b/tcl/board/stm32f413h-disco.cfg @@ -10,7 +10,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f429disc1.cfg b/tcl/board/stm32f429disc1.cfg index 657aa1986..0a8e7ef4e 100644 --- a/tcl/board/stm32f429disc1.cfg +++ b/tcl/board/stm32f429disc1.cfg @@ -7,7 +7,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32f4x.cfg] diff --git a/tcl/board/stm32f429discovery.cfg b/tcl/board/stm32f429discovery.cfg index d1b5f5a11..865602ab6 100644 --- a/tcl/board/stm32f429discovery.cfg +++ b/tcl/board/stm32f429discovery.cfg @@ -7,7 +7,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f469discovery.cfg b/tcl/board/stm32f469discovery.cfg index cca25b7f0..c9acbbbd0 100644 --- a/tcl/board/stm32f469discovery.cfg +++ b/tcl/board/stm32f469discovery.cfg @@ -7,7 +7,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f469i-disco.cfg b/tcl/board/stm32f469i-disco.cfg index 7ce57f6e7..63c42c64e 100644 --- a/tcl/board/stm32f469i-disco.cfg +++ b/tcl/board/stm32f469i-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f4discovery.cfg b/tcl/board/stm32f4discovery.cfg index 714f1e903..d96e2dbd3 100644 --- a/tcl/board/stm32f4discovery.cfg +++ b/tcl/board/stm32f4discovery.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 64KB set WORKAREASIZE 0x10000 diff --git a/tcl/board/stm32f723e-disco.cfg b/tcl/board/stm32f723e-disco.cfg index 2dee2f902..020795620 100644 --- a/tcl/board/stm32f723e-disco.cfg +++ b/tcl/board/stm32f723e-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 128KB set WORKAREASIZE 0x20000 diff --git a/tcl/board/stm32f746g-disco.cfg b/tcl/board/stm32f746g-disco.cfg index fed1d8ec9..75ff4ec1e 100644 --- a/tcl/board/stm32f746g-disco.cfg +++ b/tcl/board/stm32f746g-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 256KB set WORKAREASIZE 0x40000 diff --git a/tcl/board/stm32f769i-disco.cfg b/tcl/board/stm32f769i-disco.cfg index 2969bb927..cd6383a70 100644 --- a/tcl/board/stm32f769i-disco.cfg +++ b/tcl/board/stm32f769i-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 256KB set WORKAREASIZE 0x40000 diff --git a/tcl/board/stm32f7discovery.cfg b/tcl/board/stm32f7discovery.cfg index 4cc22ea62..6fd6c64b3 100644 --- a/tcl/board/stm32f7discovery.cfg +++ b/tcl/board/stm32f7discovery.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK/V2-1 source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 256KB set WORKAREASIZE 0x40000 diff --git a/tcl/board/stm32h735g-disco.cfg b/tcl/board/stm32h735g-disco.cfg index 4097ae28b..327a36418 100644 --- a/tcl/board/stm32h735g-disco.cfg +++ b/tcl/board/stm32h735g-disco.cfg @@ -7,7 +7,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set CHIPNAME stm32h735igk6 diff --git a/tcl/board/stm32h745i-disco.cfg b/tcl/board/stm32h745i-disco.cfg index 1c0bc6748..9da1daefc 100644 --- a/tcl/board/stm32h745i-disco.cfg +++ b/tcl/board/stm32h745i-disco.cfg @@ -7,7 +7,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set CHIPNAME stm32h745xih6 diff --git a/tcl/board/stm32h747i-disco.cfg b/tcl/board/stm32h747i-disco.cfg index e0a348ef0..7f8eda8c4 100644 --- a/tcl/board/stm32h747i-disco.cfg +++ b/tcl/board/stm32h747i-disco.cfg @@ -7,7 +7,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set CHIPNAME stm32h747xih6 diff --git a/tcl/board/stm32h750b-disco.cfg b/tcl/board/stm32h750b-disco.cfg index efb32b1df..8b254f21f 100644 --- a/tcl/board/stm32h750b-disco.cfg +++ b/tcl/board/stm32h750b-disco.cfg @@ -7,7 +7,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set CHIPNAME stm32h750xbh6 diff --git a/tcl/board/stm32h7b3i-disco.cfg b/tcl/board/stm32h7b3i-disco.cfg index 58ad9f781..df0d0a6f2 100644 --- a/tcl/board/stm32h7b3i-disco.cfg +++ b/tcl/board/stm32h7b3i-disco.cfg @@ -7,7 +7,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set CHIPNAME stm32h7b3lih6q diff --git a/tcl/board/stm32h7x3i_eval.cfg b/tcl/board/stm32h7x3i_eval.cfg index b9c4c74c2..508f10d5d 100644 --- a/tcl/board/stm32h7x3i_eval.cfg +++ b/tcl/board/stm32h7x3i_eval.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32h7x_dual_bank.cfg] diff --git a/tcl/board/stm32l0discovery.cfg b/tcl/board/stm32l0discovery.cfg index c711d9c8a..59aed3405 100644 --- a/tcl/board/stm32l0discovery.cfg +++ b/tcl/board/stm32l0discovery.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set WORKAREASIZE 0x2000 source [find target/stm32l0.cfg] diff --git a/tcl/board/stm32l476g-disco.cfg b/tcl/board/stm32l476g-disco.cfg index a32d20fb3..fe33ffefb 100644 --- a/tcl/board/stm32l476g-disco.cfg +++ b/tcl/board/stm32l476g-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 96KB set WORKAREASIZE 0x18000 diff --git a/tcl/board/stm32l496g-disco.cfg b/tcl/board/stm32l496g-disco.cfg index 1ba2299ca..823fa6e38 100644 --- a/tcl/board/stm32l496g-disco.cfg +++ b/tcl/board/stm32l496g-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 96KB set WORKAREASIZE 0x18000 diff --git a/tcl/board/stm32l4discovery.cfg b/tcl/board/stm32l4discovery.cfg index f08955078..64a456b61 100644 --- a/tcl/board/stm32l4discovery.cfg +++ b/tcl/board/stm32l4discovery.cfg @@ -8,7 +8,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd source [find target/stm32l4x.cfg] diff --git a/tcl/board/stm32l4p5g-disco.cfg b/tcl/board/stm32l4p5g-disco.cfg index 20d781a1a..33bb9a766 100644 --- a/tcl/board/stm32l4p5g-disco.cfg +++ b/tcl/board/stm32l4p5g-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 96KB set WORKAREASIZE 0x18000 diff --git a/tcl/board/stm32l4r9i-disco.cfg b/tcl/board/stm32l4r9i-disco.cfg index f364ad3d5..cbb86669f 100644 --- a/tcl/board/stm32l4r9i-disco.cfg +++ b/tcl/board/stm32l4r9i-disco.cfg @@ -6,7 +6,7 @@ # This is for using the onboard STLINK source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd # increase working area to 96KB set WORKAREASIZE 0x18000 diff --git a/tcl/board/stm32ldiscovery.cfg b/tcl/board/stm32ldiscovery.cfg index d760edaba..e39b52295 100644 --- a/tcl/board/stm32ldiscovery.cfg +++ b/tcl/board/stm32ldiscovery.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set WORKAREASIZE 0x4000 source [find target/stm32l1.cfg] diff --git a/tcl/board/stm32mp13x_dk.cfg b/tcl/board/stm32mp13x_dk.cfg index 6328ddb4c..08377ca76 100644 --- a/tcl/board/stm32mp13x_dk.cfg +++ b/tcl/board/stm32mp13x_dk.cfg @@ -3,7 +3,7 @@ # board MB1635x # http://www.st.com/en/evaluation-tools/stm32mp135f-dk.html -source [find interface/stlink-dap.cfg] +source [find interface/stlink.cfg] transport select dapdirect_swd diff --git a/tcl/board/stm32mp15x_dk2.cfg b/tcl/board/stm32mp15x_dk2.cfg index 9503428d1..0e71e05ee 100644 --- a/tcl/board/stm32mp15x_dk2.cfg +++ b/tcl/board/stm32mp15x_dk2.cfg @@ -4,7 +4,7 @@ # http://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html # http://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html -source [find interface/stlink-dap.cfg] +source [find interface/stlink.cfg] transport select dapdirect_swd diff --git a/tcl/board/stm32vldiscovery.cfg b/tcl/board/stm32vldiscovery.cfg index 30e35b981..57852bfd4 100644 --- a/tcl/board/stm32vldiscovery.cfg +++ b/tcl/board/stm32vldiscovery.cfg @@ -5,7 +5,7 @@ source [find interface/stlink.cfg] -transport select hla_swd +transport select dapdirect_swd set WORKAREASIZE 0x2000 source [find target/stm32f1x.cfg] diff --git a/tcl/interface/parport.cfg b/tcl/interface/parport.cfg index b9fceeb85..8fb1c148b 100644 --- a/tcl/interface/parport.cfg +++ b/tcl/interface/parport.cfg @@ -5,17 +5,6 @@ # # Addresses: 0x378/LPT1 or 0x278/LPT2 ... # +echo "DEPRECATED: use interface/parport/wiggler.cfg instead of deprecated interface/parport.cfg" -if { [info exists PARPORTADDR] } { - set _PARPORTADDR $PARPORTADDR -} else { - if {$tcl_platform(platform) eq "windows"} { - set _PARPORTADDR 0x378 - } { - set _PARPORTADDR 0 - } -} - -adapter driver parport -parport port $_PARPORTADDR -parport cable wiggler +source [find interface/parport/wiggler.cfg] diff --git a/tcl/interface/parport/dlc5.cfg b/tcl/interface/parport/dlc5.cfg new file mode 100644 index 000000000..24acea7a9 --- /dev/null +++ b/tcl/interface/parport/dlc5.cfg @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# Xilinx Parallel Cable III 'DLC 5' (and various clones) +# +# http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html +# + +if { [info exists PARPORTADDR] } { + set _PARPORTADDR $PARPORTADDR +} else { + set _PARPORTADDR 0 +} + +adapter driver parport +parport port $_PARPORTADDR +parport cable dlc5 diff --git a/tcl/interface/parport/wiggler.cfg b/tcl/interface/parport/wiggler.cfg new file mode 100644 index 000000000..b9fceeb85 --- /dev/null +++ b/tcl/interface/parport/wiggler.cfg @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# Parallel port wiggler (many clones available) on port 0x378 +# +# Addresses: 0x378/LPT1 or 0x278/LPT2 ... +# + +if { [info exists PARPORTADDR] } { + set _PARPORTADDR $PARPORTADDR +} else { + if {$tcl_platform(platform) eq "windows"} { + set _PARPORTADDR 0x378 + } { + set _PARPORTADDR 0 + } +} + +adapter driver parport +parport port $_PARPORTADDR +parport cable wiggler diff --git a/tcl/interface/parport_dlc5.cfg b/tcl/interface/parport_dlc5.cfg index 24acea7a9..83f3b56c4 100644 --- a/tcl/interface/parport_dlc5.cfg +++ b/tcl/interface/parport_dlc5.cfg @@ -5,13 +5,6 @@ # # http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html # +echo "DEPRECATED: use interface/parport/dlc5.cfg instead of deprecated interface/parport_dlc5.cfg" -if { [info exists PARPORTADDR] } { - set _PARPORTADDR $PARPORTADDR -} else { - set _PARPORTADDR 0 -} - -adapter driver parport -parport port $_PARPORTADDR -parport cable dlc5 +source [find interface/parport/dlc5.cfg] diff --git a/tcl/interface/stlink-dap.cfg b/tcl/interface/stlink-dap.cfg index 99c81c180..009fdb7e0 100644 --- a/tcl/interface/stlink-dap.cfg +++ b/tcl/interface/stlink-dap.cfg @@ -1,22 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-or-later -# -# STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1, STLINK-V3 in-circuit -# debugger/programmer -# -# This new interface driver creates a ST-Link wrapper for ARM-DAP named "dapdirect" -# Old ST-LINK/V1 and ST-LINK/V2 pre version V2J24 don't support "dapdirect" -# -# SWIM transport is natively supported -# +echo "WARNING: interface/stlink-dap.cfg is deprecated, please switch to interface/stlink.cfg" +source [find interface/stlink.cfg] -adapter driver st-link -st-link vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757 - -# transport select dapdirect_jtag -# transport select dapdirect_swd -# transport select swim - -# Optionally specify the serial number of usb device -# e.g. -# adapter serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f" diff --git a/tcl/interface/stlink-hla.cfg b/tcl/interface/stlink-hla.cfg new file mode 100644 index 000000000..5c4adb897 --- /dev/null +++ b/tcl/interface/stlink-hla.cfg @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1, STLINK-V3 in-circuit +# debugger/programmer +# + +echo "DEPRECATED: OpenOCD support for ST-Link HLA transport will be dropped soon!" +echo "Consider updating your ST-Link firmware to a version >= V2J24 (2015)" + +adapter driver hla +hla layout stlink +hla device_desc "ST-LINK" +hla vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757 + +# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2 +# devices seem to have serial numbers with unreadable characters. ST-LINK/V2 +# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial +# number reset issues. +# eg. +# adapter serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f" diff --git a/tcl/interface/stlink.cfg b/tcl/interface/stlink.cfg index 9b7f1f9eb..99c81c180 100644 --- a/tcl/interface/stlink.cfg +++ b/tcl/interface/stlink.cfg @@ -4,15 +4,19 @@ # STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1, STLINK-V3 in-circuit # debugger/programmer # +# This new interface driver creates a ST-Link wrapper for ARM-DAP named "dapdirect" +# Old ST-LINK/V1 and ST-LINK/V2 pre version V2J24 don't support "dapdirect" +# +# SWIM transport is natively supported +# -adapter driver hla -hla layout stlink -hla device_desc "ST-LINK" -hla vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757 +adapter driver st-link +st-link vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757 -# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2 -# devices seem to have serial numbers with unreadable characters. ST-LINK/V2 -# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial -# number reset issues. -# eg. +# transport select dapdirect_jtag +# transport select dapdirect_swd +# transport select swim + +# Optionally specify the serial number of usb device +# e.g. # adapter serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f" diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg index 9097c33da..63a595506 100644 --- a/tcl/interface/vdebug.cfg +++ b/tcl/interface/vdebug.cfg @@ -23,7 +23,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT # example config listen on all interfaces, disable tcl/telnet server bindto 0.0.0.0 #gdb port 3333 -#telnet_port disabled +#telnet port disabled tcl port disabled # transaction batching: 0 - no batching, 1 - (default) wr, 2 - rw diff --git a/tcl/target/bl702.cfg b/tcl/target/bl702.cfg index 6d4a048d9..5046cd189 100644 --- a/tcl/target/bl702.cfg +++ b/tcl/target/bl702.cfg @@ -34,6 +34,10 @@ $_TARGETNAME configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work- # Internal RC ticks on 32 MHz, so this speed should be safe to use. adapter speed 4000 +# Debug Module's ndmreset resets only Trust Zone Controller, so we need to do SW reset instead. +# CTRL_PWRON_RESET triggers full "power-on like" reset. +# This means that pinmux configuration to access JTAG is reset as well, and configured back early +# in BootROM. $_TARGETNAME configure -event reset-assert-pre { halt @@ -55,6 +59,15 @@ $_TARGETNAME configure -event reset-assert-pre { # Do reset # In GLB_SWRST_CFG2, clear CTRL_SYS_RESET, CTRL_CPU_RESET and CTRL_PWRON_RESET mmw 0x40000018 0x0 0x00000007 + + # Since this full software reset resets GPIO pinmux as well, we will lose access + # to JTAG right away after writing to register. This chip doesn't support abstract + # memory access, so when this is done by progbuf or sysbus, OpenOCD will fail to read + # if write was successful or not, and will print error about that. Since receiving of + # this error is expected, we will turn off log printing for a moment, + set lvl [lindex [debug_level] 1] + debug_level -1 # In GLB_SWRST_CFG2, set CTRL_SYS_RESET, CTRL_CPU_RESET and CTRL_PWRON_RESET to 1 - mmw 0x40000018 0x6 0x0 + catch {mmw 0x40000018 0x7 0x0} + debug_level $lvl } diff --git a/tcl/target/renesas_rz_g2.cfg b/tcl/target/renesas_rz.cfg similarity index 70% rename from tcl/target/renesas_rz_g2.cfg rename to tcl/target/renesas_rz.cfg index a3d5f48fb..a0489de3d 100644 --- a/tcl/target/renesas_rz_g2.cfg +++ b/tcl/target/renesas_rz.cfg @@ -1,23 +1,25 @@ # SPDX-License-Identifier: GPL-2.0-or-later -# Renesas RZ/G2 SOCs +# Renesas RZ SOCs # - There are a combination of Cortex-A57s, Cortex-A53s, Cortex-A55, Cortex-R7 # and Cortex-M33 for each SOC -# - Each SOC can boot through the Cortex-A5x cores +# - Each SOC can boot through the Cortex-A5x cores or the Cortex-M33 -# Supported RZ/G2 SOCs and their cores: +# Supported RZ SOCs and their cores: # RZ/G2H: Cortex-A57 x4, Cortex-A53 x4, Cortex-R7 # RZ/G2M: Cortex-A57 x2, Cortex-A53 x4, Cortex-R7 # RZ/G2N: Cortex-A57 x2, Cortex-R7 # RZ/G2E: Cortex-A53 x2, Cortex-R7 # RZ/G2L: Cortex-A55 x2, Cortex-M33 +# RZ/V2L: Cortex-A55 x2, Cortex-M33 # RZ/G2LC: Cortex-A55 x2, Cortex-M33 # RZ/G2UL: Cortex-A55 x1, Cortex-M33 +# RZ/G3S: Cortex-A55 x1, Cortex-M33 x2 # Usage: # There are 2 configuration options: # SOC: Selects the supported SOC. (Default 'G2L') -# BOOT_CORE: Selects the booting core. 'CA57', 'CA53' or 'CA55' +# BOOT_CORE: Selects the booting core. 'CA57', 'CA53', 'CA55' or CM33 transport select jtag reset_config trst_and_srst srst_gates_jtag @@ -77,6 +79,13 @@ switch $_soc { set _boot_core CA55 set _ap_num 0 } + V2L { + set _CHIPNAME r9a07g054l + set _num_ca55 2 + set _num_cm33 1 + set _boot_core CA55 + set _ap_num 0 + } G2LC { set _CHIPNAME r9a07g044c set _num_ca55 2 @@ -91,6 +100,13 @@ switch $_soc { set _boot_core CA55 set _ap_num 0 } + G3S { + set _CHIPNAME r9a08g045s + set _num_ca55 1 + set _num_cm33 2 + set _boot_core CA55 + set _ap_num 0 + } default { error "'$_soc' is invalid!" } @@ -112,16 +128,16 @@ if { [info exists DAP_TAPID] } { set _DAP_TAPID 0x6ba00477 } -echo "\t$_soc - $_num_ca57 CA57(s), $_num_ca55 CA55(s), $_num_ca53 CA53(s), $_num_cr7 CR7(s), \ - $_num_cm33 CM33(s)" +echo "\t$_soc - $_num_ca57 CA57(s), $_num_ca55 CA55(s), $_num_ca53 CA53(s), \ + $_num_cr7 CR7(s), $_num_cm33 CM33(s)" echo "\tBoot Core - $_boot_core\n" set _DAPNAME $_CHIPNAME.dap # TAP and DAP -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID \ - -ignore-version +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \ + -expected-id $_DAP_TAPID -ignore-version dap create $_DAPNAME -chain-position $_CHIPNAME.cpu echo "$_CHIPNAME.cpu" @@ -133,8 +149,8 @@ set CA53_DBGBASE {0x80C10000 0x80D10000 0x80E10000 0x80F10000} set CA53_CTIBASE {0x80C20000 0x80D20000 0x80E20000 0x80F20000} set CR7_DBGBASE 0x80910000 set CR7_CTIBASE 0x80918000 -set CM33_DBGBASE 0xE000E000 -set CM33_CTIBASE 0xE0042000 +set CM33_DBGBASE {0xE000E000 0xE010E000} +set CM33_CTIBASE {0xE0042000 0xE0142000} set smp_targets "" @@ -145,7 +161,8 @@ proc setup_a5x {core_name dbgbase ctibase num boot} { cti create $_CTINAME -dap $::_DAPNAME -ap-num $::_ap_num \ -baseaddr [lindex $ctibase $_core] target create $_TARGETNAME aarch64 -dap $::_DAPNAME \ - -ap-num $::_ap_num -dbgbase [lindex $dbgbase $_core] -cti $_CTINAME + -ap-num $::_ap_num -dbgbase [lindex $dbgbase $_core] \ + -cti $_CTINAME if { $_core > 0 || $boot == 0 } { $_TARGETNAME configure -defer-examine } @@ -160,13 +177,29 @@ proc setup_cr7 {dbgbase ctibase} { target create $_TARGETNAME cortex_r4 -dap $::_DAPNAME \ -ap-num 1 -dbgbase $dbgbase -defer-examine } - -proc setup_cm33 {dbgbase ctibase} { - set _TARGETNAME $::_CHIPNAME.m33 - set _CTINAME $_TARGETNAME.cti - cti create $_CTINAME -dap $::_DAPNAME -ap-num 2 -baseaddr $ctibase - target create $_TARGETNAME cortex_m -dap $::_DAPNAME \ - -ap-num 2 -dbgbase $dbgbase -defer-examine +proc setup_cm33 {dbgbase ctibase num boot} { + if { $::_soc == "G2L" || $::_soc == "V2L" \ + || $::_soc == "G2LC" || $::_soc == "G2UL" } { + set _ap_num 2 + } elseif { $::_soc == "G3S" } { + set _ap_num 3 + } + for { set _core 0 } { $_core < $num } { incr _core } { + if { $num <= 1 } { + set _TARGETNAME $::_CHIPNAME.m33 + } else { + set _TARGETNAME $::_CHIPNAME.m33.$_core + } + set _CTINAME $_TARGETNAME.cti + cti create $_CTINAME -dap $::_DAPNAME -ap-num $_ap_num \ + -baseaddr [lindex $ctibase $_core] + target create $_TARGETNAME cortex_m -dap $::_DAPNAME \ + -ap-num $_ap_num -dbgbase [lindex $dbgbase $_core] + if { $boot == 0 } { + $_TARGETNAME configure -defer-examine + } + incr $_ap_num + } } # Organize target list based on the boot core @@ -180,12 +213,17 @@ if { $_boot_core == "CA57" } { setup_cr7 $CR7_DBGBASE $CR7_CTIBASE } elseif { $_boot_core == "CA55" } { setup_a5x a55 $CA55_DBGBASE $CA55_CTIBASE $_num_ca55 1 - setup_cm33 $CM33_DBGBASE $CM33_CTIBASE + setup_cm33 $CM33_DBGBASE $CM33_CTIBASE $_num_cm33 0 +} elseif { $_boot_core == "CM33" } { + setup_a5x a55 $CA55_DBGBASE $CA55_CTIBASE $_num_ca55 0 + setup_cm33 $CM33_DBGBASE $CM33_CTIBASE $_num_cm33 1 } + echo "SMP targets:$smp_targets" eval "target smp $smp_targets" -if { $_soc == "G2L" || $_soc == "G2LC" || $_soc == "G2UL" } { +if { $_soc == "G2L" || $_soc == "V2L" || $_soc == "G2LC" \ +|| $_soc == "G2UL" || $_soc == "G3S"} { target create $_CHIPNAME.axi_ap mem_ap -dap $_DAPNAME -ap-num 1 } diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg index b87d2613a..1fdc11fe3 100644 --- a/tcl/target/u8500.cfg +++ b/tcl/target/u8500.cfg @@ -143,7 +143,7 @@ proc enable_apetap {} { } tcl port 5555 -telnet_port 4444 +telnet port 4444 gdb port 3333 if { [info exists CHIPNAME] } { diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl index 59a3eed12..01bd547ff 100755 --- a/tools/scripts/checkpatch.pl +++ b/tools/scripts/checkpatch.pl @@ -3728,7 +3728,7 @@ sub process { } elsif ($realfile =~ /\.rst$/) { $comment = '..'; # OpenOCD specific: Begin - } elsif ($realfile =~ /\.(am|cfg|tcl)$/) { + } elsif (($realfile =~ /\.(am|cfg|tcl)$/) || ($realfile =~ /\/Makefile$/)) { $comment = '#'; } elsif ($realfile =~ /\.(ld)$/) { $comment = '/*';