target config files: Fix whitespace issues.

Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.

Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
This commit is contained in:
Uwe Hermann 2011-10-29 23:32:17 +02:00 committed by Spencer Oliver
parent 17b546a900
commit ca45e700b1
86 changed files with 503 additions and 508 deletions

View File

@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x40700f0f

View File

@ -16,7 +16,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1f0f0f0f

View File

@ -27,7 +27,7 @@ if { [info exists ENDIAN] } {
jtag_rclk 1000
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926031

View File

@ -31,21 +31,21 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists FLASHTAPID ] } {
if { [info exists FLASHTAPID] } {
set _FLASHTAPID $FLASHTAPID
} else {
set _FLASHTAPID 0x04570041
}
jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966041
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
# Found on STR9-comStick, revision STR912CS-A1

View File

@ -97,7 +97,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0032409d

View File

@ -19,7 +19,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists FLASHTAPID ] } {
if { [info exists FLASHTAPID] } {
set _FLASHTAPID $FLASHTAPID
} else {
set _FLASHTAPID 0x04570041
@ -27,14 +27,14 @@ if { [info exists FLASHTAPID ] } {
jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966041
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
set _BSTAPID 0x1457f041

View File

@ -24,7 +24,7 @@ if { [info exists ENDIAN] } {
#jtag scan chain
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1f0f0f0f

View File

@ -54,7 +54,7 @@ proc at91sam9_reset_init { config } {
set rstc_mr_val [expr ($rstc_mr_val | $::AT91_RSTC_URSTEN)]
mww $::AT91_RSTC_MR $rstc_mr_val ;# user reset enable
if { [info exists config(sdram_piod) ] } {
if { [info exists config(sdram_piod)] } {
set pdr_addr [expr ($::AT91_PIOD + $::PIO_PDR)]
set pudr_addr [expr ($::AT91_PIOD + $::PIO_PUDR)]
set asr_addr [expr ($::AT91_PIOD + $::PIO_ASR)]

View File

@ -17,7 +17,7 @@ if { [info exists ENDIAN] } {
}
# Setup the JTAG scan chain.
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1f0f0f0f

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x05b0203f

View File

@ -29,9 +29,8 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
#jtag scan chain
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477

View File

@ -9,7 +9,7 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME at91sam3n
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477

View File

@ -1,4 +1,3 @@
# ATMEL sam7se512
# Example: the "Elektor Internet Radio" - EIR
# http://www.ethernut.de/en/hardware/eir/index.html
@ -15,7 +14,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# Force an error until we get a good number.

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x3f0f0f0f

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x3f0f0f0f

View File

@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0792603f

View File

@ -10,7 +10,7 @@ reset_config srst_only
adapter_nsrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x8970203F

View File

@ -17,13 +17,13 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x27b3645b
}
if { [info exists DSPTAPID ] } {
if { [info exists DSPTAPID] } {
set _DSPTAPID $DSPTAPID
} else {
set _DSPTAPID 0x27b3645b

View File

@ -10,7 +10,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x00526fa1

View File

@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x121003d3

View File

@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN big
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1181501d

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x01f2401d

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x01f2801d

View File

@ -12,7 +12,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# Force an error until we get a good number.

View File

@ -12,7 +12,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x00000000

View File

@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x20a023d3

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477

View File

@ -16,7 +16,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966021

View File

@ -16,7 +16,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966021

View File

@ -12,7 +12,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926021

View File

@ -19,7 +19,7 @@ if { [info exists ENDIAN] } {
# Note above there is 1 tap
# The CPU tap
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0792611f

View File

@ -14,14 +14,14 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists ETBTAPID ] } {
if { [info exists ETBTAPID] } {
set _ETBTAPID $ETBTAPID
} else {
set _ETBTAPID 0x1b900f0f
}
jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0x0f -expected-id $_ETBTAPID
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926041
@ -30,7 +30,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id 0x0
if { [info exists SDMATAPID ] } {
if { [info exists SDMATAPID] } {
set _SDMATAPID $SDMATAPID
} else {
set _SDMATAPID 0x0882301d

View File

@ -22,7 +22,7 @@ if { [info exists ENDIAN] } {
# Note above there are 2 taps
# trace buffer
if { [info exists ETBTAPID ] } {
if { [info exists ETBTAPID] } {
set _ETBTAPID $ETBTAPID
} else {
set _ETBTAPID 0x1b900f0f
@ -30,7 +30,7 @@ if { [info exists ETBTAPID ] } {
jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
# The CPU tap
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926121

View File

@ -17,19 +17,19 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07b3601d
}
if { [info exists SDMATAPID ] } {
if { [info exists SDMATAPID] } {
set _SDMATAPID $SDMATAPID
} else {
set _SDMATAPID 0x2190101d
}
if { [info exists ETBTAPID ] } {
if { [info exists ETBTAPID] } {
set _ETBTAPID $ETBTAPID
} else {
set _ETBTAPID 0x2b900f0f

View File

@ -16,19 +16,19 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07b3601d
}
if { [info exists SDMATAPID ] } {
if { [info exists SDMATAPID] } {
set _SDMATAPID $SDMATAPID
} else {
set _SDMATAPID 0x0882601d
}
if { [info exists ETBTAPID ] } {
if { [info exists ETBTAPID] } {
set _ETBTAPID $ETBTAPID
} else {
set _ETBTAPID 0x2b900f0f

View File

@ -7,7 +7,7 @@ if { [info exists CHIPNAME] } {
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID ] } {
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x1ba00477
@ -20,7 +20,7 @@ jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
# SJC
if { [info exists SJC_TAPID ] } {
if { [info exists SJC_TAPID] } {
set _SJC_TAPID SJC_TAPID
} else {
set _SJC_TAPID 0x0190c01d

View File

@ -7,7 +7,7 @@ if { [info exists CHIPNAME] } {
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID ] } {
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x1ba00477
@ -20,7 +20,7 @@ jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
# SJC
if { [info exists SJC_TAPID ] } {
if { [info exists SJC_TAPID] } {
set _SJC_TAPID SJC_TAPID
} else {
set _SJC_TAPID 0x0190d01d

View File

@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# Force an error until we get a good number.

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN big
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x19274013

View File

@ -19,7 +19,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477

View File

@ -17,12 +17,12 @@ if { [info exists CHIPNAME] } {
# (The ROM code doing those updates cares about core clock speed...)
#
# CCLK is the core clock frequency in KHz
if { [info exists CCLK ] } {
if { [info exists CCLK] } {
set _CCLK $CCLK
} else {
set _CCLK 4000
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477

View File

@ -5,21 +5,21 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2900
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0596802B
}
if { [info exists HAS_ETB ] } {
if { [info exists HAS_ETB] } {
} else {
# Set default (no ETB).
# Show a warning, because this should have been configured explicitely.
set HAS_ETB 0
# TODO warning?
# TODO: warning?
}
if { [info exists ETBTAPID ] } {
if { [info exists ETBTAPID] } {
set _ETBTAPID $ETBTAPID
} else {
set _ETBTAPID 0x1B900F0F

View File

@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
}
# ARM926EJS core
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926f0f
@ -24,7 +24,7 @@ if { [info exists CPUTAPID ] } {
# Scan Tap
# Wired to seperate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module
# JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through.
if { [info exists SJCTAPID ] } {
if { [info exists SJCTAPID] } {
set _SJCTAPID $SJCTAPID
} else {
set _SJCTAPID 0x1541E02B

View File

@ -13,19 +13,19 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x17900f0f
}
if { [info exists CPUTAPID_REV_A0 ] } {
if { [info exists CPUTAPID_REV_A0] } {
set _CPUTAPID_REV_A0 $CPUTAPID_REV_A0
} else {
set _CPUTAPID_REV_A0 0x17926f0f
}
if { [info exists SJCTAPID ] } {
if { [info exists SJCTAPID] } {
set _SJCTAPID $SJCTAPID
} else {
set _SJCTAPID 0x1b900f0f

View File

@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# set useful default

View File

@ -18,7 +18,7 @@ jtag newtap $_CHIPNAME iva -irlen 4 -disable
jtag newtap $_CHIPNAME dsp -irlen 38 -disable
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
if { [info exists ETB_TAPID ] } {
if { [info exists ETB_TAPID] } {
set _ETB_TAPID $ETB_TAPID
} else {
set _ETB_TAPID 0x2b900f0f
@ -26,7 +26,7 @@ if { [info exists ETB_TAPID ] } {
jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETB_TAPID
# Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
if { [info exists CPU_TAPID ] } {
if { [info exists CPU_TAPID] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07b3602f
@ -34,7 +34,7 @@ if { [info exists CPU_TAPID ] } {
jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
# Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x01ce4801

View File

@ -15,7 +15,7 @@ source [find target/icepick.cfg]
jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x25 -irmask 0x3f -disable
# Subsidiary TAP: CoreSight Debug Access Port (DAP)
if { [info exists DAP_TAPID ] } {
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x0b6d602f
@ -26,7 +26,7 @@ jtag configure $_CHIPNAME.dap -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 3"
# Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b7ae02f

View File

@ -16,7 +16,7 @@ source [find target/icepick.cfg]
#
# A9 DAP
#
if { [info exists DAP_TAPID ] } {
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x3BA00477
@ -31,7 +31,7 @@ jtag configure $_CHIPNAME.dap -event tap-enable \
#
# M3 DAPs, one per core
#
if { [info exists M3_DAP_TAPID ] } {
if { [info exists M3_DAP_TAPID] } {
set _M3_DAP_TAPID $M3_DAP_TAPID
} else {
set _M3_DAP_TAPID 0x4BA00477
@ -51,7 +51,7 @@ jtag configure $_CHIPNAME.m30_dap -event tap-enable \
#
# ICEpick-D JRC (JTAG route controller)
#
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x3b95c02f
@ -59,7 +59,7 @@ if { [info exists JRC_TAPID ] } {
}
# PandaBoard REV EA1 (PEAP platforms)
if { [info exists JRC_TAPID2 ] } {
if { [info exists JRC_TAPID2] } {
set _JRC_TAPID2 $JRC_TAPID2
} else {
set _JRC_TAPID2 0x1b85202f

View File

@ -7,7 +7,7 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME omap5912
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# NOTE: validated with XOMAP5912 part

View File

@ -10,7 +10,7 @@ if { [info exists CHIPNAME] } {
source [find target/icepick.cfg]
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
if { [info exists ETB_TAPID ] } {
if { [info exists ETB_TAPID] } {
set _ETB_TAPID $ETB_TAPID
} else {
set _ETB_TAPID 0x2b900f0f
@ -20,7 +20,7 @@ jtag configure $_CHIPNAME.etb -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 3"
# Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
if { [info exists CPU_TAPID ] } {
if { [info exists CPU_TAPID] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07926001
@ -30,7 +30,7 @@ jtag configure $_CHIPNAME.arm -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 2"
# Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b7d102f

View File

@ -1,4 +1,3 @@
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
@ -11,7 +10,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x30938053
@ -24,7 +23,6 @@ if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE 0x4000
}
adapter_nsrst_delay 100
jtag_ntrst_delay 100

View File

@ -13,7 +13,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x69264013

View File

@ -13,21 +13,21 @@ if { [info exists ENDIAN] } {
}
#IDs for pxa270. Are there more?
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# set useful default
set _CPUTAPID 0x49265013
}
if { [info exists CPUTAPID2 ] } {
if { [info exists CPUTAPID2] } {
set _CPUTAPID2 $CPUTAPID2
} else {
# set useful default
set _CPUTAPID2 0x79265013
}
if { [info exists CPUTAPID3 ] } {
if { [info exists CPUTAPID3] } {
set _CPUTAPID2 $CPUTAPID3
} else {
# set useful default

View File

@ -13,47 +13,47 @@ if { [info exists ENDIAN] } {
}
# IDs for all currently known PXA3xx chips
if { [info exists CPUTAPID_PXA30X_A0 ] } {
if { [info exists CPUTAPID_PXA30X_A0] } {
set _CPUTAPID_PXA30X_A0 $CPUTAPID_PXA30X_A0
} else {
set _CPUTAPID_PXA30X_A0 0x0E648013
}
if { [info exists CPUTAPID_PXA30X_A1 ] } {
if { [info exists CPUTAPID_PXA30X_A1] } {
set _CPUTAPID_PXA30X_A1 $CPUTAPID_PXA30X_A1
} else {
set _CPUTAPID_PXA30X_A1 0x1E648013
}
if { [info exists CPUTAPID_PXA31X_A0 ] } {
if { [info exists CPUTAPID_PXA31X_A0] } {
set _CPUTAPID_PXA31X_A0 $CPUTAPID_PXA31X_A0
} else {
set _CPUTAPID_PXA31X_A0 0x0E649013
}
if { [info exists CPUTAPID_PXA31X_A1 ] } {
if { [info exists CPUTAPID_PXA31X_A1] } {
set _CPUTAPID_PXA31X_A1 $CPUTAPID_PXA31X_A1
} else {
set _CPUTAPID_PXA31X_A1 0x1E649013
}
if { [info exists CPUTAPID_PXA31X_A2 ] } {
if { [info exists CPUTAPID_PXA31X_A2] } {
set _CPUTAPID_PXA31X_A2 $CPUTAPID_PXA31X_A2
} else {
set _CPUTAPID_PXA31X_A2 0x2E649013
}
if { [info exists CPUTAPID_PXA31X_B0 ] } {
if { [info exists CPUTAPID_PXA31X_B0] } {
set _CPUTAPID_PXA31X_B0 $CPUTAPID_PXA31X_B0
} else {
set _CPUTAPID_PXA31X_B0 0x3E649013
}
if { [info exists CPUTAPID_PXA32X_B1 ] } {
if { [info exists CPUTAPID_PXA32X_B1] } {
set _CPUTAPID_PXA32X_B1 $CPUTAPID_PXA32X_B1
} else {
set _CPUTAPID_PXA32X_B1 0x5E642013
}
if { [info exists CPUTAPID_PXA32X_B2 ] } {
if { [info exists CPUTAPID_PXA32X_B2] } {
set _CPUTAPID_PXA32X_B2 $CPUTAPID_PXA32X_B2
} else {
set _CPUTAPID_PXA32X_B2 0x6E642013
}
if { [info exists CPUTAPID_PXA32X_C0 ] } {
if { [info exists CPUTAPID_PXA32X_C0] } {
set _CPUTAPID_PXA32X_C0 $CPUTAPID_PXA32X_C0
} else {
set _CPUTAPID_PXA32X_C0 0x7E642013

View File

@ -16,7 +16,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0032409d

View File

@ -26,7 +26,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926f0f

View File

@ -1,4 +1,3 @@
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
@ -13,7 +12,7 @@ if { [info exists ENDIAN] } {
# This appears to be a "Version 1" arm7tdmi.
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1f0f0f0f

View File

@ -20,13 +20,13 @@ if { [info exists ENDIAN] } {
}
# trace buffer
if { [info exists ETBTAPID ] } {
if { [info exists ETBTAPID] } {
set _ETBTAPID $ETBTAPID
} else {
set _ETBTAPID 0x2b900f0f
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07b76f0f

View File

@ -12,7 +12,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# sharp changed the number!

View File

@ -12,7 +12,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x08630001

View File

@ -19,7 +19,7 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926041

View File

@ -6,7 +6,7 @@
global _DEVICECLASS
if { [info exists DEVICECLASS ] } {
if { [info exists DEVICECLASS] } {
set _DEVICECLASS $DEVICECLASS
} else {
set _DEVICECLASS 0xff
@ -31,7 +31,7 @@ if { [info exists CHIPNAME] } {
# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest)
# ... we'll ignore the JTAG version field, rather than list every
# chip revision that turns up.
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0ba00477
@ -43,7 +43,7 @@ if { [info exists CPUTAPID ] } {
swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
-expected-id $_CPUTAPID -ignore-version
if { [info exists WORKAREASIZE ] } {
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
# default to 8K working area

View File

@ -27,7 +27,7 @@ adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0008
@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
if { [info exists BSTAPID] } {
# FIXME this never gets used to override defaults...
set _BSTAPID $BSTAPID
} else {

View File

@ -32,7 +32,7 @@ jtag_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0033
@ -41,7 +41,7 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0033

View File

@ -28,7 +28,7 @@ adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0038
@ -37,7 +37,7 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
if { [info exists BSTAPID] } {
# FIXME this never gets used to override defaults...
set _BSTAPID $BSTAPID
} else {

View File

@ -21,14 +21,14 @@ jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
if { [info exists FLASHTAPID ] } {
if { [info exists FLASHTAPID] } {
set _FLASHTAPID $FLASHTAPID
} else {
set _FLASHTAPID 0x04570041
}
jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966041
@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
set _BSTAPID 0x1457f041

View File

@ -23,7 +23,7 @@ source [find target/icepick.cfg]
#
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
if { [info exists ETB_TAPID ] } {
if { [info exists ETB_TAPID] } {
set _ETB_TAPID $ETB_TAPID
} else {
set _ETB_TAPID 0x2b900f0f
@ -33,7 +33,7 @@ jtag configure $_CHIPNAME.etb -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 1"
# Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
if { [info exists CPU_TAPID ] } {
if { [info exists CPU_TAPID] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07926001
@ -43,7 +43,7 @@ jtag configure $_CHIPNAME.arm -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 0"
# Primary TAP: ICEpick (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b73b02f

View File

@ -18,7 +18,7 @@ set EMU01 "-disable"
source [find target/icepick.cfg]
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
if { [info exists ETB_TAPID ] } {
if { [info exists ETB_TAPID] } {
set _ETB_TAPID $ETB_TAPID
} else {
set _ETB_TAPID 0x2b900f0f
@ -28,7 +28,7 @@ jtag configure $_CHIPNAME.etb -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 1"
# Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
if { [info exists CPU_TAPID ] } {
if { [info exists CPU_TAPID] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x0792602f
@ -38,7 +38,7 @@ jtag configure $_CHIPNAME.arm -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 0"
# Primary TAP: ICEpick (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b83e02f

View File

@ -28,7 +28,7 @@ jtag configure $_CHIPNAME.dsp -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 2"
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
if { [info exists ETB_TAPID ] } {
if { [info exists ETB_TAPID] } {
set _ETB_TAPID $ETB_TAPID
} else {
set _ETB_TAPID 0x2b900f0f
@ -38,7 +38,7 @@ jtag configure $_CHIPNAME.etb -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 1"
# Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
if { [info exists CPU_TAPID ] } {
if { [info exists CPU_TAPID] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07926001
@ -48,7 +48,7 @@ jtag configure $_CHIPNAME.arm -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 0"
# Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b70002f

View File

@ -11,7 +11,7 @@ if { [info exists CHIPNAME] } {
# Toshiba TMPA900 series MCUs are always little endian as per datasheet.
set _ENDIAN little
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926031

View File

@ -11,7 +11,7 @@ if { [info exists CHIPNAME] } {
# Toshiba TMPA910 series MCUs are always little endian as per datasheet.
set _ENDIAN little
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926031

View File

@ -162,7 +162,7 @@ if { [info exists ENDIAN] } {
# Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT,
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
@ -175,7 +175,7 @@ jtag configure $_CHIPNAME.dap -event tap-disable \
#CLTAPC TAP JRC equivalent
if { [info exists CLTAPC_ID ] } {
if { [info exists CLTAPC_ID] } {
set _CLTAPC_ID $CLTAPC_ID
} else {
set _CLTAPC_ID 0x22286041
@ -183,7 +183,7 @@ if { [info exists CLTAPC_ID ] } {
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version
if { ![info exists TARGETNAME_1 ] } {
if { ![info exists TARGETNAME_1] } {
global _TARGETNAME_1
set _TARGETNAME_1 $_CHIPNAME.cpu1
} else {
@ -209,7 +209,7 @@ $_TARGETNAME_1 configure -event gdb-attach {
}
if { ![info exists TARGETNAME_2 ] } {
if { ![info exists TARGETNAME_2] } {
global _TARGETNAME_2
set _TARGETNAME_2 $_CHIPNAME.cpu2
} else {