interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

jtag/drivers: fix reset logic handling in OpenJTAG 

The OpenJTAG driver behaviour always forces a system reset on jtag_init.
The driver was incorrectly assuming that when execute_reset is called
with trst set to 1 - perform a software TAP reset, otherwise perform a
system reset when trst is 0.

The set_state call assumes the that OpenJTAG hardware will perform a
software TLR reset if the target state is TAP_RESET. This is not the
case: the published VHDL will simply find the shortest path to TLR and
not perform a fixed 5 cycle operation with TMS held high.

Fix the code to only perform system resets when srst is 1 in
execute_reset and to force a software TAP reset operation in set_state
when the target state is TAP_RESET.

Change-Id: I7e0f76f8491efefff1ccaeb4b1ae16e722d76df4
Signed-off-by: N S <nlshipp@yahoo.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8121
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This commit is contained in:
N S 2024-01-22 21:47:34 -08:00 committed by Antonio Borneo
parent 7295ddc15c
commit c6e7e48b05
1 changed files with 11 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/jtag/drivers/openjtag.c
View File

@ -671,14 +671,12 @@ static void openjtag_execute_reset(struct jtag_command *cmd)
uint8_t buf = 0x00;
if (cmd->cmd.reset->trst) {
buf = 0x03;
} else {
/* Pull SRST low for 5 TCLK cycles */
if (cmd->cmd.reset->srst) {
buf |= 0x04;
buf |= 0x05 << 4;
}
openjtag_add_byte(buf);
}
}
static void openjtag_execute_sleep(struct jtag_command *cmd)
@ -691,8 +689,14 @@ static void openjtag_set_state(uint8_t openocd_state)
uint8_t state = openjtag_get_tap_state(openocd_state);
uint8_t buf = 0;
if (state != OPENJTAG_TAP_RESET) {
buf = 0x01;
buf |= state << 4;
} else {
/* Force software TLR */
buf = 0x03;
}
openjtag_add_byte(buf);
}