jtag/drivers: fix reset logic handling in OpenJTAG
The OpenJTAG driver behaviour always forces a system reset on jtag_init. The driver was incorrectly assuming that when execute_reset is called with trst set to 1 - perform a software TAP reset, otherwise perform a system reset when trst is 0. The set_state call assumes the that OpenJTAG hardware will perform a software TLR reset if the target state is TAP_RESET. This is not the case: the published VHDL will simply find the shortest path to TLR and not perform a fixed 5 cycle operation with TMS held high. Fix the code to only perform system resets when srst is 1 in execute_reset and to force a software TAP reset operation in set_state when the target state is TAP_RESET. Change-Id: I7e0f76f8491efefff1ccaeb4b1ae16e722d76df4 Signed-off-by: N S <nlshipp@yahoo.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8121 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
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@ -671,15 +671,13 @@ static void openjtag_execute_reset(struct jtag_command *cmd)
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uint8_t buf = 0x00;
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uint8_t buf = 0x00;
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if (cmd->cmd.reset->trst) {
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/* Pull SRST low for 5 TCLK cycles */
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buf = 0x03;
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if (cmd->cmd.reset->srst) {
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} else {
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buf |= 0x04;
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buf |= 0x04;
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buf |= 0x05 << 4;
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buf |= 0x05 << 4;
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}
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openjtag_add_byte(buf);
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openjtag_add_byte(buf);
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}
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}
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}
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static void openjtag_execute_sleep(struct jtag_command *cmd)
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static void openjtag_execute_sleep(struct jtag_command *cmd)
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{
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{
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@ -691,8 +689,14 @@ static void openjtag_set_state(uint8_t openocd_state)
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uint8_t state = openjtag_get_tap_state(openocd_state);
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uint8_t state = openjtag_get_tap_state(openocd_state);
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uint8_t buf = 0;
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uint8_t buf = 0;
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if (state != OPENJTAG_TAP_RESET) {
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buf = 0x01;
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buf = 0x01;
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buf |= state << 4;
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buf |= state << 4;
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} else {
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/* Force software TLR */
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buf = 0x03;
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}
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openjtag_add_byte(buf);
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openjtag_add_byte(buf);
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}
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}
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