target/lakemont: Use 'bool' data type
Change-Id: I9baaf617c2bfabd07ac3ca195e486893d7950398 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4969 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -322,8 +322,8 @@ static int restore_context(struct target *t)
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}
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for (i = 0; i < (x86_32->cache->num_regs); i++) {
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x86_32->cache->reg_list[i].dirty = 0;
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x86_32->cache->reg_list[i].valid = 0;
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x86_32->cache->reg_list[i].dirty = false;
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x86_32->cache->reg_list[i].valid = false;
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}
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return err;
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}
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@ -357,8 +357,8 @@ static int lakemont_set_core_reg(struct reg *reg, uint8_t *buf)
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if (check_not_halted(t))
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return ERROR_TARGET_NOT_HALTED;
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buf_set_u32(reg->value, 0, 32, value);
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reg->dirty = 1;
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reg->valid = 1;
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reg->dirty = true;
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reg->valid = true;
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return ERROR_OK;
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}
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@ -405,8 +405,8 @@ struct reg_cache *lakemont_build_reg_cache(struct target *t)
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reg_list[i].name = regs[i].name;
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reg_list[i].size = 32;
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reg_list[i].value = calloc(1, 4);
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reg_list[i].dirty = 0;
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reg_list[i].valid = 0;
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reg_list[i].dirty = false;
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reg_list[i].valid = false;
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reg_list[i].type = &lakemont_reg_type;
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reg_list[i].arch_info = &arch_info[i];
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@ -667,8 +667,8 @@ static int read_hw_reg(struct target *t, int reg, uint32_t *regval, uint8_t cach
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*regval = buf_get_u32(scan.out, 0, 32);
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if (cache) {
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buf_set_u32(x86_32->cache->reg_list[reg].value, 0, 32, *regval);
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x86_32->cache->reg_list[reg].valid = 1;
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x86_32->cache->reg_list[reg].dirty = 0;
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x86_32->cache->reg_list[reg].valid = true;
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x86_32->cache->reg_list[reg].dirty = false;
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}
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LOG_DEBUG("reg=%s, op=0x%016" PRIx64 ", val=0x%08" PRIx32,
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x86_32->cache->reg_list[reg].name,
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@ -709,8 +709,8 @@ static int write_hw_reg(struct target *t, int reg, uint32_t regval, uint8_t cach
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/* we are writing from the cache so ensure we reset flags */
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if (cache) {
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x86_32->cache->reg_list[reg].dirty = 0;
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x86_32->cache->reg_list[reg].valid = 0;
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x86_32->cache->reg_list[reg].dirty = false;
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x86_32->cache->reg_list[reg].valid = false;
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}
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return ERROR_OK;
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}
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@ -947,8 +947,8 @@ int lakemont_poll(struct target *t)
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* breakpoint instruction. This needs to be corrected.
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*/
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buf_set_u32(x86_32->cache->reg_list[EIP].value, 0, 32, eip-1);
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x86_32->cache->reg_list[EIP].dirty = 1;
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x86_32->cache->reg_list[EIP].valid = 1;
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x86_32->cache->reg_list[EIP].dirty = true;
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x86_32->cache->reg_list[EIP].valid = true;
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LOG_USER("hit software breakpoint at 0x%08" PRIx32, eip-1);
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} else {
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/* it's not a hardware breakpoint (checked already in DR6 state)
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