topic: Flash support for Pic32mx1xx/2xx
Change-Id: I496cb745fb1eb5c9159471838013b8d19418f5c0 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/500 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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@ -51,6 +51,7 @@
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/* pic32mx configuration register locations */
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#define PIC32MX_DEVCFG0_1_2 0xBFC00BFC
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#define PIC32MX_DEVCFG0 0xBFC02FFC
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#define PIC32MX_DEVCFG1 0xBFC02FF8
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#define PIC32MX_DEVCFG2 0xBFC02FF4
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@ -91,9 +92,12 @@
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#define NVMKEY1 0xAA996655
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#define NVMKEY2 0x556699AA
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#define MX_1_2 1 /* PIC32mx1xx/2xx */
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struct pic32mx_flash_bank {
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struct working_area *write_algorithm;
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int probed;
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int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */
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};
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/*
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@ -190,6 +194,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
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pic32mx_info->write_algorithm = NULL;
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pic32mx_info->probed = 0;
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pic32mx_info->dev_type = 0;
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return ERROR_OK;
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}
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@ -244,7 +249,9 @@ static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeo
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static int pic32mx_protect_check(struct flash_bank *bank)
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{
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struct target *target = bank->target;
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struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
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uint32_t config0_address;
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uint32_t devcfg0;
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int s;
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int num_pages;
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@ -254,7 +261,12 @@ static int pic32mx_protect_check(struct flash_bank *bank)
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return ERROR_TARGET_NOT_HALTED;
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}
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target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
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if (pic32mx_info->dev_type == MX_1_2)
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config0_address = PIC32MX_DEVCFG0_1_2;
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else
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config0_address = PIC32MX_DEVCFG0;
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target_read_u32(target, config0_address, &devcfg0);
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if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
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num_pages = 0xffff; /* All pages protected */
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@ -327,7 +339,7 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last
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/* see contib/loaders/flash/pic32mx.s for src */
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static const uint32_t pic32mx_flash_write_code[] = {
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static uint32_t pic32mx_flash_write_code[] = {
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/* write: */
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0x3C08AA99, /* lui $t0, 0xaa99 */
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0x35086655, /* ori $t0, 0x6655 */
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@ -414,6 +426,21 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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/* Change values for counters and row size, depending on variant */
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if (pic32mx_info->dev_type == MX_1_2) {
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/* 128 byte row */
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pic32mx_flash_write_code[8] = 0x2CD30020;
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pic32mx_flash_write_code[14] = 0x24840080;
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pic32mx_flash_write_code[15] = 0x24A50080;
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pic32mx_flash_write_code[17] = 0x24C6FFE0;
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} else {
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/* 512 byte row */
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pic32mx_flash_write_code[8] = 0x2CD30080;
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pic32mx_flash_write_code[14] = 0x24840200;
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pic32mx_flash_write_code[15] = 0x24A50200;
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pic32mx_flash_write_code[17] = 0x24C6FF80;
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}
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retval = target_write_buffer(target, pic32mx_info->write_algorithm->address,
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sizeof(pic32mx_flash_write_code), (uint8_t *)pic32mx_flash_write_code);
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if (retval != ERROR_OK)
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@ -610,8 +637,21 @@ static int pic32mx_probe(struct flash_bank *bank)
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return ERROR_FLASH_OPERATION_FAILED;
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}
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/* Check for PIC32mx1xx/2xx */
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for (i = 0; pic32mx_devs[i].name != NULL; i++) {
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if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
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if ((*(pic32mx_devs[i].name) == '1') || (*(pic32mx_devs[i].name) == '2'))
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pic32mx_info->dev_type = MX_1_2;
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break;
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}
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}
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if (pic32mx_info->dev_type == MX_1_2)
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page_size = 1024;
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else
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page_size = 4096;
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if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
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/* 0x1FC00000: Boot flash size */
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#if 0
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@ -624,15 +664,23 @@ static int pic32mx_probe(struct flash_bank *bank)
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}
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#else
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/* fixed 12k boot bank - see comments above */
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if (pic32mx_info->dev_type == MX_1_2)
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num_pages = (3 * 1024);
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else
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num_pages = (12 * 1024);
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#endif
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} else {
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/* read the flash size from the device */
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if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
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if (pic32mx_info->dev_type == MX_1_2) {
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LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
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num_pages = (32 * 1024);
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} else {
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LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
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num_pages = (512 * 1024);
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}
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}
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}
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LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
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