Merge pull request #626 from riscv/from_upstream

From upstream

contrib/itmdump.c

@@ -39,8 +39,9 @@
 
 #include <errno.h>
 #include <libgen.h>
-#include <stdio.h>
 #include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
 #include <string.h>
 #include <unistd.h>
 

doc/openocd.texi

@@ -8153,7 +8153,6 @@ file (which is normally the server's standard output).
 
 @deffn {Command} {echo} [-n] message
 Logs a message at "user" priority.
-Output @var{message} to stdout.
 Option "-n" suppresses trailing newline.
 @example
 echo "Downloading kernel -- please wait"
@@ -11276,7 +11275,7 @@ should be passed in to the proc in question.
 
 @section Internal low-level Commands
 
-By "low-level," we mean commands that a human would typically not
+By "low-level", we mean commands that a human would typically not
 invoke directly.
 
 @itemize @bullet

jimtcl

@@ -1 +1 @@
-Subproject commit 51f65c6d38fbf86e1f0b036ad336761fd2ab7fa0
+Subproject commit fb923fab4f0cf276c336d98692d00df6a943791d

src/flash/nand/arm_io.c

@@ -173,7 +173,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
 	buf_set_u32(reg_params[2].value, 0, 32, size);
 
 	/* armv4 must exit using a hardware breakpoint */
-	if (arm->is_armv4)
+	if (arm->arch == ARM_ARCH_V4)
 		exit_var = nand->copy_area->address + target_code_size - 4;
 
 	/* use alg to write data from work area to NAND chip */
@@ -279,7 +279,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 	buf_set_u32(reg_params[2].value, 0, 32, size);
 
 	/* armv4 must exit using a hardware breakpoint */
-	if (arm->is_armv4)
+	if (arm->arch == ARM_ARCH_V4)
 		exit_var = nand->copy_area->address + target_code_size - 4;
 
 	/* use alg to write data from NAND chip to work area */

src/flash/nor/ambiqmicro.c

@@ -161,10 +161,9 @@ FLASH_BANK_COMMAND_HANDLER(ambiqmicro_flash_bank_command)
 	return ERROR_OK;
 }
 
-static int get_ambiqmicro_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_ambiqmicro_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
-	int printed;
 	char *classname;
 
 	if (!ambiqmicro_info->probed) {
@@ -178,16 +177,12 @@ static int get_ambiqmicro_info(struct flash_bank *bank, char *buf, int buf_size)
 	else
 		classname = ambiqmicroClassname[0];
 
-	printed = snprintf(buf,
+	command_print_sameline(cmd, "\nAmbiq Micro information: Chip is "
-		buf_size,
-		"\nAmbiq Micro information: Chip is "
 		"class %d (%s) %s\n",
 		ambiqmicro_info->target_class,
 		classname,
 		ambiqmicro_info->target_name);
 
-	if ((printed < 0))
-		return ERROR_BUF_TOO_SMALL;
 	return ERROR_OK;
 }
 

src/flash/nor/at91sam3.c

@@ -256,7 +256,7 @@ static struct sam3_chip *get_current_sam3(struct command_invocation *cmd)
 
 	t = get_current_target(cmd->ctx);
 	if (!t) {
-		command_print(cmd, "No current target?");
+		command_print_sameline(cmd, "No current target?\n");
 		return NULL;
 	}
 
@@ -264,7 +264,7 @@ static struct sam3_chip *get_current_sam3(struct command_invocation *cmd)
 	if (!p) {
 		/* this should not happen */
 		/* the command is not registered until the chip is created? */
-		command_print(cmd, "No SAM3 chips exist?");
+		command_print_sameline(cmd, "No SAM3 chips exist?\n");
 		return NULL;
 	}
 
@@ -273,7 +273,7 @@ static struct sam3_chip *get_current_sam3(struct command_invocation *cmd)
 			return p;
 		p = p->next;
 	}
-	command_print(cmd, "Cannot find SAM3 chip?");
+	command_print_sameline(cmd, "Cannot find SAM3 chip?\n");
 	return NULL;
 }
 

src/flash/nor/at91sam4.c

@@ -235,7 +235,7 @@ static struct sam4_chip *get_current_sam4(struct command_invocation *cmd)
 
 	t = get_current_target(cmd->ctx);
 	if (!t) {
-		command_print(cmd, "No current target?");
+		command_print_sameline(cmd, "No current target?\n");
 		return NULL;
 	}
 
@@ -243,7 +243,7 @@ static struct sam4_chip *get_current_sam4(struct command_invocation *cmd)
 	if (!p) {
 		/* this should not happen */
 		/* the command is not registered until the chip is created? */
-		command_print(cmd, "No SAM4 chips exist?");
+		command_print_sameline(cmd, "No SAM4 chips exist?\n");
 		return NULL;
 	}
 
@@ -252,7 +252,7 @@ static struct sam4_chip *get_current_sam4(struct command_invocation *cmd)
 			return p;
 		p = p->next;
 	}
-	command_print(cmd, "Cannot find SAM4 chip?");
+	command_print_sameline(cmd, "Cannot find SAM4 chip?\n");
 	return NULL;
 }
 
@@ -2656,19 +2656,16 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate)
 	return ERROR_OK;
 }
 
-static int sam4_info(struct flash_bank *bank, char *buf, int buf_size)
+static int sam4_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct sam4_bank_private *pPrivate;
 	int k = bank->size / 1024;
 
 	pPrivate = get_sam4_bank_private(bank);
-	if (pPrivate == NULL) {
+	if (pPrivate == NULL)
-		buf[0] = '\0';
 		return ERROR_FAIL;
-	}
 
-	snprintf(buf, buf_size,
+	command_print_sameline(cmd, "%s bank %d: %d kB at " TARGET_ADDR_FMT,
-		"%s bank %d: %d kB at " TARGET_ADDR_FMT,
 		pPrivate->pChip->details.name,
 		pPrivate->bank_number,
 		k,

src/flash/nor/at91sam7.c

@@ -978,23 +978,17 @@ static int at91sam7_probe(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_at91sam7_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_at91sam7_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
 	struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
 
 	if (at91sam7_info->cidr == 0)
 		return ERROR_FLASH_BANK_NOT_PROBED;
 
-	printed = snprintf(buf, buf_size,
+	command_print_sameline(cmd, "\n at91sam7 driver information: Chip is %s\n",
-			"\n at91sam7 driver information: Chip is %s\n",
 			at91sam7_info->target_name);
 
-	buf += printed;
+	command_print_sameline(cmd,
-	buf_size -= printed;
-
-	printed = snprintf(buf,
-			buf_size,
 			" Cidr: 0x%8.8" PRIx32 " | Arch: 0x%4.4x | Eproc: %s | Version: 0x%3.3x | "
 			"Flashsize: 0x%8.8" PRIx32 "\n",
 			at91sam7_info->cidr,
@@ -1003,31 +997,20 @@ static int get_at91sam7_info(struct flash_bank *bank, char *buf, int buf_size)
 			at91sam7_info->cidr_version,
 			bank->size);
 
-	buf += printed;
+	command_print_sameline(cmd,
-	buf_size -= printed;
+			" Master clock (estimated): %u kHz | External clock: %u kHz\n",
-
-	printed = snprintf(buf, buf_size,
-			" Master clock (estimated): %u KHz | External clock: %u KHz\n",
 			(unsigned)(at91sam7_info->mck_freq / 1000),
 			(unsigned)(at91sam7_info->ext_freq / 1000));
 
-	buf += printed;
+	command_print_sameline(cmd,
-	buf_size -= printed;
-
-	printed = snprintf(buf,
-			buf_size,
 			" Pagesize: %i bytes | Lockbits(%u): %i 0x%4.4x | Pages in lock region: %i\n",
 			at91sam7_info->pagesize,
 			bank->num_sectors,
 			at91sam7_info->num_lockbits_on,
 			at91sam7_info->lockbits,
-			at91sam7_info->pages_per_sector*at91sam7_info->num_lockbits_on);
+			at91sam7_info->pages_per_sector * at91sam7_info->num_lockbits_on);
 
-	buf += printed;
+	command_print_sameline(cmd, " Securitybit: %i | Nvmbits(%i): %i 0x%1.1x\n",
-	buf_size -= printed;
-
-	snprintf(buf, buf_size,
-		" Securitybit: %i | Nvmbits(%i): %i 0x%1.1x\n",
 		at91sam7_info->securitybit, at91sam7_info->num_nvmbits,
 		at91sam7_info->num_nvmbits_on, at91sam7_info->nvmbits);
 

src/flash/nor/ath79.c

@@ -875,17 +875,16 @@ static int ath79_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_ath79_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_ath79_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct ath79_flash_bank *ath79_info = bank->driver_priv;
 
 	if (!ath79_info->probed) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nATH79 flash bank not probed yet\n");
-			 "\nATH79 flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nATH79 flash information:\n"
+	command_print_sameline(cmd, "\nATH79 flash information:\n"
 		"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
 		ath79_info->dev->name, ath79_info->dev->device_id);
 

src/flash/nor/atsamv.c

@@ -607,7 +607,7 @@ static int samv_write(struct flash_bank *bank, const uint8_t *buffer,
 	return ERROR_OK;
 }
 
-static int samv_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int samv_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct samv_flash_bank *samv_info = bank->driver_priv;
 	if (!samv_info->probed) {
@@ -615,7 +615,7 @@ static int samv_get_info(struct flash_bank *bank, char *buf, int buf_size)
 		if (ERROR_OK != r)
 			return r;
 	}
-	snprintf(buf, buf_size, "Cortex-M7 detected with %" PRIu32 " kB flash",
+	command_print_sameline(cmd, "Cortex-M7 detected with %" PRIu32 " kB flash\n",
 			bank->size / 1024);
 	return ERROR_OK;
 }

src/flash/nor/avrf.c

@@ -367,7 +367,7 @@ static int avrf_auto_probe(struct flash_bank *bank)
 	return avrf_probe(bank);
 }
 
-static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
+static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct target *target = bank->target;
 	struct avr_common *avr = target->arch_info;
@@ -400,12 +400,12 @@ static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
 
 	if (avr_info != NULL) {
 		/* chip found */
-		snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
+		command_print_sameline(cmd, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 			EXTRACT_VER(device_id));
 		return ERROR_OK;
 	} else {
 		/* chip not supported */
-		snprintf(buf, buf_size, "Cannot identify target as a avr\n");
+		command_print_sameline(cmd, "Cannot identify target as a avr\n");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 }

src/flash/nor/bluenrg-x.c

@@ -429,7 +429,7 @@ static int bluenrgx_auto_probe(struct flash_bank *bank)
 }
 
 /* This method must return a string displaying information about the bank */
-static int bluenrgx_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int bluenrgx_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
 	int mask_number, cut_number;
@@ -437,8 +437,7 @@ static int bluenrgx_get_info(struct flash_bank *bank, char *buf, int buf_size)
 	if (!bluenrgx_info->probed) {
 		int retval = bluenrgx_probe(bank);
 		if (retval != ERROR_OK) {
-			snprintf(buf, buf_size,
+			command_print_sameline(cmd, "Unable to find bank information.");
-				 "Unable to find bank information.");
 			return retval;
 		}
 	}
@@ -446,8 +445,8 @@ static int bluenrgx_get_info(struct flash_bank *bank, char *buf, int buf_size)
 	mask_number = (bluenrgx_info->die_id >> 4) & 0xF;
 	cut_number = bluenrgx_info->die_id & 0xF;
 
-	snprintf(buf, buf_size,
+	command_print_sameline(cmd, "%s - Rev: %d.%d",
-		 "%s - Rev: %d.%d", bluenrgx_info->flash_ptr->part_name, mask_number, cut_number);
+			bluenrgx_info->flash_ptr->part_name, mask_number, cut_number);
 	return ERROR_OK;
 }
 

src/flash/nor/cc26xx.c

@@ -498,10 +498,9 @@ static int cc26xx_auto_probe(struct flash_bank *bank)
 	return retval;
 }
 
-static int cc26xx_info(struct flash_bank *bank, char *buf, int buf_size)
+static int cc26xx_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct cc26xx_bank *cc26xx_bank = bank->driver_priv;
-	int printed = 0;
 	const char *device;
 
 	switch (cc26xx_bank->device_type) {
@@ -526,13 +525,10 @@ static int cc26xx_info(struct flash_bank *bank, char *buf, int buf_size)
 			break;
 	}
 
-	printed = snprintf(buf, buf_size,
+	command_print_sameline(cmd,
 		"%s device: ICEPick ID 0x%08" PRIx32 ", USER ID 0x%08" PRIx32 "\n",
 		device, cc26xx_bank->icepick_id, cc26xx_bank->user_id);
 
-	if (printed >= buf_size)
-		return ERROR_BUF_TOO_SMALL;
-
 	return ERROR_OK;
 }
 

src/flash/nor/cc3220sf.c

@@ -477,15 +477,9 @@ static int cc3220sf_auto_probe(struct flash_bank *bank)
 	return retval;
 }
 
-static int cc3220sf_info(struct flash_bank *bank, char *buf, int buf_size)
+static int cc3220sf_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
+	command_print_sameline(cmd, "CC3220SF with 1MB internal flash\n");
-
-	printed = snprintf(buf, buf_size, "CC3220SF with 1MB internal flash\n");
-
-	if (printed >= buf_size)
-		return ERROR_BUF_TOO_SMALL;
-
 	return ERROR_OK;
 }
 

src/flash/nor/cfi.c

@@ -728,79 +728,57 @@ static int cfi_read_0002_pri_ext(struct flash_bank *bank)
 		return cfi_read_spansion_pri_ext(bank);
 }
 
-static int cfi_spansion_info(struct flash_bank *bank, char *buf, int buf_size)
+static int cfi_spansion_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
 
-	printed = snprintf(buf, buf_size, "\nSpansion primary algorithm extend information:\n");
+	command_print_sameline(cmd, "\nSpansion primary algorithm extend information:\n");
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "pri: '%c%c%c', version: %c.%c\n", pri_ext->pri[0],
+	command_print_sameline(cmd, "pri: '%c%c%c', version: %c.%c\n",
-			pri_ext->pri[1], pri_ext->pri[2],
+			pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2],
 			pri_ext->major_version, pri_ext->minor_version);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "Silicon Rev.: 0x%x, Address Sensitive unlock: 0x%x\n",
+	command_print_sameline(cmd, "Silicon Rev.: 0x%x, Address Sensitive unlock: 0x%x\n",
 			(pri_ext->SiliconRevision) >> 2,
 			(pri_ext->SiliconRevision) & 0x03);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "Erase Suspend: 0x%x, Sector Protect: 0x%x\n",
+	command_print_sameline(cmd, "Erase Suspend: 0x%x, Sector Protect: 0x%x\n",
 			pri_ext->EraseSuspend,
 			pri_ext->BlkProt);
-	buf += printed;
-	buf_size -= printed;
 
-	snprintf(buf, buf_size, "VppMin: %u.%x, VppMax: %u.%x\n",
+	command_print_sameline(cmd, "VppMin: %u.%x, VppMax: %u.%x\n",
 		(pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
 		(pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
 
 	return ERROR_OK;
 }
 
-static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size)
+static int cfi_intel_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
 
-	printed = snprintf(buf, buf_size, "\nintel primary algorithm extend information:\n");
+	command_print_sameline(cmd, "\nintel primary algorithm extend information:\n");
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf,
+	command_print_sameline(cmd, "pri: '%c%c%c', version: %c.%c\n",
-			buf_size,
-			"pri: '%c%c%c', version: %c.%c\n",
 			pri_ext->pri[0],
 			pri_ext->pri[1],
 			pri_ext->pri[2],
 			pri_ext->major_version,
 			pri_ext->minor_version);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf,
+	command_print_sameline(cmd, "feature_support: 0x%" PRIx32 ", "
-			buf_size,
-			"feature_support: 0x%" PRIx32 ", "
 			"suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n",
 			pri_ext->feature_support,
 			pri_ext->suspend_cmd_support,
 			pri_ext->blk_status_reg_mask);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "Vcc opt: %x.%x, Vpp opt: %u.%x\n",
+	command_print_sameline(cmd, "Vcc opt: %x.%x, Vpp opt: %u.%x\n",
 			(pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f,
 			(pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f);
-	buf += printed;
-	buf_size -= printed;
 
-	snprintf(buf, buf_size, "protection_fields: %i, prot_reg_addr: 0x%x, "
+	command_print_sameline(cmd, "protection_fields: %i, prot_reg_addr: 0x%x, "
 		"factory pre-programmed: %i, user programmable: %i\n",
 		pri_ext->num_protection_fields, pri_ext->prot_reg_addr,
 		1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size);
@@ -2992,45 +2970,36 @@ int cfi_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-int cfi_get_info(struct flash_bank *bank, char *buf, int buf_size)
+int cfi_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 
 	if (cfi_info->qry[0] == 0xff) {
-		snprintf(buf, buf_size, "\ncfi flash bank not probed yet\n");
+		command_print_sameline(cmd, "\ncfi flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
 	if (!cfi_info->not_cfi)
-		printed = snprintf(buf, buf_size, "\nCFI flash: ");
+		command_print_sameline(cmd, "\nCFI flash: ");
 	else
-		printed = snprintf(buf, buf_size, "\nnon-CFI flash: ");
+		command_print_sameline(cmd, "\nnon-CFI flash: ");
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "mfr: 0x%4.4x, id:0x%4.4x\n\n",
+	command_print_sameline(cmd, "mfr: 0x%4.4x, id:0x%4.4x\n",
 			cfi_info->manufacturer, cfi_info->device_id);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: "
+	command_print_sameline(cmd, "qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: "
 			"0x%4.4x, alt_id: 0x%4.4x, alt_addr: 0x%4.4x\n",
 			cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2],
 			cfi_info->pri_id, cfi_info->pri_addr, cfi_info->alt_id, cfi_info->alt_addr);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "Vcc min: %x.%x, Vcc max: %x.%x, "
+	command_print_sameline(cmd, "Vcc min: %x.%x, Vcc max: %x.%x, "
 			"Vpp min: %u.%x, Vpp max: %u.%x\n",
 			(cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f,
 			(cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f,
 			(cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f,
 			(cfi_info->vpp_max & 0xf0) >> 4, cfi_info->vpp_max & 0x0f);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "typ. word write timeout: %u us, "
+	command_print_sameline(cmd, "typ. word write timeout: %u us, "
 			"typ. buf write timeout: %u us, "
 			"typ. block erase timeout: %u ms, "
 			"typ. chip erase timeout: %u ms\n",
@@ -3038,12 +3007,8 @@ int cfi_get_info(struct flash_bank *bank, char *buf, int buf_size)
 			1 << cfi_info->buf_write_timeout_typ,
 			1 << cfi_info->block_erase_timeout_typ,
 			1 << cfi_info->chip_erase_timeout_typ);
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf,
+	command_print_sameline(cmd, "max. word write timeout: %u us, "
-			buf_size,
-			"max. word write timeout: %u us, "
 			"max. buf write timeout: %u us, max. "
 			"block erase timeout: %u ms, max. chip erase timeout: %u ms\n",
 			(1 <<
@@ -3056,24 +3021,20 @@ int cfi_get_info(struct flash_bank *bank, char *buf, int buf_size)
 			(1 <<
 			 cfi_info->chip_erase_timeout_max) *
 			(1 << cfi_info->chip_erase_timeout_typ));
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "size: 0x%" PRIx32 ", interface desc: %i, "
+	command_print_sameline(cmd, "size: 0x%" PRIx32 ", interface desc: %i, "
 			"max buffer write size: 0x%x\n",
 			cfi_info->dev_size,
 			cfi_info->interface_desc,
 			1 << cfi_info->max_buf_write_size);
-	buf += printed;
-	buf_size -= printed;
 
 	switch (cfi_info->pri_id) {
 	    case 1:
 	    case 3:
-		    cfi_intel_info(bank, buf, buf_size);
+		    cfi_intel_info(bank, cmd);
 		    break;
 	    case 2:
-		    cfi_spansion_info(bank, buf, buf_size);
+		    cfi_spansion_info(bank, cmd);
 		    break;
 	    default:
 		    LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);

src/flash/nor/cfi.h

@@ -160,7 +160,7 @@ int cfi_protect(struct flash_bank *bank, int set, unsigned int first,
 int cfi_probe(struct flash_bank *bank);
 int cfi_auto_probe(struct flash_bank *bank);
 int cfi_protect_check(struct flash_bank *bank);
-int cfi_get_info(struct flash_bank *bank, char *buf, int buf_size);
+int cfi_get_info(struct flash_bank *bank, struct command_invocation *cmd);
 int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **argv);
 
 uint32_t cfi_flash_address(struct flash_bank *bank, int sector, uint32_t offset);

src/flash/nor/driver.h

@@ -205,15 +205,14 @@ struct flash_driver {
 
 	/**
 	 * Display human-readable information about the flash
-	 * bank into the given buffer.  Drivers must be careful to avoid
+	 * bank.
-	 * overflowing the buffer.
 	 *
 	 * @param bank - the bank to get info about
-	 * @param char - where to put the text for the human to read
+	 * @param cmd - command invocation instance for which to generate
-	 * @param buf_size - the size of the human buffer.
+	 *              the textual output
 	 * @returns ERROR_OK if successful; otherwise, an error code.
 	 */
-	int (*info)(struct flash_bank *bank, char *buf, int buf_size);
+	int (*info)(struct flash_bank *bank, struct command_invocation *cmd);
 
 	/**
 	 * A more gentle flavor of flash_driver_s::probe, performing

src/flash/nor/efm32.c

@@ -324,23 +324,7 @@ static int efm32x_read_info(struct flash_bank *bank,
 	return ERROR_OK;
 }
 
-/*
+/* flash bank efm32 <base> <size> 0 0 <target#> */
- * Helper to create a human friendly string describing a part
- */
-static int efm32x_decode_info(struct efm32_info *info, char *buf, int buf_size)
-{
-	int printed = 0;
-	printed = snprintf(buf, buf_size, "%s Gecko, rev %d",
-			info->family_data->name, info->prod_rev);
-
-	if (printed >= buf_size)
-		return ERROR_BUF_TOO_SMALL;
-
-	return ERROR_OK;
-}
-
-/* flash bank efm32 <base> <size> 0 0 <target#>
- */
 FLASH_BANK_COMMAND_HANDLER(efm32x_flash_bank_command)
 {
 	struct efm32x_flash_bank *efm32x_info;
@@ -961,7 +945,6 @@ static int efm32x_probe(struct flash_bank *bank)
 	struct efm32_info efm32_mcu_info;
 	int ret;
 	uint32_t base_address = 0x00000000;
-	char buf[256];
 
 	efm32x_info->probed = false;
 	memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ);
@@ -970,11 +953,8 @@ static int efm32x_probe(struct flash_bank *bank)
 	if (ERROR_OK != ret)
 		return ret;
 
-	ret = efm32x_decode_info(&efm32_mcu_info, buf, sizeof(buf));
+	LOG_INFO("detected part: %s Gecko, rev %d",
-	if (ERROR_OK != ret)
+			efm32_mcu_info.family_data->name, efm32_mcu_info.prod_rev);
-		return ret;
-
-	LOG_INFO("detected part: %s", buf);
 	LOG_INFO("flash size = %dkbytes", efm32_mcu_info.flash_sz_kib);
 	LOG_INFO("flash page size = %dbytes", efm32_mcu_info.page_size);
 
@@ -1044,10 +1024,10 @@ static int efm32x_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_efm32x_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_efm32x_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct efm32_info info;
-	int ret = 0;
+	int ret;
 
 	ret = efm32x_read_info(bank, &info);
 	if (ERROR_OK != ret) {
@@ -1055,7 +1035,8 @@ static int get_efm32x_info(struct flash_bank *bank, char *buf, int buf_size)
 		return ret;
 	}
 
-	return efm32x_decode_info(&info, buf, buf_size);
+	command_print_sameline(cmd, "%s Gecko, rev %d", info.family_data->name, info.prod_rev);
+	return ERROR_OK;
 }
 
 COMMAND_HANDLER(efm32x_handle_debuglock_command)

src/flash/nor/esirisc_flash.c

@@ -487,11 +487,11 @@ static int esirisc_flash_auto_probe(struct flash_bank *bank)
 	return esirisc_flash_probe(bank);
 }
 
-static int esirisc_flash_info(struct flash_bank *bank, char *buf, int buf_size)
+static int esirisc_flash_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct esirisc_flash_bank *esirisc_info = bank->driver_priv;
 
-	snprintf(buf, buf_size,
+	command_print_sameline(cmd,
 			"%4s cfg at 0x%" PRIx32 ", clock %" PRIu32 ", wait_states %" PRIu32,
 			"",	/* align with first line */
 			esirisc_info->cfg,

src/flash/nor/faux.c

@@ -92,9 +92,9 @@ static int faux_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t o
 	return ERROR_OK;
 }
 
-static int faux_info(struct flash_bank *bank, char *buf, int buf_size)
+static int faux_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	snprintf(buf, buf_size, "faux flash driver");
+	command_print_sameline(cmd, "faux flash driver");
 	return ERROR_OK;
 }
 

src/flash/nor/fespi.c

@@ -843,17 +843,16 @@ static int fespi_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_fespi_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_fespi_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct fespi_flash_bank *fespi_info = bank->driver_priv;
 
 	if (!(fespi_info->probed)) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nFESPI flash bank not probed yet\n");
-				"\nFESPI flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nFESPI flash information:\n"
+	command_print_sameline(cmd, "\nFESPI flash information:\n"
 			"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
 			fespi_info->dev->name, fespi_info->dev->device_id);
 

src/flash/nor/fm4.c

@@ -539,7 +539,7 @@ static int fm4_auto_probe(struct flash_bank *bank)
 	return fm4_probe(bank);
 }
 
-static int fm4_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int fm4_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct fm4_flash_bank *fm4_bank = bank->driver_priv;
 	const char *name;
@@ -586,11 +586,10 @@ static int fm4_get_info_command(struct flash_bank *bank, char *buf, int buf_size
 	case s6e2cx8:
 	case s6e2cx9:
 	case s6e2cxa:
-		snprintf(buf, buf_size, "%s MainFlash Macro #%i",
+		command_print_sameline(cmd, "%s MainFlash Macro #%i", name, fm4_bank->macro_nr);
-			name, fm4_bank->macro_nr);
 		break;
 	default:
-		snprintf(buf, buf_size, "%s MainFlash", name);
+		command_print_sameline(cmd, "%s MainFlash", name);
 		break;
 	}
 

src/flash/nor/gd32vf103.c

@@ -110,7 +110,7 @@ struct gd32vf103_flash_bank {
 };
 
 static int gd32vf103_mass_erase(struct flash_bank *bank);
-static int get_gd32vf103_info(struct flash_bank *bank, char *buf, int buf_size);
+static int get_gd32vf103_info(struct flash_bank *bank, struct command_invocation *cmd);
 static int gd32vf103_write_block(struct flash_bank *bank, const uint8_t *buffer,
 		uint32_t offset, uint32_t count);
 
@@ -931,7 +931,7 @@ static int gd32vf103_auto_probe(struct flash_bank *bank)
 	return gd32vf103_probe(bank);
 }
 
-static int get_gd32vf103_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_gd32vf103_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	uint32_t dbgmcu_idcode;
 
@@ -961,14 +961,14 @@ static int get_gd32vf103_info(struct flash_bank *bank, char *buf, int buf_size)
 		}
 		break;
 	default:
-		snprintf(buf, buf_size, "Cannot identify target as a GD32VF103 x\n");
+		command_print_sameline(cmd, "Cannot identify target as a GD32VF103 x\n");
 		return ERROR_FAIL;
 	}
 
 	if (rev_str != NULL)
-		snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
+		command_print_sameline(cmd, "%s - Rev: %s\n", device_str, rev_str);
 	else
-		snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
+		command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)\n", device_str, rev_id);
 
 	return ERROR_OK;
 }

src/flash/nor/jtagspi.c

@@ -421,16 +421,16 @@ static int jtagspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_
 	return ERROR_OK;
 }
 
-static int jtagspi_info(struct flash_bank *bank, char *buf, int buf_size)
+static int jtagspi_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct jtagspi_flash_bank *info = bank->driver_priv;
 
 	if (!(info->probed)) {
-		snprintf(buf, buf_size, "\nJTAGSPI flash bank not probed yet\n");
+		command_print_sameline(cmd, "\nJTAGSPI flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nSPIFI flash information:\n"
+	command_print_sameline(cmd, "\nSPIFI flash information:\n"
 		"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
 		info->dev->name, info->dev->device_id);
 

src/flash/nor/kinetis.c

@@ -2778,7 +2778,7 @@ static int kinetis_auto_probe(struct flash_bank *bank)
 	return kinetis_probe(bank);
 }
 
-static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
+static int kinetis_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	const char *bank_class_names[] = {
 		"(ANY)", "PFlash", "FlexNVM", "FlexRAM"
@@ -2788,7 +2788,7 @@ static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
 	struct kinetis_chip *k_chip = k_bank->k_chip;
 	uint32_t size_k = bank->size / 1024;
 
-	snprintf(buf, buf_size,
+	command_print_sameline(cmd,
 		"%s %s: %" PRIu32 "k %s bank %s at " TARGET_ADDR_FMT,
 		bank->driver->name, k_chip->name,
 		size_k, bank_class_names[k_bank->flash_class],

src/flash/nor/kinetis_ke.c

@@ -1171,10 +1171,9 @@ static int kinetis_ke_auto_probe(struct flash_bank *bank)
 	return kinetis_ke_probe(bank);
 }
 
-static int kinetis_ke_info(struct flash_bank *bank, char *buf, int buf_size)
+static int kinetis_ke_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	(void) snprintf(buf, buf_size,
+	command_print_sameline(cmd, "%s driver for flash bank %s at " TARGET_ADDR_FMT,
-			"%s driver for flash bank %s at " TARGET_ADDR_FMT,
 			bank->driver->name,	bank->name, bank->base);
 
 	return ERROR_OK;

src/flash/nor/lpc2000.c

@@ -1552,12 +1552,12 @@ static int lpc2000_erase_check(struct flash_bank *bank)
 	return lpc2000_iap_blank_check(bank, 0, bank->num_sectors - 1);
 }
 
-static int get_lpc2000_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_lpc2000_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
 
-	snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIu32 "kHz", lpc2000_info->variant,
+	command_print_sameline(cmd, "lpc2000 flash driver variant: %i, clk: %" PRIu32 "kHz",
-			lpc2000_info->cclk);
+			lpc2000_info->variant, lpc2000_info->cclk);
 
 	return ERROR_OK;
 }

src/flash/nor/lpcspifi.c

@@ -926,17 +926,16 @@ static int lpcspifi_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_lpcspifi_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_lpcspifi_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
 
 	if (!(lpcspifi_info->probed)) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nSPIFI flash bank not probed yet\n");
-			"\nSPIFI flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nSPIFI flash information:\n"
+	command_print_sameline(cmd, "\nSPIFI flash information:\n"
 		"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
 		lpcspifi_info->dev->name, lpcspifi_info->dev->device_id);
 

src/flash/nor/max32xxx.c

@@ -113,17 +113,14 @@ FLASH_BANK_COMMAND_HANDLER(max32xxx_flash_bank_command)
 	return ERROR_OK;
 }
 
-static int get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
 	struct max32xxx_flash_bank *info = bank->driver_priv;
 
 	if (!info->probed)
 		return ERROR_FLASH_BANK_NOT_PROBED;
 
-	printed = snprintf(buf, buf_size, "\nMaxim Integrated max32xxx flash driver\n");
+	command_print_sameline(cmd, "\nMaxim Integrated max32xxx flash driver\n");
-	buf += printed;
-	buf_size -= printed;
 	return ERROR_OK;
 }
 

src/flash/nor/mdr.c

@@ -597,11 +597,11 @@ static int mdr_auto_probe(struct flash_bank *bank)
 	return mdr_probe(bank);
 }
 
-static int get_mdr_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_mdr_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct mdr_flash_bank *mdr_info = bank->driver_priv;
-	snprintf(buf, buf_size, "MDR32Fx - %s",
+	command_print_sameline(cmd, "MDR32Fx - %s",
-		 mdr_info->mem_type ? "info memory" : "main memory");
+			mdr_info->mem_type ? "info memory" : "main memory");
 
 	return ERROR_OK;
 }

src/flash/nor/mrvlqspi.c

@@ -914,17 +914,16 @@ static int mrvlqspi_flash_erase_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int mrvlqspi_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int mrvlqspi_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
 
 	if (!(mrvlqspi_info->probed)) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nQSPI flash bank not probed yet\n");
-			"\nQSPI flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nQSPI flash information:\n"
+	command_print_sameline(cmd, "\nQSPI flash information:\n"
 		"  Device \'%s\' ID 0x%08" PRIx32 "\n",
 		mrvlqspi_info->dev->name, mrvlqspi_info->dev->device_id);
 

src/flash/nor/msp432.c

@@ -975,60 +975,50 @@ static int msp432_auto_probe(struct flash_bank *bank)
 	return retval;
 }
 
-static int msp432_info(struct flash_bank *bank, char *buf, int buf_size)
+static int msp432_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct msp432_bank *msp432_bank = bank->driver_priv;
-	int printed = 0;
 
 	switch (msp432_bank->device_type) {
 		case MSP432P401X_DEPR:
 			if (0xFFFF == msp432_bank->device_id) {
 				/* Very early pre-production silicon currently deprecated */
-				printed = snprintf(buf, buf_size,
+				command_print_sameline(cmd, "MSP432P401x pre-production device (deprecated silicon)\n"
-					"MSP432P401x pre-production device (deprecated silicon)\n"
 					SUPPORT_MESSAGE);
 			} else {
 				/* Revision A or B silicon, also deprecated */
-				printed = snprintf(buf, buf_size,
+				command_print_sameline(cmd, "MSP432P401x Device Rev %c (deprecated silicon)\n"
-					"MSP432P401x Device Rev %c (deprecated silicon)\n"
 					SUPPORT_MESSAGE, (char)msp432_bank->hardware_rev);
 			}
 			break;
 		case MSP432P401X:
-			printed = snprintf(buf, buf_size,
+			command_print_sameline(cmd, "MSP432P401x Device Rev %c\n",
-				"MSP432P401x Device Rev %c\n",
 				(char)msp432_bank->hardware_rev);
 			break;
 		case MSP432P411X:
-			printed = snprintf(buf, buf_size,
+			command_print_sameline(cmd, "MSP432P411x Device Rev %c\n",
-				"MSP432P411x Device Rev %c\n",
 				(char)msp432_bank->hardware_rev);
 			break;
 		case MSP432E401Y:
-			printed = snprintf(buf, buf_size, "MSP432E401Y Device\n");
+			command_print_sameline(cmd, "MSP432E401Y Device\n");
 			break;
 		case MSP432E411Y:
-			printed = snprintf(buf, buf_size, "MSP432E411Y Device\n");
+			command_print_sameline(cmd, "MSP432E411Y Device\n");
 			break;
 		case MSP432E4X_GUESS:
-			printed = snprintf(buf, buf_size,
+			command_print_sameline(cmd,
 				"Unrecognized MSP432E4 DID0 and DID1 IDs (%08" PRIX32 ", %08" PRIX32 ")",
 				msp432_bank->device_id, msp432_bank->hardware_rev);
 			break;
 		case MSP432P401X_GUESS:
 		case MSP432P411X_GUESS:
 		default:
-			printed = snprintf(buf, buf_size,
+			command_print_sameline(cmd,
 				"Unrecognized MSP432P4 Device ID and Hardware Rev (%04" PRIX32 ", %02" PRIX32 ")",
 				msp432_bank->device_id, msp432_bank->hardware_rev);
 			break;
 	}
 
-	buf_size -= printed;
-
-	if (0 > buf_size)
-		return ERROR_BUF_TOO_SMALL;
-
 	return ERROR_OK;
 }
 

src/flash/nor/niietcm4.c

@@ -1719,12 +1719,11 @@ static int niietcm4_auto_probe(struct flash_bank *bank)
 	return niietcm4_probe(bank);
 }
 
-static int get_niietcm4_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_niietcm4_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
-	LOG_INFO("\nNIIET Cortex-M4F %s\n%s", niietcm4_info->chip_name, niietcm4_info->chip_brief);
+	command_print_sameline(cmd, "\nNIIET Cortex-M4F %s\n%s",
-	snprintf(buf, buf_size, " ");
+			niietcm4_info->chip_name, niietcm4_info->chip_brief);
-
 	return ERROR_OK;
 }
 

src/flash/nor/nrf5.c

@@ -624,35 +624,42 @@ static const char *nrf5_decode_info_package(uint32_t package)
 	return "xx";
 }
 
-static int nrf5_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_nrf5_chip_type_str(const struct nrf5_info *chip, char *buf, unsigned int buf_size)
 {
-	struct nrf5_bank *nbank = bank->driver_priv;
-	struct nrf5_info *chip = nbank->chip;
 	int res;
-
 	if (chip->spec) {
-		res = snprintf(buf, buf_size,
+		res = snprintf(buf, buf_size, "nRF%s-%s(build code: %s)",
-				"nRF%s-%s(build code: %s)",
 				chip->spec->part, chip->spec->variant, chip->spec->build_code);
-
 	} else if (chip->ficr_info_valid) {
 		char variant[5];
 		nrf5_info_variant_to_str(chip->ficr_info.variant, variant);
-		res = snprintf(buf, buf_size,
+		res = snprintf(buf, buf_size, "nRF%" PRIx32 "-%s%.2s(build code: %s)",
-				"nRF%" PRIx32 "-%s%.2s(build code: %s)",
 				chip->ficr_info.part,
 				nrf5_decode_info_package(chip->ficr_info.package),
 				variant, &variant[2]);
-
 	} else {
-		res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ")",
+		res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ")", chip->hwid);
-				chip->hwid);
 	}
-	if (res <= 0)
+
+	/* safety: */
+	if (res <= 0 || (unsigned int)res >= buf_size) {
+		LOG_ERROR("BUG: buffer problem in %s", __func__);
+		return ERROR_FAIL;
+	}
+	return ERROR_OK;
+}
+
+static int nrf5_info(struct flash_bank *bank, struct command_invocation *cmd)
+{
+	struct nrf5_bank *nbank = bank->driver_priv;
+	struct nrf5_info *chip = nbank->chip;
+
+	char chip_type_str[256];
+	if (get_nrf5_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) != ERROR_OK)
 		return ERROR_FAIL;
 
-	snprintf(buf + res, buf_size - res, " %ukB Flash, %ukB RAM",
+	command_print_sameline(cmd, "%s %ukB Flash, %ukB RAM",
-				chip->flash_size_kb, chip->ram_size_kb);
+			chip_type_str, chip->flash_size_kb, chip->ram_size_kb);
 	return ERROR_OK;
 }
 
@@ -824,12 +831,15 @@ static int nrf5_probe(struct flash_bank *bank)
 	chip->flash_size_kb = num_sectors * flash_page_size / 1024;
 
 	if (!chip->bank[0].probed && !chip->bank[1].probed) {
-		char buf[80];
+		char chip_type_str[256];
-		nrf5_info(bank, buf, sizeof(buf));
+		if (get_nrf5_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) != ERROR_OK)
-		if (!chip->spec && !chip->ficr_info_valid)
+			return ERROR_FAIL;
-			LOG_INFO("Unknown device: %s", buf);
+		const bool device_is_unknown = (!chip->spec && !chip->ficr_info_valid);
-		else
+		LOG_INFO("%s%s %ukB Flash, %ukB RAM",
-			LOG_INFO("%s", buf);
+				device_is_unknown ? "Unknown device: " : "",
+				chip_type_str,
+				chip->flash_size_kb,
+				chip->ram_size_kb);
 	}
 
 	free(bank->sectors);

src/flash/nor/pic32mx.c

@@ -801,37 +801,35 @@ static int pic32mx_auto_probe(struct flash_bank *bank)
 	return pic32mx_probe(bank);
 }
 
-static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct target *target = bank->target;
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	uint32_t device_id;
-	int printed = 0, i;
 
 	device_id = ejtag_info->idcode;
 
 	if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd,
-				 "Cannot identify target as a PIC32MX family (manufacturer 0x%03x != 0x%03x)\n",
+				"Cannot identify target as a PIC32MX family (manufacturer 0x%03x != 0x%03x)\n",
-				 (unsigned)((device_id >> 1) & 0x7ff),
+				(unsigned)((device_id >> 1) & 0x7ff),
-				 PIC32MX_MANUF_ID);
+				PIC32MX_MANUF_ID);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 
+	int i;
 	for (i = 0; pic32mx_devs[i].name != NULL; i++) {
 		if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
-			printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
+			command_print_sameline(cmd, "PIC32MX%s", pic32mx_devs[i].name);
 			break;
 		}
 	}
 
 	if (pic32mx_devs[i].name == NULL)
-		printed = snprintf(buf, buf_size, "Unknown");
+		command_print_sameline(cmd, "Unknown");
 
-	buf += printed;
+	command_print_sameline(cmd, " Ver: 0x%02x",
-	buf_size -= printed;
-	snprintf(buf, buf_size, " Ver: 0x%02x",
 			(unsigned)((device_id >> 28) & 0xf));
 
 	return ERROR_OK;

src/flash/nor/psoc4.c

@@ -851,7 +851,7 @@ static int psoc4_auto_probe(struct flash_bank *bank)
 }
 
 
-static int get_psoc4_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_psoc4_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct target *target = bank->target;
 	struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
@@ -863,35 +863,30 @@ static int get_psoc4_info(struct flash_bank *bank, char *buf, int buf_size)
 	uint32_t size_in_kb = bank->size / 1024;
 
 	if (target->state != TARGET_HALTED) {
-		snprintf(buf, buf_size, "%s, flash %" PRIu32 " kb"
+		command_print_sameline(cmd, "%s, flash %" PRIu32 " kb"
 			" (halt target to see details)", family->name, size_in_kb);
 		return ERROR_OK;
 	}
 
-	int retval;
-	int printed = 0;
 	uint32_t silicon_id;
 	uint16_t family_id;
 	uint8_t protection;
 
-	retval = psoc4_get_silicon_id(bank, &silicon_id, &family_id, &protection);
+	int retval = psoc4_get_silicon_id(bank, &silicon_id, &family_id, &protection);
 	if (retval != ERROR_OK)
 		return retval;
 
 	if (family_id != psoc4_info->family_id)
-		printed = snprintf(buf, buf_size, "Family id mismatch 0x%02" PRIx16
+		command_print_sameline(cmd, "Family id mismatch 0x%02" PRIx16
 			"/0x%02" PRIx16 ", silicon id 0x%08" PRIx32,
 			psoc4_info->family_id, family_id, silicon_id);
 	else {
-		printed = snprintf(buf, buf_size, "%s silicon id 0x%08" PRIx32 "",
+		command_print_sameline(cmd, "%s silicon id 0x%08" PRIx32 "",
 			family->name, silicon_id);
 	}
 
-	buf += printed;
-	buf_size -= printed;
-
 	const char *prot_txt = psoc4_decode_chip_protection(protection);
-	snprintf(buf, buf_size, ", flash %" PRIu32 " kb %s", size_in_kb, prot_txt);
+	command_print_sameline(cmd, ", flash %" PRIu32 " kb %s", size_in_kb, prot_txt);
 	return ERROR_OK;
 }
 

src/flash/nor/psoc5lp.c

@@ -753,14 +753,14 @@ static int psoc5lp_nvl_write(struct flash_bank *bank,
 }
 
 static int psoc5lp_nvl_get_info_command(struct flash_bank *bank,
-	char *buf, int buf_size)
+	struct command_invocation *cmd)
 {
 	struct psoc5lp_nvl_flash_bank *psoc_nvl_bank = bank->driver_priv;
 	char part_number[PART_NUMBER_LEN];
 
 	psoc5lp_get_part_number(psoc_nvl_bank->device, part_number);
 
-	snprintf(buf, buf_size, "%s", part_number);
+	command_print_sameline(cmd, "%s", part_number);
 
 	return ERROR_OK;
 }
@@ -934,14 +934,14 @@ static int psoc5lp_eeprom_write(struct flash_bank *bank,
 	return ERROR_OK;
 }
 
-static int psoc5lp_eeprom_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int psoc5lp_eeprom_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct psoc5lp_eeprom_flash_bank *psoc_eeprom_bank = bank->driver_priv;
 	char part_number[PART_NUMBER_LEN];
 
 	psoc5lp_get_part_number(psoc_eeprom_bank->device, part_number);
 
-	snprintf(buf, buf_size, "%s", part_number);
+	command_print_sameline(cmd, "%s", part_number);
 
 	return ERROR_OK;
 }
@@ -1397,7 +1397,7 @@ static int psoc5lp_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int psoc5lp_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int psoc5lp_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv;
 	char part_number[PART_NUMBER_LEN];
@@ -1406,7 +1406,7 @@ static int psoc5lp_get_info_command(struct flash_bank *bank, char *buf, int buf_
 	psoc5lp_get_part_number(psoc_bank->device, part_number);
 	ecc = psoc_bank->ecc_enabled ? "ECC enabled" : "ECC disabled";
 
-	snprintf(buf, buf_size, "%s %s", part_number, ecc);
+	command_print_sameline(cmd, "%s %s", part_number, ecc);
 
 	return ERROR_OK;
 }

src/flash/nor/psoc6.c

@@ -495,7 +495,7 @@ static const char *protection_to_str(uint8_t protection)
  * @param buf_size size of the buffer
  * @return ERROR_OK in case of success, ERROR_XXX code otherwise
  *************************************************************************************************/
-static int psoc6_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int psoc6_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct psoc6_target_info *psoc6_info = bank->driver_priv;
 
@@ -506,7 +506,7 @@ static int psoc6_get_info(struct flash_bank *bank, char *buf, int buf_size)
 	if (hr != ERROR_OK)
 		return hr;
 
-	snprintf(buf, buf_size,
+	command_print_sameline(cmd,
 		"PSoC6 Silicon ID: 0x%08" PRIX32 "\n"
 		"Protection: %s\n"
 		"Main Flash size: %" PRIu32 " kB\n"

src/flash/nor/sh_qspi.c

@@ -851,17 +851,16 @@ static int sh_qspi_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int sh_qspi_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int sh_qspi_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct sh_qspi_flash_bank *info = bank->driver_priv;
 
 	if (!info->probed) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nSH QSPI flash bank not probed yet\n");
-			 "\nSH QSPI flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nSH QSPI flash information:\n"
+	command_print_sameline(cmd, "\nSH QSPI flash information:\n"
 		"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
 		info->dev->name, info->dev->device_id);
 

src/flash/nor/sim3x.c

@@ -834,53 +834,32 @@ static int sim3x_auto_probe(struct flash_bank *bank)
 	}
 }
 
-static int sim3x_flash_info(struct flash_bank *bank, char *buf, int buf_size)
+static int sim3x_flash_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int ret;
-	int printed = 0;
 	struct sim3x_info *sim3x_info;
 
 	sim3x_info = bank->driver_priv;
 
 	/* Read info about chip */
-	ret = sim3x_read_info(bank);
+	int ret = sim3x_read_info(bank);
 	if (ret != ERROR_OK)
 		return ret;
 
 	/* Part */
 	if (sim3x_info->part_family && sim3x_info->part_number) {
-		printed = snprintf(buf, buf_size, "SiM3%c%d", sim3x_info->part_family, sim3x_info->part_number);
+		command_print_sameline(cmd, "SiM3%c%d", sim3x_info->part_family, sim3x_info->part_number);
-		buf += printed;
-		buf_size -= printed;
-
-		if (buf_size <= 0)
-			return ERROR_BUF_TOO_SMALL;
 
 		/* Revision */
 		if (sim3x_info->device_revision && sim3x_info->device_revision <= 'Z' - 'A') {
-			printed = snprintf(buf, buf_size, "-%c", sim3x_info->device_revision + 'A');
+			command_print_sameline(cmd, "-%c", sim3x_info->device_revision + 'A');
-			buf += printed;
-			buf_size -= printed;
-
-			if (buf_size <= 0)
-				return ERROR_BUF_TOO_SMALL;
 
 			/* Package */
-			printed = snprintf(buf, buf_size, "-G%s", sim3x_info->device_package);
+			command_print_sameline(cmd, "-G%s", sim3x_info->device_package);
-			buf += printed;
-			buf_size -= printed;
-
-			if (buf_size <= 0)
-				return ERROR_BUF_TOO_SMALL;
 		}
 	}
 
 	/* Print flash size */
-	printed = snprintf(buf, buf_size, " flash_size = %dKB", sim3x_info->flash_size_kb);
+	command_print_sameline(cmd, " flash_size = %dKB", sim3x_info->flash_size_kb);
-	buf_size -= printed;
-
-	if (buf_size <= 0)
-		return ERROR_BUF_TOO_SMALL;
 
 	return ERROR_OK;
 }

src/flash/nor/stellaris.c

@@ -479,9 +479,8 @@ FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
 	return ERROR_OK;
 }
 
-static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stellaris_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int printed;
 	struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
 
 	if (stellaris_info->did1 == 0)
@@ -490,41 +489,34 @@ static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
 	/* Read main and master clock frequency register */
 	stellaris_read_clock_info(bank);
 
-	printed = snprintf(buf,
+	command_print_sameline(cmd,
-			   buf_size,
+			"\nTI/LMI Stellaris information: Chip is "
-			   "\nTI/LMI Stellaris information: Chip is "
+			"class %i (%s) %s rev %c%i\n",
-			   "class %i (%s) %s rev %c%i\n",
+			stellaris_info->target_class,
-			   stellaris_info->target_class,
+			StellarisClassname[stellaris_info->target_class],
-			   StellarisClassname[stellaris_info->target_class],
+			stellaris_info->target_name,
-			   stellaris_info->target_name,
+			(int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
-			   (int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
+			(int)((stellaris_info->did0) & 0xFF));
-			   (int)((stellaris_info->did0) & 0xFF));
-	buf += printed;
-	buf_size -= printed;
 
-	printed = snprintf(buf,
+	command_print_sameline(cmd,
-			   buf_size,
+			"did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
-			   "did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
+			", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n",
-			   ", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n",
+			stellaris_info->did1,
-			   stellaris_info->did1,
+			stellaris_info->did1,
-			   stellaris_info->did1,
+			"ARMv7M",
-			   "ARMv7M",
+			stellaris_info->sramsiz,
-			   stellaris_info->sramsiz,
+			(uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024));
-			   (uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024));
-	buf += printed;
-	buf_size -= printed;
 
-	snprintf(buf,
+	command_print_sameline(cmd,
-			   buf_size,
+			"master clock: %ikHz%s, "
-			   "master clock: %ikHz%s, "
+			"rcc is 0x%" PRIx32 ", rcc2 is 0x%" PRIx32 ", "
-			   "rcc is 0x%" PRIx32 ", rcc2 is 0x%" PRIx32 ", "
+			"pagesize: %" PRIu32 ", pages: %" PRIu32,
-			   "pagesize: %" PRIu32 ", pages: %" PRIu32,
+			(int)(stellaris_info->mck_freq / 1000),
-			   (int)(stellaris_info->mck_freq / 1000),
+			stellaris_info->mck_desc,
-			   stellaris_info->mck_desc,
+			stellaris_info->rcc,
-			   stellaris_info->rcc,
+			stellaris_info->rcc2,
-			   stellaris_info->rcc2,
+			stellaris_info->pagesize,
-			   stellaris_info->pagesize,
+			stellaris_info->num_pages);
-			   stellaris_info->num_pages);
 
 	return ERROR_OK;
 }

src/flash/nor/stm32f1x.c

@@ -29,7 +29,7 @@
 #include "imp.h"
 #include <helper/binarybuffer.h>
 #include <target/algorithm.h>
-#include <target/armv7m.h>
+#include <target/cortex_m.h>
 
 /* stm32x register locations */
 
@@ -623,34 +623,32 @@ cleanup:
 
 static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
 {
-	/* This check the device CPUID core register to detect
-	 * the M0 from the M3 devices. */
-
 	struct target *target = bank->target;
-	uint32_t cpuid, device_id_register = 0;
+	struct cortex_m_common *cortex_m = target_to_cm(target);
+	uint32_t device_id_register = 0;
 
-	/* Get the CPUID from the ARM Core
+	if (!target_was_examined(target)) {
-	 * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0432c/DDI0432C_cortex_m0_r0p0_trm.pdf 4.2.1 */
+		LOG_ERROR("Target not examined yet");
-	int retval = target_read_u32(target, 0xE000ED00, &cpuid);
+		return ERROR_FAIL;
-	if (retval != ERROR_OK)
+	}
-		return retval;
 
-	if (((cpuid >> 4) & 0xFFF) == 0xC20) {
+	switch (cortex_m->core_info->partno) {
-		/* 0xC20 is M0 devices */
+	case CORTEX_M0_PARTNO: /* STM32F0x devices */
 		device_id_register = 0x40015800;
-	} else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
+		break;
-		/* 0xC23 is M3 devices */
+	case CORTEX_M3_PARTNO: /* STM32F1x devices */
 		device_id_register = 0xE0042000;
-	} else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
+		break;
-		/* 0xC24 is M4 devices */
+	case CORTEX_M4_PARTNO: /* STM32F3x devices */
 		device_id_register = 0xE0042000;
-	} else {
+		break;
+	default:
 		LOG_ERROR("Cannot identify target as a stm32x");
 		return ERROR_FAIL;
 	}
 
 	/* read stm32 device id register */
-	retval = target_read_u32(target, device_id_register, device_id);
+	int retval = target_read_u32(target, device_id_register, device_id);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -660,27 +658,30 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
 static int stm32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_size_in_kb)
 {
 	struct target *target = bank->target;
-	uint32_t cpuid, flash_size_reg;
+	struct cortex_m_common *cortex_m = target_to_cm(target);
+	uint32_t flash_size_reg;
 
-	int retval = target_read_u32(target, 0xE000ED00, &cpuid);
+	if (!target_was_examined(target)) {
-	if (retval != ERROR_OK)
+		LOG_ERROR("Target not examined yet");
-		return retval;
+		return ERROR_FAIL;
+	}
 
-	if (((cpuid >> 4) & 0xFFF) == 0xC20) {
+	switch (cortex_m->core_info->partno) {
-		/* 0xC20 is M0 devices */
+	case CORTEX_M0_PARTNO: /* STM32F0x devices */
 		flash_size_reg = 0x1FFFF7CC;
-	} else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
+		break;
-		/* 0xC23 is M3 devices */
+	case CORTEX_M3_PARTNO: /* STM32F1x devices */
 		flash_size_reg = 0x1FFFF7E0;
-	} else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
+		break;
-		/* 0xC24 is M4 devices */
+	case CORTEX_M4_PARTNO: /* STM32F3x devices */
 		flash_size_reg = 0x1FFFF7CC;
-	} else {
+		break;
+	default:
 		LOG_ERROR("Cannot identify target as a stm32x");
 		return ERROR_FAIL;
 	}
 
-	retval = target_read_u16(target, flash_size_reg, flash_size_in_kb);
+	int retval = target_read_u16(target, flash_size_reg, flash_size_in_kb);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -954,11 +955,11 @@ static const char *get_stm32f0_revision(uint16_t rev_id)
 	return rev_str;
 }
 
-static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	uint32_t dbgmcu_idcode;
 
-		/* read stm32 device id register */
+	/* read stm32 device id register */
 	int retval = stm32x_get_device_id(bank, &dbgmcu_idcode);
 	if (retval != ERROR_OK)
 		return retval;
@@ -1174,14 +1175,14 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
 		break;
 
 	default:
-		snprintf(buf, buf_size, "Cannot identify target as a STM32F0/1/3\n");
+		command_print_sameline(cmd, "Cannot identify target as a STM32F0/1/3\n");
 		return ERROR_FAIL;
 	}
 
 	if (rev_str != NULL)
-		snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
+		command_print_sameline(cmd, "%s - Rev: %s", device_str, rev_str);
 	else
-		snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
+		command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
 
 	return ERROR_OK;
 }

src/flash/nor/stm32f2x.c

@@ -29,7 +29,7 @@
 #include "imp.h"
 #include <helper/binarybuffer.h>
 #include <target/algorithm.h>
-#include <target/armv7m.h>
+#include <target/cortex_m.h>
 
 /* Regarding performance:
  *
@@ -968,25 +968,17 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
 	 * Only effects Rev A silicon */
 
 	struct target *target = bank->target;
-	uint32_t cpuid;
+	struct cortex_m_common *cortex_m = target_to_cm(target);
 
 	/* read stm32 device id register */
 	int retval = target_read_u32(target, 0xE0042000, device_id);
 	if (retval != ERROR_OK)
 		return retval;
 
-	if ((*device_id & 0xfff) == 0x411) {
+	if ((*device_id & 0xfff) == 0x411 && cortex_m->core_info->partno == CORTEX_M4_PARTNO) {
-		/* read CPUID reg to check core type */
+		*device_id &= ~((0xFFFF << 16) | 0xfff);
-		retval = target_read_u32(target, 0xE000ED00, &cpuid);
+		*device_id |= (0x1000 << 16) | 0x413;
-		if (retval != ERROR_OK)
+		LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE");
-			return retval;
-
-		/* check for cortex_m4 */
-		if (((cpuid >> 4) & 0xFFF) == 0xC24) {
-			*device_id &= ~((0xFFFF << 16) | 0xfff);
-			*device_id |= (0x1000 << 16) | 0x413;
-			LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE");
-		}
 	}
 	return retval;
 }
@@ -1251,7 +1243,7 @@ static int stm32x_auto_probe(struct flash_bank *bank)
 	return stm32x_probe(bank);
 }
 
-static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	uint32_t dbgmcu_idcode;
 
@@ -1416,14 +1408,14 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
 		break;
 
 	default:
-		snprintf(buf, buf_size, "Cannot identify target as a STM32F2/4/7\n");
+		command_print_sameline(cmd, "Cannot identify target as a STM32F2/4/7\n");
 		return ERROR_FAIL;
 	}
 
 	if (rev_str != NULL)
-		snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
+		command_print_sameline(cmd, "%s - Rev: %s", device_str, rev_str);
 	else
-		snprintf(buf, buf_size, "%s - Rev: unknown (0x%04" PRIx16 ")", device_str, rev_id);
+		command_print_sameline(cmd, "%s - Rev: unknown (0x%04" PRIx16 ")", device_str, rev_id);
 
 	return ERROR_OK;
 }

src/flash/nor/stm32h7x.c

@@ -916,7 +916,7 @@ static int stm32x_auto_probe(struct flash_bank *bank)
 }
 
 /* This method must return a string displaying information about the bank */
-static int stm32x_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int stm32x_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
 	const struct stm32h7x_part_info *info = stm32x_info->part_info;
@@ -924,7 +924,7 @@ static int stm32x_get_info(struct flash_bank *bank, char *buf, int buf_size)
 	if (!stm32x_info->probed) {
 		int retval = stm32x_probe(bank);
 		if (retval != ERROR_OK) {
-			snprintf(buf, buf_size, "Unable to find bank information.");
+			command_print_sameline(cmd, "Unable to find bank information.");
 			return retval;
 		}
 	}
@@ -938,16 +938,16 @@ static int stm32x_get_info(struct flash_bank *bank, char *buf, int buf_size)
 				rev_str = info->revs[i].str;
 
 		if (rev_str != NULL) {
-			snprintf(buf, buf_size, "%s - Rev: %s",
+			command_print_sameline(cmd, "%s - Rev: %s",
 				stm32x_info->part_info->device_str, rev_str);
 		} else {
-			snprintf(buf, buf_size,
+			command_print_sameline(cmd,
 				 "%s - Rev: unknown (0x%04" PRIx16 ")",
 				stm32x_info->part_info->device_str, rev_id);
 		}
 	} else {
-	  snprintf(buf, buf_size, "Cannot identify target as a STM32H7x");
+		command_print_sameline(cmd, "Cannot identify target as a STM32H7x");
-	  return ERROR_FAIL;
+		return ERROR_FAIL;
 	}
 	return ERROR_OK;
 }

src/flash/nor/stm32l4x.c

@@ -1332,13 +1332,35 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
 	return (retval == ERROR_OK) ? ERROR_FAIL : retval;
 }
 
+static const char *get_stm32l4_rev_str(struct flash_bank *bank)
+{
+	struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
+	const struct stm32l4_part_info *part_info = stm32l4_info->part_info;
+	assert(part_info);
+
+	const uint16_t rev_id = stm32l4_info->idcode >> 16;
+	for (unsigned int i = 0; i < part_info->num_revs; i++) {
+		if (rev_id == part_info->revs[i].rev)
+			return part_info->revs[i].str;
+	}
+	return "'unknown'";
+}
+
+static const char *get_stm32l4_bank_type_str(struct flash_bank *bank)
+{
+	struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
+	assert(stm32l4_info->part_info);
+	return stm32l4_is_otp(bank) ? "OTP" :
+			stm32l4_info->dual_bank_mode ? "Flash dual" :
+			"Flash single";
+}
+
 static int stm32l4_probe(struct flash_bank *bank)
 {
 	struct target *target = bank->target;
 	struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
 	const struct stm32l4_part_info *part_info;
 	uint16_t flash_size_kb = 0xffff;
-	uint32_t device_id;
 	uint32_t options;
 
 	stm32l4_info->probed = false;
@@ -1348,7 +1370,7 @@ static int stm32l4_probe(struct flash_bank *bank)
 	if (retval != ERROR_OK)
 		return retval;
 
-	device_id = stm32l4_info->idcode & 0xFFF;
+	const uint32_t device_id = stm32l4_info->idcode & 0xFFF;
 
 	for (unsigned int n = 0; n < ARRAY_SIZE(stm32l4_parts); n++) {
 		if (device_id == stm32l4_parts[n].id) {
@@ -1363,15 +1385,15 @@ static int stm32l4_probe(struct flash_bank *bank)
 	}
 
 	part_info = stm32l4_info->part_info;
+	const char *rev_str = get_stm32l4_rev_str(bank);
+	const uint16_t rev_id = stm32l4_info->idcode >> 16;
+
+	LOG_INFO("device idcode = 0x%08" PRIx32 " (%s - Rev %s : 0x%04x - %s-bank)",
+			stm32l4_info->idcode, part_info->device_str, rev_str, rev_id,
+			get_stm32l4_bank_type_str(bank));
+
 	stm32l4_info->flash_regs = stm32l4_info->part_info->default_flash_regs;
 
-	char device_info[1024];
-	retval = bank->driver->info(bank, device_info, sizeof(device_info));
-	if (retval != ERROR_OK)
-		return retval;
-
-	LOG_INFO("device idcode = 0x%08" PRIx32 " (%s)", stm32l4_info->idcode, device_info);
-
 	/* read flash option register */
 	retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_OPTR_INDEX, &options);
 	if (retval != ERROR_OK)
@@ -1610,33 +1632,19 @@ static int stm32l4_auto_probe(struct flash_bank *bank)
 	return stm32l4_probe(bank);
 }
 
-static int get_stm32l4_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stm32l4_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
 	const struct stm32l4_part_info *part_info = stm32l4_info->part_info;
 
 	if (part_info) {
-		const char *rev_str = NULL;
+		const uint16_t rev_id = stm32l4_info->idcode >> 16;
-		uint16_t rev_id = stm32l4_info->idcode >> 16;
+		command_print_sameline(cmd, "%s - Rev %s : 0x%04x", part_info->device_str,
-		for (unsigned int i = 0; i < part_info->num_revs; i++) {
+				get_stm32l4_rev_str(bank), rev_id);
-			if (rev_id == part_info->revs[i].rev) {
-				rev_str = part_info->revs[i].str;
-				break;
-			}
-		}
-
-		int buf_len = snprintf(buf, buf_size, "%s - Rev %s : 0x%04x",
-				part_info->device_str, rev_str ? rev_str : "'unknown'", rev_id);
-
 		if (stm32l4_info->probed)
-			snprintf(buf + buf_len, buf_size - buf_len, " - %s-bank",
+			command_print_sameline(cmd, " - %s-bank", get_stm32l4_bank_type_str(bank));
-					stm32l4_is_otp(bank) ? "OTP" :
-					stm32l4_info->dual_bank_mode ? "Flash dual" : "Flash single");
-
-		return ERROR_OK;
 	} else {
-		snprintf(buf, buf_size, "Cannot identify target as an %s device", device_families);
+		command_print_sameline(cmd, "Cannot identify target as an %s device", device_families);
-		return ERROR_FAIL;
 	}
 
 	return ERROR_OK;

src/flash/nor/stm32lx.c

@@ -718,7 +718,7 @@ static int stm32lx_read_id_code(struct target *target, uint32_t *id)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	int retval;
-	if (armv7m->arm.is_armv6m == true)
+	if (armv7m->arm.arch == ARM_ARCH_V6M)
 		retval = target_read_u32(target, DBGMCU_IDCODE_L0, id);
 	else
 	/* read stm32 device id register */
@@ -870,7 +870,7 @@ static int stm32lx_auto_probe(struct flash_bank *bank)
 }
 
 /* This method must return a string displaying information about the bank */
-static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
+static int stm32lx_get_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
 	const struct stm32lx_part_info *info = &stm32lx_info->part_info;
@@ -880,8 +880,7 @@ static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
 	if (!stm32lx_info->probed) {
 		int retval = stm32lx_probe(bank);
 		if (retval != ERROR_OK) {
-			snprintf(buf, buf_size,
+			command_print_sameline(cmd, "Unable to find bank information.");
-				"Unable to find bank information.");
 			return retval;
 		}
 	}
@@ -891,13 +890,9 @@ static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
 			rev_str = info->revs[i].str;
 
 	if (rev_str != NULL) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "%s - Rev: %s", info->device_str, rev_str);
-			"%s - Rev: %s",
-			info->device_str, rev_str);
 	} else {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)", info->device_str, rev_id);
-			"%s - Rev: unknown (0x%04x)",
-			info->device_str, rev_id);
 	}
 
 	return ERROR_OK;

src/flash/nor/stmqspi.c

@@ -2397,17 +2397,16 @@ static int stmqspi_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_stmqspi_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stmqspi_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
 
 	if (!(stmqspi_info->probed)) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nQSPI flash bank not probed yet\n");
-			"\nQSPI flash bank not probed yet\n");
 		return ERROR_FLASH_BANK_NOT_PROBED;
 	}
 
-	snprintf(buf, buf_size, "flash%s%s \'%s\', device id = 0x%06" PRIx32
+	command_print_sameline(cmd, "flash%s%s \'%s\', device id = 0x%06" PRIx32
 			", flash size = %" PRIu32 "%sbytes\n(page size = %" PRIu32
 			", read = 0x%02" PRIx8 ", qread = 0x%02" PRIx8
 			", pprog = 0x%02" PRIx8 ", mass_erase = 0x%02" PRIx8

src/flash/nor/stmsmi.c

@@ -631,17 +631,16 @@ static int stmsmi_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int get_stmsmi_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stmsmi_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
 
 	if (!(stmsmi_info->probed)) {
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "\nSMI flash bank not probed yet\n");
-			"\nSMI flash bank not probed yet\n");
 		return ERROR_OK;
 	}
 
-	snprintf(buf, buf_size, "\nSMI flash information:\n"
+	command_print_sameline(cmd, "\nSMI flash information:\n"
 		"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
 		stmsmi_info->dev->name, stmsmi_info->dev->device_id);
 

src/flash/nor/str7x.c

@@ -702,13 +702,13 @@ COMMAND_HANDLER(str7x_handle_part_id_command)
 }
 #endif
 
-static int get_str7x_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_str7x_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	/* Setting the write protection on a sector is a permanent change but it
 	 * can be disabled temporarily. FLASH_NVWPAR reflects the permanent
 	 * protection state of the sectors, not the temporary.
 	 */
-	snprintf(buf, buf_size, "STR7x flash protection info is only valid after a power cycle, "
+	command_print_sameline(cmd, "STR7x flash protection info is only valid after a power cycle, "
 			"clearing the protection is only temporary and may not be reflected in the current "
 			"info returned.");
 	return ERROR_OK;

src/flash/nor/tcl.c

@@ -89,7 +89,6 @@ COMMAND_HANDLER(handle_flash_info_command)
 		return retval;
 
 	if (p != NULL) {
-		char buf[1024];
 		int num_blocks;
 		struct flash_sector *block_array;
 
@@ -150,10 +149,10 @@ COMMAND_HANDLER(handle_flash_info_command)
 		}
 
 		if (p->driver->info != NULL) {
-			retval = p->driver->info(p, buf, sizeof(buf));
+			/* Let the flash driver print extra custom info */
-			if (retval == ERROR_OK)
+			retval = p->driver->info(p, CMD);
-				command_print(CMD, "%s", buf);
+			command_print_sameline(CMD, "\n");
-			else
+			if (retval != ERROR_OK)
 				LOG_ERROR("error retrieving flash info");
 		}
 	}

src/flash/nor/tms470.c

@@ -1118,26 +1118,20 @@ static int tms470_protect_check(struct flash_bank *bank)
 
 /* ---------------------------------------------------------------------- */
 
-static int get_tms470_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_tms470_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
-	int used = 0;
 	struct tms470_flash_bank *tms470_info = bank->driver_priv;
 
 	if (!tms470_info->device_ident_reg)
 		tms470_read_part_info(bank);
 
 	if (!tms470_info->device_ident_reg) {
-		(void)snprintf(buf, buf_size, "Cannot identify target as a TMS470\n");
+		command_print_sameline(cmd, "Cannot identify target as a TMS470\n");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 
-	used =
+	command_print_sameline(cmd, "\ntms470 information: Chip is %s\n", tms470_info->part_name);
-		snprintf(buf, buf_size, "\ntms470 information: Chip is %s\n",
+	command_print_sameline(cmd, "Flash protection level 2 is %s\n",
-			tms470_info->part_name);
-	buf += used;
-	buf_size -= used;
-
-	snprintf(buf, buf_size, "Flash protection level 2 is %s\n",
 		tms470_check_flash_unlocked(bank->target) == ERROR_OK ? "disabled" : "enabled");
 
 	return ERROR_OK;

src/flash/nor/virtual.c

@@ -172,14 +172,14 @@ static int virtual_auto_probe(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int virtual_info(struct flash_bank *bank, char *buf, int buf_size)
+static int virtual_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct flash_bank *master_bank = virtual_get_master_bank(bank);
 
 	if (master_bank == NULL)
 		return ERROR_FLASH_OPERATION_FAILED;
 
-	snprintf(buf, buf_size, "%s driver for flash bank %s at " TARGET_ADDR_FMT,
+	command_print_sameline(cmd, "%s driver for flash bank %s at " TARGET_ADDR_FMT,
 			bank->driver->name, master_bank->name, master_bank->base);
 
 	return ERROR_OK;

src/flash/nor/w600.c

@@ -362,7 +362,7 @@ static int w600_auto_probe(struct flash_bank *bank)
 	return w600_probe(bank);
 }
 
-static int get_w600_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_w600_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	uint32_t flash_id;
 
@@ -371,7 +371,7 @@ static int get_w600_info(struct flash_bank *bank, char *buf, int buf_size)
 	if (retval != ERROR_OK)
 		return retval;
 
-	snprintf(buf, buf_size, "w600 : 0x%08" PRIx32 "", flash_id);
+	command_print_sameline(cmd, "w600 : 0x%08" PRIx32 "", flash_id);
 	return ERROR_OK;
 }
 

src/flash/nor/xcf.c

@@ -581,15 +581,15 @@ FLASH_BANK_COMMAND_HANDLER(xcf_flash_bank_command)
 	return ERROR_OK;
 }
 
-static int xcf_info(struct flash_bank *bank, char *buf, int buf_size)
+static int xcf_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	const struct xcf_priv *priv = bank->driver_priv;
 
 	if (!priv->probed) {
-		snprintf(buf, buf_size, "\nXCF flash bank not probed yet\n");
+		command_print_sameline(cmd, "\nXCF flash bank not probed yet\n");
 		return ERROR_OK;
 	}
-	snprintf(buf, buf_size, "%s", product_name(bank));
+	command_print_sameline(cmd, "%s", product_name(bank));
 	return ERROR_OK;
 }
 

src/flash/nor/xmc1xxx.c

@@ -403,7 +403,7 @@ static int xmc1xxx_protect_check(struct flash_bank *bank)
 	return ERROR_OK;
 }
 
-static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int xmc1xxx_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	uint32_t chipid[8];
 	int i, retval;
@@ -429,7 +429,8 @@ static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_
 	}
 	LOG_DEBUG("ID[7] = %08" PRIX32, chipid[7]);
 
-	snprintf(buf, buf_size, "XMC%" PRIx32 "00 %" PRIX32 " flash %" PRIu32 "KB ROM %" PRIu32 "KB SRAM %" PRIu32 "KB",
+	command_print_sameline(cmd,
+			"XMC%" PRIx32 "00 %" PRIX32 " flash %" PRIu32 "KB ROM %" PRIu32 "KB SRAM %" PRIu32 "KB",
 			(chipid[0] >> 12) & 0xff,
 			0xAA + (chipid[7] >> 28) - 1,
 			(((chipid[6] >> 12) & 0x3f) - 1) * 4,

src/flash/nor/xmc4xxx.c

@@ -805,7 +805,7 @@ abort_write_and_exit:
 
 }
 
-static int xmc4xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int xmc4xxx_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
 {
 	struct xmc4xxx_flash_bank *fb = bank->driver_priv;
 	uint32_t scu_idcode;
@@ -914,9 +914,7 @@ static int xmc4xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_
 		break;
 
 	default:
-		snprintf(buf, buf_size,
+		command_print_sameline(cmd, "Cannot identify target as an XMC4xxx. SCU_ID: %"PRIx32 "\n", scu_idcode);
-			 "Cannot identify target as an XMC4xxx. SCU_ID: %"PRIx32"\n",
-			 scu_idcode);
 		return ERROR_OK;
 	}
 
@@ -944,11 +942,9 @@ static int xmc4xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_
 	}
 
 	if (rev_str != NULL)
-		snprintf(buf, buf_size, "%s - Rev: %s%s",
+		command_print_sameline(cmd, "%s - Rev: %s%s", dev_str, rev_str, prot_str);
-			 dev_str, rev_str, prot_str);
 	else
-		snprintf(buf, buf_size, "%s - Rev: unknown (0x%01x)%s",
+		command_print_sameline(cmd, "%s - Rev: unknown (0x%01x)%s", dev_str, rev_id, prot_str);
-			 dev_str, rev_id, prot_str);
 
 	return ERROR_OK;
 }

src/helper/command.c

@@ -1222,7 +1222,6 @@ static const struct command_registration command_builtin_handlers[] = {
 		.handler = jim_echo,
 		.mode = COMMAND_ANY,
 		.help = "Logs a message at \"user\" priority. "
-			"Output message to stdout. "
 			"Option \"-n\" suppresses trailing newline",
 		.usage = "[-n] string",
 	},

src/jtag/drivers/libusb_helper.c

@@ -363,3 +363,8 @@ int jtag_libusb_get_pid(struct libusb_device *dev, uint16_t *pid)
 
 	return ERROR_FAIL;
 }
+
+int jtag_libusb_handle_events_completed(int *completed)
+{
+	return libusb_handle_events_completed(jtag_libusb_context, completed);
+}

src/jtag/drivers/libusb_helper.h

@@ -60,5 +60,6 @@ int jtag_libusb_choose_interface(struct libusb_device_handle *devh,
 		unsigned int *usb_write_ep,
 		int bclass, int subclass, int protocol, int trans_type);
 int jtag_libusb_get_pid(struct libusb_device *dev, uint16_t *pid);
+int jtag_libusb_handle_events_completed(int *completed);
 
 #endif /* OPENOCD_JTAG_DRIVERS_LIBUSB_HELPER_H */

src/jtag/drivers/remote_bitbang.c

@@ -41,10 +41,10 @@ static unsigned int remote_bitbang_send_buf_used;
 
 /* Circular buffer. When start == end, the buffer is empty. */
 static char remote_bitbang_recv_buf[64];
-static unsigned remote_bitbang_recv_buf_start;
+static unsigned int remote_bitbang_recv_buf_start;
-static unsigned remote_bitbang_recv_buf_end;
+static unsigned int remote_bitbang_recv_buf_end;
 
-static int remote_bitbang_buf_full(void)
+static bool remote_bitbang_buf_full(void)
 {
 	return remote_bitbang_recv_buf_end ==
 		((remote_bitbang_recv_buf_start + sizeof(remote_bitbang_recv_buf) - 1) %
@@ -56,7 +56,7 @@ static int remote_bitbang_fill_buf(void)
 {
 	socket_nonblock(remote_bitbang_fd);
 	while (!remote_bitbang_buf_full()) {
-		unsigned contiguous_available_space;
+		unsigned int contiguous_available_space;
 		if (remote_bitbang_recv_buf_end >= remote_bitbang_recv_buf_start) {
 			contiguous_available_space = sizeof(remote_bitbang_recv_buf) -
 				remote_bitbang_recv_buf_end;
@@ -112,17 +112,23 @@ static int remote_bitbang_flush(void)
 	return ERROR_OK;
 }
 
-static int remote_bitbang_queue(int c, bool flush)
+typedef enum {
+	NO_FLUSH,
+	FLUSH_SEND_BUF
+} flush_bool_t;
+
+static int remote_bitbang_queue(int c, flush_bool_t flush)
 {
 	remote_bitbang_send_buf[remote_bitbang_send_buf_used++] = c;
-	if (flush || remote_bitbang_send_buf_used >= ARRAY_SIZE(remote_bitbang_send_buf))
+	if (flush == FLUSH_SEND_BUF ||
+			remote_bitbang_send_buf_used >= ARRAY_SIZE(remote_bitbang_send_buf))
 		return remote_bitbang_flush();
 	return ERROR_OK;
 }
 
 static int remote_bitbang_quit(void)
 {
-	if (remote_bitbang_queue('Q', true) == ERROR_FAIL)
+	if (remote_bitbang_queue('Q', FLUSH_SEND_BUF) == ERROR_FAIL)
 		return ERROR_FAIL;
 
 	if (close_socket(remote_bitbang_fd) != 0) {
@@ -176,7 +182,7 @@ static int remote_bitbang_sample(void)
 	if (remote_bitbang_fill_buf() != ERROR_OK)
 		return ERROR_FAIL;
 	assert(!remote_bitbang_buf_full());
-	return remote_bitbang_queue('R', false);
+	return remote_bitbang_queue('R', NO_FLUSH);
 }
 
 static bb_value_t remote_bitbang_read_sample(void)
@@ -197,7 +203,7 @@ static bb_value_t remote_bitbang_read_sample(void)
 static int remote_bitbang_write(int tck, int tms, int tdi)
 {
 	char c = '0' + ((tck ? 0x4 : 0x0) | (tms ? 0x2 : 0x0) | (tdi ? 0x1 : 0x0));
-	return remote_bitbang_queue(c, false);
+	return remote_bitbang_queue(c, NO_FLUSH);
 }
 
 static int remote_bitbang_reset(int trst, int srst)
@@ -205,13 +211,13 @@ static int remote_bitbang_reset(int trst, int srst)
 	char c = 'r' + ((trst ? 0x2 : 0x0) | (srst ? 0x1 : 0x0));
 	/* Always flush the send buffer on reset, because the reset call need not be
 	 * followed by jtag_execute_queue(). */
-	return remote_bitbang_queue(c, true);
+	return remote_bitbang_queue(c, FLUSH_SEND_BUF);
 }
 
 static int remote_bitbang_blink(int on)
 {
 	char c = on ? 'B' : 'b';
-	return remote_bitbang_queue(c, true);
+	return remote_bitbang_queue(c, FLUSH_SEND_BUF);
 }
 
 static struct bitbang_interface remote_bitbang_bitbang = {

src/jtag/drivers/stlink_usb.c

@@ -497,13 +497,8 @@ static void sync_transfer_wait_for_completion(struct libusb_transfer *transfer)
 {
 	int r, *completed = transfer->user_data;
 
-	/* Assuming a single libusb context exists.  There no existing interface into this
-	 * module to pass a libusb context.
-	 */
-	struct libusb_context *ctx = NULL;
-
 	while (!*completed) {
-		r = libusb_handle_events_completed(ctx, completed);
+		r = jtag_libusb_handle_events_completed(completed);
 		if (r < 0) {
 			if (r == LIBUSB_ERROR_INTERRUPTED)
 				continue;

src/rtos/riot.c

@@ -416,7 +416,7 @@ static int riot_create(struct target *target)
 	/* Stacking is different depending on architecture */
 	struct armv7m_common *armv7m_target = target_to_armv7m(target);
 
-	if (armv7m_target->arm.is_armv6m)
+	if (armv7m_target->arm.arch == ARM_ARCH_V6M)
 		stacking_info = &rtos_riot_cortex_m0_stacking;
 	else if (is_armv7m(armv7m_target))
 		stacking_info = &rtos_riot_cortex_m34_stacking;

src/target/aarch64.c

@@ -1433,7 +1433,7 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin
 	}
 
 	breakpoint->set = brp_1 + 1;
-	breakpoint->linked_BRP = brp_2;
+	breakpoint->linked_brp = brp_2;
 	control_CTX = ((CTX_machmode & 0x7) << 20)
 		| (brp_2 << 16)
 		| (0 << 14)
@@ -1495,7 +1495,7 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
 	if (breakpoint->type == BKPT_HARD) {
 		if ((breakpoint->address != 0) && (breakpoint->asid != 0)) {
 			int brp_i = breakpoint->set - 1;
-			int brp_j = breakpoint->linked_BRP;
+			int brp_j = breakpoint->linked_brp;
 			if ((brp_i < 0) || (brp_i >= aarch64->brp_num)) {
 				LOG_DEBUG("Invalid BRP number in breakpoint");
 				return ERROR_OK;
@@ -1545,7 +1545,7 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
 			if (retval != ERROR_OK)
 				return retval;
 
-			breakpoint->linked_BRP = 0;
+			breakpoint->linked_brp = 0;
 			breakpoint->set = 0;
 			return ERROR_OK;
 

src/target/arm.h

@@ -60,6 +60,15 @@ enum arm_core_type {
 	ARM_CORE_TYPE_M_PROFILE,
 };
 
+/** ARM Architecture specifying the version and the profile */
+enum arm_arch {
+	ARM_ARCH_UNKNOWN,
+	ARM_ARCH_V4,
+	ARM_ARCH_V6M,
+	ARM_ARCH_V7M,
+	ARM_ARCH_V8M,
+};
+
 /**
  * Represent state of an ARM core.
  *
@@ -191,14 +200,8 @@ struct arm {
 	/** Record the current core state: ARM, Thumb, or otherwise. */
 	enum arm_state core_state;
 
-	/** Flag reporting unavailability of the BKPT instruction. */
+	/** ARM architecture version */
-	bool is_armv4;
+	enum arm_arch arch;
-
-	/** Flag reporting armv6m based core. */
-	bool is_armv6m;
-
-	/** Flag reporting armv8m based core. */
-	bool is_armv8m;
 
 	/** Floating point or VFP version, 0 if disabled. */
 	int arm_vfp_version;

src/target/arm720t.c

@@ -427,7 +427,7 @@ static int arm720t_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm720t_common *arm720t = calloc(1, sizeof(*arm720t));
 
-	arm720t->arm7_9_common.arm.is_armv4 = true;
+	arm720t->arm7_9_common.arm.arch = ARM_ARCH_V4;
 	return arm720t_init_arch_info(target, arm720t, target->tap);
 }
 

src/target/arm7tdmi.c

@@ -686,7 +686,7 @@ static int arm7tdmi_target_create(struct target *target, Jim_Interp *interp)
 
 	arm7_9 = calloc(1, sizeof(struct arm7_9_common));
 	arm7tdmi_init_arch_info(target, arm7_9, target->tap);
-	arm7_9->arm.is_armv4 = true;
+	arm7_9->arm.arch = ARM_ARCH_V4;
 
 	return ERROR_OK;
 }

src/target/arm9tdmi.c

@@ -781,7 +781,7 @@ static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
 	struct arm7_9_common *arm7_9 = calloc(1, sizeof(struct arm7_9_common));
 
 	arm9tdmi_init_arch_info(target, arm7_9, target->tap);
-	arm7_9->arm.is_armv4 = true;
+	arm7_9->arm.arch = ARM_ARCH_V4;
 
 	return ERROR_OK;
 }

src/target/arm_dpm.c

@@ -514,7 +514,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 				continue;
 			if (arm->cpsr == cache->reg_list + i)
 				continue;
-			if (!cache->reg_list[i].dirty)
+			if (!cache->reg_list[i].exist || !cache->reg_list[i].dirty)
 				continue;
 
 			r = cache->reg_list[i].arch_info;
@@ -763,7 +763,7 @@ static int arm_dpm_full_context(struct target *target)
 		for (unsigned i = 0; i < cache->num_regs; i++) {
 			struct arm_reg *r;
 
-			if (cache->reg_list[i].valid)
+			if (!cache->reg_list[i].exist || cache->reg_list[i].valid)
 				continue;
 			r = cache->reg_list[i].arch_info;
 

src/target/armv4_5.c

@@ -1347,7 +1347,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 	}
 
 	/* armv5 and later can terminate with BKPT instruction; less overhead */
-	if (!exit_point && arm->is_armv4) {
+	if (!exit_point && arm->arch == ARM_ARCH_V4) {
 		LOG_ERROR("ARMv4 target needs HW breakpoint location");
 		return ERROR_FAIL;
 	}
@@ -1380,7 +1380,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 		if (reg_params[i].direction == PARAM_IN)
 			continue;
 
-		struct reg *reg = register_get_by_name(arm->core_cache, reg_params[i].reg_name, 0);
+		struct reg *reg = register_get_by_name(arm->core_cache, reg_params[i].reg_name, false);
 		if (!reg) {
 			LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
 			return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1452,7 +1452,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 
 			struct reg *reg = register_get_by_name(arm->core_cache,
 					reg_params[i].reg_name,
-					0);
+					false);
 			if (!reg) {
 				LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
 				retval = ERROR_COMMAND_SYNTAX_ERROR;
@@ -1568,7 +1568,7 @@ int arm_checksum_memory(struct target *target,
 	int timeout = 20000 * (1 + (count / (1024 * 1024)));
 
 	/* armv4 must exit using a hardware breakpoint */
-	if (arm->is_armv4)
+	if (arm->arch == ARM_ARCH_V4)
 		exit_var = crc_algorithm->address + sizeof(arm_crc_code_le) - 8;
 
 	retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
@@ -1649,7 +1649,7 @@ int arm_blank_check_memory(struct target *target,
 	buf_set_u32(reg_params[2].value, 0, 32, erased_value);
 
 	/* armv4 must exit using a hardware breakpoint */
-	if (arm->is_armv4)
+	if (arm->arch == ARM_ARCH_V4)
 		exit_var = check_algorithm->address + sizeof(check_code_le) - 4;
 
 	retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
@@ -1681,7 +1681,7 @@ static int arm_full_context(struct target *target)
 	int retval = ERROR_OK;
 
 	for (; num_regs && retval == ERROR_OK; num_regs--, reg++) {
-		if (reg->valid)
+		if (!reg->exist || reg->valid)
 			continue;
 		retval = armv4_5_get_core_reg(reg);
 	}

src/target/armv7m.c

@@ -559,7 +559,7 @@ int armv7m_start_algorithm(struct target *target,
 			continue;
 
 		struct reg *reg =
-			register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, 0);
+			register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, false);
 /*		uint32_t regvalue; */
 
 		if (!reg) {
@@ -675,7 +675,7 @@ int armv7m_wait_algorithm(struct target *target,
 		if (reg_params[i].direction != PARAM_OUT) {
 			struct reg *reg = register_get_by_name(armv7m->arm.core_cache,
 					reg_params[i].reg_name,
-					0);
+					false);
 
 			if (!reg) {
 				LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);

src/target/armv7m.h

@@ -239,8 +239,8 @@ struct armv7m_common {
 	int fp_feature;
 	uint32_t demcr;
 
-	/* stlink is a high level adapter, does not support all functions */
+	/* hla_target uses a high level adapter that does not support all functions */
-	bool stlink;
+	bool is_hla_target;
 
 	struct armv7m_trace_config trace_config;
 

src/target/armv8_dpm.c

@@ -782,7 +782,7 @@ int armv8_dpm_read_current_registers(struct arm_dpm *dpm)
 		struct arm_reg *arm_reg;
 
 		r = armv8_reg_current(arm, i);
-		if (r->valid)
+		if (!r->exist || r->valid)
 			continue;
 
 		/* Skip reading FP-SIMD registers */
@@ -922,6 +922,9 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 	for (unsigned i = 1; i < cache->num_regs; i++) {
 		struct arm_reg *r;
 
+		/* skip non-existent */
+		if (!cache->reg_list[i].exist)
+			continue;
 		/* skip PC and CPSR */
 		if (i == ARMV8_PC || i == ARMV8_xPSR)
 			continue;
@@ -1047,7 +1050,7 @@ static int armv8_dpm_full_context(struct target *target)
 		for (unsigned i = 0; i < cache->num_regs; i++) {
 			struct arm_reg *r;
 
-			if (cache->reg_list[i].valid)
+			if (!cache->reg_list[i].exist || cache->reg_list[i].valid)
 				continue;
 			r = cache->reg_list[i].arch_info;
 

src/target/breakpoints.c

@@ -50,11 +50,8 @@ static int breakpoint_add_internal(struct target *target,
 	struct breakpoint **breakpoint_p = &target->breakpoints;
 	const char *reason;
 	int retval;
-	int n;
 
-	n = 0;
 	while (breakpoint) {
-		n++;
 		if (breakpoint->address == address) {
 			/* FIXME don't assume "same address" means "same
 			 * breakpoint" ... check all the parameters before
@@ -116,11 +113,8 @@ static int context_breakpoint_add_internal(struct target *target,
 	struct breakpoint *breakpoint = target->breakpoints;
 	struct breakpoint **breakpoint_p = &target->breakpoints;
 	int retval;
-	int n;
 
-	n = 0;
 	while (breakpoint) {
-		n++;
 		if (breakpoint->asid == asid) {
 			/* FIXME don't assume "same address" means "same
 			 * breakpoint" ... check all the parameters before
@@ -169,10 +163,8 @@ static int hybrid_breakpoint_add_internal(struct target *target,
 	struct breakpoint *breakpoint = target->breakpoints;
 	struct breakpoint **breakpoint_p = &target->breakpoints;
 	int retval;
-	int n;
+
-	n = 0;
 	while (breakpoint) {
-		n++;
 		if ((breakpoint->asid == asid) && (breakpoint->address == address)) {
 			/* FIXME don't assume "same address" means "same
 			 * breakpoint" ... check all the parameters before
@@ -240,8 +232,9 @@ int breakpoint_add(struct target *target,
 			head = head->next;
 		}
 		return retval;
-	} else
+	} else {
 		return breakpoint_add_internal(target, address, length, type);
+	}
 }
 
 int context_breakpoint_add(struct target *target,
@@ -262,8 +255,9 @@ int context_breakpoint_add(struct target *target,
 			head = head->next;
 		}
 		return retval;
-	} else
+	} else {
 		return context_breakpoint_add_internal(target, asid, length, type);
+	}
 }
 
 int hybrid_breakpoint_add(struct target *target,
@@ -303,7 +297,7 @@ static void breakpoint_free(struct target *target, struct breakpoint *breakpoint
 		breakpoint = breakpoint->next;
 	}
 
-	if (breakpoint == NULL)
+	if (!breakpoint)
 		return;
 
 	retval = target_remove_breakpoint(target, breakpoint);
@@ -348,20 +342,21 @@ static void breakpoint_remove_all_internal(struct target *target)
 
 void breakpoint_remove(struct target *target, target_addr_t address)
 {
-	int found = 0;
 	if (target->smp) {
+		unsigned int num_breakpoints = 0;
 		struct target_list *head;
 		struct target *curr;
 		head = target->head;
 		while (head != (struct target_list *)NULL) {
 			curr = head->target;
-			found += breakpoint_remove_internal(curr, address);
+			num_breakpoints += breakpoint_remove_internal(curr, address);
 			head = head->next;
 		}
-		if (found == 0)
+		if (!num_breakpoints)
 			LOG_ERROR("no breakpoint at address " TARGET_ADDR_FMT " found", address);
-	} else
+	} else {
 		breakpoint_remove_internal(target, address);
+	}
 }
 
 void breakpoint_remove_all(struct target *target)
@@ -399,9 +394,9 @@ void breakpoint_clear_target(struct target *target)
 			breakpoint_clear_target_internal(curr);
 			head = head->next;
 		}
-	} else
+	} else {
 		breakpoint_clear_target_internal(target);
-
+	}
 }
 
 struct breakpoint *breakpoint_find(struct target *target, target_addr_t address)
@@ -519,7 +514,7 @@ static void watchpoint_free(struct target *target, struct watchpoint *watchpoint
 		watchpoint = watchpoint->next;
 	}
 
-	if (watchpoint == NULL)
+	if (!watchpoint)
 		return;
 	retval = target_remove_watchpoint(target, watchpoint);
 	LOG_DEBUG("free WPID: %d --> %d", watchpoint->unique_id, retval);

src/target/breakpoints.h

@@ -43,7 +43,7 @@ struct breakpoint {
 	uint8_t *orig_instr;
 	struct breakpoint *next;
 	uint32_t unique_id;
-	int linked_BRP;
+	int linked_brp;
 };
 
 struct watchpoint {

src/target/cortex_a.c

@@ -1290,7 +1290,7 @@ static int cortex_a_set_breakpoint(struct target *target,
 		control = ((matchmode & 0x7) << 20)
 			| (byte_addr_select << 5)
 			| (3 << 1) | 1;
-		brp_list[brp_i].used = 1;
+		brp_list[brp_i].used = true;
 		brp_list[brp_i].value = (breakpoint->address & 0xFFFFFFFC);
 		brp_list[brp_i].control = control;
 		retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1384,7 +1384,7 @@ static int cortex_a_set_context_breakpoint(struct target *target,
 	control = ((matchmode & 0x7) << 20)
 		| (byte_addr_select << 5)
 		| (3 << 1) | 1;
-	brp_list[brp_i].used = 1;
+	brp_list[brp_i].used = true;
 	brp_list[brp_i].value = (breakpoint->asid);
 	brp_list[brp_i].control = control;
 	retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1444,13 +1444,13 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi
 	}
 
 	breakpoint->set = brp_1 + 1;
-	breakpoint->linked_BRP = brp_2;
+	breakpoint->linked_brp = brp_2;
 	control_CTX = ((CTX_machmode & 0x7) << 20)
 		| (brp_2 << 16)
 		| (0 << 14)
 		| (CTX_byte_addr_select << 5)
 		| (3 << 1) | 1;
-	brp_list[brp_1].used = 1;
+	brp_list[brp_1].used = true;
 	brp_list[brp_1].value = (breakpoint->asid);
 	brp_list[brp_1].control = control_CTX;
 	retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1468,7 +1468,7 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi
 		| (brp_1 << 16)
 		| (IVA_byte_addr_select << 5)
 		| (3 << 1) | 1;
-	brp_list[brp_2].used = 1;
+	brp_list[brp_2].used = true;
 	brp_list[brp_2].value = (breakpoint->address & 0xFFFFFFFC);
 	brp_list[brp_2].control = control_IVA;
 	retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1500,14 +1500,14 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
 	if (breakpoint->type == BKPT_HARD) {
 		if ((breakpoint->address != 0) && (breakpoint->asid != 0)) {
 			int brp_i = breakpoint->set - 1;
-			int brp_j = breakpoint->linked_BRP;
+			int brp_j = breakpoint->linked_brp;
 			if ((brp_i < 0) || (brp_i >= cortex_a->brp_num)) {
 				LOG_DEBUG("Invalid BRP number in breakpoint");
 				return ERROR_OK;
 			}
 			LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, brp_i,
 				brp_list[brp_i].control, brp_list[brp_i].value);
-			brp_list[brp_i].used = 0;
+			brp_list[brp_i].used = false;
 			brp_list[brp_i].value = 0;
 			brp_list[brp_i].control = 0;
 			retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1526,7 +1526,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
 			}
 			LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, brp_j,
 				brp_list[brp_j].control, brp_list[brp_j].value);
-			brp_list[brp_j].used = 0;
+			brp_list[brp_j].used = false;
 			brp_list[brp_j].value = 0;
 			brp_list[brp_j].control = 0;
 			retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1539,7 +1539,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
 					brp_list[brp_j].value);
 			if (retval != ERROR_OK)
 				return retval;
-			breakpoint->linked_BRP = 0;
+			breakpoint->linked_brp = 0;
 			breakpoint->set = 0;
 			return ERROR_OK;
 
@@ -1551,7 +1551,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
 			}
 			LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, brp_i,
 				brp_list[brp_i].control, brp_list[brp_i].value);
-			brp_list[brp_i].used = 0;
+			brp_list[brp_i].used = false;
 			brp_list[brp_i].value = 0;
 			brp_list[brp_i].control = 0;
 			retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1753,7 +1753,7 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
 		(byte_address_select << 5) |
 		(load_store_access_control << 3) |
 		(0x3 << 1) | 1;
-	wrp_list[wrp_i].used = 1;
+	wrp_list[wrp_i].used = true;
 	wrp_list[wrp_i].value = address;
 	wrp_list[wrp_i].control = control;
 
@@ -1803,7 +1803,7 @@ static int cortex_a_unset_watchpoint(struct target *target, struct watchpoint *w
 	}
 	LOG_DEBUG("wrp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, wrp_i,
 			wrp_list[wrp_i].control, wrp_list[wrp_i].value);
-	wrp_list[wrp_i].used = 0;
+	wrp_list[wrp_i].used = false;
 	wrp_list[wrp_i].value = 0;
 	wrp_list[wrp_i].control = 0;
 	retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -3033,7 +3033,7 @@ static int cortex_a_examine_first(struct target *target)
 	cortex_a->brp_list = calloc(cortex_a->brp_num, sizeof(struct cortex_a_brp));
 /*	cortex_a->brb_enabled = ????; */
 	for (i = 0; i < cortex_a->brp_num; i++) {
-		cortex_a->brp_list[i].used = 0;
+		cortex_a->brp_list[i].used = false;
 		if (i < (cortex_a->brp_num-cortex_a->brp_num_context))
 			cortex_a->brp_list[i].type = BRP_NORMAL;
 		else
@@ -3051,7 +3051,7 @@ static int cortex_a_examine_first(struct target *target)
 	free(cortex_a->wrp_list);
 	cortex_a->wrp_list = calloc(cortex_a->wrp_num, sizeof(struct cortex_a_wrp));
 	for (i = 0; i < cortex_a->wrp_num; i++) {
-		cortex_a->wrp_list[i].used = 0;
+		cortex_a->wrp_list[i].used = false;
 		cortex_a->wrp_list[i].value = 0;
 		cortex_a->wrp_list[i].control = 0;
 		cortex_a->wrp_list[i].WRPn = i;

src/target/cortex_a.h

@@ -64,7 +64,7 @@ enum cortex_a_dacrfixup_mode {
 };
 
 struct cortex_a_brp {
-	int used;
+	bool used;
 	int type;
 	uint32_t value;
 	uint32_t control;
@@ -72,7 +72,7 @@ struct cortex_a_brp {
 };
 
 struct cortex_a_wrp {
-	int used;
+	bool used;
 	uint32_t value;
 	uint32_t control;
 	uint8_t WRPn;

src/target/cortex_m.c

@@ -52,6 +52,66 @@
  * any longer.
  */
 
+/* Supported Cortex-M Cores */
+static const struct cortex_m_part_info cortex_m_parts[] = {
+	{
+		.partno = CORTEX_M0_PARTNO,
+		.name = "Cortex-M0",
+		.arch = ARM_ARCH_V6M,
+	},
+	{
+		.partno = CORTEX_M0P_PARTNO,
+		.name = "Cortex-M0+",
+		.arch = ARM_ARCH_V6M,
+	},
+	{
+		.partno = CORTEX_M1_PARTNO,
+		.name = "Cortex-M1",
+		.arch = ARM_ARCH_V6M,
+	},
+	{
+		.partno = CORTEX_M3_PARTNO,
+		.name = "Cortex-M3",
+		.arch = ARM_ARCH_V7M,
+		.flags = CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K,
+	},
+	{
+		.partno = CORTEX_M4_PARTNO,
+		.name = "Cortex-M4",
+		.arch = ARM_ARCH_V7M,
+		.flags = CORTEX_M_F_HAS_FPV4 | CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K,
+	},
+	{
+		.partno = CORTEX_M7_PARTNO,
+		.name = "Cortex-M7",
+		.arch = ARM_ARCH_V7M,
+		.flags = CORTEX_M_F_HAS_FPV5,
+	},
+	{
+		.partno = CORTEX_M23_PARTNO,
+		.name = "Cortex-M23",
+		.arch = ARM_ARCH_V8M,
+	},
+	{
+		.partno = CORTEX_M33_PARTNO,
+		.name = "Cortex-M33",
+		.arch = ARM_ARCH_V8M,
+		.flags = CORTEX_M_F_HAS_FPV5,
+	},
+	{
+		.partno = CORTEX_M35P_PARTNO,
+		.name = "Cortex-M35P",
+		.arch = ARM_ARCH_V8M,
+		.flags = CORTEX_M_F_HAS_FPV5,
+	},
+	{
+		.partno = CORTEX_M55_PARTNO,
+		.name = "Cortex-M55",
+		.arch = ARM_ARCH_V8M,
+		.flags = CORTEX_M_F_HAS_FPV5,
+	},
+};
+
 /* forward declarations */
 static int cortex_m_store_core_reg_u32(struct target *target,
 		uint32_t num, uint32_t value);
@@ -504,7 +564,7 @@ static int cortex_m_debug_entry(struct target *target)
 
 	/* examine PE security state */
 	bool secure_state = false;
-	if (armv7m->arm.is_armv8m) {
+	if (armv7m->arm.arch == ARM_ARCH_V8M) {
 		uint32_t dscsr;
 
 		retval = mem_ap_read_u32(armv7m->debug_ap, DCB_DSCSR, &dscsr);
@@ -1645,7 +1705,7 @@ static int cortex_m_read_memory(struct target *target, target_addr_t address,
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 
-	if (armv7m->arm.is_armv6m) {
+	if (armv7m->arm.arch == ARM_ARCH_V6M) {
 		/* armv6m does not handle unaligned memory access */
 		if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
 			return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -1659,7 +1719,7 @@ static int cortex_m_write_memory(struct target *target, target_addr_t address,
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 
-	if (armv7m->arm.is_armv6m) {
+	if (armv7m->arm.arch == ARM_ARCH_V6M) {
 		/* armv6m does not handle unaligned memory access */
 		if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
 			return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -1971,9 +2031,9 @@ int cortex_m_examine(struct target *target)
 	struct adiv5_dap *swjdp = cortex_m->armv7m.arm.dap;
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 
-	/* stlink shares the examine handler but does not support
+	/* hla_target shares the examine handler but does not support
 	 * all its calls */
-	if (!armv7m->stlink) {
+	if (!armv7m->is_hla_target) {
 		if (cortex_m->apsel == DP_APSEL_INVALID) {
 			/* Search for the MEM-AP */
 			retval = cortex_m_find_mem_ap(swjdp, &armv7m->debug_ap);
@@ -2001,35 +2061,27 @@ int cortex_m_examine(struct target *target)
 		if (retval != ERROR_OK)
 			return retval;
 
-		/* Get CPU Type */
+		/* Get ARCH and CPU types */
-		unsigned int core = (cpuid >> 4) & 0xf;
+		const enum cortex_m_partno core_partno = (cpuid & ARM_CPUID_PARTNO_MASK) >> ARM_CPUID_PARTNO_POS;
 
-		/* Check if it is an ARMv8-M core */
+		for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) {
-		armv7m->arm.is_armv8m = true;
+			if (core_partno == cortex_m_parts[n].partno) {
-
+				cortex_m->core_info = &cortex_m_parts[n];
-		switch (cpuid & ARM_CPUID_PARTNO_MASK) {
-			case CORTEX_M23_PARTNO:
-				core = 23;
-				break;
-			case CORTEX_M33_PARTNO:
-				core = 33;
-				break;
-			case CORTEX_M35P_PARTNO:
-				core = 35;
-				break;
-			case CORTEX_M55_PARTNO:
-				core = 55;
-				break;
-			default:
-				armv7m->arm.is_armv8m = false;
 				break;
+			}
 		}
 
+		if (!cortex_m->core_info) {
+			LOG_ERROR("Cortex-M PARTNO 0x%x is unrecognized", core_partno);
+			return ERROR_FAIL;
+		}
 
-		LOG_DEBUG("Cortex-M%d r%" PRId8 "p%" PRId8 " processor detected",
+		armv7m->arm.arch = cortex_m->core_info->arch;
-				core, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
+
+		LOG_DEBUG("%s r%" PRId8 "p%" PRId8 " processor detected",
+				cortex_m->core_info->name, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
 		cortex_m->maskints_erratum = false;
-		if (core == 7) {
+		if (core_partno == CORTEX_M7_PARTNO) {
 			uint8_t rev, patch;
 			rev = (cpuid >> 20) & 0xf;
 			patch = (cpuid >> 0) & 0xf;
@@ -2040,52 +2092,46 @@ int cortex_m_examine(struct target *target)
 		}
 		LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid);
 
-		if (core == 4) {
+		if (cortex_m->core_info->flags & CORTEX_M_F_HAS_FPV4) {
 			target_read_u32(target, MVFR0, &mvfr0);
 			target_read_u32(target, MVFR1, &mvfr1);
 
 			/* test for floating point feature on Cortex-M4 */
 			if ((mvfr0 == MVFR0_DEFAULT_M4) && (mvfr1 == MVFR1_DEFAULT_M4)) {
-				LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", core);
+				LOG_DEBUG("%s floating point feature FPv4_SP found", cortex_m->core_info->name);
 				armv7m->fp_feature = FPV4_SP;
 			}
-		} else if (core == 7 || core == 33 || core == 35 || core == 55) {
+		} else if (cortex_m->core_info->flags & CORTEX_M_F_HAS_FPV5) {
 			target_read_u32(target, MVFR0, &mvfr0);
 			target_read_u32(target, MVFR1, &mvfr1);
 
 			/* test for floating point features on Cortex-M7 */
 			if ((mvfr0 == MVFR0_DEFAULT_M7_SP) && (mvfr1 == MVFR1_DEFAULT_M7_SP)) {
-				LOG_DEBUG("Cortex-M%d floating point feature FPv5_SP found", core);
+				LOG_DEBUG("%s floating point feature FPv5_SP found", cortex_m->core_info->name);
 				armv7m->fp_feature = FPV5_SP;
 			} else if ((mvfr0 == MVFR0_DEFAULT_M7_DP) && (mvfr1 == MVFR1_DEFAULT_M7_DP)) {
-				LOG_DEBUG("Cortex-M%d floating point feature FPv5_DP found", core);
+				LOG_DEBUG("%s floating point feature FPv5_DP found", cortex_m->core_info->name);
 				armv7m->fp_feature = FPV5_DP;
 			}
-		} else if (core == 0) {
-			/* Cortex-M0 does not support unaligned memory access */
-			armv7m->arm.is_armv6m = true;
 		}
 
 		/* VECTRESET is supported only on ARMv7-M cores */
-		cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m;
+		cortex_m->vectreset_supported = armv7m->arm.arch == ARM_ARCH_V7M;
 
 		/* Check for FPU, otherwise mark FPU register as non-existent */
 		if (armv7m->fp_feature == FP_NONE)
 			for (size_t idx = ARMV7M_FPU_FIRST_REG; idx <= ARMV7M_FPU_LAST_REG; idx++)
 				armv7m->arm.core_cache->reg_list[idx].exist = false;
 
-		if (!armv7m->arm.is_armv8m)
+		if (armv7m->arm.arch != ARM_ARCH_V8M)
 			for (size_t idx = ARMV8M_FIRST_REG; idx <= ARMV8M_LAST_REG; idx++)
 				armv7m->arm.core_cache->reg_list[idx].exist = false;
 
-		if (!armv7m->stlink) {
+		if (!armv7m->is_hla_target) {
-			if (core == 3 || core == 4)
+			if (cortex_m->core_info->flags & CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K)
 				/* Cortex-M3/M4 have 4096 bytes autoincrement range,
 				 * s. ARM IHI 0031C: MEM-AP 7.2.2 */
 				armv7m->debug_ap->tar_autoincr_block = (1 << 12);
-			else if (core == 7)
-				/* Cortex-M7 has only 1024 bytes autoincrement range */
-				armv7m->debug_ap->tar_autoincr_block = (1 << 10);
 		}
 
 		/* Enable debug requests */

src/target/cortex_m.h

@@ -42,12 +42,33 @@
 
 #define CPUID		0xE000ED00
 
-#define ARM_CPUID_PARTNO_MASK	0xFFF0
+#define ARM_CPUID_PARTNO_POS    4
+#define ARM_CPUID_PARTNO_MASK	(0xFFF << ARM_CPUID_PARTNO_POS)
 
-#define CORTEX_M23_PARTNO	0xD200
+enum cortex_m_partno {
-#define CORTEX_M33_PARTNO	0xD210
+	CORTEX_M0_PARTNO   = 0xC20,
-#define CORTEX_M35P_PARTNO	0xD310
+	CORTEX_M1_PARTNO   = 0xC21,
-#define CORTEX_M55_PARTNO	0xD220
+	CORTEX_M3_PARTNO   = 0xC23,
+	CORTEX_M4_PARTNO   = 0xC24,
+	CORTEX_M7_PARTNO   = 0xC27,
+	CORTEX_M0P_PARTNO  = 0xC60,
+	CORTEX_M23_PARTNO  = 0xD20,
+	CORTEX_M33_PARTNO  = 0xD21,
+	CORTEX_M35P_PARTNO = 0xD31,
+	CORTEX_M55_PARTNO  = 0xD22,
+};
+
+/* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */
+#define CORTEX_M_F_HAS_FPV4               BIT(0)
+#define CORTEX_M_F_HAS_FPV5               BIT(1)
+#define CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K  BIT(2)
+
+struct cortex_m_part_info {
+	enum cortex_m_partno partno;
+	const char *name;
+	enum arm_arch arch;
+	uint32_t flags;
+};
 
 /* Debug Control Block */
 #define DCB_DHCSR	0xE000EDF0
@@ -211,9 +232,9 @@ struct cortex_m_common {
 
 	enum cortex_m_soft_reset_config soft_reset_config;
 	bool vectreset_supported;
-
 	enum cortex_m_isrmasking_mode isrmasking_mode;
 
+	const struct cortex_m_part_info *core_info;
 	struct armv7m_common armv7m;
 
 	int apsel;

src/target/dsp563xx.c

@@ -913,7 +913,7 @@ static int dsp563xx_init_target(struct command_context *cmd_ctx, struct target *
 	dsp563xx_build_reg_cache(target);
 	struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
-	dsp563xx->hardware_breakpoints_cleared = 0;
+	dsp563xx->hardware_breakpoints_cleared = false;
 	dsp563xx->hardware_breakpoint[0].used = BPU_NONE;
 
 	return ERROR_OK;
@@ -1085,9 +1085,18 @@ static int dsp563xx_poll(struct target *target)
 
 	if (!dsp563xx->hardware_breakpoints_cleared) {
 		err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0);
+		if (err != ERROR_OK)
+			return err;
+
 		err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OMLR0, 0);
+		if (err != ERROR_OK)
+			return err;
+
 		err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OMLR1, 0);
-		dsp563xx->hardware_breakpoints_cleared = 1;
+		if (err != ERROR_OK)
+			return err;
+
+		dsp563xx->hardware_breakpoints_cleared = true;
 	}
 
 	return ERROR_OK;
@@ -1402,7 +1411,7 @@ static int dsp563xx_run_algorithm(struct target *target,
 
 		struct reg *reg = register_get_by_name(dsp563xx->core_cache,
 				reg_params[i].reg_name,
-				0);
+				false);
 
 		if (!reg) {
 			LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -1444,7 +1453,7 @@ static int dsp563xx_run_algorithm(struct target *target,
 
 			struct reg *reg = register_get_by_name(dsp563xx->core_cache,
 					reg_params[i].reg_name,
-					0);
+					false);
 			if (!reg) {
 				LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
 				continue;

src/target/dsp563xx.h

@@ -52,7 +52,7 @@ struct dsp563xx_common {
 	struct hardware_breakpoint hardware_breakpoint[1];
 
 	/*Were the hardware breakpoints cleared on startup?*/
-	int hardware_breakpoints_cleared;
+	bool hardware_breakpoints_cleared;
 };
 
 struct dsp563xx_core_reg {

src/target/hla_target.c

@@ -179,7 +179,7 @@ static int adapter_init_arch_info(struct target *target,
 	armv7m->store_core_reg_u32 = adapter_store_core_reg_u32;
 
 	armv7m->examine_debug_reason = adapter_examine_debug_reason;
-	armv7m->stlink = true;
+	armv7m->is_hla_target = true;
 
 	target_register_timer_callback(hl_handle_target_request, 1,
 		TARGET_TIMER_TYPE_PERIODIC, target);

src/target/mips32.c

@@ -473,7 +473,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
 		if (reg_params[i].direction == PARAM_IN)
 			continue;
 
-		struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
+		struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
 
 		if (!reg) {
 			LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -507,7 +507,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
 
 	for (int i = 0; i < num_reg_params; i++) {
 		if (reg_params[i].direction != PARAM_OUT) {
-			struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
+			struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
 			if (!reg) {
 				LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
 				return ERROR_COMMAND_SYNTAX_ERROR;

src/target/nds32.c

@@ -997,7 +997,7 @@ int nds32_arch_state(struct target *target)
 			nds32->virtual_hosting ? ", virtual hosting" : "");
 
 	/* save pc value to pseudo register pc */
-	struct reg *reg = register_get_by_name(target->reg_cache, "pc", 1);
+	struct reg *reg = register_get_by_name(target->reg_cache, "pc", true);
 	buf_set_u32(reg->value, 0, 32, value_pc);
 
 	return ERROR_OK;
@@ -1660,7 +1660,7 @@ int nds32_init_arch_info(struct target *target, struct nds32 *nds32)
 	nds32->syscall_break.orig_instr = NULL;
 	nds32->syscall_break.next = NULL;
 	nds32->syscall_break.unique_id = 0x515CAll + target->target_number;
-	nds32->syscall_break.linked_BRP = 0;
+	nds32->syscall_break.linked_brp = 0;
 
 	nds32_reg_init();
 

src/target/register.c

@@ -39,21 +39,20 @@
 struct reg *register_get_by_number(struct reg_cache *first,
 		uint32_t reg_num, bool search_all)
 {
-	unsigned i;
 	struct reg_cache *cache = first;
 
 	while (cache) {
-		for (i = 0; i < cache->num_regs; i++) {
+		for (unsigned int i = 0; i < cache->num_regs; i++) {
-			if (cache->reg_list[i].exist == false)
+			if (!cache->reg_list[i].exist)
 				continue;
 			if (cache->reg_list[i].number == reg_num)
 				return &(cache->reg_list[i]);
 		}
 
-		if (search_all)
+		if (!search_all)
-			cache = cache->next;
-		else
 			break;
+
+		cache = cache->next;
 	}
 
 	return NULL;
@@ -62,21 +61,20 @@ struct reg *register_get_by_number(struct reg_cache *first,
 struct reg *register_get_by_name(struct reg_cache *first,
 		const char *name, bool search_all)
 {
-	unsigned i;
 	struct reg_cache *cache = first;
 
 	while (cache) {
-		for (i = 0; i < cache->num_regs; i++) {
+		for (unsigned int i = 0; i < cache->num_regs; i++) {
-			if (cache->reg_list[i].exist == false)
+			if (!cache->reg_list[i].exist)
 				continue;
 			if (strcmp(cache->reg_list[i].name, name) == 0)
 				return &(cache->reg_list[i]);
 		}
 
-		if (search_all)
+		if (!search_all)
-			cache = cache->next;
-		else
 			break;
+
+		cache = cache->next;
 	}
 
 	return NULL;
@@ -108,8 +106,8 @@ void register_cache_invalidate(struct reg_cache *cache)
 {
 	struct reg *reg = cache->reg_list;
 
-	for (unsigned n = cache->num_regs; n != 0; n--, reg++) {
+	for (unsigned int n = cache->num_regs; n != 0; n--, reg++) {
-		if (reg->exist == false)
+		if (!reg->exist)
 			continue;
 		reg->valid = false;
 		reg->dirty = false;

src/target/riscv/riscv.c

@@ -1676,6 +1676,18 @@ static int riscv_write_memory(struct target *target, target_addr_t address,
 	return tt->write_memory(target, address, size, count, buffer);
 }
 
+const char *riscv_get_gdb_arch(struct target *target)
+{
+	switch (riscv_xlen(target)) {
+		case 32:
+			return "riscv:rv32";
+		case 64:
+			return "riscv:rv64";
+	}
+	LOG_ERROR("Unsupported xlen: %d", riscv_xlen(target));
+	return NULL;
+}
+
 static int riscv_get_gdb_reg_list_internal(struct target *target,
 		struct reg **reg_list[], int *reg_list_size,
 		enum target_register_class reg_class, bool read)
@@ -1765,7 +1777,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 	}
 
 	/* Save registers */
-	struct reg *reg_pc = register_get_by_name(target->reg_cache, "pc", 1);
+	struct reg *reg_pc = register_get_by_name(target->reg_cache, "pc", true);
 	if (!reg_pc || reg_pc->type->get(reg_pc) != ERROR_OK)
 		return ERROR_FAIL;
 	uint64_t saved_pc = buf_get_u64(reg_pc->value, 0, reg_pc->size);
@@ -1774,7 +1786,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 	uint64_t saved_regs[32];
 	for (int i = 0; i < num_reg_params; i++) {
 		LOG_DEBUG("save %s", reg_params[i].reg_name);
-		struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, 0);
+		struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
 		if (!r) {
 			LOG_ERROR("Couldn't find register named '%s'", reg_params[i].reg_name);
 			return ERROR_FAIL;
@@ -1808,7 +1820,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 
 	LOG_DEBUG("Disabling Interrupts");
 	struct reg *reg_mstatus = register_get_by_name(target->reg_cache,
-			"mstatus", 1);
+			"mstatus", true);
 	if (!reg_mstatus) {
 		LOG_ERROR("Couldn't find mstatus!");
 		return ERROR_FAIL;
@@ -1889,7 +1901,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 	for (int i = 0; i < num_reg_params; i++) {
 		if (reg_params[i].direction == PARAM_IN ||
 				reg_params[i].direction == PARAM_IN_OUT) {
-			struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, 0);
+			struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
 			if (r->type->get(r) != ERROR_OK) {
 				LOG_ERROR("get(%s) failed", r->name);
 				return ERROR_FAIL;
@@ -1897,7 +1909,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 			buf_cpy(r->value, reg_params[i].value, reg_params[i].size);
 		}
 		LOG_DEBUG("restore %s", reg_params[i].reg_name);
-		struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, 0);
+		struct reg *r = register_get_by_name(target->reg_cache, reg_params[i].reg_name, false);
 		buf_set_u64(buf, 0, info->xlen, saved_regs[r->number]);
 		if (r->type->set(r, buf) != ERROR_OK) {
 			LOG_ERROR("set(%s) failed", r->name);
@@ -3296,6 +3308,7 @@ struct target_type riscv_target = {
 	.mmu = riscv_mmu,
 	.virt2phys = riscv_virt2phys,
 
+	.get_gdb_arch = riscv_get_gdb_arch,
 	.get_gdb_reg_list = riscv_get_gdb_reg_list,
 	.get_gdb_reg_list_noread = riscv_get_gdb_reg_list_noread,
 

src/target/stm8.c

@@ -1876,7 +1876,7 @@ static int stm8_run_algorithm(struct target *target, int num_mem_params,
 			continue;
 
 		struct reg *reg = register_get_by_name(stm8->core_cache,
-				reg_params[i].reg_name, 0);
+				reg_params[i].reg_name, false);
 
 		if (!reg) {
 			LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -1910,7 +1910,7 @@ static int stm8_run_algorithm(struct target *target, int num_mem_params,
 	for (int i = 0; i < num_reg_params; i++) {
 		if (reg_params[i].direction != PARAM_OUT) {
 			struct reg *reg = register_get_by_name(stm8->core_cache,
-					reg_params[i].reg_name, 0);
+					reg_params[i].reg_name, false);
 			if (!reg) {
 				LOG_ERROR("BUG: register '%s' not found",
 						reg_params[i].reg_name);

src/target/target.c

@@ -2348,7 +2348,7 @@ int target_profiling_default(struct target *target, uint32_t *samples,
 
 	uint32_t sample_count = 0;
 	/* hopefully it is safe to cache! We want to stop/restart as quickly as possible. */
-	struct reg *reg = register_get_by_name(target->reg_cache, "pc", 1);
+	struct reg *reg = register_get_by_name(target->reg_cache, "pc", true);
 
 	int retval = ERROR_OK;
 	for (;;) {
@@ -3143,7 +3143,7 @@ COMMAND_HANDLER(handle_reg_command)
 		}
 	} else {
 		/* access a single register by its name */
-		reg = register_get_by_name(target->reg_cache, CMD_ARGV[0], 1);
+		reg = register_get_by_name(target->reg_cache, CMD_ARGV[0], true);
 
 		if (!reg)
 			goto not_found;

tcl/board/digilent_nexys_video.cfg

@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Digilent Nexys Video with Xilinx Artix-7 FPGA
+# https://reference.digilentinc.com/programmable-logic/nexys-video/start
+
+adapter driver ftdi
+adapter speed 30000
+
+ftdi_device_desc "Digilent USB Device"
+ftdi_vid_pid 0x0403 0x6010
+
+# channel 0 is dedicated for Digilent's DPTI Interface
+# channel 1 is used for JTAG
+ftdi_channel 1
+
+# just TCK TDI TDO TMS, no reset
+ftdi_layout_init 0x0088 0x008b
+reset_config none
+
+# Enable sampling on falling edge for high JTAG speeds.
+ftdi_tdo_sample_edge falling
+
+transport select jtag
+
+source [find cpld/xilinx-xc7.cfg]
+source [find cpld/jtagspi.cfg]

tcl/board/renesas_falcon.cfg

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Renesas R-Car V3U Falcon Board Config
+
+# The Falcon board comes with either an V3U SOC.
+
+echo "\nFalcon:"
+if { ![info exists SOC] } {
+	set SOC V3U
+}
+source [find target/renesas_rcar_gen3.cfg]

tcl/target/renesas_rcar_gen2.cfg

@@ -87,12 +87,14 @@ dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
 set CA15_DBGBASE {0x800B0000 0x800B2000 0x800B4000 0x800B6000}
 set CA7_DBGBASE  {0x800F0000 0x800F2000 0x800F4000 0x800F6000}
 
+set _targets ""
 set smp_targets ""
 
 proc setup_ca {core_name dbgbase num boot} {
 	global _CHIPNAME
 	global _DAPNAME
 	global smp_targets
+	global _targets
 	for { set _core 0 } { $_core < $num } { incr _core } {
 		set _TARGETNAME $_CHIPNAME.$core_name.$_core
 		set _CTINAME $_TARGETNAME.cti
@@ -123,3 +125,4 @@ if { [string equal $_boot_core CA15] } {
 source [find target/renesas_rcar_reset_common.cfg]
 
 eval "target smp $smp_targets"
+targets $_targets

tcl/target/renesas_rcar_gen3.cfg

@@ -7,6 +7,7 @@
 #  H3: Cortex-A57 x 4, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
 # M3W: Cortex-A57 x 2, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
 # M3N: Cortex-A57 x 2,                 Cortex-R7 x 2 (Lock-Step)
+# V3U:                 Cortex-A76 x 8, Cortex-R52 x2 (Lock-Step)
 # V3H:                 Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
 # V3M:                 Cortex-A53 x 2, Cortex-R7 x 2 (Lock-Step)
 #  E3:                 Cortex-A53 x 1, Cortex-R7 x 2 (Lock-Step)
@@ -24,6 +25,12 @@ if { [info exists SOC] } {
 	set _soc H3
 }
 
+set _num_ca53 0
+set _num_ca57 0
+set _num_ca76 0
+set _num_cr52 0
+set _num_cr7 0
+
 # Set configuration for each SOC and the default 'BOOT_CORE'
 switch $_soc {
 	H3 {
@@ -75,6 +82,12 @@ switch $_soc {
 		set _num_cr7 0
 		set _boot_core CA53
 	}
+	V3U {
+		set _CHIPNAME r8a779a0
+		set _num_ca76 8
+		set _num_cr52 1
+		set _boot_core CA76
+	}
 	default {
 		error "'$_soc' is invalid!"
 	}
@@ -96,7 +109,7 @@ if { [info exists DAP_TAPID] } {
 	set _DAP_TAPID 0x5ba00477
 }
 
-echo "\t$_soc - $_num_ca57 CA57(s), $_num_ca53 CA53(s), $_num_cr7 CR7(s)"
+echo "\t$_soc - $_num_ca76 CA76(s), $_num_ca57 CA57(s), $_num_ca53 CA53(s), $_num_cr52 CR52(s), $_num_cr7 CR7(s)"
 echo "\tBoot Core - $_boot_core\n"
 
 set _DAPNAME $_CHIPNAME.dap
@@ -105,19 +118,25 @@ set _DAPNAME $_CHIPNAME.dap
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID
 dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
 
+set CA76_DBGBASE {0x81410000 0x81510000 0x81610000 0x81710000 0x81c10000 0x81d10000 0x81e10000 0x81f10000}
+set CA76_CTIBASE {0x81420000 0x81520000 0x81620000 0x81720000 0x81c20000 0x81d20000 0x81e20000 0x81f20000}
 set CA57_DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
 set CA57_CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
 set CA53_DBGBASE {0x80C10000 0x80D10000 0x80E10000 0x80F10000}
 set CA53_CTIBASE {0x80C20000 0x80D20000 0x80E20000 0x80F20000}
+set CR52_DBGBASE 0x80c10000
+set CR52_CTIBASE 0x80c20000
 set  CR7_DBGBASE 0x80910000
 set  CR7_CTIBASE 0x80918000
 
+set _targets ""
 set smp_targets ""
 
 proc setup_a5x {core_name dbgbase ctibase num boot} {
 	global _CHIPNAME
 	global _DAPNAME
 	global smp_targets
+	global _targets
 	for { set _core 0 } { $_core < $num } { incr _core } {
 		set _TARGETNAME $_CHIPNAME.$core_name.$_core
 		set _CTINAME $_TARGETNAME.cti
@@ -135,33 +154,41 @@ proc setup_a5x {core_name dbgbase ctibase num boot} {
 	}
 }
 
-proc setup_cr7 {dbgbase ctibase boot} {
+proc setup_cr7 {core_name dbgbase ctibase num boot} {
 	global _CHIPNAME
 	global _DAPNAME
-	set _TARGETNAME $_CHIPNAME.r7
+	for { set _core 0 } { $_core < $num } { incr _core } {
-	set _CTINAME $_TARGETNAME.cti
+		set _TARGETNAME $_CHIPNAME.$core_name
-	cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase
+		set _CTINAME $_TARGETNAME.cti
-	set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \
+		cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase
-		-ap-num 1 -dbgbase $dbgbase"
+		set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \
-	if { $boot == 1 } {
+			-ap-num 1 -dbgbase $dbgbase"
-		set _targets "$_TARGETNAME"
+		if { $boot == 1 } {
-	} else {
+			set _targets "$_TARGETNAME"
-		set _command "$_command -defer-examine"
+		} else {
+			set _command "$_command -defer-examine"
+		}
+		eval $_command
 	}
-	eval $_command
 }
 
 # Organize target list based on the boot core
-if { [string equal $_boot_core CA57] } {
+if { [string equal $_boot_core CA76] } {
+	setup_a5x a76 $CA76_DBGBASE $CA76_CTIBASE $_num_ca76 1
+	setup_cr7 r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 0
+} elseif { [string equal $_boot_core CA57] } {
 	setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 1
 	setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
-	setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 0
+	setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
 } elseif { [string equal $_boot_core CA53] } {
 	setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 1
 	setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
-	setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 0
+	setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
+} elseif { [string equal $_boot_core CR52] } {
+	setup_cr7 r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 1
+	setup_a5x a76 $CA76_DBGBASE $CA76_CTIBASE $_num_ca76 0
 } else {
-	setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 1
+	setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  1
 	setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
 	setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
 }
@@ -169,3 +196,4 @@ if { [string equal $_boot_core CA57] } {
 source [find target/renesas_rcar_reset_common.cfg]
 
 eval "target smp $smp_targets"
+targets $_targets