ULINK driver and OpenULINK firmware: whitespace and comment fixes (trivial)
In commit de0130a0aa, some doxygen documentation
blocks of the form "///< ..." (documentation after member) got changed to
"/* /< ...", which is not recognized by doxygen. This commit changes them to
the correct form "/**< ...".
Also, remove some leading whitespace characters and fix alignment of comment
blocks where appropriate.
Change-Id: I73a5cf55753722fa0e1d6551f05c47ee88172f0f
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
Reviewed-on: http://openocd.zylin.com/1483
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Martin Schmölzer
Spencer Oliver
parent
7a3182fa42
commit
ba8e6f170c
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@ -65,7 +65,7 @@ SFR(DPL1, 0x84);
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SFR(DPL2, 0x85);
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SFR(DPS, 0x86);
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#define SEL bmBit0
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#define SEL bmBit0
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/* Bit 1 read-only, always reads '0' */
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/* Bit 2 read-only, always reads '0' */
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/* Bit 3 read-only, always reads '0' */
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@ -75,14 +75,14 @@ SFR(DPS, 0x86);
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/* Bit 7 read-only, always reads '0' */
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SFR(PCON, 0x87);
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#define IDLE bmBit0
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#define STOP bmBit1
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#define GF0 bmBit2
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#define GF1 bmBit3
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#define IDLE bmBit0
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#define STOP bmBit1
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#define GF0 bmBit2
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#define GF1 bmBit3
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/* Bit 4 read-only, always reads '1' */
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/* Bit 5 read-only, always reads '1' */
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/* Bit 6 unused */
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#define SMOD0 bmBit7
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#define SMOD0 bmBit7
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SFR(TCON, 0x88);
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SBIT(IT0, 0x88, 0);
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@ -97,14 +97,14 @@ SBIT(TF1, 0x88, 7);
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SFR(TMOD, 0x89);
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/* Some bits in this register share the same name in the EZ-USB TRM. Therefore,
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* we add a '0'/'1' to distinguish them */
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#define M00 bmBit0
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#define M01 bmBit1
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#define CT0 bmBit2
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#define GATE0 bmBit3
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#define M10 bmBit4
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#define M11 bmBit5
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#define CT1 bmBit6
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#define GATE1 bmBit7
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#define M00 bmBit0
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#define M01 bmBit1
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#define CT0 bmBit2
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#define GATE0 bmBit3
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#define M10 bmBit4
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#define M11 bmBit5
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#define CT1 bmBit6
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#define GATE1 bmBit7
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SFR(TL0, 0x8A);
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SFR(TL1, 0x8B);
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@ -112,17 +112,17 @@ SFR(TH0, 0x8C);
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SFR(TH1, 0x8D);
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SFR(CKCON, 0x8E);
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#define MD0 bmBit0
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#define MD1 bmBit1
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#define MD2 bmBit2
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#define T0M bmBit3
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#define T1M bmBit4
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#define T2M bmBit5
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#define MD0 bmBit0
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#define MD1 bmBit1
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#define MD2 bmBit2
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#define T0M bmBit3
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#define T1M bmBit4
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#define T2M bmBit5
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/* Bit 6 unused */
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/* Bit 7 unused */
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SFR(SPC_FNC, 0x8D);
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#define bmWRS bmBit0
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#define bmWRS bmBit0
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/* Bit 1 read-only, always reads '0' */
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/* Bit 2 read-only, always reads '0' */
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/* Bit 3 read-only, always reads '0' */
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@ -136,10 +136,10 @@ SFR(EXIF, 0x91);
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/* Bit 1 read-only, always reads '0' */
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/* Bit 2 read-only, always reads '0' */
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/* Bit 3 read-only, always reads '1' */
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#define USBINT bmBit4
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#define I2CINT bmBit5
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#define IE4 bmBit6
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#define IE5 bmBit7
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#define USBINT bmBit4
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#define I2CINT bmBit5
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#define IE4 bmBit6
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#define IE5 bmBit7
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/* Definition of the _XPAGE register, according to SDCC Compiler User Guide,
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* Version 3.0.1, Chapter 4, p. 61. Also see EZ-USB TRM, p. 2-4. */
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@ -311,179 +311,179 @@ SFRX(OUT16BCL, 0x7F7F);
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/****************************** CPU Registers ******************************/
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SFRX(CPUCS, 0x7F92);
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#define RES8051 bmBit0
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#define CLK24OE bmBit1
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#define RES8051 bmBit0
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#define CLK24OE bmBit1
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/* Bit 2 read-only, always reads '0' */
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/* Bit 3 read-only, always reads '0' */
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/* Bits 4...7: Chip Revision */
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SFRX(PORTACFG, 0x7F93);
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#define T0OUT bmBit0
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#define T1OUT bmBit1
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#define OE bmBit2
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#define CS bmBit3
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#define FWR bmBit4
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#define FRD bmBit5
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#define RXD0OUT bmBit6
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#define RXD1OUT bmBit7
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#define T0OUT bmBit0
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#define T1OUT bmBit1
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#define OE bmBit2
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#define CS bmBit3
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#define FWR bmBit4
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#define FRD bmBit5
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#define RXD0OUT bmBit6
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#define RXD1OUT bmBit7
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SFRX(PORTBCFG, 0x7F94);
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#define T2 bmBit0
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#define T2EX bmBit1
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#define RXD1 bmBit2
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#define TXD1 bmBit3
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#define INT4 bmBit4
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#define INT5 bmBit5
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#define INT6 bmBit6
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#define T2OUT bmBit7
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#define T2 bmBit0
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#define T2EX bmBit1
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#define RXD1 bmBit2
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#define TXD1 bmBit3
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#define INT4 bmBit4
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#define INT5 bmBit5
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#define INT6 bmBit6
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#define T2OUT bmBit7
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SFRX(PORTCCFG, 0x7F95);
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#define RXD0 bmBit0
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#define TXD0 bmBit1
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#define INT0 bmBit2
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#define INT1 bmBit3
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#define T0 bmBit4
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#define T1 bmBit5
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#define WR bmBit6
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#define RD bmBit7
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#define RXD0 bmBit0
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#define TXD0 bmBit1
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#define INT0 bmBit2
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#define INT1 bmBit3
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#define T0 bmBit4
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#define T1 bmBit5
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#define WR bmBit6
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#define RD bmBit7
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/*********************** Input-Output Port Registers ***********************/
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SFRX(OUTA, 0x7F96);
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#define OUTA0 bmBit0
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#define OUTA1 bmBit1
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#define OUTA2 bmBit2
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#define OUTA3 bmBit3
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#define OUTA4 bmBit4
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#define OUTA5 bmBit5
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#define OUTA6 bmBit6
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#define OUTA7 bmBit7
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#define OUTA0 bmBit0
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#define OUTA1 bmBit1
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#define OUTA2 bmBit2
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#define OUTA3 bmBit3
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#define OUTA4 bmBit4
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#define OUTA5 bmBit5
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#define OUTA6 bmBit6
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#define OUTA7 bmBit7
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SFRX(OUTB, 0x7F97);
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#define OUTB0 bmBit0
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#define OUTB1 bmBit1
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#define OUTB2 bmBit2
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#define OUTB3 bmBit3
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#define OUTB4 bmBit4
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#define OUTB5 bmBit5
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#define OUTB6 bmBit6
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#define OUTB7 bmBit7
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#define OUTB0 bmBit0
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#define OUTB1 bmBit1
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#define OUTB2 bmBit2
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#define OUTB3 bmBit3
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#define OUTB4 bmBit4
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#define OUTB5 bmBit5
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#define OUTB6 bmBit6
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#define OUTB7 bmBit7
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SFRX(OUTC, 0x7F98);
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#define OUTC0 bmBit0
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#define OUTC1 bmBit1
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#define OUTC2 bmBit2
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#define OUTC3 bmBit3
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#define OUTC4 bmBit4
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#define OUTC5 bmBit5
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#define OUTC6 bmBit6
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#define OUTC7 bmBit7
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#define OUTC0 bmBit0
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#define OUTC1 bmBit1
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#define OUTC2 bmBit2
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#define OUTC3 bmBit3
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#define OUTC4 bmBit4
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#define OUTC5 bmBit5
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#define OUTC6 bmBit6
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#define OUTC7 bmBit7
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SFRX(PINSA, 0x7F99);
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#define PINA0 bmBit0
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#define PINA1 bmBit1
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#define PINA2 bmBit2
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#define PINA3 bmBit3
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#define PINA4 bmBit4
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#define PINA5 bmBit5
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#define PINA6 bmBit6
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#define PINA7 bmBit7
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#define PINA0 bmBit0
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#define PINA1 bmBit1
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#define PINA2 bmBit2
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#define PINA3 bmBit3
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#define PINA4 bmBit4
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#define PINA5 bmBit5
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#define PINA6 bmBit6
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#define PINA7 bmBit7
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SFRX(PINSB, 0x7F9A);
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#define PINB0 bmBit0
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#define PINB1 bmBit1
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#define PINB2 bmBit2
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#define PINB3 bmBit3
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#define PINB4 bmBit4
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#define PINB5 bmBit5
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#define PINB6 bmBit6
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#define PINB7 bmBit7
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#define PINB0 bmBit0
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#define PINB1 bmBit1
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#define PINB2 bmBit2
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#define PINB3 bmBit3
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#define PINB4 bmBit4
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#define PINB5 bmBit5
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#define PINB6 bmBit6
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#define PINB7 bmBit7
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SFRX(PINSC, 0x7F9B);
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#define PINC0 bmBit0
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#define PINC1 bmBit1
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#define PINC2 bmBit2
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#define PINC3 bmBit3
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#define PINC4 bmBit4
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#define PINC5 bmBit5
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#define PINC6 bmBit6
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#define PINC7 bmBit7
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#define PINC0 bmBit0
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#define PINC1 bmBit1
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#define PINC2 bmBit2
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#define PINC3 bmBit3
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#define PINC4 bmBit4
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#define PINC5 bmBit5
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#define PINC6 bmBit6
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#define PINC7 bmBit7
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SFRX(OEA, 0x7F9C);
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#define OEA0 bmBit0
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#define OEA1 bmBit1
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#define OEA2 bmBit2
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#define OEA3 bmBit3
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#define OEA4 bmBit4
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#define OEA5 bmBit5
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#define OEA6 bmBit6
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#define OEA7 bmBit7
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#define OEA0 bmBit0
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#define OEA1 bmBit1
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#define OEA2 bmBit2
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#define OEA3 bmBit3
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#define OEA4 bmBit4
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#define OEA5 bmBit5
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#define OEA6 bmBit6
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#define OEA7 bmBit7
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SFRX(OEB, 0x7F9D);
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#define OEB0 bmBit0
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#define OEB1 bmBit1
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#define OEB2 bmBit2
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#define OEB3 bmBit3
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#define OEB4 bmBit4
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#define OEB5 bmBit5
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#define OEB6 bmBit6
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#define OEB7 bmBit7
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#define OEB0 bmBit0
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#define OEB1 bmBit1
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#define OEB2 bmBit2
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#define OEB3 bmBit3
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#define OEB4 bmBit4
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#define OEB5 bmBit5
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#define OEB6 bmBit6
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#define OEB7 bmBit7
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SFRX(OEC, 0x7F9E);
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#define OEC0 bmBit0
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#define OEC1 bmBit1
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#define OEC2 bmBit2
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#define OEC3 bmBit3
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#define OEC4 bmBit4
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#define OEC5 bmBit5
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#define OEC6 bmBit6
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#define OEC7 bmBit7
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#define OEC0 bmBit0
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#define OEC1 bmBit1
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#define OEC2 bmBit2
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#define OEC3 bmBit3
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#define OEC4 bmBit4
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#define OEC5 bmBit5
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#define OEC6 bmBit6
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#define OEC7 bmBit7
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/* 0x7F9F reserved */
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/****************** Isochronous Control/Status Registers *******************/
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SFRX(ISOERR, 0x7FA0);
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#define ISO8ERR bmBit0
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#define ISO9ERR bmBit1
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#define ISO10ERR bmBit2
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#define ISO11ERR bmBit3
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#define ISO12ERR bmBit4
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#define ISO13ERR bmBit5
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#define ISO14ERR bmBit6
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#define ISO15ERR bmBit7
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#define ISO8ERR bmBit0
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#define ISO9ERR bmBit1
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#define ISO10ERR bmBit2
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#define ISO11ERR bmBit3
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#define ISO12ERR bmBit4
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#define ISO13ERR bmBit5
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#define ISO14ERR bmBit6
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#define ISO15ERR bmBit7
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SFRX(ISOCTL, 0x7FA1);
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#define ISODISAB bmBit0
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#define MBZ0 bmBit1
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#define MBZ1 bmBit2
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#define PPSTAT bmBit3
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#define ISODISAB bmBit0
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#define MBZ0 bmBit1
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#define MBZ1 bmBit2
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#define PPSTAT bmBit3
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/* Bit 4 unused */
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/* Bit 5 unused */
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/* Bit 6 unused */
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/* Bit 7 unused */
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SFRX(ZBCOUT, 0x7FA2);
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#define EP8 bmBit0
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#define EP9 bmBit1
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#define EP10 bmBit2
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#define EP11 bmBit3
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#define EP12 bmBit4
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#define EP13 bmBit5
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#define EP14 bmBit6
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#define EP15 bmBit7
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#define EP8 bmBit0
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#define EP9 bmBit1
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#define EP10 bmBit2
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#define EP11 bmBit3
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#define EP12 bmBit4
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#define EP13 bmBit5
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#define EP14 bmBit6
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#define EP15 bmBit7
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/* 0x7FA3 reserved */
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/* 0x7FA4 reserved */
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/****************************** I2C Registers ******************************/
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SFRX(I2CS, 0x7FA5);
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#define DONE bmBit0
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#define ACK bmBit1
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#define BERR bmBit2
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#define ID0 bmBit3
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#define ID1 bmBit4
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#define LASTRD bmBit5
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#define I2C_STOP bmBit6
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#define I2C_START bmBit7
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#define DONE bmBit0
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#define ACK bmBit1
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#define BERR bmBit2
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#define ID0 bmBit3
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#define ID1 bmBit4
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#define LASTRD bmBit5
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#define I2C_STOP bmBit6
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#define I2C_START bmBit7
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SFRX(I2DAT, 0x7FA6);
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/* 0x7FA7 reserved */
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@ -492,78 +492,78 @@ SFRX(I2DAT, 0x7FA6);
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SFRX(IVEC, 0x7FA8);
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/* Bit 0 read-only, always reads '0' */
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/* Bit 1 read-only, always reads '0' */
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#define IV0 bmBit2
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#define IV1 bmBit3
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#define IV2 bmBit4
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#define IV3 bmBit5
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#define IV4 bmBit6
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#define IV0 bmBit2
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#define IV1 bmBit3
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#define IV2 bmBit4
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#define IV3 bmBit5
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#define IV4 bmBit6
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/* Bit 7 read-only, always reads '0' */
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SFRX(IN07IRQ, 0x7FA9);
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#define IN0IR bmBit0
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#define IN1IR bmBit1
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#define IN2IR bmBit2
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#define IN3IR bmBit3
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#define IN4IR bmBit4
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#define IN5IR bmBit5
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#define IN6IR bmBit6
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#define IN7IR bmBit7
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#define IN0IR bmBit0
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#define IN1IR bmBit1
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#define IN2IR bmBit2
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#define IN3IR bmBit3
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#define IN4IR bmBit4
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#define IN5IR bmBit5
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#define IN6IR bmBit6
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#define IN7IR bmBit7
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SFRX(OUT07IRQ, 0x7FAA);
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#define OUT0IR bmBit0
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#define OUT1IR bmBit1
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#define OUT2IR bmBit2
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#define OUT3IR bmBit3
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#define OUT4IR bmBit4
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#define OUT5IR bmBit5
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#define OUT6IR bmBit6
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#define OUT7IR bmBit7
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#define OUT0IR bmBit0
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#define OUT1IR bmBit1
|
||||
#define OUT2IR bmBit2
|
||||
#define OUT3IR bmBit3
|
||||
#define OUT4IR bmBit4
|
||||
#define OUT5IR bmBit5
|
||||
#define OUT6IR bmBit6
|
||||
#define OUT7IR bmBit7
|
||||
|
||||
SFRX(USBIRQ, 0x7FAB);
|
||||
#define SUDAVIR bmBit0
|
||||
#define SOFIR bmBit1
|
||||
#define SUTOKIR bmBit2
|
||||
#define SUSPIR bmBit3
|
||||
#define URESIR bmBit4
|
||||
#define SUDAVIR bmBit0
|
||||
#define SOFIR bmBit1
|
||||
#define SUTOKIR bmBit2
|
||||
#define SUSPIR bmBit3
|
||||
#define URESIR bmBit4
|
||||
/* Bit 5 unused */
|
||||
/* Bit 6 unused */
|
||||
/* Bit 7 unused */
|
||||
|
||||
SFRX(IN07IEN, 0x7FAC);
|
||||
#define IN0IEN bmBit0
|
||||
#define IN1IEN bmBit1
|
||||
#define IN2IEN bmBit2
|
||||
#define IN3IEN bmBit3
|
||||
#define IN4IEN bmBit4
|
||||
#define IN5IEN bmBit5
|
||||
#define IN6IEN bmBit6
|
||||
#define IN7IEN bmBit7
|
||||
#define IN0IEN bmBit0
|
||||
#define IN1IEN bmBit1
|
||||
#define IN2IEN bmBit2
|
||||
#define IN3IEN bmBit3
|
||||
#define IN4IEN bmBit4
|
||||
#define IN5IEN bmBit5
|
||||
#define IN6IEN bmBit6
|
||||
#define IN7IEN bmBit7
|
||||
|
||||
SFRX(OUT07IEN, 0x7FAD);
|
||||
#define OUT0IEN bmBit0
|
||||
#define OUT1IEN bmBit1
|
||||
#define OUT2IEN bmBit2
|
||||
#define OUT3IEN bmBit3
|
||||
#define OUT4IEN bmBit4
|
||||
#define OUT5IEN bmBit5
|
||||
#define OUT6IEN bmBit6
|
||||
#define OUT7IEN bmBit7
|
||||
#define OUT0IEN bmBit0
|
||||
#define OUT1IEN bmBit1
|
||||
#define OUT2IEN bmBit2
|
||||
#define OUT3IEN bmBit3
|
||||
#define OUT4IEN bmBit4
|
||||
#define OUT5IEN bmBit5
|
||||
#define OUT6IEN bmBit6
|
||||
#define OUT7IEN bmBit7
|
||||
|
||||
SFRX(USBIEN, 0x7FAE);
|
||||
#define SUDAVIE bmBit0
|
||||
#define SOFIE bmBit1
|
||||
#define SUTOKIE bmBit2
|
||||
#define SUSPIE bmBit3
|
||||
#define URESIE bmBit4
|
||||
#define SUDAVIE bmBit0
|
||||
#define SOFIE bmBit1
|
||||
#define SUTOKIE bmBit2
|
||||
#define SUSPIE bmBit3
|
||||
#define URESIE bmBit4
|
||||
/* Bit 5 unused */
|
||||
/* Bit 6 unused */
|
||||
/* Bit 7 unused */
|
||||
|
||||
SFRX(USBBAV, 0x7FAF);
|
||||
#define AVEN bmBit0
|
||||
#define BPEN bmBit1
|
||||
#define BPPULSE bmBit2
|
||||
#define BREAK bmBit3
|
||||
#define AVEN bmBit0
|
||||
#define BPEN bmBit1
|
||||
#define BPPULSE bmBit2
|
||||
#define BREAK bmBit3
|
||||
/* Bit 4 unused */
|
||||
/* Bit 5 unused */
|
||||
/* Bit 6 unused */
|
||||
|
|
@ -576,10 +576,10 @@ SFRX(BPADDRL, 0x7FB3);
|
|||
|
||||
/****************************** Endpoints 0-7 ******************************/
|
||||
SFRX(EP0CS, 0x7FB4);
|
||||
#define EP0STALL bmBit0
|
||||
#define HSNAK bmBit1
|
||||
#define IN0BSY bmBit2
|
||||
#define OUT0BSY bmBit3
|
||||
#define EP0STALL bmBit0
|
||||
#define HSNAK bmBit1
|
||||
#define IN0BSY bmBit2
|
||||
#define OUT0BSY bmBit3
|
||||
/* Bit 4 unused */
|
||||
/* Bit 5 unused */
|
||||
/* Bit 6 unused */
|
||||
|
|
@ -627,24 +627,24 @@ SFRX(SUDPTRH, 0x7FD4);
|
|||
SFRX(SUDPTRL, 0x7FD5);
|
||||
|
||||
SFRX(USBCS, 0x7FD6);
|
||||
#define SIGRSUME bmBit0
|
||||
#define RENUM bmBit1
|
||||
#define DISCOE bmBit2
|
||||
#define DISCON bmBit3
|
||||
#define SIGRSUME bmBit0
|
||||
#define RENUM bmBit1
|
||||
#define DISCOE bmBit2
|
||||
#define DISCON bmBit3
|
||||
/* Bit 4 unused */
|
||||
/* Bit 5 unused */
|
||||
/* Bit 6 unused */
|
||||
#define WAKESRC bmBit7
|
||||
#define WAKESRC bmBit7
|
||||
|
||||
SFRX(TOGCTL, 0x7FD7);
|
||||
#define TOG_EP0 bmBit0
|
||||
#define TOG_EP1 bmBit1
|
||||
#define TOG_EP2 bmBit2
|
||||
#define TOG_EP0 bmBit0
|
||||
#define TOG_EP1 bmBit1
|
||||
#define TOG_EP2 bmBit2
|
||||
/* Bit 3 is read-only, always reads '0' */
|
||||
#define TOG_IO bmBit4
|
||||
#define TOG_R bmBit5
|
||||
#define TOG_S bmBit6
|
||||
#define TOG_Q bmBit7
|
||||
#define TOG_IO bmBit4
|
||||
#define TOG_R bmBit5
|
||||
#define TOG_S bmBit6
|
||||
#define TOG_Q bmBit7
|
||||
|
||||
SFRX(USBFRAMEL, 0x7FD8);
|
||||
SFRX(USBFRAMEH, 0x7FD9);
|
||||
|
|
@ -653,64 +653,64 @@ SFRX(FNADDR, 0x7FDB);
|
|||
/* 0x7FDC reserved */
|
||||
|
||||
SFRX(USBPAIR, 0x7FDD);
|
||||
#define PR2IN bmBit0
|
||||
#define PR4IN bmBit1
|
||||
#define PR6IN bmBit2
|
||||
#define PR2OUT bmBit3
|
||||
#define PR4OUT bmBit4
|
||||
#define PR6OUT bmBit5
|
||||
#define PR2IN bmBit0
|
||||
#define PR4IN bmBit1
|
||||
#define PR6IN bmBit2
|
||||
#define PR2OUT bmBit3
|
||||
#define PR4OUT bmBit4
|
||||
#define PR6OUT bmBit5
|
||||
/* Bit 6 unused */
|
||||
#define ISOSEND0 bmBit7
|
||||
#define ISOSEND0 bmBit7
|
||||
|
||||
SFRX(IN07VAL, 0x7FDE);
|
||||
/* Bit 0 is read-only, always reads '1' */
|
||||
#define IN1VAL bmBit1
|
||||
#define IN2VAL bmBit2
|
||||
#define IN3VAL bmBit3
|
||||
#define IN4VAL bmBit4
|
||||
#define IN5VAL bmBit5
|
||||
#define IN6VAL bmBit6
|
||||
#define IN7VAL bmBit7
|
||||
#define IN1VAL bmBit1
|
||||
#define IN2VAL bmBit2
|
||||
#define IN3VAL bmBit3
|
||||
#define IN4VAL bmBit4
|
||||
#define IN5VAL bmBit5
|
||||
#define IN6VAL bmBit6
|
||||
#define IN7VAL bmBit7
|
||||
|
||||
SFRX(OUT07VAL, 0x7FDF);
|
||||
/* Bit 0 is read-only, always reads '1' */
|
||||
#define OUT1VAL bmBit1
|
||||
#define OUT2VAL bmBit2
|
||||
#define OUT3VAL bmBit3
|
||||
#define OUT4VAL bmBit4
|
||||
#define OUT5VAL bmBit5
|
||||
#define OUT6VAL bmBit6
|
||||
#define OUT7VAL bmBit7
|
||||
#define OUT1VAL bmBit1
|
||||
#define OUT2VAL bmBit2
|
||||
#define OUT3VAL bmBit3
|
||||
#define OUT4VAL bmBit4
|
||||
#define OUT5VAL bmBit5
|
||||
#define OUT6VAL bmBit6
|
||||
#define OUT7VAL bmBit7
|
||||
|
||||
SFRX(INISOVAL, 0x7FE0);
|
||||
#define IN8VAL bmBit0
|
||||
#define IN9VAL bmBit1
|
||||
#define IN10VAL bmBit2
|
||||
#define IN11VAL bmBit3
|
||||
#define IN12VAL bmBit4
|
||||
#define IN13VAL bmBit5
|
||||
#define IN14VAL bmBit6
|
||||
#define IN15VAL bmBit7
|
||||
#define IN8VAL bmBit0
|
||||
#define IN9VAL bmBit1
|
||||
#define IN10VAL bmBit2
|
||||
#define IN11VAL bmBit3
|
||||
#define IN12VAL bmBit4
|
||||
#define IN13VAL bmBit5
|
||||
#define IN14VAL bmBit6
|
||||
#define IN15VAL bmBit7
|
||||
|
||||
SFRX(OUTISOVAL, 0x7FE1);
|
||||
#define OUT8VAL bmBit0
|
||||
#define OUT9VAL bmBit1
|
||||
#define OUT10VAL bmBit2
|
||||
#define OUT11VAL bmBit3
|
||||
#define OUT12VAL bmBit4
|
||||
#define OUT13VAL bmBit5
|
||||
#define OUT14VAL bmBit6
|
||||
#define OUT15VAL bmBit7
|
||||
#define OUT8VAL bmBit0
|
||||
#define OUT9VAL bmBit1
|
||||
#define OUT10VAL bmBit2
|
||||
#define OUT11VAL bmBit3
|
||||
#define OUT12VAL bmBit4
|
||||
#define OUT13VAL bmBit5
|
||||
#define OUT14VAL bmBit6
|
||||
#define OUT15VAL bmBit7
|
||||
|
||||
SFRX(FASTXFR, 0x7FE2);
|
||||
#define WMOD0 bmBit0
|
||||
#define WMOD1 bmBit1
|
||||
#define WPOL bmBit2
|
||||
#define RMOD0 bmBit3
|
||||
#define RMOD1 bmBit4
|
||||
#define RPOL bmBit5
|
||||
#define FBLK bmBit6
|
||||
#define FISO bmBit7
|
||||
#define WMOD0 bmBit0
|
||||
#define WMOD1 bmBit1
|
||||
#define WPOL bmBit2
|
||||
#define RMOD0 bmBit3
|
||||
#define RMOD1 bmBit4
|
||||
#define RPOL bmBit5
|
||||
#define FBLK bmBit6
|
||||
#define FISO bmBit7
|
||||
|
||||
SFRX(AUTOPTRH, 0x7FE3);
|
||||
SFRX(AUTOPTRL, 0x7FE4);
|
||||
|
|
|
|||
|
|
@ -49,80 +49,80 @@
|
|||
|
||||
/** USB Device Descriptor. See USB 1.1 spec, pp. 196 - 198 */
|
||||
struct usb_device_descriptor {
|
||||
uint8_t bLength; /* /< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType;/* /< DEVICE Descriptor Type. */
|
||||
uint16_t bcdUSB; /* /< USB specification release number (BCD). */
|
||||
uint8_t bDeviceClass; /* /< Class code. */
|
||||
uint8_t bDeviceSubClass;/* /< Subclass code. */
|
||||
uint8_t bDeviceProtocol;/* /< Protocol code. */
|
||||
uint8_t bMaxPacketSize0;/* /< Maximum packet size for EP0 (8, 16, 32, 64). */
|
||||
uint16_t idVendor; /* /< USB Vendor ID. */
|
||||
uint16_t idProduct; /* /< USB Product ID. */
|
||||
uint16_t bcdDevice; /* /< Device Release Number (BCD). */
|
||||
uint8_t iManufacturer; /* /< Index of manufacturer string descriptor. */
|
||||
uint8_t iProduct; /* /< Index of product string descriptor. */
|
||||
uint8_t iSerialNumber; /* /< Index of string descriptor containing serial #. */
|
||||
uint8_t bNumConfigurations; /* /< Number of possible configurations. */
|
||||
uint8_t bLength; /**< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType; /**< DEVICE Descriptor Type. */
|
||||
uint16_t bcdUSB; /**< USB specification release number (BCD). */
|
||||
uint8_t bDeviceClass; /**< Class code. */
|
||||
uint8_t bDeviceSubClass; /**< Subclass code. */
|
||||
uint8_t bDeviceProtocol; /**< Protocol code. */
|
||||
uint8_t bMaxPacketSize0; /**< Maximum packet size for EP0 (8, 16, 32, 64). */
|
||||
uint16_t idVendor; /**< USB Vendor ID. */
|
||||
uint16_t idProduct; /**< USB Product ID. */
|
||||
uint16_t bcdDevice; /**< Device Release Number (BCD). */
|
||||
uint8_t iManufacturer; /**< Index of manufacturer string descriptor. */
|
||||
uint8_t iProduct; /**< Index of product string descriptor. */
|
||||
uint8_t iSerialNumber; /**< Index of string descriptor containing serial #. */
|
||||
uint8_t bNumConfigurations; /**< Number of possible configurations. */
|
||||
};
|
||||
|
||||
/** USB Configuration Descriptor. See USB 1.1 spec, pp. 199 - 200 */
|
||||
struct usb_config_descriptor {
|
||||
uint8_t bLength; /* /< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType;/* /< CONFIGURATION descriptor type. */
|
||||
uint16_t wTotalLength; /* /< Combined total length of all descriptors. */
|
||||
uint8_t bNumInterfaces; /* /< Number of interfaces in this configuration. */
|
||||
uint8_t bConfigurationValue; /* /< Value used to select this configuration. */
|
||||
uint8_t iConfiguration; /* /< Index of configuration string descriptor. */
|
||||
uint8_t bmAttributes; /* /< Configuration characteristics. */
|
||||
uint8_t MaxPower; /* /< Maximum power consumption in 2 mA units. */
|
||||
uint8_t bLength; /**< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType; /**< CONFIGURATION descriptor type. */
|
||||
uint16_t wTotalLength; /**< Combined total length of all descriptors. */
|
||||
uint8_t bNumInterfaces; /**< Number of interfaces in this configuration. */
|
||||
uint8_t bConfigurationValue; /**< Value used to select this configuration. */
|
||||
uint8_t iConfiguration; /**< Index of configuration string descriptor. */
|
||||
uint8_t bmAttributes; /**< Configuration characteristics. */
|
||||
uint8_t MaxPower; /**< Maximum power consumption in 2 mA units. */
|
||||
};
|
||||
|
||||
/** USB Interface Descriptor. See USB 1.1 spec, pp. 201 - 203 */
|
||||
struct usb_interface_descriptor {
|
||||
uint8_t bLength; /* /< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType;/* /< INTERFACE descriptor type. */
|
||||
uint8_t bInterfaceNumber; /* /< Interface number. */
|
||||
uint8_t bAlternateSetting; /* /< Value used to select alternate setting. */
|
||||
uint8_t bNumEndpoints; /* /< Number of endpoints used by this interface. */
|
||||
uint8_t bInterfaceClass;/* /< Class code. */
|
||||
uint8_t bInterfaceSubclass; /* /< Subclass code. */
|
||||
uint8_t bInterfaceProtocol; /* /< Protocol code. */
|
||||
uint8_t iInterface; /* /< Index of interface string descriptor. */
|
||||
uint8_t bLength; /**< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType; /**< INTERFACE descriptor type. */
|
||||
uint8_t bInterfaceNumber; /**< Interface number. */
|
||||
uint8_t bAlternateSetting; /**< Value used to select alternate setting. */
|
||||
uint8_t bNumEndpoints; /**< Number of endpoints used by this interface. */
|
||||
uint8_t bInterfaceClass; /**< Class code. */
|
||||
uint8_t bInterfaceSubclass; /**< Subclass code. */
|
||||
uint8_t bInterfaceProtocol; /**< Protocol code. */
|
||||
uint8_t iInterface; /**< Index of interface string descriptor. */
|
||||
};
|
||||
|
||||
/** USB Endpoint Descriptor. See USB 1.1 spec, pp. 203 - 204 */
|
||||
struct usb_endpoint_descriptor {
|
||||
uint8_t bLength; /* /< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType;/* /< ENDPOINT descriptor type. */
|
||||
uint8_t bEndpointAddress; /* /< Endpoint Address: USB 1.1 spec, table 9-10. */
|
||||
uint8_t bmAttributes; /* /< Endpoint Attributes: USB 1.1 spec, table 9-10. */
|
||||
uint16_t wMaxPacketSize;/* /< Maximum packet size for this endpoint. */
|
||||
uint8_t bInterval; /* /< Polling interval (in ms) for this endpoint. */
|
||||
uint8_t bLength; /**< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType; /**< ENDPOINT descriptor type. */
|
||||
uint8_t bEndpointAddress; /**< Endpoint Address: USB 1.1 spec, table 9-10. */
|
||||
uint8_t bmAttributes; /**< Endpoint Attributes: USB 1.1 spec, table 9-10. */
|
||||
uint16_t wMaxPacketSize; /**< Maximum packet size for this endpoint. */
|
||||
uint8_t bInterval; /**< Polling interval (in ms) for this endpoint. */
|
||||
};
|
||||
|
||||
/** USB Language Descriptor. See USB 1.1 spec, pp. 204 - 205 */
|
||||
struct usb_language_descriptor {
|
||||
uint8_t bLength; /* /< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType;/* /< STRING descriptor type. */
|
||||
uint16_t wLANGID[]; /* /< LANGID codes. */
|
||||
uint8_t bLength; /**< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType; /**< STRING descriptor type. */
|
||||
uint16_t wLANGID[]; /**< LANGID codes. */
|
||||
};
|
||||
|
||||
/** USB String Descriptor. See USB 1.1 spec, pp. 204 - 205 */
|
||||
struct usb_string_descriptor {
|
||||
uint8_t bLength; /* /< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType;/* /< STRING descriptor type. */
|
||||
uint16_t bString[]; /* /< UNICODE encoded string. */
|
||||
uint8_t bLength; /**< Size of this descriptor in bytes. */
|
||||
uint8_t bDescriptorType; /**< STRING descriptor type. */
|
||||
uint16_t bString[]; /**< UNICODE encoded string. */
|
||||
};
|
||||
|
||||
/********************** USB Control Endpoint 0 related *********************/
|
||||
|
||||
/** USB Control Setup Data. See USB 1.1 spec, pp. 183 - 185 */
|
||||
struct setup_data {
|
||||
uint8_t bmRequestType; /* /< Characteristics of a request. */
|
||||
uint8_t bRequest; /* /< Specific request. */
|
||||
uint16_t wValue; /* /< Field that varies according to request. */
|
||||
uint16_t wIndex; /* /< Field that varies according to request. */
|
||||
uint16_t wLength; /* /< Number of bytes to transfer in data stage. */
|
||||
uint8_t bmRequestType; /**< Characteristics of a request. */
|
||||
uint8_t bRequest; /**< Specific request. */
|
||||
uint16_t wValue; /**< Field that varies according to request. */
|
||||
uint16_t wIndex; /**< Field that varies according to request. */
|
||||
uint16_t wLength; /**< Number of bytes to transfer in data stage. */
|
||||
};
|
||||
|
||||
/* External declarations for variables that need to be accessed outside of
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@ void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
|
|||
tms_sequence_end = tms_sequence_end >> 1;
|
||||
}
|
||||
|
||||
OUTB = outb_buffer; /* TCK change here */
|
||||
OUTB = outb_buffer; /* TCK changes here */
|
||||
tdo_data = tdo_data >> 1;
|
||||
OUTB = (outb_buffer | PIN_TCK);
|
||||
|
||||
|
|
@ -183,7 +183,7 @@ void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset)
|
|||
tms_sequence_end = tms_sequence_end >> 1;
|
||||
}
|
||||
|
||||
OUTB = outb_buffer; /* TCK change here */
|
||||
OUTB = outb_buffer; /* TCK changes here */
|
||||
for (k = 0; k < delay_scan_in; k++)
|
||||
;
|
||||
tdo_data = tdo_data >> 1;
|
||||
|
|
@ -662,7 +662,7 @@ void jtag_slow_clock_tms(uint8_t count, uint8_t sequence)
|
|||
* Get current JTAG signal states.
|
||||
*
|
||||
* @return a 16-bit integer where the most-significant byte contains the state
|
||||
* of the JTAG input signals and the least-significant byte cotains the state
|
||||
* of the JTAG input signals and the least-significant byte contains the state
|
||||
* of the JTAG output signals.
|
||||
*/
|
||||
uint16_t jtag_get_signals(void)
|
||||
|
|
|
|||
|
|
@ -123,14 +123,14 @@ enum ulink_delay_type {
|
|||
* The last command sets #needs_postprocessing to true.
|
||||
*/
|
||||
struct ulink_cmd {
|
||||
uint8_t id; /* /< ULINK command ID */
|
||||
uint8_t id; /**< ULINK command ID */
|
||||
|
||||
uint8_t *payload_out; /* /< OUT direction payload data */
|
||||
uint8_t payload_out_size; /* /< OUT direction payload size for this command */
|
||||
uint8_t *payload_out; /**< OUT direction payload data */
|
||||
uint8_t payload_out_size; /**< OUT direction payload size for this command */
|
||||
|
||||
uint8_t *payload_in_start; /* /< Pointer to first element of IN payload array */
|
||||
uint8_t *payload_in; /* /< Pointer where IN payload shall be stored */
|
||||
uint8_t payload_in_size;/* /< IN direction payload size for this command */
|
||||
uint8_t *payload_in_start; /**< Pointer to first element of IN payload array */
|
||||
uint8_t *payload_in; /**< Pointer where IN payload shall be stored */
|
||||
uint8_t payload_in_size; /**< IN direction payload size for this command */
|
||||
|
||||
/** Indicates if this command needs post-processing */
|
||||
bool needs_postprocessing;
|
||||
|
|
@ -141,7 +141,7 @@ struct ulink_cmd {
|
|||
/** Pointer to corresponding OpenOCD command for post-processing */
|
||||
struct jtag_command *cmd_origin;
|
||||
|
||||
struct ulink_cmd *next; /* /< Pointer to next command (linked list) */
|
||||
struct ulink_cmd *next; /**< Pointer to next command (linked list) */
|
||||
};
|
||||
|
||||
/** Describes one driver instance */
|
||||
|
|
@ -150,15 +150,15 @@ struct ulink {
|
|||
struct libusb_device_handle *usb_device_handle;
|
||||
enum ulink_type type;
|
||||
|
||||
int delay_scan_in; /* /< Delay value for SCAN_IN commands */
|
||||
int delay_scan_out; /* /< Delay value for SCAN_OUT commands */
|
||||
int delay_scan_io; /* /< Delay value for SCAN_IO commands */
|
||||
int delay_clock_tck; /* /< Delay value for CLOCK_TMS commands */
|
||||
int delay_clock_tms; /* /< Delay value for CLOCK_TCK commands */
|
||||
int delay_scan_in; /**< Delay value for SCAN_IN commands */
|
||||
int delay_scan_out; /**< Delay value for SCAN_OUT commands */
|
||||
int delay_scan_io; /**< Delay value for SCAN_IO commands */
|
||||
int delay_clock_tck; /**< Delay value for CLOCK_TMS commands */
|
||||
int delay_clock_tms; /**< Delay value for CLOCK_TCK commands */
|
||||
|
||||
int commands_in_queue; /* /< Number of commands in queue */
|
||||
struct ulink_cmd *queue_start; /* /< Pointer to first command in queue */
|
||||
struct ulink_cmd *queue_end; /* /< Pointer to last command in queue */
|
||||
int commands_in_queue; /**< Number of commands in queue */
|
||||
struct ulink_cmd *queue_start; /**< Pointer to first command in queue */
|
||||
struct ulink_cmd *queue_end; /**< Pointer to last command in queue */
|
||||
};
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
|
@ -517,8 +517,8 @@ void ulink_print_signal_states(uint8_t input_signals, uint8_t output_signals)
|
|||
(input_signals & SIGNAL_TDO ? 1 : 0),
|
||||
(output_signals & SIGNAL_TMS ? 1 : 0),
|
||||
(output_signals & SIGNAL_TCK ? 1 : 0),
|
||||
(output_signals & SIGNAL_TRST ? 0 : 1),/* TRST and RESET are inverted */
|
||||
(output_signals & SIGNAL_RESET ? 0 : 1)); /* by hardware */
|
||||
(output_signals & SIGNAL_TRST ? 0 : 1), /* Inverted by hardware */
|
||||
(output_signals & SIGNAL_RESET ? 0 : 1)); /* Inverted by hardware */
|
||||
}
|
||||
|
||||
/**************** OpenULINK command generation helper functions ***************/
|
||||
|
|
|
|||
Loading…
Reference in New Issue