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riscv-openocd
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fix crash when connecting GDB to powered down target 

git-svn-id: svn://svn.berlios.de/openocd/trunk@1044 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2008-10-13 12:16:44 +00:00
parent f7458c6b19
commit b6caf057eb
2 changed files with 8 additions and 7 deletions
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3
src/target/arm11.c
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@ -1642,7 +1642,7 @@ int arm11_set_reg(reg_t *reg, u8 *buf)
return ERROR_OK; return ERROR_OK;
} }
void arm11_build_reg_cache(target_t *target) int arm11_build_reg_cache(target_t *target)
{ {
arm11_common_t *arm11 = target->arch_info; arm11_common_t *arm11 = target->arch_info;
@ -1700,6 +1700,7 @@ void arm11_build_reg_cache(target_t *target)
rs->def_index = i; rs->def_index = i;
rs->target = target; rs->target = target;
} }
return ERROR_OK;
} }
int arm11_handle_bool(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, bool * var, char * name) int arm11_handle_bool(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, bool * var, char * name)

12
src/target/arm11.h
View File

@ -77,7 +77,7 @@ typedef struct arm11_common_s
size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */ size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */ size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */
enum arm11_debug_version enum arm11_debug_version
debug_version; /**< ARM debug architecture from DIDR */ debug_version; /**< ARM debug architecture from DIDR */
/*@}*/ /*@}*/
@ -109,8 +109,8 @@ typedef struct arm11_common_s
/** /**
* ARM11 DBGTAP instructions * ARM11 DBGTAP instructions
* *
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0301f/I1006229.html * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0301f/I1006229.html
*/ */
enum arm11_instructions enum arm11_instructions
@ -191,7 +191,7 @@ int arm11_soft_reset_halt(struct target_s *target);
/* target register access for gdb */ /* target register access for gdb */
int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size); int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size);
/* target memory access /* target memory access
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size> * count: number of items of <size>
*/ */
@ -203,7 +203,7 @@ int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8
int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum); int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
/* target break-/watchpoint control /* target break-/watchpoint control
* rw: 0 = write, 1 = read, 2 = access * rw: 0 = write, 1 = read, 2 = access
*/ */
int arm11_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int arm11_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
@ -220,7 +220,7 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
int arm11_quit(void); int arm11_quit(void);
/* helpers */ /* helpers */
void arm11_build_reg_cache(target_t *target); int arm11_build_reg_cache(target_t *target);
int arm11_set_reg(reg_t *reg, u8 *buf); int arm11_set_reg(reg_t *reg, u8 *buf);
int arm11_get_reg(reg_t *reg); int arm11_get_reg(reg_t *reg);