arm11: use register_commands()
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90d09e35e4
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@ -1565,44 +1565,71 @@ static int arm11_mcr(struct target *target, int cpnum,
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return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
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return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
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}
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}
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static const struct command_registration arm11_mw_command_handlers[] = {
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{
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.name = "burst",
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.handler = &arm11_handle_bool_memwrite_burst,
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.mode = COMMAND_ANY,
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.help = "Enable/Disable non-standard but fast burst mode"
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" (default: enabled)",
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},
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{
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.name = "error_fatal",
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.handler = &arm11_handle_bool_memwrite_error_fatal,
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.mode = COMMAND_ANY,
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.help = "Terminate program if transfer error was found"
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" (default: enabled)",
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},
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COMMAND_REGISTRATION_DONE
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};
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static const struct command_registration arm11_any_command_handlers[] = {
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{
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/* "hardware_step" is only here to check if the default
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* simulate + breakpoint implementation is broken.
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* TEMPORARY! NOT DOCUMENTED! */
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.name = "hardware_step",
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.handler = &arm11_handle_bool_hardware_step,
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.mode = COMMAND_ANY,
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.help = "DEBUG ONLY - Hardware single stepping"
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" (default: disabled)",
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.usage = "(enable|disable)",
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},
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{
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.name = "memwrite",
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.mode = COMMAND_ANY,
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.help = "memwrite command group",
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.chain = arm11_mw_command_handlers,
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},
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{
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.name = "step_irq_enable",
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.handler = &arm11_handle_bool_step_irq_enable,
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.mode = COMMAND_ANY,
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.help = "Enable interrupts while stepping"
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" (default: disabled)",
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},
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{
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.name = "vcr",
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.handler = &arm11_handle_vcr,
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.mode = COMMAND_ANY,
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.help = "Control (Interrupt) Vector Catch Register",
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},
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COMMAND_REGISTRATION_DONE
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};
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static const struct command_registration arm11_command_handlers[] = {
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{
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.name = "arm11",
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.mode = COMMAND_ANY,
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.help = "ARM11 command group",
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.chain = arm11_any_command_handlers,
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},
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COMMAND_REGISTRATION_DONE
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};
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static int arm11_register_commands(struct command_context *cmd_ctx)
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static int arm11_register_commands(struct command_context *cmd_ctx)
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{
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{
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struct command *top_cmd, *mw_cmd;
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armv4_5_register_commands(cmd_ctx);
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armv4_5_register_commands(cmd_ctx);
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etm_register_commands(cmd_ctx);
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top_cmd = COMMAND_REGISTER(cmd_ctx, NULL, "arm11",
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return register_commands(cmd_ctx, NULL, arm11_command_handlers);
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NULL, COMMAND_ANY, NULL);
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/* "hardware_step" is only here to check if the default
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* simulate + breakpoint implementation is broken.
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* TEMPORARY! NOT DOCUMENTED!
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*/
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COMMAND_REGISTER(cmd_ctx, top_cmd, "hardware_step",
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arm11_handle_bool_hardware_step, COMMAND_ANY,
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"DEBUG ONLY - Hardware single stepping"
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" (default: disabled)");
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mw_cmd = COMMAND_REGISTER(cmd_ctx, top_cmd, "memwrite",
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NULL, COMMAND_ANY, NULL);
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COMMAND_REGISTER(cmd_ctx, mw_cmd, "burst",
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arm11_handle_bool_memwrite_burst, COMMAND_ANY,
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"Enable/Disable non-standard but fast burst mode"
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" (default: enabled)");
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COMMAND_REGISTER(cmd_ctx, mw_cmd, "error_fatal",
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arm11_handle_bool_memwrite_error_fatal, COMMAND_ANY,
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"Terminate program if transfer error was found"
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" (default: enabled)");
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COMMAND_REGISTER(cmd_ctx, top_cmd, "step_irq_enable",
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arm11_handle_bool_step_irq_enable, COMMAND_ANY,
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"Enable interrupts while stepping"
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" (default: disabled)");
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COMMAND_REGISTER(cmd_ctx, top_cmd, "vcr",
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arm11_handle_vcr, COMMAND_ANY,
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"Control (Interrupt) Vector Catch Register");
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return etm_register_commands(cmd_ctx);
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}
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}
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/** Holds methods for ARM11xx targets. */
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/** Holds methods for ARM11xx targets. */
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