tcl: icepick: add icepick_d_set_coreid
this is just to avoid open coding that in icepick_d_tapenable. Cleanup only, no functional changes. Change-Id: Iabd20291b7bdd95957afa1c74f52171789201227 Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-on: http://openocd.zylin.com/2624 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
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@ -15,7 +15,7 @@ if { [info exists M3_DAP_TAPID] } {
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set _M3_DAP_TAPID 0x4b6b902f
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}
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jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
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jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
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jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11 0"
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#
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# Main DAP
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@ -26,7 +26,7 @@ if { [info exists DAP_TAPID] } {
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set _DAP_TAPID 0x4b6b902f
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}
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jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
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jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
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jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12 0"
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#
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# ICEpick-D (JTAG route controller)
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@ -457,7 +457,7 @@ if { [info exists M3_DAP_TAPID] } {
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set _M3_DAP_TAPID 0x4b6b902f
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}
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jtag newtap $_CHIPNAME $M3_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
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jtag configure $M3_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 11"
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jtag configure $M3_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 11 0"
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#
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# DebugSS DAP
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@ -468,7 +468,7 @@ if { [info exists DAP_TAPID] } {
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set _DAP_TAPID 0x46b6902f
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}
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jtag newtap $_CHIPNAME $DEBUGSS_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
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jtag configure $DEBUGSS_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 12"
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jtag configure $DEBUGSS_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 12 0"
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#
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# ICEpick-D (JTAG route controller)
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@ -107,11 +107,17 @@ proc icepick_c_tapenable {jrc port} {
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runtest 10
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}
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# jrc == TAP name for the ICEpick
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# coreid== core id number 0..15 (not same as port number!)
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proc icepick_d_set_coreid {jrc coreid } {
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icepick_c_router $jrc 1 0x6 $coreid 0x2008
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}
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# jrc == TAP name for the ICEpick
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# port == a port number, 0..15
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# Follow the sequence described in
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# http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf
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proc icepick_d_tapenable {jrc port} {
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proc icepick_d_tapenable {jrc port coreid} {
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# First CONNECT to the ICEPick
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icepick_c_connect $jrc
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icepick_c_setup $jrc
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@ -120,8 +126,7 @@ proc icepick_d_tapenable {jrc port} {
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icepick_c_router $jrc 1 0x2 $port 0x2108
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# Set 4 bit core ID to the Cortex-A
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irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE
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drscan $jrc 32 0xe0002008 -endstate DRPAUSE
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icepick_d_set_coreid $jrc $coreid
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# Enter the bypass state
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irscan $jrc [CONST IF_BYPASS] -endstate RUN/IDLE
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