Karl RobinSod <karl.robinsod@gmail.com> added lpc288x support. Some work remaining, committing for test/collaboration purposes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@597 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
parent
6cf3f38acf
commit
ae75056742
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@ -4,6 +4,6 @@ METASOURCES = AUTO
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noinst_LIBRARIES = libflash.a
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libflash_a_SOURCES = flash.c lpc2000.c cfi.c non_cfi.c at91sam7.c str7x.c str9x.c nand.c lpc3180_nand_controller.c \
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stellaris.c str9xpec.c stm32x.c tms470.c ecos.c \
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s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c s3c2440_nand.c s3c2443_nand.c
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s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c s3c2440_nand.c s3c2443_nand.c lpc288x.c
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noinst_HEADERS = flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h str7x.h str9x.h nand.h lpc3180_nand_controller.h \
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stellaris.h str9xpec.h stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h
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stellaris.h str9xpec.h stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h
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@ -69,6 +69,7 @@ extern flash_driver_t str9xpec_flash;
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extern flash_driver_t stm32x_flash;
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extern flash_driver_t tms470_flash;
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extern flash_driver_t ecosflash_flash;
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extern flash_driver_t lpc288x_flash;
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flash_driver_t *flash_drivers[] =
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{
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@ -82,6 +83,7 @@ flash_driver_t *flash_drivers[] =
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&stm32x_flash,
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&tms470_flash,
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&ecosflash_flash,
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&lpc288x_flash,
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NULL,
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};
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@ -0,0 +1,565 @@
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/***************************************************************************
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* Copyright (C) 2008 by *
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* Karl RobinSod <karl.robinsod@gmail.com> *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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/***************************************************************************
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* There are some things to notice
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*
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* You need to unprotect flash sectors each time you connect the OpenOCD
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* Dumping 1MB takes about 60 Seconds
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* Full erase (sectors 0-22 inclusive) takes 2-4 seconds
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* Writing 1MB takes 88 seconds
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*
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "lpc288x.h"
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#include "flash.h"
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#include "target.h"
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#include "log.h"
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#include "binarybuffer.h"
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#include "types.h"
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#define LOAD_TIMER_ERASE 0
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#define LOAD_TIMER_WRITE 1
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#define FLASH_PAGE_SIZE 512
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/* LPC288X control registers */
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#define DBGU_CIDR 0x8000507C
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/* LPC288X flash registers */
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#define F_CTRL 0x80102000 /* Flash control register R/W 0x5 */
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#define F_STAT 0x80102004 /* Flash status register RO 0x45 */
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#define F_PROG_TIME 0x80102008 /* Flash program time register R/W 0 */
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#define F_WAIT 0x80102010 /* Flash read wait state register R/W 0xC004 */
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#define F_CLK_TIME 0x8010201C /* Flash clock divider for 66 kHz generation R/W 0 */
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#define F_INTEN_CLR 0x80102FD8 /* Clear interrupt enable bits WO - */
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#define F_INTEN_SET 0x80102FDC /* Set interrupt enable bits WO - */
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#define F_INT_STAT 0x80102FE0 /* Interrupt status bits RO 0 */
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#define F_INTEN 0x80102FE4 /* Interrupt enable bits RO 0 */
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#define F_INT_CLR 0x80102FE8 /* Clear interrupt status bits WO */
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#define F_INT_SET 0x80102FEC /* Set interrupt status bits WO - */
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#define FLASH_PD 0x80005030 /* Allows turning off the Flash memory for power savings. R/W 1*/
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#define FLASH_INIT 0x80005034 /* Monitors Flash readiness, such as recovery from Power Down mode. R/W -*/
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/* F_CTRL bits */
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#define FC_CS 0x0001
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#define FC_FUNC 0x0002
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#define FC_WEN 0x0004
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#define FC_RD_LATCH 0x0020
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#define FC_PROTECT 0x0080
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#define FC_SET_DATA 0x0400
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#define FC_RSSL 0x0800
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#define FC_PROG_REQ 0x1000
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#define FC_CLR_BUF 0x4000
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#define FC_LOAD_REQ 0x8000
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/* F_STAT bits */
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#define FS_DONE 0x0001
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#define FS_PROGGNT 0x0002
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#define FS_RDY 0x0004
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#define FS_ERR 0x0020
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/* F_PROG_TIME */
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#define FPT_TIME_MASK 0x7FFF
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#define FPT_ENABLE 0x8000
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/* F_WAIT */
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#define FW_WAIT_STATES_MASK 0x00FF
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#define FW_SET_MASK 0xC000
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/* F_CLK_TIME */
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#define FCT_CLK_DIV_MASK 0x0FFF
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int lpc288x_register_commands(struct command_context_s *cmd_ctx);
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int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
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int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
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int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
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int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
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int lpc288x_probe(struct flash_bank_s *bank);
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int lpc288x_auto_probe(struct flash_bank_s *bank);
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int lpc288x_erase_check(struct flash_bank_s *bank);
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int lpc288x_protect_check(struct flash_bank_s *bank);
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int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
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void lpc288x_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
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u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
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void lpc288x_load_timer(int erase, struct target_s *target);
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void lpc288x_set_flash_clk(struct flash_bank_s *bank);
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u32 lpc288x_system_ready(struct flash_bank_s *bank);
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int lpc288x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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flash_driver_t lpc288x_flash =
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{
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.name = "lpc288x",
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.register_commands = lpc288x_register_commands,
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.flash_bank_command = lpc288x_flash_bank_command,
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.erase = lpc288x_erase,
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.protect = lpc288x_protect,
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.write = lpc288x_write,
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.probe = lpc288x_probe,
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.auto_probe = lpc288x_probe,
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.erase_check = lpc288x_erase_check,
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.protect_check = lpc288x_protect_check,
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.info = lpc288x_info
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};
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int lpc288x_register_commands(struct command_context_s *cmd_ctx)
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{
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return ERROR_OK;
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}
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u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
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{
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u32 status;
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target_t *target = bank->target;
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do
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{
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usleep(1000);
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timeout--;
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target_read_u32(target, F_STAT, &status);
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}while (((status & FS_DONE) == 0) && timeout);
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if(timeout == 0)
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{
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LOG_DEBUG("Timedout!");
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return ERROR_FLASH_OPERATION_FAILED;
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}
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return ERROR_OK;
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}
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/* Read device id register and fill in driver info structure */
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int lpc288x_read_part_info(struct flash_bank_s *bank)
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{
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lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
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target_t *target = bank->target;
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u32 cidr, status;
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int sectornum;
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int i = 0;
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u32 offset;
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if (lpc288x_info->cidr == 0x0102100A)
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return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
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/* Read and parse chip identification register */
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target_read_u32(target, DBGU_CIDR, &cidr);
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if (cidr != 0x0102100A)
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{
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LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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lpc288x_info->cidr = cidr;
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lpc288x_info->sector_size_break = 0x000F0000;
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lpc288x_info->target_name = "LPC288x";
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/* setup the sector info... */
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offset = bank->base;
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bank->num_sectors = 23;
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bank->sectors = malloc(sizeof(flash_sector_t) * 23);
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for (i = 0; i < 15; i++)
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{
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bank->sectors[i].offset = offset;
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bank->sectors[i].size = 64 * 1024;
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offset += bank->sectors[i].size;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_protected = 1;
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}
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for (i = 15; i < 23; i++)
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{
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bank->sectors[i].offset = offset;
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bank->sectors[i].size = 8 * 1024;
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offset += bank->sectors[i].size;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_protected = 1;
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}
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return ERROR_OK;
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}
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int lpc288x_protect_check(struct flash_bank_s *bank)
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{
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return ERROR_OK;
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}
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/* flash_bank LPC288x 0 0 0 0 <target#> <cclk>
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*/
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int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
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{
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lpc288x_flash_bank_t *lpc288x_info;
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int i;
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if (argc < 6)
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{
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LOG_WARNING("incomplete flash_bank LPC288x configuration");
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return ERROR_FLASH_BANK_INVALID;
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}
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lpc288x_info = malloc(sizeof(lpc288x_flash_bank_t));
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bank->driver_priv = lpc288x_info;
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/* part wasn't probed for info yet */
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lpc288x_info->cidr = 0;
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lpc288x_info->cclk = strtoul(args[6], NULL, 0);
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return ERROR_OK;
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}
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/*
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The frequency is the AHB clock frequency divided by (CLK_DIV ×
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3) + 1. This must be programmed such that the Flash
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Programming clock frequency is 66 kHz ± 20%.
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AHB = 12 MHz ?
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12000000/66000 = 182
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CLK_DIV = 60 ?
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*/
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void lpc288x_set_flash_clk(struct flash_bank_s *bank)
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{
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u32 clk_time;
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lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
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clk_time = (lpc288x_info->cclk / 66000) / 3;
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target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN );
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target_write_u32(bank->target, F_CLK_TIME, clk_time);
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}
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/*
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AHB tcyc (in ns) 83 ns
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LOAD_TIMER_ERASE FPT_TIME = ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
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= 9412 (9500) (AN10548 9375)
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LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
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= 23 (75) (AN10548 72 - is this wrong?)
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TODO: Sort out timing calcs ;)
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*/
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void lpc288x_load_timer(int erase, struct target_s *target)
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{
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if(erase == LOAD_TIMER_ERASE)
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{
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target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 9500);
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}
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else
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{
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target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 75);
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}
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}
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u32 lpc288x_system_ready(struct flash_bank_s *bank)
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{
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lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
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if (lpc288x_info->cidr == 0)
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{
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return ERROR_FLASH_BANK_NOT_PROBED;
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}
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if (bank->target->state != TARGET_HALTED)
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{
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return ERROR_TARGET_NOT_HALTED;
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}
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return ERROR_OK;
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}
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int lpc288x_erase_check(struct flash_bank_s *bank)
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{
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u32 buffer, test_bytes;
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u32 addr, sector, i, status = lpc288x_system_ready(bank); /* probed? halted? */
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if(status != ERROR_OK)
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{
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LOG_INFO("Processor not halted/not probed");
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return status;
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}
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return ERROR_OK;
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}
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int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
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{
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u32 status;
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int sector;
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target_t *target = bank->target;
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status = lpc288x_system_ready(bank); /* probed? halted? */
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if(status != ERROR_OK)
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{
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return status;
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}
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if ((first < 0) || (last < first) || (last >= bank->num_sectors))
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{
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LOG_INFO("Bad sector range");
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return ERROR_FLASH_SECTOR_INVALID;
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}
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/* Configure the flash controller timing */
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lpc288x_set_flash_clk(bank);
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for (sector = first; sector <= last; sector++)
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{
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if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
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{
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return ERROR_FLASH_OPERATION_FAILED;
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}
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lpc288x_load_timer(LOAD_TIMER_ERASE,target);
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target_write_u32( target,
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bank->sectors[sector].offset,
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0x00);
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target_write_u32( target,
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F_CTRL,
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FC_PROG_REQ |
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FC_PROTECT |
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FC_CS);
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}
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if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
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{
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return ERROR_FLASH_OPERATION_FAILED;
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}
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return ERROR_OK;
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}
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int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
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{
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u8 page_buffer[FLASH_PAGE_SIZE];
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u32 i, status, source_offset,dest_offset;
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target_t *target = bank->target;
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u32 bytes_remaining = count;
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u32 first_sector, last_sector, sector, page;
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/* probed? halted? */
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status = lpc288x_system_ready(bank);
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if(status != ERROR_OK)
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{
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return status;
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}
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/* Initialise search indices */
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first_sector = last_sector = 0xffffffff;
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/* validate the write range... */
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for(i = 0; i < bank->num_sectors; i++)
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{
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if((offset >= bank->sectors[i].offset) &&
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(offset < (bank->sectors[i].offset + bank->sectors[i].size)) &&
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(first_sector == 0xffffffff))
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{
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first_sector = i;
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/* all writes must start on a sector boundary... */
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if (offset % bank->sectors[i].size)
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{
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LOG_INFO("offset 0x%x breaks required alignment 0x%x", offset, bank->sectors[i].size);
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return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
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}
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}
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if(((offset + count) > bank->sectors[i].offset) &&
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((offset + count) <= (bank->sectors[i].offset + bank->sectors[i].size)) &&
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(last_sector == 0xffffffff))
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{
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last_sector = i;
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}
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}
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/* Range check... */
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if (first_sector == 0xffffffff || last_sector == 0xffffffff)
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{
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LOG_INFO("Range check failed %x %x", offset, count);
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return ERROR_FLASH_DST_OUT_OF_BANK;
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}
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/* Configure the flash controller timing */
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lpc288x_set_flash_clk(bank);
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/* initialise the offsets */
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source_offset = 0;
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dest_offset = 0;
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for (sector=first_sector; sector<=last_sector; sector++)
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{
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for(page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++)
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{
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if(bytes_remaining == 0)
|
||||
{
|
||||
count = 0;
|
||||
memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
|
||||
}
|
||||
else if (bytes_remaining < FLASH_PAGE_SIZE)
|
||||
{
|
||||
count = bytes_remaining;
|
||||
memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
|
||||
memcpy(page_buffer, &buffer[source_offset], count);
|
||||
}
|
||||
else
|
||||
{
|
||||
count = FLASH_PAGE_SIZE;
|
||||
memcpy(page_buffer, &buffer[source_offset], count);
|
||||
}
|
||||
|
||||
/* Wait for flash to become ready */
|
||||
if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
|
||||
{
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
|
||||
/* fill flash data latches with 1's */
|
||||
target_write_u32(target, F_CTRL,
|
||||
FC_CS |
|
||||
FC_SET_DATA |
|
||||
FC_WEN |
|
||||
FC_FUNC );
|
||||
|
||||
target_write_u32(target, F_CTRL,
|
||||
FC_CS |
|
||||
FC_WEN |
|
||||
FC_FUNC );
|
||||
/*would be better to use the clean target_write_buffer() interface but
|
||||
it seems not to be a LOT slower....
|
||||
bulk_write_memory() is no quicker :(*/
|
||||
#if 1
|
||||
if (target->type->write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
|
||||
{
|
||||
LOG_ERROR("Write failed s %x p %x", sector, page);
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
#else
|
||||
if(target_write_buffer(target, offset + dest_offset, FLASH_PAGE_SIZE, page_buffer) != ERROR_OK)
|
||||
{
|
||||
LOG_INFO("Write to flash buffer failed");
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
#endif
|
||||
dest_offset += FLASH_PAGE_SIZE;
|
||||
source_offset += count;
|
||||
bytes_remaining -= count;
|
||||
|
||||
lpc288x_load_timer(LOAD_TIMER_WRITE, target);
|
||||
|
||||
target_write_u32( target,
|
||||
F_CTRL,
|
||||
FC_PROG_REQ |
|
||||
FC_PROTECT |
|
||||
FC_FUNC |
|
||||
FC_CS);
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
||||
int lpc288x_probe(struct flash_bank_s *bank)
|
||||
{
|
||||
/* we only deal with LPC2888 so flash config is fixed
|
||||
*/
|
||||
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
|
||||
int retval;
|
||||
|
||||
if (lpc288x_info->cidr != 0)
|
||||
{
|
||||
return ERROR_OK; /* already probed */
|
||||
}
|
||||
|
||||
if (bank->target->state != TARGET_HALTED)
|
||||
{
|
||||
return ERROR_TARGET_NOT_HALTED;
|
||||
}
|
||||
|
||||
retval = lpc288x_read_part_info(bank);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
||||
int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size)
|
||||
{
|
||||
snprintf(buf, buf_size, "lpc288x flash driver");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
|
||||
{
|
||||
int lockregion, status;
|
||||
u32 value;
|
||||
target_t *target = bank->target;
|
||||
|
||||
/* probed? halted? */
|
||||
status = lpc288x_system_ready(bank);
|
||||
if(status != ERROR_OK)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
if ((first < 0) || (last < first) || (last >= bank->num_sectors))
|
||||
{
|
||||
return ERROR_FLASH_SECTOR_INVALID;
|
||||
}
|
||||
|
||||
/* Configure the flash controller timing */
|
||||
lpc288x_set_flash_clk(bank);
|
||||
|
||||
for (lockregion = first; lockregion <= last; lockregion++)
|
||||
{
|
||||
if(set)
|
||||
{
|
||||
/* write an odd value to base addy to protect... */
|
||||
value = 0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* write an even value to base addy to unprotect... */
|
||||
value = 0x00;
|
||||
}
|
||||
target_write_u32( target,
|
||||
bank->sectors[lockregion].offset,
|
||||
value);
|
||||
|
||||
target_write_u32( target,
|
||||
F_CTRL,
|
||||
FC_LOAD_REQ |
|
||||
FC_PROTECT |
|
||||
FC_WEN |
|
||||
FC_FUNC |
|
||||
FC_CS);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2008 by *
|
||||
* Karl RobinSod <karl.robinsod@gmail.com> *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef lpc288x_H
|
||||
#define lpc288x_H
|
||||
|
||||
#include "flash.h"
|
||||
#include "target.h"
|
||||
|
||||
typedef struct lpc288x_flash_bank_s
|
||||
{
|
||||
u32 working_area;
|
||||
u32 working_area_size;
|
||||
|
||||
/* chip id register */
|
||||
u32 cidr;
|
||||
char * target_name;
|
||||
u32 cclk;
|
||||
|
||||
u32 sector_size_break;
|
||||
} lpc288x_flash_bank_t;
|
||||
|
||||
#endif /* lpc288x_H */
|
||||
|
Loading…
Reference in New Issue