rename dbgbuf to progbuf
Change-Id: I29e2192d5ce9d0f13010d8a09bd4ef50f5c8844b Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This commit is contained in:
Parshintsev Anatoly
parent
928f10a537
commit
aded275b70
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@ -24,20 +24,19 @@ int riscv_program_init(struct riscv_program *p, struct target *target)
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for (size_t i = 0; i < RISCV_REGISTER_COUNT; ++i)
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p->writes_xreg[i] = 0;
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for (size_t i = 0; i < RISCV_MAX_DEBUG_BUFFER_SIZE; ++i)
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p->debug_buffer[i] = -1;
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for (size_t i = 0; i < RISCV_MAX_PROGBUF_SIZE; ++i)
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p->progbuf[i] = -1;
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p->execution_result = RISCV_DBGBUF_EXEC_RESULT_NOT_EXECUTED;
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p->execution_result = RISCV_PROGBUF_EXEC_RESULT_NOT_EXECUTED;
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return ERROR_OK;
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}
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int riscv_program_write(struct riscv_program *program)
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{
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for (unsigned i = 0; i < program->instruction_count; ++i) {
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LOG_TARGET_DEBUG(program->target, "debug_buffer[%02x] = DASM(0x%08x)",
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i, program->debug_buffer[i]);
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if (riscv_write_debug_buffer(program->target, i,
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program->debug_buffer[i]) != ERROR_OK)
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LOG_TARGET_DEBUG(program->target, "progbuf[%02x] = DASM(0x%08x)",
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i, program->progbuf[i]);
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if (riscv_write_progbuf(program->target, i, program->progbuf[i]) != ERROR_OK)
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return ERROR_FAIL;
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}
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return ERROR_OK;
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@ -48,7 +47,7 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
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{
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keep_alive();
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p->execution_result = RISCV_DBGBUF_EXEC_RESULT_UNKNOWN_ERROR;
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p->execution_result = RISCV_PROGBUF_EXEC_RESULT_UNKNOWN;
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riscv_reg_t saved_registers[GDB_REGNO_XPR31 + 1];
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for (size_t i = GDB_REGNO_ZERO + 1; i <= GDB_REGNO_XPR31; ++i) {
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if (p->writes_xreg[i]) {
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@ -61,9 +60,9 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
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if (riscv_program_ebreak(p) != ERROR_OK) {
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LOG_TARGET_ERROR(t, "Unable to insert ebreak into program buffer");
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for (size_t i = 0; i < riscv_debug_buffer_size(p->target); ++i)
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for (size_t i = 0; i < riscv_progbuf_size(p->target); ++i)
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LOG_TARGET_ERROR(t, "ram[%02x]: DASM(0x%08" PRIx32 ") [0x%08" PRIx32 "]",
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(int)i, p->debug_buffer[i], p->debug_buffer[i]);
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(int)i, p->progbuf[i], p->progbuf[i]);
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return ERROR_FAIL;
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}
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@ -71,15 +70,15 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
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return ERROR_FAIL;
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uint32_t cmderr;
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if (riscv_execute_debug_buffer(t, &cmderr) != ERROR_OK) {
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if (riscv_execute_progbuf(t, &cmderr) != ERROR_OK) {
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p->execution_result = (cmderr == DM_ABSTRACTCS_CMDERR_EXCEPTION)
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? RISCV_DBGBUF_EXEC_RESULT_EXCEPTION
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: RISCV_DBGBUF_EXEC_RESULT_UNKNOWN_ERROR;
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? RISCV_PROGBUF_EXEC_RESULT_EXCEPTION
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: RISCV_PROGBUF_EXEC_RESULT_UNKNOWN_ERROR;
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/* TODO: what happens if we fail here, but need to restore registers? */
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LOG_TARGET_DEBUG(t, "Unable to execute program %p", p);
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return ERROR_FAIL;
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}
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p->execution_result = RISCV_DBGBUF_EXEC_RESULT_SUCCESS;
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p->execution_result = RISCV_PROGBUF_EXEC_RESULT_SUCCESS;
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for (size_t i = GDB_REGNO_ZERO; i <= GDB_REGNO_XPR31; ++i)
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if (p->writes_xreg[i])
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@ -200,7 +199,7 @@ int riscv_program_ebreak(struct riscv_program *p)
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{
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struct target *target = p->target;
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RISCV_INFO(r);
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if (p->instruction_count == riscv_debug_buffer_size(p->target) &&
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if (p->instruction_count == riscv_progbuf_size(p->target) &&
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r->impebreak) {
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return ERROR_OK;
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}
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@ -214,14 +213,14 @@ int riscv_program_addi(struct riscv_program *p, enum gdb_regno d, enum gdb_regno
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int riscv_program_insert(struct riscv_program *p, riscv_insn_t i)
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{
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if (p->instruction_count >= riscv_debug_buffer_size(p->target)) {
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if (p->instruction_count >= riscv_progbuf_size(p->target)) {
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LOG_TARGET_ERROR(p->target, "Unable to insert program into progbuf, "
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"capacity would be exceeded (progbufsize=%d).",
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(int)riscv_debug_buffer_size(p->target));
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(int)riscv_progbuf_size(p->target));
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return ERROR_FAIL;
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}
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p->debug_buffer[p->instruction_count] = i;
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p->progbuf[p->instruction_count] = i;
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p->instruction_count++;
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return ERROR_OK;
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}
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@ -5,16 +5,17 @@
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#include "riscv.h"
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#define RISCV_MAX_DEBUG_BUFFER_SIZE 32
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#define RISCV_MAX_PROGBUF_SIZE 32
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#define RISCV_REGISTER_COUNT 32
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#define RISCV_DSCRATCH_COUNT 2
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typedef enum {
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RISCV_DBGBUF_EXEC_RESULT_NOT_EXECUTED,
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RISCV_DBGBUF_EXEC_RESULT_EXCEPTION,
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RISCV_DBGBUF_EXEC_RESULT_UNKNOWN_ERROR,
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RISCV_DBGBUF_EXEC_RESULT_SUCCESS
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} riscv_dbgbuf_exec_status_t;
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RISCV_PROGBUF_EXEC_RESULT_NOT_EXECUTED,
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RISCV_PROGBUF_EXEC_RESULT_UNKNOWN,
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RISCV_PROGBUF_EXEC_RESULT_EXCEPTION,
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RISCV_PROGBUF_EXEC_RESULT_UNKNOWN_ERROR,
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RISCV_PROGBUF_EXEC_RESULT_SUCCESS
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} riscv_progbuf_exec_result_t;
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/* The various RISC-V debug specifications all revolve around setting up
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* program buffers and executing them on the target. This structure contains a
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@ -22,7 +23,7 @@ typedef enum {
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struct riscv_program {
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struct target *target;
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uint32_t debug_buffer[RISCV_MAX_DEBUG_BUFFER_SIZE];
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uint32_t progbuf[RISCV_MAX_PROGBUF_SIZE];
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/* Number of 32-bit instructions in the program. */
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size_t instruction_count;
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@ -36,7 +37,7 @@ struct riscv_program {
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/* execution result of the program */
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/* TODO: remove this field. We should make it a parameter to riscv_program_exec */
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riscv_dbgbuf_exec_status_t execution_result;
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riscv_progbuf_exec_result_t execution_result;
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};
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/* Initializes a program with the header. */
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@ -49,12 +49,12 @@ static int riscv013_step_current_hart(struct target *target);
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static int riscv013_on_step(struct target *target);
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static int riscv013_resume_prep(struct target *target);
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static enum riscv_halt_reason riscv013_halt_reason(struct target *target);
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static int riscv013_write_debug_buffer(struct target *target, unsigned int index,
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static int riscv013_write_progbuf(struct target *target, unsigned int index,
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riscv_insn_t d);
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static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned int
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static riscv_insn_t riscv013_read_progbuf(struct target *target, unsigned int
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index);
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static int riscv013_invalidate_cached_debug_buffer(struct target *target);
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static int riscv013_execute_debug_buffer(struct target *target, uint32_t *cmderr);
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static int riscv013_invalidate_cached_progbuf(struct target *target);
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static int riscv013_execute_progbuf(struct target *target, uint32_t *cmderr);
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static void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d);
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static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a);
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static int riscv013_dmi_write_u64_bits(struct target *target);
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@ -1380,7 +1380,7 @@ static int scratch_write64(struct target *target, scratch_mem_t *scratch,
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case SPACE_DMI_PROGBUF:
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dm_write(target, DM_PROGBUF0 + scratch->debug_address, value);
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dm_write(target, DM_PROGBUF1 + scratch->debug_address, value >> 32);
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riscv013_invalidate_cached_debug_buffer(target);
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riscv013_invalidate_cached_progbuf(target);
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break;
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case SPACE_DMI_RAM:
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{
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@ -1919,7 +1919,7 @@ static int examine(struct target *target)
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}
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/* We're here because we're uncertain about the state of the target. That
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* includes our progbuf cache. */
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riscv013_invalidate_cached_debug_buffer(target);
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riscv013_invalidate_cached_progbuf(target);
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dm_write(target, DM_DMCONTROL, DM_DMCONTROL_HARTSELLO |
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DM_DMCONTROL_HARTSELHI | DM_DMCONTROL_DMACTIVE |
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@ -2057,7 +2057,7 @@ static int examine(struct target *target)
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/* Without knowing anything else we can at least mess with the
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* program buffer. */
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r->debug_buffer_size = info->progbufsize;
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r->progbuf_size = info->progbufsize;
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int result = register_read_abstract_with_size(target, NULL, GDB_REGNO_S0, 64);
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if (result == ERROR_OK)
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@ -2757,10 +2757,10 @@ static int init_target(struct command_context *cmd_ctx,
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generic_info->halt_go = &riscv013_halt_go;
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generic_info->on_step = &riscv013_on_step;
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generic_info->halt_reason = &riscv013_halt_reason;
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generic_info->read_debug_buffer = &riscv013_read_debug_buffer;
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generic_info->write_debug_buffer = &riscv013_write_debug_buffer;
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generic_info->execute_debug_buffer = &riscv013_execute_debug_buffer;
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generic_info->invalidate_cached_debug_buffer = &riscv013_invalidate_cached_debug_buffer;
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generic_info->read_progbuf = &riscv013_read_progbuf;
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generic_info->write_progbuf = &riscv013_write_progbuf;
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generic_info->execute_progbuf = &riscv013_execute_progbuf;
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generic_info->invalidate_cached_progbuf = &riscv013_invalidate_cached_progbuf;
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generic_info->fill_dm_write_u64 = &riscv013_fill_dm_write_u64;
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generic_info->fill_dm_read_u64 = &riscv013_fill_dm_read_u64;
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generic_info->fill_dm_nop_u64 = &riscv013_fill_dm_nop_u64;
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@ -2835,7 +2835,7 @@ static int assert_reset(struct target *target)
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/* The DM might have gotten reset if OpenOCD called us in some reset that
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* involves SRST being toggled. So clear our cache which may be out of
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* date. */
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return riscv013_invalidate_cached_debug_buffer(target);
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return riscv013_invalidate_cached_progbuf(target);
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}
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static int deassert_reset(struct target *target)
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@ -2915,7 +2915,7 @@ static int execute_fence(struct target *target)
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* here, but there's no ISA-defined way of doing that. */
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struct riscv_program program;
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/* program.execution_result may indicate RISCV_DBGBUF_EXEC_RESULT_EXCEPTION -
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/* program.execution_result may indicate RISCV_PROGBUF_EXEC_RESULT_EXCEPTION -
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* currently, we ignore this error since most likely this is an indication
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* that target does not support a fence instruction (execution of an
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* unsupported instruction results in "Illegal instruction" exception on
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@ -2928,7 +2928,7 @@ static int execute_fence(struct target *target)
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riscv_program_fence_i(&program);
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riscv_program_fence_rw_rw(&program);
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if (riscv_program_exec(&program, target) != ERROR_OK) {
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if (program.execution_result != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
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if (program.execution_result != RISCV_PROGBUF_EXEC_RESULT_EXCEPTION) {
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LOG_TARGET_ERROR(target, "Unexpected error during fence execution");
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return ERROR_FAIL;
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}
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@ -2941,7 +2941,7 @@ static int execute_fence(struct target *target)
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riscv_program_init(&program, target);
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riscv_program_fence_i(&program);
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if (riscv_program_exec(&program, target) != ERROR_OK) {
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if (program.execution_result != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
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if (program.execution_result != RISCV_PROGBUF_EXEC_RESULT_EXCEPTION) {
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LOG_TARGET_ERROR(target, "Unexpected error during fence.i execution");
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return ERROR_FAIL;
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}
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@ -2951,7 +2951,7 @@ static int execute_fence(struct target *target)
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riscv_program_init(&program, target);
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riscv_program_fence_rw_rw(&program);
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if (riscv_program_exec(&program, target) != ERROR_OK) {
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if (program.execution_result != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
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if (program.execution_result != RISCV_PROGBUF_EXEC_RESULT_EXCEPTION) {
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LOG_TARGET_ERROR(target, "Unexpected error during fence rw, rw execution");
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return ERROR_FAIL;
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}
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@ -5103,7 +5103,7 @@ static enum riscv_halt_reason riscv013_halt_reason(struct target *target)
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return RISCV_HALT_UNKNOWN;
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}
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static int riscv013_write_debug_buffer(struct target *target, unsigned int index, riscv_insn_t data)
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static int riscv013_write_progbuf(struct target *target, unsigned int index, riscv_insn_t data)
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{
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dm013_info_t *dm = get_dm(target);
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if (!dm)
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@ -5118,7 +5118,7 @@ static int riscv013_write_debug_buffer(struct target *target, unsigned int index
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return ERROR_OK;
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}
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static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned int index)
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static riscv_insn_t riscv013_read_progbuf(struct target *target, unsigned int index)
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{
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uint32_t value;
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if (dm_read(target, &value, DM_PROGBUF0 + index) == ERROR_OK)
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@ -5127,7 +5127,7 @@ static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned i
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return 0;
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}
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static int riscv013_invalidate_cached_debug_buffer(struct target *target)
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static int riscv013_invalidate_cached_progbuf(struct target *target)
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{
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dm013_info_t *dm = get_dm(target);
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if (!dm) {
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@ -5141,7 +5141,7 @@ static int riscv013_invalidate_cached_debug_buffer(struct target *target)
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return ERROR_OK;
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}
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static int riscv013_execute_debug_buffer(struct target *target, uint32_t *cmderr)
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static int riscv013_execute_progbuf(struct target *target, uint32_t *cmderr)
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{
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uint32_t run_program = 0;
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run_program = set_field(run_program, AC_ACCESS_REGISTER_AARSIZE, 2);
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@ -3748,8 +3748,8 @@ COMMAND_HANDLER(riscv_dmi_write)
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bool progbuf_touched = (address >= DM_PROGBUF0 && address <= DM_PROGBUF15);
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bool dm_deactivated = (address == DM_DMCONTROL && (value & DM_DMCONTROL_DMACTIVE) == 0);
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if (progbuf_touched || dm_deactivated) {
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if (r->invalidate_cached_debug_buffer)
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r->invalidate_cached_debug_buffer(target);
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if (r->invalidate_cached_progbuf)
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r->invalidate_cached_progbuf(target);
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}
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return retval;
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@ -3818,8 +3818,8 @@ COMMAND_HANDLER(riscv_dm_write)
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bool progbuf_touched = (address >= DM_PROGBUF0 && address <= DM_PROGBUF15);
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bool dm_deactivated = (address == DM_DMCONTROL && (value & DM_DMCONTROL_DMACTIVE) == 0);
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if (progbuf_touched || dm_deactivated) {
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if (r->invalidate_cached_debug_buffer)
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r->invalidate_cached_debug_buffer(target);
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if (r->invalidate_cached_progbuf)
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r->invalidate_cached_progbuf(target);
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}
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return retval;
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@ -4465,7 +4465,7 @@ COMMAND_HANDLER(riscv_exec_progbuf)
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return ERROR_FAIL;
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}
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if (riscv_debug_buffer_size(target) == 0) {
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if (riscv_progbuf_size(target) == 0) {
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LOG_TARGET_ERROR(target, "exec_progbuf: Program buffer not implemented "
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"in the target.");
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return ERROR_FAIL;
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@ -5341,29 +5341,29 @@ static enum riscv_halt_reason riscv_halt_reason(struct target *target)
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return r->halt_reason(target);
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}
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size_t riscv_debug_buffer_size(struct target *target)
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size_t riscv_progbuf_size(struct target *target)
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{
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RISCV_INFO(r);
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return r->debug_buffer_size;
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return r->progbuf_size;
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}
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int riscv_write_debug_buffer(struct target *target, int index, riscv_insn_t insn)
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int riscv_write_progbuf(struct target *target, int index, riscv_insn_t insn)
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{
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RISCV_INFO(r);
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r->write_debug_buffer(target, index, insn);
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r->write_progbuf(target, index, insn);
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return ERROR_OK;
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}
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riscv_insn_t riscv_read_debug_buffer(struct target *target, int index)
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riscv_insn_t riscv_read_progbuf(struct target *target, int index)
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{
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RISCV_INFO(r);
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return r->read_debug_buffer(target, index);
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return r->read_progbuf(target, index);
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}
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int riscv_execute_debug_buffer(struct target *target, uint32_t *cmderr)
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int riscv_execute_progbuf(struct target *target, uint32_t *cmderr)
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{
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RISCV_INFO(r);
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return r->execute_debug_buffer(target, cmderr);
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return r->execute_progbuf(target, cmderr);
|
||||
}
|
||||
|
||||
void riscv_fill_dm_write_u64(struct target *target, char *buf, int a, uint64_t d)
|
||||
|
|
|
|||
|
|
@ -165,8 +165,8 @@ struct riscv_info {
|
|||
* most recent halt was not caused by a trigger, then this is -1. */
|
||||
uint32_t trigger_hit;
|
||||
|
||||
/* The number of entries in the debug buffer. */
|
||||
int debug_buffer_size;
|
||||
/* The number of entries in the program buffer. */
|
||||
int progbuf_size;
|
||||
|
||||
/* This hart contains an implicit ebreak at the end of the program buffer. */
|
||||
bool impebreak;
|
||||
|
|
@ -227,11 +227,10 @@ struct riscv_info {
|
|||
int (*halt_go)(struct target *target);
|
||||
int (*on_step)(struct target *target);
|
||||
enum riscv_halt_reason (*halt_reason)(struct target *target);
|
||||
int (*write_debug_buffer)(struct target *target, unsigned index,
|
||||
riscv_insn_t d);
|
||||
riscv_insn_t (*read_debug_buffer)(struct target *target, unsigned index);
|
||||
int (*execute_debug_buffer)(struct target *target, uint32_t *cmderr);
|
||||
int (*invalidate_cached_debug_buffer)(struct target *target);
|
||||
int (*write_progbuf)(struct target *target, unsigned int index, riscv_insn_t d);
|
||||
riscv_insn_t (*read_progbuf)(struct target *target, unsigned int index);
|
||||
int (*execute_progbuf)(struct target *target, uint32_t *cmderr);
|
||||
int (*invalidate_cached_progbuf)(struct target *target);
|
||||
int (*dmi_write_u64_bits)(struct target *target);
|
||||
void (*fill_dm_write_u64)(struct target *target, char *buf, int a, uint64_t d);
|
||||
void (*fill_dm_read_u64)(struct target *target, char *buf, int a);
|
||||
|
|
@ -427,11 +426,11 @@ int riscv_get_hart_state(struct target *target, enum riscv_hart_state *state);
|
|||
|
||||
/* These helper functions let the generic program interface get target-specific
|
||||
* information. */
|
||||
size_t riscv_debug_buffer_size(struct target *target);
|
||||
size_t riscv_progbuf_size(struct target *target);
|
||||
|
||||
riscv_insn_t riscv_read_debug_buffer(struct target *target, int index);
|
||||
int riscv_write_debug_buffer(struct target *target, int index, riscv_insn_t insn);
|
||||
int riscv_execute_debug_buffer(struct target *target, uint32_t *cmderr);
|
||||
riscv_insn_t riscv_read_progbuf(struct target *target, int index);
|
||||
int riscv_write_progbuf(struct target *target, int index, riscv_insn_t insn);
|
||||
int riscv_execute_progbuf(struct target *target, uint32_t *cmderr);
|
||||
|
||||
void riscv_fill_dm_nop_u64(struct target *target, char *buf);
|
||||
void riscv_fill_dm_write_u64(struct target *target, char *buf, int a, uint64_t d);
|
||||
|
|
|
|||
Loading…
Reference in New Issue