eol-style native

git-svn-id: svn://svn.berlios.de/openocd/trunk@1549 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2009-04-28 06:28:39 +00:00
parent b2a13907a8
commit adbe3ac817
10 changed files with 733 additions and 733 deletions

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@ -1,186 +1,186 @@
/***************************************************************************
* Copyright (C) 2008 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "replacements.h"
#include "jtag.h"
#include "bitbang.h"
/* my private tap controller state, which tracks state for calling code */
static tap_state_t dummy_state = TAP_RESET;
static int dummy_clock; /* edge detector */
static int clock_count; /* count clocks in any stable state, only stable states */
static u32 dummy_data;
static int dummy_speed(int speed);
static int dummy_register_commands(struct command_context_s *cmd_ctx);
static int dummy_init(void);
static int dummy_quit(void);
static int dummy_khz(int khz, int *jtag_speed);
static int dummy_speed_div(int speed, int *khz);
/* The dummy driver is used to easily check the code path
* where the target is unresponsive.
*/
jtag_interface_t dummy_interface =
{
.name = "dummy",
.execute_queue = bitbang_execute_queue,
.speed = dummy_speed,
.register_commands = dummy_register_commands,
.khz = dummy_khz,
.speed_div = dummy_speed_div,
.init = dummy_init,
.quit = dummy_quit,
};
static int dummy_read(void);
static void dummy_write(int tck, int tms, int tdi);
static void dummy_reset(int trst, int srst);
static void dummy_led(int on);
static bitbang_interface_t dummy_bitbang =
{
.read = dummy_read,
.write = dummy_write,
.reset = dummy_reset,
.blink = dummy_led
};
static int dummy_read(void)
{
int data = 1 & dummy_data;
dummy_data = (dummy_data >> 1) | (1<<31);
return data;
}
static void dummy_write(int tck, int tms, int tdi)
{
/* TAP standard: "state transitions occur on rising edge of clock" */
if( tck != dummy_clock )
{
if( tck )
{
tap_state_t old_state = dummy_state;
dummy_state = tap_state_transition( old_state, tms );
if( old_state != dummy_state )
{
if( clock_count )
{
LOG_DEBUG("dummy_tap: %d stable clocks", clock_count);
clock_count = 0;
}
LOG_DEBUG("dummy_tap: %s", tap_state_name(dummy_state) );
#if defined(DEBUG)
if(dummy_state == TAP_DRCAPTURE)
dummy_data = 0x01255043;
#endif
}
else
{
/* this is a stable state clock edge, no change of state here,
* simply increment clock_count for subsequent logging
*/
++clock_count;
}
}
dummy_clock = tck;
}
}
static void dummy_reset(int trst, int srst)
{
dummy_clock = 0;
if (trst || (srst && (jtag_reset_config & RESET_SRST_PULLS_TRST)))
dummy_state = TAP_RESET;
LOG_DEBUG("reset to: %s", tap_state_name(dummy_state) );
}
static int dummy_khz(int khz, int *jtag_speed)
{
if (khz==0)
{
*jtag_speed=0;
}
else
{
*jtag_speed=64000/khz;
}
return ERROR_OK;
}
static int dummy_speed_div(int speed, int *khz)
{
if (speed==0)
{
*khz = 0;
}
else
{
*khz=64000/speed;
}
return ERROR_OK;
}
static int dummy_speed(int speed)
{
return ERROR_OK;
}
static int dummy_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
static int dummy_init(void)
{
bitbang_interface = &dummy_bitbang;
return ERROR_OK;
}
static int dummy_quit(void)
{
return ERROR_OK;
}
static void dummy_led(int on)
{
}
/***************************************************************************
* Copyright (C) 2008 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "replacements.h"
#include "jtag.h"
#include "bitbang.h"
/* my private tap controller state, which tracks state for calling code */
static tap_state_t dummy_state = TAP_RESET;
static int dummy_clock; /* edge detector */
static int clock_count; /* count clocks in any stable state, only stable states */
static u32 dummy_data;
static int dummy_speed(int speed);
static int dummy_register_commands(struct command_context_s *cmd_ctx);
static int dummy_init(void);
static int dummy_quit(void);
static int dummy_khz(int khz, int *jtag_speed);
static int dummy_speed_div(int speed, int *khz);
/* The dummy driver is used to easily check the code path
* where the target is unresponsive.
*/
jtag_interface_t dummy_interface =
{
.name = "dummy",
.execute_queue = bitbang_execute_queue,
.speed = dummy_speed,
.register_commands = dummy_register_commands,
.khz = dummy_khz,
.speed_div = dummy_speed_div,
.init = dummy_init,
.quit = dummy_quit,
};
static int dummy_read(void);
static void dummy_write(int tck, int tms, int tdi);
static void dummy_reset(int trst, int srst);
static void dummy_led(int on);
static bitbang_interface_t dummy_bitbang =
{
.read = dummy_read,
.write = dummy_write,
.reset = dummy_reset,
.blink = dummy_led
};
static int dummy_read(void)
{
int data = 1 & dummy_data;
dummy_data = (dummy_data >> 1) | (1<<31);
return data;
}
static void dummy_write(int tck, int tms, int tdi)
{
/* TAP standard: "state transitions occur on rising edge of clock" */
if( tck != dummy_clock )
{
if( tck )
{
tap_state_t old_state = dummy_state;
dummy_state = tap_state_transition( old_state, tms );
if( old_state != dummy_state )
{
if( clock_count )
{
LOG_DEBUG("dummy_tap: %d stable clocks", clock_count);
clock_count = 0;
}
LOG_DEBUG("dummy_tap: %s", tap_state_name(dummy_state) );
#if defined(DEBUG)
if(dummy_state == TAP_DRCAPTURE)
dummy_data = 0x01255043;
#endif
}
else
{
/* this is a stable state clock edge, no change of state here,
* simply increment clock_count for subsequent logging
*/
++clock_count;
}
}
dummy_clock = tck;
}
}
static void dummy_reset(int trst, int srst)
{
dummy_clock = 0;
if (trst || (srst && (jtag_reset_config & RESET_SRST_PULLS_TRST)))
dummy_state = TAP_RESET;
LOG_DEBUG("reset to: %s", tap_state_name(dummy_state) );
}
static int dummy_khz(int khz, int *jtag_speed)
{
if (khz==0)
{
*jtag_speed=0;
}
else
{
*jtag_speed=64000/khz;
}
return ERROR_OK;
}
static int dummy_speed_div(int speed, int *khz)
{
if (speed==0)
{
*khz = 0;
}
else
{
*khz=64000/speed;
}
return ERROR_OK;
}
static int dummy_speed(int speed)
{
return ERROR_OK;
}
static int dummy_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
static int dummy_init(void)
{
bitbang_interface = &dummy_bitbang;
return ERROR_OK;
}
static int dummy_quit(void)
{
return ERROR_OK;
}
static void dummy_led(int on)
{
}

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@ -1,114 +1,114 @@
import java.io.File;
import java.io.FileOutputStream;
import java.io.IOException;
import java.io.OutputStream;
import javax.xml.parsers.DocumentBuilder;
import javax.xml.parsers.DocumentBuilderFactory;
import javax.xml.parsers.ParserConfigurationException;
import javax.xml.transform.Transformer;
import javax.xml.transform.TransformerConfigurationException;
import javax.xml.transform.TransformerException;
import javax.xml.transform.TransformerFactory;
import javax.xml.transform.dom.DOMSource;
import javax.xml.transform.stream.StreamResult;
import javax.xml.transform.stream.StreamSource;
import org.apache.xpath.XPathAPI;
import org.w3c.dom.Document;
import org.w3c.dom.Node;
import org.w3c.dom.NodeList;
import org.xml.sax.SAXException;
/** used to generate .tcl files from */
public class Stylizer
{
// Global value so it can be ref'd by the tree-adapter
static Document document;
public static void main(String argv[])
{
if (argv.length != 3)
{
System.err.println("Usage: java Stylizer stylesheet xmlfile outputdir");
System.exit(1);
}
DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
try
{
System.err.println("Starting conversion...");
File stylesheet = new File(argv[0]);
File datafile = new File(argv[1]);
DocumentBuilder builder = factory.newDocumentBuilder();
document = builder.parse(datafile);
NodeList list = XPathAPI.selectNodeList(document, "website/language/page");
for (int i=0; i<list.getLength(); i++)
{
Node node=list.item(i);
// Use a Transformer for output
TransformerFactory tFactory = TransformerFactory.newInstance();
StreamSource stylesource = new StreamSource(stylesheet);
Transformer transformer = tFactory.newTransformer(stylesource);
Node fileName = XPathAPI.selectSingleNode(node, "outfile/text()");
System.err.println("Converting " + fileName.getNodeValue());
DOMSource source = new DOMSource(document);
OutputStream output=new FileOutputStream(new File(argv[2], fileName.getNodeValue()));
try
{
StreamResult result = new StreamResult(output);
transformer.setParameter("pagetogenerate", fileName.getNodeValue());
transformer.transform(source, result);
}
finally
{
output.close();
}
}
} catch (TransformerConfigurationException tce)
{
// Error generated by the parser
System.out.println("\n** Transformer Factory error");
System.out.println(" " + tce.getMessage());
// Use the contained exception, if any
Throwable x = tce;
if (tce.getException() != null)
x = tce.getException();
x.printStackTrace();
} catch (TransformerException te)
{
// Error generated by the parser
System.out.println("\n** Transformation error");
System.out.println(" " + te.getMessage());
// Use the contained exception, if any
Throwable x = te;
if (te.getException() != null)
x = te.getException();
x.printStackTrace();
} catch (SAXException sxe)
{
// Error generated by this application
// (or a parser-initialization error)
Exception x = sxe;
if (sxe.getException() != null)
x = sxe.getException();
x.printStackTrace();
} catch (ParserConfigurationException pce)
{
// Parser with specified options can't be built
pce.printStackTrace();
} catch (IOException ioe)
{
// I/O error
ioe.printStackTrace();
}
} // main
}
import java.io.File;
import java.io.FileOutputStream;
import java.io.IOException;
import java.io.OutputStream;
import javax.xml.parsers.DocumentBuilder;
import javax.xml.parsers.DocumentBuilderFactory;
import javax.xml.parsers.ParserConfigurationException;
import javax.xml.transform.Transformer;
import javax.xml.transform.TransformerConfigurationException;
import javax.xml.transform.TransformerException;
import javax.xml.transform.TransformerFactory;
import javax.xml.transform.dom.DOMSource;
import javax.xml.transform.stream.StreamResult;
import javax.xml.transform.stream.StreamSource;
import org.apache.xpath.XPathAPI;
import org.w3c.dom.Document;
import org.w3c.dom.Node;
import org.w3c.dom.NodeList;
import org.xml.sax.SAXException;
/** used to generate .tcl files from */
public class Stylizer
{
// Global value so it can be ref'd by the tree-adapter
static Document document;
public static void main(String argv[])
{
if (argv.length != 3)
{
System.err.println("Usage: java Stylizer stylesheet xmlfile outputdir");
System.exit(1);
}
DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
try
{
System.err.println("Starting conversion...");
File stylesheet = new File(argv[0]);
File datafile = new File(argv[1]);
DocumentBuilder builder = factory.newDocumentBuilder();
document = builder.parse(datafile);
NodeList list = XPathAPI.selectNodeList(document, "website/language/page");
for (int i=0; i<list.getLength(); i++)
{
Node node=list.item(i);
// Use a Transformer for output
TransformerFactory tFactory = TransformerFactory.newInstance();
StreamSource stylesource = new StreamSource(stylesheet);
Transformer transformer = tFactory.newTransformer(stylesource);
Node fileName = XPathAPI.selectSingleNode(node, "outfile/text()");
System.err.println("Converting " + fileName.getNodeValue());
DOMSource source = new DOMSource(document);
OutputStream output=new FileOutputStream(new File(argv[2], fileName.getNodeValue()));
try
{
StreamResult result = new StreamResult(output);
transformer.setParameter("pagetogenerate", fileName.getNodeValue());
transformer.transform(source, result);
}
finally
{
output.close();
}
}
} catch (TransformerConfigurationException tce)
{
// Error generated by the parser
System.out.println("\n** Transformer Factory error");
System.out.println(" " + tce.getMessage());
// Use the contained exception, if any
Throwable x = tce;
if (tce.getException() != null)
x = tce.getException();
x.printStackTrace();
} catch (TransformerException te)
{
// Error generated by the parser
System.out.println("\n** Transformation error");
System.out.println(" " + te.getMessage());
// Use the contained exception, if any
Throwable x = te;
if (te.getException() != null)
x = te.getException();
x.printStackTrace();
} catch (SAXException sxe)
{
// Error generated by this application
// (or a parser-initialization error)
Exception x = sxe;
if (sxe.getException() != null)
x = sxe.getException();
x.printStackTrace();
} catch (ParserConfigurationException pce)
{
// Parser with specified options can't be built
pce.printStackTrace();
} catch (IOException ioe)
{
// I/O error
ioe.printStackTrace();
}
} // main
}

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@ -1,42 +1,42 @@
# for avr
set _CHIPNAME avr
set _ENDIAN little
# jtag speed
jtag_khz 4500
reset_config srst_only
jtag_nsrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x8970203F
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME
#$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
flash bank avr 0 0 0 0 0
#to use it, script will be like:
#init
#jtag_khz 4500
#reset init
#verify_ircapture disable
#
#halt
#wait halt
#poll
#avr mass_erase 0
#flash write_image E:/Versaloon/Software/CAMERAPROTOCOLAGENT.hex
#reset run
#shutdown
#
# For more information about the configuration files, take a look at:
# openocd.texi
# for avr
set _CHIPNAME avr
set _ENDIAN little
# jtag speed
jtag_khz 4500
reset_config srst_only
jtag_nsrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x8970203F
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME
#$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
flash bank avr 0 0 0 0 0
#to use it, script will be like:
#init
#jtag_khz 4500
#reset init
#verify_ircapture disable
#
#halt
#wait halt
#poll
#avr mass_erase 0
#flash write_image E:/Versaloon/Software/CAMERAPROTOCOLAGENT.hex
#reset run
#shutdown
#
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -1,32 +1,32 @@
target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable
# WDT_MR, disable watchdog
monitor mww 0xFFFFFD44 0x00008000
# RSTC_MR, enable user reset
monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR
monitor mww 0xFFFFFC20 0x00000601
monitor sleep 10
# CKGR_PLLR
monitor mww 0xFFFFFC2C 0x00481c0e
monitor sleep 10
# PMC_MCKR
monitor mww 0xFFFFFC30 0x00000007
monitor sleep 10
# PMC_IER
monitor mww 0xFFFFFF60 0x00480100
monitor sleep 100
load
break main
continue
target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable
# WDT_MR, disable watchdog
monitor mww 0xFFFFFD44 0x00008000
# RSTC_MR, enable user reset
monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR
monitor mww 0xFFFFFC20 0x00000601
monitor sleep 10
# CKGR_PLLR
monitor mww 0xFFFFFC2C 0x00481c0e
monitor sleep 10
# PMC_MCKR
monitor mww 0xFFFFFC30 0x00000007
monitor sleep 10
# PMC_IER
monitor mww 0xFFFFFF60 0x00480100
monitor sleep 100
load
break main
continue

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@ -1,32 +1,32 @@
target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable
# WDT_MR, disable watchdog
monitor mww 0xFFFFFD44 0x00008000
# RSTC_MR, enable user reset
monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR
monitor mww 0xFFFFFC20 0x00000601
monitor sleep 10
# CKGR_PLLR
monitor mww 0xFFFFFC2C 0x00481c0e
monitor sleep 10
# PMC_MCKR
monitor mww 0xFFFFFC30 0x00000007
monitor sleep 10
# PMC_IER
monitor mww 0xFFFFFF60 0x00480100
monitor sleep 100
load
break main
continue
target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable
# WDT_MR, disable watchdog
monitor mww 0xFFFFFD44 0x00008000
# RSTC_MR, enable user reset
monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR
monitor mww 0xFFFFFC20 0x00000601
monitor sleep 10
# CKGR_PLLR
monitor mww 0xFFFFFC2C 0x00481c0e
monitor sleep 10
# PMC_MCKR
monitor mww 0xFFFFFC30 0x00000007
monitor sleep 10
# PMC_IER
monitor mww 0xFFFFFF60 0x00480100
monitor sleep 100
load
break main
continue

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@ -1,40 +1,40 @@
#daemon configuration
telnet_port 4444
gdb_port 3333
# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable
#interface
interface ft2232
ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_speed 0
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
target_script 0 reset .\prj\sam7x256_reset.script
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank at91sam7 0 0 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
init
reset halt
#daemon configuration
telnet_port 4444
gdb_port 3333
# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable
#interface
interface ft2232
ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_speed 0
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
target_script 0 reset .\prj\sam7x256_reset.script
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank at91sam7 0 0 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
init
reset halt

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@ -1,132 +1,132 @@
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 30.03.06 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)
/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;
MEMORY
{
ram : org = 0x00200000, len = 64k
}
/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > ram
.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram
.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
. = ALIGN(256);
PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram
}
/*** EOF ***/
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 30.03.06 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)
/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;
MEMORY
{
ram : org = 0x00200000, len = 64k
}
/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > ram
.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram
.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
. = ALIGN(256);
PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram
}
/*** EOF ***/

View File

@ -1,17 +1,17 @@
#
# Init - taken form the script openocd_at91sam7_ecr.script
#
# I take this script from the following page:
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
mww 0xfffffd44 0x00008000 # disable watchdog
mww 0xfffffd08 0xa5000001 # enable user reset
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
sleep 10
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
sleep 10
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
sleep 10
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
sleep 100
#
# Init - taken form the script openocd_at91sam7_ecr.script
#
# I take this script from the following page:
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
mww 0xfffffd44 0x00008000 # disable watchdog
mww 0xfffffd08 0xa5000001 # enable user reset
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
sleep 10
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
sleep 10
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
sleep 10
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
sleep 100

View File

@ -1,133 +1,133 @@
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 26.01.08 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)
/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;
MEMORY
{
rom : org = 0x00100000, len = 256k
ram : org = 0x00200000, len = 64k
}
/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > rom
.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram
.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
. = ALIGN(256);
PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram
}
/*** EOF ***/
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 26.01.08 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)
/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;
MEMORY
{
rom : org = 0x00100000, len = 256k
ram : org = 0x00200000, len = 64k
}
/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > rom
.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram
.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
. = ALIGN(256);
PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram
}
/*** EOF ***/

View File

@ -1,6 +1,6 @@
Olimex STM32-p103 board.
main.elf is a file that can be programmed to flash for
testing purposes(e.g. test GDB load performance).
Olimex STM32-p103 board.
main.elf is a file that can be programmed to flash for
testing purposes(e.g. test GDB load performance).
http://www.olimex.com/dev/stm32-p103.html