bluenrg: add support for bluenrg-lps device and board
Added bluenrg-lps support Added file for the board steval-idb012v1 Fixed size_info information using a mask Changed the if condition in bluenrg-x.cfg to be valid only for bluenrg-1 and bluenrg-2 Signed-off-by: Salvatore Giorgio PECORINO <salvatore-giorgio.pecorino@st.com> Change-Id: Ic0777ec0811ee6fac7d5e1d065c4629e47d84a1f Reviewed-on: https://review.openocd.org/c/openocd/+/6928 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -6418,7 +6418,7 @@ The AVR 8-bit microcontrollers from Atmel integrate flash memory.
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@end deffn
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@deffn {Flash Driver} {bluenrg-x}
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STMicroelectronics BlueNRG-1, BlueNRG-2 and BlueNRG-LP Bluetooth low energy wireless system-on-chip. They include ARM Cortex-M0/M0+ core and internal flash memory.
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STMicroelectronics BlueNRG-1, BlueNRG-2 and BlueNRG-LP/LPS Bluetooth low energy wireless system-on-chip. They include ARM Cortex-M0/M0+ core and internal flash memory.
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The driver automatically recognizes these chips using
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the chip identification registers, and autoconfigures itself.
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@ -35,6 +35,8 @@
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#define JTAG_IDCODE_REG(bluenrgx_info) (bluenrgx_info->flash_ptr->jtag_idcode_reg)
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#define FLASH_PAGE_SIZE(bluenrgx_info) (bluenrgx_info->flash_ptr->flash_page_size)
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#define FLASH_SIZE_REG_MASK (0xFFFF)
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struct flash_ctrl_priv_data {
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uint32_t die_id_reg;
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uint32_t jtag_idcode_reg;
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@ -75,6 +77,16 @@ static const struct flash_ctrl_priv_data flash_priv_data_lp = {
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.part_name = "BLUENRG-LP",
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};
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static const struct flash_ctrl_priv_data flash_priv_data_lps = {
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.die_id_reg = 0x40000000,
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.jtag_idcode_reg = 0x40000004,
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.flash_base = 0x10040000,
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.flash_regs_base = 0x40001000,
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.flash_page_size = 2048,
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.jtag_idcode = 0x02028041,
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.part_name = "BLUENRG-LPS",
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};
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struct bluenrgx_flash_bank {
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bool probed;
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uint32_t die_id;
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@ -84,8 +96,8 @@ struct bluenrgx_flash_bank {
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static const struct flash_ctrl_priv_data *flash_ctrl[] = {
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&flash_priv_data_1,
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&flash_priv_data_2,
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&flash_priv_data_lp
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};
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&flash_priv_data_lp,
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&flash_priv_data_lps};
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/* flash_bank bluenrg-x 0 0 0 0 <target#> */
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FLASH_BANK_COMMAND_HANDLER(bluenrgx_flash_bank_command)
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@ -377,7 +389,7 @@ static int bluenrgx_probe(struct flash_bank *bank)
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if (retval != ERROR_OK)
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return retval;
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if (idcode != flash_priv_data_lp.jtag_idcode) {
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if ((idcode != flash_priv_data_lp.jtag_idcode) && (idcode != flash_priv_data_lps.jtag_idcode)) {
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retval = target_read_u32(bank->target, BLUENRG2_JTAG_REG, &idcode);
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if (retval != ERROR_OK)
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return retval;
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@ -395,6 +407,7 @@ static int bluenrgx_probe(struct flash_bank *bank)
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}
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}
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retval = bluenrgx_read_flash_reg(bank, FLASH_SIZE_REG, &size_info);
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size_info = size_info & FLASH_SIZE_REG_MASK;
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if (retval != ERROR_OK)
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return retval;
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@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-or-later.
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# This is an evaluation board with a single BlueNRG-LPS chip.
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set CHIPNAME bluenrg-lps
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source [find interface/cmsis-dap.cfg]
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source [find target/bluenrg-x.cfg]
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@ -47,11 +47,14 @@ if {![using_hla]} {
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cortex_m reset_config sysresetreq
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}
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set JTAG_IDCODE_B2 0x0200A041
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set JTAG_IDCODE_B1 0x0
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$_TARGETNAME configure -event halted {
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global WDOG_VALUE
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global WDOG_VALUE_SET
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set _JTAG_IDCODE [mrw 0x40000004]
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if {$_JTAG_IDCODE != 0x0201E041} {
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if {$_JTAG_IDCODE == $JTAG_IDCODE_B2 || $_JTAG_IDCODE == $JTAG_IDCODE_B1} {
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# Stop watchdog during halt, if enabled. Only Bluenrg-1/2
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set WDOG_VALUE [mrw 0x40700008]
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if [expr {$WDOG_VALUE & (1 << 1)}] {
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@ -64,7 +67,7 @@ $_TARGETNAME configure -event resumed {
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global WDOG_VALUE
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global WDOG_VALUE_SET
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set _JTAG_IDCODE [mrw 0x40000004]
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if {$_JTAG_IDCODE != 0x0201E041} {
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if {$_JTAG_IDCODE == $JTAG_IDCODE_B2 || $_JTAG_IDCODE == $JTAG_IDCODE_B1} {
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if {$WDOG_VALUE_SET} {
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# Restore watchdog enable value after resume. Only Bluenrg-1/2
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mww 0x40700008 $WDOG_VALUE
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