David Brownell <david-b@pacbell.net> Bugfix some instruction decoding ... I've crafted asm files
with testcases covering several new encodings in these sections of the ARMv7-M arch manual: A5.3.12 Data processing (register) A5.3.13 Miscellaneous operations A5.3.14 Multiply, and multiply accumulate A5.3.15 Long multiply, long multiply accumulate, and divide The issues were mostly in '12 and '13; some new related 16-bit opcodes had issues too. git-svn-id: svn://svn.berlios.de/openocd/trunk@2563 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -2098,7 +2098,7 @@ static int evaluate_byterev_thumb(uint16_t opcode, uint32_t address,
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char *suffix;
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char *suffix;
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/* added in ARMv6 */
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/* added in ARMv6 */
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switch (opcode & 0x00c0) {
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switch ((opcode >> 6) & 3) {
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case 0:
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case 0:
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suffix = "";
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suffix = "";
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break;
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break;
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@ -3201,7 +3201,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
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(int) (opcode >> 0) & 0xf);
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(int) (opcode >> 0) & 0xf);
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} else if (opcode & (1 << 7)) {
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} else if (opcode & (1 << 7)) {
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switch ((opcode >> 24) & 0xf) {
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switch ((opcode >> 20) & 0xf) {
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case 0:
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case 0:
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case 1:
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case 1:
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case 4:
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case 4:
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@ -3221,7 +3221,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
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(opcode & (1 << 24)) ? 'U' : 'S',
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(opcode & (1 << 24)) ? 'U' : 'S',
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(opcode & (1 << 26)) ? 'B' : 'H',
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(opcode & (1 << 26)) ? 'B' : 'H',
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(int) (opcode >> 8) & 0xf,
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(int) (opcode >> 8) & 0xf,
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(int) (opcode >> 16) & 0xf,
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(int) (opcode >> 0) & 0xf,
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suffix);
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suffix);
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break;
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break;
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case 8:
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case 8:
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@ -3230,7 +3230,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
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case 0xb:
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case 0xb:
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if (opcode & (1 << 6))
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if (opcode & (1 << 6))
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return ERROR_INVALID_ARGUMENTS;
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return ERROR_INVALID_ARGUMENTS;
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if (~opcode & (0xff << 12))
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if (((opcode >> 12) & 0xf) != 0xf)
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return ERROR_INVALID_ARGUMENTS;
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return ERROR_INVALID_ARGUMENTS;
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if (!(opcode & (1 << 20)))
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if (!(opcode & (1 << 20)))
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return ERROR_INVALID_ARGUMENTS;
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return ERROR_INVALID_ARGUMENTS;
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